Array substrate and manufacturing method thereof, and display panel

Abstract

The present invention relates to the field of display technology, and discloses an array substrate, a method for manufacturing the same, and a display panel. The array substrate comprises: a substrate, and a first conductive layer, an insulating layer, and a second conductive layer stacked in sequence. A buffer groove is formed in the insulating layer, and the sidewalls of at least one side of the buffer groove form a slope structure that tilts radially outward along the buffer groove. The surface of the slope structure faces the direction away from the substrate, and the surface of the slope structure extends from the top surface of the insulating layer to the bottom of the buffer groove. The orthographic projection of the second conductive layer on the substrate overlaps with the orthographic projection of the first conductive layer on the substrate, and the orthographic projection of the buffer groove on the substrate overlaps with the overlapping region. A portion of the second conductive layer extends to the bottom of the buffer groove through the slope structure. In the array substrate, the sidewalls of the buffer groove have a slope structure that acts as a buffer, thereby ensuring good continuity of the conductive layer within the buffer groove and reliable signal transmission in the conductive layer.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to an array substrate and a preparation method thereof, and a display panel. Background Art

[0002] In OLED backplane manufacturing technology, in order to cope with the stacking of multiple devices, the number of masks increases, and deep hole overlap phenomena will frequently occur. The metal film layer serves as a overlap line, and a film is formed in the deep hole to form an overlap line. Because the film formation amount in the same film formation area is the same when the metal film is formed, and the surface area inside the deep hole is larger, and the slope of the side wall of the deep hole is relatively large, the metal film layer in the deep hole will be thinner, and the film layer will easily be discontinuous at steps or corners, which may easily lead to metal wire breakage or film layer voids, cracks and other problems, and easily lead to the risk of disconnection in the deep hole overlap of the metal wire, affecting the signal transmission function of the metal wire. Summary of the Invention

[0003] The present invention discloses an array substrate, a preparation method thereof, and a display panel. In the array substrate, a side wall of a buffer groove has a slope structure, and the slope structure has a certain inclination, which can enable the conductive layer in the buffer groove to extend from the surface of the slope structure to the bottom of the buffer groove, thereby playing a buffering role, so that the conductive layer in the buffer groove has better continuity, thereby ensuring the reliability of signal transmission of the conductive layer in the buffer groove.

[0004] To achieve the above object, the present invention provides the following technical solutions:

[0005] An array substrate, comprising:

[0006] substrate;

[0007] a first conductive layer located on the substrate;

[0008] an insulating layer located on the first conductive layer, wherein a buffer groove is formed in the insulating layer, wherein a sidewall of at least one side of the buffer groove forms a slope structure inclined outwardly in a radial direction of the buffer groove, wherein a surface of the slope structure faces a direction away from the substrate, and wherein sidewalls of the buffer groove other than the slope structure are substantially perpendicular to the substrate, and wherein a surface of the slope structure extends from a top surface of the insulating layer to a bottom of the buffer groove;

[0009] A second conductive layer is located on the side of the insulating layer facing away from the substrate, the orthographic projection of the second conductive layer on the substrate and the orthographic projection of the first conductive layer on the substrate have an overlapping area, and the orthographic projection of the buffer groove on the substrate overlaps with the overlapping area, and a portion of the second conductive layer extends to the bottom of the buffer groove through the slope structure.

[0010] Therefore, in the above-mentioned array substrate, at least one side of the buffer groove has a slope structure, and the slope structure has a certain inclination, which can make the conductive layer in the buffer groove extend from the surface of the slope structure to the bottom of the buffer groove, playing a buffering role, so that the conductive layer in the buffer groove has better continuity, thereby ensuring the reliability of signal transmission of the conductive layer in the buffer groove.

[0011] Optionally, the first conductive layer includes an electrode structure, and the buffer groove is provided at a position of the insulating layer opposite to the electrode structure. The buffer groove opposite to the electrode structure is a first buffer groove, and the first buffer groove penetrates the insulating layer to expose part of the electrode structure. The second conductive layer includes a conductive connecting line, and the conductive connecting line extends to the bottom of the first buffer groove through the slope structure to be connected to the electrode structure.

[0012] Optionally, a ratio of an area of ​​an orthographic projection of the slope structure on the first conductive layer to an area of ​​the first conductive layer exposed at the bottom of the first buffer groove is 0.6-2.

[0013] Optionally, the area of ​​the first conductive layer exposed at the bottom of the first buffer tank is 2-15 square micrometers.

[0014] Optionally, the first conductive layer includes a first conductive trace, the second conductive layer includes a second conductive trace, and the orthographic projection of the first conductive trace on the substrate intersects with the orthographic projection of the second conductive trace on the substrate, the buffer groove is provided at a portion of the insulating layer opposite to the area where the first conductive trace and the second conductive trace intersect, and the buffer groove opposite to the area where the first conductive trace and the second conductive trace intersect is the second buffer groove, the second buffer groove does not penetrate the insulating layer, the peripheral side of the second buffer groove has two slope structures, and the two slope structures are located on opposite sides of the peripheral side of the second buffer groove, and the distribution direction of the two slope structures is the same as the extension direction of the second conductive trace.

[0015] Optionally, the slope structure is provided in the buffer groove along the extending direction of the conductive connecting line.

[0016] Optionally, the substrate is a first flexible substrate, the insulating layer includes a second flexible substrate and an insulating dielectric layer stacked in sequence, the insulating dielectric layer is located on a side of the second flexible substrate facing away from the first flexible substrate, and the first conductive layer is located between the first flexible substrate and the second flexible substrate.

[0017] Optionally, an angle between the surface of the slope structure and the substrate is less than or equal to 70°.

[0018] Optionally, a depth dimension of the buffer groove along a direction perpendicular to the substrate is greater than or equal to 3 μm.

[0019] Optionally, the first conductive layer is a metal layer; and / or the second conductive layer is a metal layer.

[0020] Optionally, a wiring is provided in the non-display area of ​​the substrate, and an interlayer insulating layer is provided on the side of the wiring facing the substrate, an edge portion of the interlayer insulating layer forms a wedge-shaped structure, a surface of the wedge-shaped structure facing away from the substrate is an inclined surface, an angle between the inclined surface and the substrate is less than or equal to 70°, and the wiring crosses the edge of the interlayer insulating layer through the wedge-shaped structure.

[0021] Optionally, a conductive film layer is provided in the non-display area of ​​the substrate, and the edge of the conductive film layer forms a wedge-shaped structure. The surface of the wedge-shaped structure facing away from the substrate is an inclined surface, and the angle between the inclined surface and the substrate is less than or equal to 70°; an interlayer dielectric layer is provided on the side of the conductive film layer facing away from the substrate, the interlayer dielectric layer covers the conductive film layer, and the interlayer dielectric layer spans the edge of the conductive film layer through the wedge-shaped structure.

[0022] The present invention further provides a display panel, comprising any one of the array substrates provided in the above technical solutions.

[0023] Based on the same inventive concept, the present invention also provides a method for preparing an array substrate, comprising:

[0024] forming a substrate;

[0025] forming a first conductive layer on a substrate;

[0026] An insulating layer is formed on the first conductive layer, wherein a buffer groove is formed in the insulating layer, wherein a sidewall of at least one side of the buffer groove forms a slope structure inclined outwardly along the radial direction of the buffer groove, a surface of the slope structure faces a direction away from the substrate, and sidewalls of the buffer groove except the slope structure are substantially perpendicular to the substrate, and a surface of the slope structure extends from the top surface of the insulating layer to the bottom of the buffer groove;

[0027] A second conductive layer is formed on the insulating layer, the orthographic projection of the second conductive layer on the substrate and the orthographic projection of the first conductive layer on the substrate have an overlapping area, and the orthographic projection of the buffer groove on the substrate overlaps with the overlapping area, and a portion of the second conductive layer extends to the bottom of the buffer groove through the slope structure.

[0028] Optionally, forming an insulating layer on the substrate specifically includes:

[0029] The buffer groove is formed by adopting an etching process.

[0030] Optionally, forming an insulating layer on the substrate specifically includes:

[0031] First, a first etching process is used to form a groove in the insulating layer;

[0032] Then, a second etching process is used to form the slope structure on the peripheral side of the groove to form the buffer groove. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 A schematic diagram of a film layer structure during the preparation of an array substrate provided by an embodiment of the present invention;

[0034] Figure 2 for Figure 1 Top view of the local membrane structure;

[0035] Figure 3 A schematic diagram of a film layer structure during the preparation of an array substrate provided by an embodiment of the present invention;

[0036] Figure 4 for Figure 3 Top view of the local membrane structure;

[0037] Figure 5 A schematic diagram of a partial film layer structure of an array substrate provided by an embodiment of the present invention;

[0038] Figure 6 for Figure 5 Top view of the local membrane structure;

[0039] Figure 7 A schematic diagram of a partial film layer structure of an array substrate provided by an embodiment of the present invention;

[0040] Figure 8 A physical diagram of the film layer structure of a non-display area of ​​an array substrate provided by an embodiment of the present invention;

[0041] Figure 9 A physical diagram of the film layer structure of a non-display area of ​​an array substrate provided by an embodiment of the present invention;

[0042] Figure 10 A schematic flow chart of a method for preparing an array substrate provided in an embodiment of the present invention;

[0043] Icon: 1-substrate; 2-first conductive layer; 3-insulating layer; 4-second conductive layer; 5-buffer groove; 6-buffer layer; 7-routing; 8-interlayer insulating layer; 9-conductive film layer; 10-interlayer dielectric layer; 31-second flexible substrate; 32-insulating dielectric layer; 51-groove; 52-slope structure. DETAILED DESCRIPTION

[0044] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0045] like Figure 5 and Figure 6 As shown, an embodiment of the present invention provides an array substrate, which includes: a substrate 1, a first conductive layer 2 is provided on the substrate 1, an insulating layer 3 is provided on the side of the first conductive layer 2 facing away from the substrate, wherein a buffer groove 5 is formed in the insulating layer 3, and the side wall of at least one side of the buffer groove 5 forms a slope structure 52 inclined radially outward along the buffer groove 5, the surface of the slope structure 52 is facing the direction of the slope structure 52 away from the substrate, and the angle between the surface of the slope structure 52 and the substrate is called the slope angle of the slope structure 52, the side walls of the buffer groove 5 except the slope structure 52 are roughly perpendicular to the substrate, and the slope angle of the slope structure 52 is smaller than the side walls of other parts of the buffer groove 5, specifically, the slope angle of the slope structure 52 can be set to be less than or equal to 70°, and the surface of the slope structure 52 is connected from the top surface of the insulating layer 3 to the bottom of the buffer groove 5; a second conductive layer 4 is provided on the side of the insulating layer 3 facing away from the substrate, and the orthographic projection of the second conductive layer 4 on the substrate is the same as that of the first conductive layer 2 on the substrate The orthographic projection on the bottom has an overlapping area, and the orthographic projection of the buffer groove 5 on the substrate overlaps with the overlapping area. Specifically, at least a part of the orthographic projection of the buffer groove 5 on the substrate is located in the overlapping area of ​​the first conductive layer 2 and the second conductive layer 4. A part of the second conductive layer 4 extends to the bottom of the buffer groove 5 through the slope structure 52. For the convenience of explanation, the part of the second conductive layer 4 extending into the buffer groove 5 can be called a lap joint. Since the slope structure 52 has a certain inclination, the slope of the side wall of the buffer groove 5 is reduced to form a gentle slope, which effectively alleviates the problem of the conductive layer in the opening being broken due to the large slope angle of the deeper opening during the film preparation process. During the preparation of the second conductive layer 4, the surface of the slope structure 52 can form a uniform and continuous film layer, which can make the lap joint formed from the slope structure 52 to the bottom of the buffer groove 5 uniform in thickness and continuous, avoid excessive resistance, and effectively ensure the continuity of film formation of the lap joint of the second conductive layer 4, and ensure the reliability of signal transmission of the second conductive layer 4.

[0046] Therefore, in the above-mentioned array substrate, the side wall of the buffer groove 5 has a slope structure 52, and the slope structure 52 has a certain inclination, which can make the conductive layer in the buffer groove 5 extend from the surface of the slope structure 52 to the bottom of the buffer groove 5, playing a buffering role, so that the conductive layer in the buffer groove 5 has better continuity, thereby ensuring the reliability of signal transmission of the conductive layer in the buffer groove 5.

[0047] Specifically, the number of buffer slots in the insulating layer can be one or more, and can be set according to the number of overlapping areas between the conductive layers above and below the insulating layer, which is not limited in this embodiment.

[0048] Among them, in one possible embodiment, combined with Figure 3 ,like Figure 5 As shown, the first conductive layer includes an electrode structure, and a buffer groove 5 is provided at a position opposite to the electrode structure in the insulating layer 3. The buffer groove 5 opposite to the electrode structure can serve as a first buffer groove, wherein the orthographic projection of the first buffer groove on the substrate can be within the orthographic projection of the electrode structure on the substrate, and the first buffer groove penetrates the insulating layer, and can expose part of the electrode structure. The second conductive layer 4 includes a conductive connecting line, and the orthographic projection of a part of the conductive connecting line on the substrate overlaps with the orthographic projection of the electrode structure on the substrate, and the orthographic projection of this part of the conductive connecting line on the substrate covers the orthographic projection of the first buffer groove on the substrate. A part of the conductive connecting line can extend along the surface of the slope structure 52 to the bottom of the first buffer groove and be connected to the electrode structure. That is, the conductive connecting line extends to the bottom of the first buffer groove through the slope structure 52 to connect with the electrode structure, which can make the continuity of the conductive connecting line in the buffer groove 5 better, ensure the continuity of the conductive connecting line, and ensure that the electrical connection reliability between the conductive connecting line and the electrode structure is better.

[0049] During specific implementation, the ratio of the area of ​​the slope structure's direct projection on the first conductive layer to the area of ​​the first conductive layer exposed at the bottom of the first buffer groove can be set to 0.6-2, that is, the ratio of the area of ​​the slope structure's direct projection on the first conductive layer to the area of ​​the bottom opening of the first buffer groove is set to be between 0.6 and 2, so that the surface of the slope structure and the bottom opening of the first buffer groove have a reasonable ratio, which can ensure that a conductive layer with uniform thickness can be formed on the surface of the slope structure, ensure the continuity of the conductive connection line, and have a suitable contact area with the first conductive layer at the bottom of the first buffer groove, ensuring the connection stability of the conductive connection line and the first conductive layer; preferably, the ratio of the area of ​​the slope structure's direct projection on the first conductive layer to the area of ​​the first conductive layer exposed at the bottom of the first buffer groove is 0.8-1.8, or 1-1.5.

[0050] More specifically, the area of ​​the first conductive layer exposed at the bottom of the first buffer tank is set to 2-15 square microns, so that the opening at the bottom of the first buffer tank can expose enough of the first conductive layer to contact and connect with the conductive connecting line in the first buffer tank, thereby ensuring the stability of the connection. Preferably, the area of ​​the first conductive layer exposed at the bottom of the first buffer tank can be specifically set to 3-13 square microns, 4-13 square microns, 4-5 square microns or 7-12 square microns.

[0051] In specific implementation, Figure 5 and Figure 6 As shown, the first buffer groove can be provided with a slope structure 52 along the extension direction of the conductive connection line. The slope structure 52 is located in the extension direction of the conductive connection line, so that the conductive connection line extends straight along the extension direction into the buffer groove 5 and connects with the electrode structure, which facilitates preparation and saves the area occupied by the conductive connection line, saving preparation space.

[0052] In addition, in the above array substrate, Figure 5 As shown, the substrate 1 can be a flexible substrate, and the substrate is called a first flexible substrate, and the insulating layer includes a second flexible substrate 31 and an insulating dielectric layer 32 stacked in sequence, the insulating dielectric layer 32 is located on the side of the second flexible substrate 31 facing away from the first flexible substrate, and the first conductive layer 2 is located between the first flexible substrate and the second flexible substrate 31. The first flexible substrate and the second flexible substrate 31 form a double-layer flexible substrate, which enhances the structural properties of the substrate substrate, and the first conductive layer 2 is arranged between the two flexible substrates, reducing the setting of a conductive layer on the substrate, thereby enhancing the overall film layer structure of the array substrate; in addition, a buffer layer 6 is provided between the first flexible substrate and the second flexible substrate 31, which is provided on the same layer as the first conductive layer 2.

[0053] In another possible embodiment, Figure 7As shown, the first conductive layer 2 includes a first conductive trace, the second conductive layer 4 includes a second conductive trace, and the orthographic projection of the first conductive trace on the substrate intersects with the orthographic projection of the second conductive trace on the substrate, a buffer groove 5 is provided at a portion of the insulating layer opposite to the region where the first conductive trace and the second conductive trace intersect, and the buffer groove 5 opposite to the region where the first conductive trace and the second conductive trace intersect is a second buffer groove, the second buffer groove does not penetrate the insulating layer, and the orthographic projection of the second buffer groove on the substrate is within the intersection region of the first conductive trace and the second conductive trace, and the peripheral side of the second buffer groove has two slope structures 52, and the two slope structures 52 are located on the peripheral side of the second buffer groove. On the two opposite sides, the distribution direction of the two slope structures 52 is the same as the extension direction of the second conductive trace. The slope structures 52 are respectively arranged on both sides of the buffer groove 5 along the extension direction of the second conductive trace. The second conductive trace can extend to the bottom of the buffer groove 5 along one slope structure 52, and then extend out of the buffer groove 5 along another slope structure 52. In the buffer groove 5, a part of the second conductive trace is recessed downward, which can reduce the thickness of the film layer stacking at the intersection of the first conductive trace and the second conductive trace, so that the difference in thickness of the film layer stacking between this part and other parts is reduced, which is beneficial to improving the flatness of the intersection area of ​​the upper and lower conductive traces and enhancing the display effect.

[0054] Furthermore, an interlayer dielectric layer may be provided on the second conductive layer, a third conductive layer may be provided in the interlayer dielectric layer, the third conductive layer may include a third conductive trace, and the orthographic projection of the third conductive trace on the substrate also has an intersection area with the orthographic projection of the second conductive trace on the substrate. Then, in the insulating layer, a buffer groove may be provided at a portion opposite to the intersection area of ​​the third conductive trace and the second conductive trace, and may be referred to as a third buffer groove, and the peripheral side of the third buffer groove has two slope structures, and the two slope structures are located on opposite sides of the peripheral side of the third buffer groove, and the distribution direction of the two slope structures is as follows: In the same direction as the extension direction of the second conductive trace, slope structures are respectively arranged on both sides of the buffer groove along the extension direction of the second conductive trace. The second conductive trace can extend to the bottom of the buffer groove along one slope structure, and then extend out of the buffer groove along another slope structure. In the buffer groove, a portion of the second conductive trace is recessed downward, which can reduce the thickness of the film layer stacking at the intersection of the third conductive trace and the second conductive trace, thereby reducing the difference in thickness of the film layer stacking at this position and other positions, which is beneficial to improving the flatness of the intersection area of ​​the upper and lower conductive traces and enhancing the display effect.

[0055] In a specific embodiment, the angle between the surface of the slope structure and the substrate can be greater than or equal to 30° and less than or equal to 60°, specifically 40°, 45°, 50° or other angles. The slope angle of the slope structure can be selected according to the position and depth of the buffer groove, and this embodiment is not limited.

[0056] Specifically, in the above array substrate, the depth of the buffer groove along the direction perpendicular to the substrate is greater than or equal to 3 μm. Preferably, the depth of the buffer groove may be greater than or equal to 3 μm and less than or equal to 20 μm.

[0057] In addition, regarding the number of slope structures set around the buffer groove, the number of buffer grooves set around the buffer groove can be one, two, three, or other numbers, which can be specifically selected according to the setting position of the buffer groove, and this embodiment does not limit it.

[0058] More specifically, in the array substrate, the first conductive layer may be a metal layer; or the second conductive layer may be a metal layer; or both the first conductive layer and the second conductive layer may be metal layers.

[0059] In a possible implementation, there are many wirings in the non-display area of ​​the substrate, such as Figure 8 As shown, a conductive trace 7 is provided in the non-display area of ​​the substrate 1, and an interlayer insulating layer 8 is provided on the side of the trace 7 facing the substrate. The edge of the interlayer insulating layer 8 is set to a wedge-shaped structure, and the surface of the wedge-shaped structure facing away from the substrate is a slope, and the slope faces the side away from the substrate. The trace crosses the edge of the interlayer insulating layer 8 through the wedge-shaped structure, and the angle between the slope and the substrate is less than or equal to 70°. Specifically, the angle between the slope and the substrate can be selected between 30° and 60°, and can be specifically selected as 40°, 45°, 50° or other angles. The trace crosses the edge of the underlying interlayer insulating layer through the wedge-shaped structure, avoiding the film layer from breaking at the step corner at the edge of the interlayer insulating layer, which can effectively ensure the continuity of the trace and the reliability of the signal transmission of the trace.

[0060] Specifically, in another possible implementation, as Figure 9 As shown, a conductive film layer 9 is provided in the non-display area of ​​the substrate 1, and the edge of the conductive film layer 9 forms a wedge-shaped structure. The surface of the wedge-shaped structure facing away from the substrate is an inclined surface. An interlayer dielectric layer 10 is provided on the side of the conductive film layer 9 facing away from the substrate. The interlayer dielectric layer 10 covers the conductive film layer 9, and the interlayer dielectric layer 10 spans the edge of the conductive film layer 9 through the wedge-shaped structure. The angle between the inclined surface and the substrate is less than or equal to 70°. Specifically, the angle between the inclined surface and the substrate can be selected between 30° and 60°, and can be selected as 40°, 45°, 50° or other angles. The interlayer dielectric layer spans the edge of the underlying conductive film layer through the wedge-shaped structure, ensuring the continuity of the interlayer dielectric layer, so that the interlayer dielectric layer has a good isolation effect, avoiding the film layer from breaking at the step corner formed at the edge of the conductive film layer, and avoiding the connection short circuit between the upper and lower conductive film layers caused by the break of the interlayer dielectric layer.

[0061] This embodiment further provides a display panel, comprising any one of the array substrates provided in the above embodiments.

[0062] Based on the same inventive concept, Figures 1 to 6 ,as well as Figure 10 As shown, this embodiment also provides a method for preparing an array substrate, comprising:

[0063] Step S101, forming a substrate;

[0064] Step S102, forming a patterned first conductive layer 2 on the substrate;

[0065] Step S103: forming an insulating layer on the first conductive layer 2, wherein a buffer groove 5 is formed in the insulating layer. A sidewall of at least one side of the buffer groove 5 forms a slope structure 52 that is inclined outwardly along the radial direction of the buffer groove 5. The surface of the slope structure 52 faces away from the substrate. The sidewalls of the buffer groove 5 other than the slope structure 52 are substantially perpendicular to the substrate. The surface of the slope structure 52 extends from the top surface of the insulating layer to the bottom of the buffer groove 5.

[0066] In step S104, a second conductive layer 4 is formed on the insulating layer, and the orthographic projection of the second conductive layer 4 on the substrate has an overlapping area with the orthographic projection of the first conductive layer 2 on the substrate, and the orthographic projection of the buffer groove 5 on the substrate overlaps with the overlapping area, and a portion of the second conductive layer 4 extends to the bottom of the buffer groove 5 through the slope structure 52.

[0067] In a possible implementation manner, the preparation of the buffer groove in the insulating layer may be specifically as follows:

[0068] The buffer groove is formed by adopting one etching process, wherein the buffer groove with a slope structure is directly prepared by adopting one preparation process, thereby saving preparation steps.

[0069] In a possible embodiment, for the preparation of the buffer groove in the insulating layer, as shown in FIG. Figures 1 to 4 As shown, it can be specifically:

[0070] like Figure 1 and Figure 2 As shown, a first etching process is first used to form a groove 51 in the insulating layer; then, as shown in FIG. Figure 3 and Figure 4 As shown, a second etching process is used to form a slope structure 52 on the peripheral side of the groove 51 to form the buffer groove 5. The buffer groove is prepared in two steps, so that the slope structure is more accurate and has better structural properties.

[0071] Obviously, those skilled in the art may make various changes and modifications to the embodiments of the present invention without departing from the spirit and scope of the present invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims and their equivalents, the present invention is intended to include such modifications and variations.

Claims

1. An array substrate, characterized in that: include: substrate; a first conductive layer located on the substrate; an insulating layer located on the first conductive layer, wherein a buffer groove is formed in the insulating layer, wherein a sidewall of at least one side of the buffer groove forms a slope structure inclined outwardly in a radial direction of the buffer groove, wherein a surface of the slope structure faces a direction away from the substrate, and wherein sidewalls of the buffer groove other than the slope structure are substantially perpendicular to the substrate, and wherein a surface of the slope structure extends from a top surface of the insulating layer to a bottom of the buffer groove; a second conductive layer located on a side of the insulating layer facing away from the substrate, wherein an orthographic projection of the second conductive layer on the substrate overlaps with an orthographic projection of the first conductive layer on the substrate, and the orthographic projection of the buffer groove on the substrate overlaps with the overlapping area, and a portion of the second conductive layer extends to the bottom of the buffer groove through the slope structure; The first conductive layer includes a first conductive trace, the second conductive layer includes a second conductive trace, and the orthographic projection of the first conductive trace on the substrate intersects with the orthographic projection of the second conductive trace on the substrate. The buffer groove is provided at a portion of the insulating layer opposite to the area where the first conductive trace and the second conductive trace intersect, and the buffer groove opposite to the area where the first conductive trace and the second conductive trace intersect is the second buffer groove. The second buffer groove does not penetrate the insulating layer. The second buffer groove has two slope structures on its circumferential side, and the two slope structures are located on opposite sides of the circumferential side of the second buffer groove. The distribution direction of the two slope structures is the same as the extension direction of the second conductive trace.

2. The array substrate according to claim 1, wherein: The first conductive layer includes an electrode structure, and the buffer groove is provided at a position of the insulating layer opposite to the electrode structure. The buffer groove opposite to the electrode structure is a first buffer groove. The first buffer groove penetrates the insulating layer to expose part of the electrode structure. The second conductive layer includes a conductive connecting line, and the conductive connecting line extends to the bottom of the first buffer groove through the slope structure to be connected to the electrode structure.

3. The array substrate according to claim 2, wherein: The ratio of the area of ​​the orthographic projection of the slope structure on the first conductive layer to the area of ​​the first conductive layer exposed at the bottom of the first buffer groove is 0.6-2.

4. The array substrate according to claim 3, wherein: The area of ​​the first conductive layer exposed at the bottom of the first buffer tank is 2-15 square micrometers.

5. The array substrate according to any one of claims 2 to 4, characterized in that: The slope structure is provided in the buffer groove along the extending direction of the conductive connecting line.

6. The array substrate according to any one of claims 2 to 4, characterized in that: The substrate is a first flexible substrate, the insulating layer includes a second flexible substrate and an insulating dielectric layer stacked in sequence, the insulating dielectric layer is located on a side of the second flexible substrate facing away from the first flexible substrate, and the first conductive layer is located between the first flexible substrate and the second flexible substrate.

7. The array substrate according to claim 1, wherein: An angle between the surface of the slope structure and the substrate is less than or equal to 70°.

8. The array substrate according to claim 1, wherein: A depth of the buffer groove along a direction perpendicular to the substrate is greater than or equal to 3 μm.

9. The array substrate according to claim 1, wherein: The first conductive layer is a metal layer; and / or the second conductive layer is a metal layer.

10. The array substrate according to claim 1, wherein: A wiring is provided in the non-display area of ​​the substrate, and an interlayer insulating layer is provided on the side of the wiring facing the substrate. The edge of the interlayer insulating layer forms a wedge-shaped structure, and the surface of the wedge-shaped structure facing away from the substrate is an inclined surface. The angle between the inclined surface and the substrate is less than or equal to 70°, and the wiring crosses the edge of the interlayer insulating layer through the wedge-shaped structure.

11. The array substrate according to claim 1, wherein: A conductive film layer is provided in the non-display area of ​​the substrate, and the edge of the conductive film layer forms a wedge-shaped structure. The surface of the wedge-shaped structure facing away from the substrate is an inclined surface, and the angle between the inclined surface and the substrate is less than or equal to 70°; an interlayer dielectric layer is provided on the side of the conductive film layer facing away from the substrate, the interlayer dielectric layer covers the conductive film layer, and the interlayer dielectric layer spans the edge of the conductive film layer through the wedge-shaped structure.

12. A display panel, characterized in that: The invention comprises the array substrate according to any one of claims 1 to 11.

13. A method for preparing an array substrate, characterized in that: include: forming a substrate; forming a first conductive layer on the substrate; An insulating layer is formed on the first conductive layer, wherein a buffer groove is formed in the insulating layer, wherein a sidewall of at least one side of the buffer groove forms a slope structure inclined outwardly along the radial direction of the buffer groove, a surface of the slope structure faces a direction away from the substrate, and sidewalls of the buffer groove except the slope structure are substantially perpendicular to the substrate, and a surface of the slope structure extends from the top surface of the insulating layer to the bottom of the buffer groove; forming a second conductive layer on the insulating layer, wherein an orthographic projection of the second conductive layer on the substrate overlaps with an orthographic projection of the first conductive layer on the substrate, and the orthographic projection of the buffer groove on the substrate overlaps with the overlapping area, and a portion of the second conductive layer extends to the bottom of the buffer groove through the slope structure; The first conductive layer is provided with a first conductive trace, the second conductive layer is provided with a second conductive trace, and the orthographic projection of the first conductive trace on the substrate intersects with the orthographic projection of the second conductive trace on the substrate. The buffer groove is provided at a portion of the insulating layer opposite to the area where the first conductive trace and the second conductive trace intersect, and the buffer groove opposite to the area where the first conductive trace and the second conductive trace intersect is the second buffer groove. The second buffer groove does not penetrate the insulating layer. The peripheral side of the second buffer groove has two slope structures, and the two slope structures are located on opposite sides of the peripheral side of the second buffer groove. The distribution direction of the two slope structures is the same as the extension direction of the second conductive trace.

14. The preparation method according to claim 13, characterized in that The step of forming an insulating layer on the substrate specifically includes: The buffer groove is formed by adopting an etching process.

15. The preparation method according to claim 13, characterized in that The step of forming an insulating layer on the substrate specifically includes: First, a first etching process is used to form a groove in the insulating layer; Then, a second etching process is used to form the slope structure on the peripheral side of the groove to form the buffer groove.

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