Neural sensing in implantable stimulator devices during passive charge recovery

By using multiple electrode nodes and passive charge recovery circuits in implantable neural stimulator devices, the overlap between high-impedance passive charge recovery and neural response time is achieved, and the artifact interference problem when sensing neural signals is solved, and the sensing accuracy of ECAP signals is improved.

CN114555178BActive Publication Date: 2025-05-16BOSTON SCI NEUROMODULATION CORP
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Patent Information

Application Number
CN202080069764.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-08-06
Filing Date
2020-08-04
Publication Date
2025-05-16
Estimated Expiration
2040-08-04

AI Technical Summary

Technical Problem

Existing implantable neural stimulator devices are difficult to effectively distinguish neural responses and stimulation artifacts when sensing neural signals, resulting in difficulty in sensing sensing.

Method used

Multiple electrode nodes and passive charge recovery circuits are used to overlap the neural response duration through high-impedance passive charge recovery phase, and differential sensing of ECAP signals is used to differentially.

Benefits of technology

The size of passive charge recovery artifacts is effectively reduced, the sensing process is simplified, and the detectability of ECAP signals is improved.

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Abstract

Techniques for sensing neural responses such as evoked compound action potentials (ECAPs) in an implantable stimulator device are disclosed. A first treatment pulse phase is followed by a charge recovery phase including at least one high impedance passive charge recovery duration. The ECAPs are sensed during the high impedance passive charge recovery duration. The time period of passive charge recovery is extended, and the high impedance passive charge duration completely overlaps the ECAP at the sensing electrode (i.e., the neural response duration).
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Description

Technical Field

[0001] The present application relates to implantable medical devices (IMDs), and more particularly to circuits for assisting in sensing neural signals in implantable stimulator devices. Background Art

[0002] Implantable neurostimulator devices are devices that generate and deliver electrical stimulation to the body's nerves and tissues to treat various biological disorders, such as pacemakers for treating cardiac arrhythmias, defibrillators for treating cardiac fibrillation, cochlear stimulators for treating deafness, retinal stimulators for treating blindness, muscle stimulators for producing coordinated limb movements, spinal cord stimulators for treating chronic pain, cortical and deep brain stimulators for treating movement and psychological disorders, and other neurostimulators for treating urinary incontinence, sleep apnea, shoulder subluxation, etc. The following description generally focuses on the use of the present invention in a spinal cord stimulation (SCS) system, such as disclosed in U.S. Patent 6,516,227. However, the present invention may find application in any implantable neurostimulator device system.

[0003] The SCS system typically includes an implantable pulse generator (IPG) 10 shown in FIG. 1 . The IPG 10 includes a biocompatible device housing 12 that houses a battery 14 and circuitry for providing power for the operation of the IPG. The IPG 10 is coupled to tissue stimulation electrodes 16 via one or more electrode leads forming an electrode array 17. For example, one or more percutaneous leads 15 may be used, which have an annular or open ring electrode 16 carried on a flexible body 18. In another example, a paddle-shaped lead 19 provides an electrode 16 positioned on one of its substantially flat surfaces. Lead wires 20 within the lead are coupled to the electrodes 16 and proximal contacts 21 in a lead connector 22 that can be inserted into a head 23 fixed to the IPG 10, which head may include, for example, epoxy. Once inserted, the proximal contacts 21 are connected to the head contacts 24 within the lead connector 22, which in turn are coupled to the stimulation circuit 28 within the housing 12 by feedthrough pins 25 through the housing feedthrough 26.

[0004] In the illustrated IPG 10, there are 32 electrodes (E1-E32), split between four percutaneous leads 15, or contained in a single paddle lead 19, and thus, the head 23 may include a 2x2 array of eight electrode lead connectors 22. However, the type and number of leads in an IPG, as well as the number of electrodes, are application specific and may therefore vary. The conductive housing 12 may also include electrodes (Ec). In SCS applications, one or more electrode leads are typically implanted in the patient's spinal cord in the spine near the dura, preferably across the left and right sides of the patient's spine. Proximal contacts 21 tunnel through patient tissue to a distal location, such as the buttocks where the IPG housing 12 is implanted, at which point they are coupled to the lead connectors 22. In other IPG examples designed for direct implantation at a site where stimulation is desired, the IPG may be leadless, with electrodes 16 instead present on the body of the IPG 10 for contacting patient tissue. In other solutions, one or more IPG leads may be integrated with and permanently connected to the IPG 10. The goal of SCS therapy is to provide electrical stimulation from the electrodes 16 to relieve a patient's symptoms, such as chronic back pain.

[0005] The IPG 10 may include an antenna 27a to allow it to communicate bidirectionally with multiple external devices used to program or monitor the IPG, such as a handheld patient controller or a clinician programmer, as described, for example, in U.S. patent application serial number 16 / 210,794 filed on December 5, 2018. The antenna 27a as shown includes a conductive coil within the housing 12, although the coil antenna 27a may also be present in the head 23. When the antenna 27a is configured as a coil, communication with the external device preferably occurs using near-field magnetic induction. The IPG 10 may also include a radio frequency (RF) antenna 27b. In FIG. 1 , the RF antenna 27b is shown within the head 23, but it may also be within the housing 12. The RF antenna 27b may include a patch, a slot, or a wire, and may operate as a monopole or a dipole. The RF antenna 27b preferably communicates using far-field electromagnetic waves, and may operate according to any number of known RF communication standards such as Bluetooth, Zigbee, WiFi, MICS, and the like.

[0006] Stimulation in the IPG 10 is typically provided by pulses, each of which may include multiple phases, such as 30a and 30b, as shown in the example of FIG2A. Stimulation parameters typically include amplitude (current I, although voltage amplitude V may also be used); frequency (F); pulse width (PW) of the pulse or its individual phases; electrodes 16 selected to provide stimulation; and the polarity of these selected electrodes, i.e., whether they act as anodes pulling (source) current to the tissue or cathodes pouring (sink) current from the tissue. These and possibly other stimulation parameters together comprise a stimulation program that the stimulation circuit 28 in the IPG 10 can execute to provide therapeutic stimulation to the patient.

[0007] In the example of FIG. 2A , electrode E4 has been selected as an anode (during its first phase 30 a), and thus provides a pulse that pulls a positive current of amplitude +A to the tissue. Electrode E5 has been selected as a cathode (also during the first phase 30 a), and thus provides a pulse that sinks a corresponding negative current of amplitude −A from the tissue. This is an example of bipolar stimulation, in which only two lead-based electrodes are used to provide stimulation to the tissue (one anode, one cathode). However, more than one electrode may be selected to act as an anode at a given time, and more than one electrode may be selected to act as a cathode at a given time.

[0008] As mentioned, the IPG 10 includes a stimulation circuit 28 to provide a prescribed stimulation at the patient's tissue. FIG. 3 shows an example of a stimulation circuit 28, which includes one or more current drawing circuits 40. i and one or more current sink circuits 42 i . Pull circuit 40 i And irrigation circuit 42 i The PDACs may include digital-to-analog converters (DACs) and may be referred to as PDACs 40 based on the positive (source, anode) and negative (sink, cathode) currents they source, respectively. i and NDAC 42 i In the example shown, the NDAC / PDAC 40 i / 42 i The pairing is dedicated (hardwired) to a specific electrode node ei 39. For reasons explained below, each electrode node ei 39 is connected to electrode Ei 16 via a DC blocking capacitor Ci 38. The stimulation circuit 28 in this example also supports the selection of the conductive housing 12 as the electrode (Ec12), which is typically selected for monopolar stimulation. PDAC 40 i and NDAC 42 i A voltage source may also be included.

[0009] About PDAC 40 iand NDAC 42 i Appropriate control of allows any electrode 16 to act as an anode or cathode to generate a current through the patient's tissue R, hopefully with a good therapeutic effect. In the example shown (FIG. 2A), and during the first phase 30a (where electrodes E4 and E5 are selected as anodes and cathodes, respectively), the PDAC 404 and NDAC 425 are activated and digitally programmed to generate the desired current A with the correct timing (e.g., at a specified frequency F and pulse width PWa). During the second phase 30b (PWb), the PDAC 405 and NDAC 424 will be activated to reverse the polarity of the current. More than one anode electrode and more than one cathode electrode can be selected at the same time, and thus current can flow through the tissue R between two or more of the electrodes 16.

[0010] Power for the stimulation circuit 28 is provided by a compliance voltage VH. As described in further detail in U.S. Patent Application Publication 2013 / 0289665, the compliance voltage VH may be generated by a compliance voltage generator 29, which may include circuitry for boosting the voltage (Vbat) of the battery 14 to a voltage VH sufficient to drive a prescribed current A through the tissue R. The compliance voltage generator 29 may include an inductor-based boost converter as described in the '665 publication, or may include a capacitor-based charge pump. Because the resistance of the tissue is variable, VH may also be variable, and in one example may be as high as 18 volts.

[0011] Other stimulation circuits 28 may also be used in the IPG 10. In an example not shown, the switch matrix may include one or more PDACs 40. i and electrode node ei 39, and one or more NDACs 42 are interposed i The switch matrix allows one or more of the PDACs or one or more of the NDACs to be connected to one or more anode or cathode electrode nodes at a given time. Various examples of stimulation circuits can be found in U.S. Patents 6,181,969, 8,606,362, 8,620,436, U.S. Patent Application Publication 2018 / 0071520, and U.S. Patent Application Serial No. 16 / 131,809 filed on September 14, 2018. Most of the stimulation circuit 28 of FIG. 3 (including the PDAC 40 i and NDAC 42 i, switch matrix (if present), and electrode nodes ei 39) can be integrated on one or more application specific integrated circuits (ASICs), such as described in U.S. Patent Application Publications 2012 / 0095529, 2012 / 0092031, and 2012 / 0095519, which are incorporated herein by reference. As explained in these references, one or more ASICs may also include other circuits useful in the IPG 10, such as telemetry circuits (for interfacing off-chip with telemetry antennas 27a and / or 27b), compliance voltage generators 29, various measurement circuits, etc.

[0012] Also shown in Fig. 3 is a DC blocking capacitor Ci 38 placed in series in the electrode current path between electrode node ei 39 and each of the electrodes Ei 16 (including the housing electrode Ec 12). The DC blocking capacitor 38 acts as a safety measure to prevent DC current from being injected into the patient, such as might occur if there is a circuit fault in the stimulation circuit 28. The DC blocking capacitor 38 is typically provided off-chip (outside of one or more ASICs), and may alternatively be provided in or on a circuit board in the IPG 10 used to integrate its various components, as explained in US Patent Application Publication 2015 / 0157861.

[0013] Although not shown, the circuits in the IPG 10 including the stimulation circuit 28 may also be included in an external trial stimulator (ETS) device that is used to simulate the operation of the IPG during a trial period and before the IPG 10 is implanted. The ETS device is typically used after the electrode array 17 has been implanted in the patient. The proximal ends of the leads in the electrode array 17 pass through the patient's incision and are connected to an externally worn ETS, allowing the ETS to provide stimulation to the patient during the trial period. More details related to the ETS device are described in USP9,259,574 and U.S. patent application serial number 16 / 210,794 filed on December 5, 2018.

[0014] Referring again to FIG. 2A , the stimulation pulses shown are biphasic, wherein each pulse at each electrode includes a first phase 30a followed by a second phase 30b of opposite polarity. (Although not shown, it is well known that a short interphase period may be interposed between phases 30a and 30b during which no current is actively driven by the DAC circuit 40 / 42, which allows the DAC circuit time to switch between phases). The biphasic pulses help actively restore any charge that may be stored on capacitive components in the electrode current path (such as a DC blocking capacitor 38, an electrode / tissue interface, or within the tissue itself). In order to restore all charge (Vc4=Vc5=0V) at the end of the second pulse phase 30b of each pulse, the first phase 30a and the second phase 30b are preferably charge balanced at each electrode, wherein the phases include equal amounts of charge but opposite polarities. In the example shown, this charge balance is achieved by using the same pulse width (PWa=PWb) and the same amplitude (|+A|=|-A|) for each of the pulse phases 30a and 30b. However, as is known, the pulse phases 30a and 30b may also be charge balanced if the product of the amplitude and the pulse width of the two phases 30a and 30b is equal.

[0015] FIG. 3 shows that the stimulation circuit 28 may include a passive recovery switch 41 i , which is further described in U.S. Patent Application Publications 2018 / 0071527 and 2018 / 0140831. Passive recovery switch 41 i The passive recovery switch 41 may be attached to each of the electrode nodes 39 and used to passively restore any charge remaining on the DC blocking capacitor Ci 38 after the second pulse phase 30b is delivered - that is, to restore the charge without actively driving current using the DAC circuit. Passive charge recovery may be prudent because non-idealities in the stimulation circuit 28 may result in pulse phases 30a and 30b that are not completely charge balanced. By closing the passive recovery switch 41 i Passive charge recovery typically occurs after the actively driven phases 30a and 30b have been completed and during at least a portion 30c (FIG. 2A) of the quiet period between pulses. As shown in FIG. 3, a switch 41 not coupled to electrode node 39 i The other end is connected to the common reference voltage V CM . Common reference voltage V CM It can be, for example, VH / 2 or can be another voltage, such as Vbat. As explained in the reference cited above, passive charge recovery tends to be achieved by placing a capacitor in parallel with the reference voltage (V CM) and the patient tissue to balance the charge on the DC blocking capacitor 38 and other capacitive components. Note that passive charge recovery is shown as a small exponential decay curve during 30c in FIG. 2A , which can be positive or negative, depending on whether the pulse phase 30a or 30b has charge dominance at a given electrode. Summary of the invention

[0016] Aspects of the present disclosure relate to stimulator devices. According to some embodiments, the stimulator device includes: a plurality of electrode nodes, each electrode node is configured to be coupled to one of a plurality of electrodes configured to contact patient tissue; a stimulation circuit configured to provide an actively driven stimulation at at least one stimulation node selected from the plurality of electrode nodes, wherein the stimulation includes at least one pulse, the at least one pulse including at least a first phase; and a passive charge recovery circuit configured to provide passively driven passive charge recovery during a passive charge recovery duration, wherein the passive charge recovery circuit includes a resistance circuit, the resistance circuit being configurable to adjust a recovery impedance during the passive charge recovery duration; and a sensing circuit configured to sense a neural response at at least one sensing node selected from the plurality of electrode nodes during the passive charge recovery duration. According to some embodiments, the resistance circuit includes a variable resistance circuit. According to some embodiments, the variable resistance circuit is configured to provide a first recovery impedance for a high impedance portion of the passive charge recovery duration, and to provide a second recovery impedance for a low impedance portion of the passive charge recovery duration, wherein the first recovery impedance is greater than the second recovery impedance. According to some embodiments, the sensing circuit is configured to sense the neural response during the high impedance portion of the passive charge recovery duration. According to some embodiments, the passive charge recovery circuit comprises a plurality of switch circuits, wherein each of the plurality of switch circuits is coupled to a different one of the electrode nodes and is configured to provide a variable impedance between its corresponding electrode node and a common node when selected. According to some embodiments, the common node comprises a reference voltage selected from the group consisting of a battery voltage, a compliance voltage, a portion of the compliance voltage, and ground. According to some embodiments, each of the plurality of switch circuits comprises a plurality of switches, wherein the switches are selectable to change the resistance. According to some embodiments, the plurality of switches comprise a plurality of transistors in parallel. According to some embodiments, the stimulator device further comprises a control circuit configured with at least one algorithm, wherein the at least one algorithm is configured to determine the time when the neural response will appear at the sensing electrode node, and to time the passive charge recovery duration so that the high impedance passive charge recovery portion will completely overlap with the time when the neural response will appear at the sensing electrode node. According to some embodiments, the stimulator device further comprises a control circuit configured with at least one algorithm, wherein the at least one algorithm is configured to determine when the neural response will appear at the sensing electrode node.

[0017] Also disclosed herein is a method for operating a stimulator device, the stimulator device comprising a plurality of electrode nodes, each electrode node being configured to couple to one of a plurality of electrodes configured to contact patient tissue, the method comprising: providing an actively driven stimulation at at least one stimulation node selected from the plurality of electrode nodes, wherein the stimulation comprises at least one pulse, the at least one pulse comprising at least a first phase; providing passively driven passive charge recovery for a passive charge recovery duration, selecting at least one recovery impedance for the passive charge recovery duration, providing the selected recovery impedance during the passive charge recovery duration using a resistive circuit of the stimulator device, and sensing a neural response at at least one sensing electrode node selected from the plurality of electrode nodes during the passive charge recovery duration. According to some embodiments, the resistive circuit comprises a variable resistance circuit. According to some embodiments, selecting the at least one recovery impedance comprises selecting a first recovery impedance for a high impedance portion of the passive charge recovery duration and selecting a second recovery impedance for a low impedance portion of the passive charge recovery duration, wherein the first recovery impedance is greater than the second recovery impedance, and wherein sensing the neural response comprises sensing the neural response during the high impedance portion of the passive charge recovery duration. According to some embodiments, the method further comprises determining a time when the neural response will appear at the sensing electrode node and timing the passive charge recovery duration such that the high impedance passive charge recovery portion will completely overlap with a time when the neural response will appear at the sensing electrode node. According to some embodiments, providing actively driven stimulation comprises providing at least one first one or more pulses and at least one second one or more pulses. According to some embodiments, providing passively driven passive charge recovery comprises providing a first passive charge recovery duration after each of the first one or more pulses and providing a second passive charge recovery duration after each of the second one or more pulses. According to some embodiments, selecting at least one recovery impedance comprises selecting a first recovery impedance for the first passive charge recovery duration and selecting a second recovery impedance for the second passive charge recovery duration, wherein the second recovery impedance is greater than the first recovery impedance. According to some embodiments, sensing the neural response comprises sensing the neural response during the second passive charge recovery duration.

[0018] Also disclosed herein is a stimulator device, comprising: a plurality of electrode nodes, each electrode node configured to be coupled to one of a plurality of electrodes configured to contact patient tissue; a stimulation circuit configured to provide an actively driven stimulation at at least one stimulation node selected from the plurality of electrode nodes, wherein the stimulation comprises at least one pulse, the at least one pulse comprising at least a first phase; and a passive charge recovery circuit configured to provide passively driven passive charge recovery during a passive charge recovery duration; and a sensing circuit configured to sense a neural response at at least one sensing node selected from the plurality of electrode nodes during the passive charge recovery duration. According to some embodiments, the neural response is generated in response to the actively driven stimulation. According to some embodiments, the passive charge recovery is configured to recover charge stored during the actively driven stimulation. According to some embodiments, the passive charge recovery circuit comprises a plurality of switch circuits, wherein each of the plurality of switch circuits is coupled to a different one of the electrode nodes and is configured to provide a variable resistance between its corresponding electrode node and a common node when selected. According to some embodiments, the common node comprises a reference voltage selected from the group consisting of a battery voltage, a compliance voltage, a portion of the compliance voltage, and ground. According to some embodiments, each of the plurality of switch circuits comprises a plurality of switches, wherein the switches are selectable to change the resistance. According to some embodiments, the plurality of switches comprises a plurality of transistors in parallel. According to some embodiments, the passive charge recovery duration comprises a high impedance passive charge recovery duration and a low impedance passive charge recovery duration, wherein: during the high impedance passive charge recovery duration, the variable resistor is configured to provide a first impedance to passive charge recovery, and during the low impedance passive charge recovery duration, the variable resistor is configured to provide a second impedance lower than the first impedance to passive charge recovery. According to some embodiments, the sensing circuit is configured to sense the neural response during the high impedance passive charge recovery duration. According to some embodiments, the stimulator device further comprises a control circuit configured with at least one algorithm, wherein the at least one algorithm is configured to determine the time when the neural response will appear at the sensing electrode node, and to time the passive charge recovery duration so that the high impedance passive charge recovery duration will completely overlap with the time when the neural response will appear at the sensing electrode node. According to some embodiments, the stimulator device further comprises a control circuit configured with at least one algorithm, wherein the at least one algorithm is configured to determine when the neural response will appear at the sensing electrode node. According to some embodiments, the stimulation circuit is further configured to provide actively driven active charge recovery.According to some embodiments, the sensing circuit comprises a differential amplifier, and wherein the differential amplifier receives the sensing electrode node at a first input, and wherein the differential amplifier receives a reference electrode node selected from one of the electrode nodes at a second input. According to some embodiments, each electrode node is coupled to its associated electrode via a DC blocking capacitor. According to some embodiments, the stimulator device comprises an implantable pulse generator or an external test stimulator.

[0019] Also disclosed herein is a method for operating a stimulator device, the stimulator device comprising a plurality of electrode nodes, each electrode node being configured to couple to one of a plurality of electrodes configured to contact patient tissue, the method comprising: providing an actively driven stimulation at at least one stimulation node selected from the plurality of electrode nodes, wherein the stimulation comprises at least one pulse, the at least one pulse comprising at least a first phase; providing a passively driven passive charge recovery for a passive charge recovery duration, and sensing a neural response at at least one sensing electrode node selected from the plurality of electrode nodes during the passive charge recovery duration. According to some embodiments, the neural response is present at the at least one sensing electrode node during the neural response duration, and wherein the entire neural response duration of the neural response is sensed during the passive charge recovery. According to some embodiments, the method further comprises determining, using a control circuit in the stimulator device, when the neural response will occur at the sensing electrode node during the neural response duration. According to some embodiments, the passive charge recovery duration is timed so that the passive charge recovery duration will completely overlap with the neural response duration. According to some embodiments, providing passively driven passive charge recovery during the passive charge recovery duration includes: providing high impedance passive charge for the high impedance passive charge recovery duration; and providing low impedance passive charge recovery for the low impedance passive charge recovery duration. According to some embodiments, sensing the neural response during the high impedance passive charge recovery duration. According to some embodiments, the stimulator device includes a passive charge recovery circuit configured to provide passively driven passive charge recovery, wherein the passive charge recovery circuit includes a plurality of switch circuits, wherein each of the plurality of switch circuits is coupled to a different one of the electrode nodes and is configured to provide a variable resistance between its corresponding electrode node and a common node when selected. According to some embodiments, during the high impedance passive charge recovery duration, the switch circuit is configured to provide a first impedance to the passive charge recovery, and during the low impedance passive charge recovery duration, the switch circuit is configured to provide a second impedance lower than the first impedance to the passive charge recovery. According to some embodiments, the method further includes determining, using a control circuit in the stimulator device, when the neural response will occur at the sensing electrode node and timing the passive charge recovery duration such that the neural response is sensed during the high impedance passive charge recovery duration. According to some embodiments, the method further comprises using the low impedance passive charge recovery to recover stored charge not recovered by the high impedance passive charge recovery. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] FIG. 1 shows an implantable pulse generator (IPG) according to the prior art.

[0021] 2A and 2B show examples of stimulation pulses that may be generated by an IPG according to the prior art.

[0022] FIG. 3 shows a stimulation circuit that may be used for an IPG according to the prior art.

[0023] Figure 4 An improved IPG is shown with neural response sensing and the ability to adjust stimulation depending on this sensing.

[0024] Figure 5A and Figure 5B The leads that produce the stimulation are shown, and differential sensing of the neural responses induced by the stimulation is shown.

[0025] Fig. 6A shows the ideally sensed neural response at the sensing electrode, while Figure 6B and Figure 6C It is shown how stimulation artifacts and passive charge recovery can interfere with sensed neural responses.

[0026] Figure 7 A sense amplifier circuit that can be used to sense neural responses is shown.

[0027] Figure 8 Stimulation and passive charge recovery are shown, including sensing of neural responses during passive charge recovery.

[0028] Fig. 9 A timing algorithm operable to determine when a neural response starts and stops at a sensing electrode is shown.

[0029] Fig.10 An adjustment algorithm is shown that can be used in conjunction with the timing algorithm to ensure that the high impedance passive charge recovery duration will overlap with the neural response at the sensing electrode.

[0030] Fig.11 Aspects of a passive charge recovery circuit for providing an adjustable impedance during passive charge recovery are shown.

[0031] Fig.12 The operation of the timing and adjustment algorithms in an external device communicating with the IPG is shown.

[0032] Figure 13A-13C Different examples are shown in which neural responses can be sensed during the high impedance passive charge recovery duration. DETAILED DESCRIPTION

[0033] An increasingly interesting development in pulse generator systems, and particularly in spinal cord stimulator (SCS) pulse generator systems, is the addition of sensing capabilities to supplement the stimulation provided by such systems. For example, and as explained in U.S. Patent Application Publication 2017 / 0296823, it may be beneficial to sense neural responses in neural tissue that receives stimulation from an SCS pulse generator. One such neural response is the evoked compound action potential (ECAP). The ECAP comprises the cumulative response provided by the neural fibers recruited by the stimulation, and essentially comprises the sum of the action potentials of the recruited fibers as they "fire." The ECAP is Figure 4 , and includes multiple peaks, which are conventionally labeled with P for positive peaks and N for negative peaks, where P1 includes the first positive peak, N1 includes the first negative peak, P2 includes the second positive peak, and so on. Note that not all ECAPs will have such Figure 4 The exact shape and number of peaks shown in is because the shape of the ECAP is a function of the number and type of nerve fibers that are recruited and involved in its conduction. ECAPs are typically small signals and may have peak-to-peak amplitudes on the order of tens of microvolts to tens of millivolts.

[0034] Figure 4 Also shown in the figure is a circuit for an IPG 100 that can provide stimulation and sense the resulting ECAP or other neural responses or signals. The IPG 100 includes a control circuit 102, which may include a microcontroller, such as part number MSP430 manufactured by Texas Instruments, which is described in the data sheet at http: / / www.ti.com / lsds / ti / microcontroller / 16-bit_msp430 / overview.page? DCMP=MCU_other&HQS=msp430, which is incorporated herein by reference. Other types of controller circuits can also be used instead of a microcontroller, such as a microprocessor, FPGA, DSP, or a combination of these. The control circuit 102 can also be formed in whole or in part in one or more application-specific integrated circuits (ASICs), such as those described above. The disclosed circuits and techniques can also be implemented in an ETS implantable stimulator, although this is not discussed further.

[0035] The IPG 100 also includes a stimulation circuit 28 to generate stimulation at the electrodes 16, which may include the stimulation circuit 28 (FIG. 3) shown above. The bus 118 provides a signal to one or more PDACs 40. i or NDAC 42 iA digital control signal from the control circuit 102 (and possibly from the ECAP algorithm 124, as described below) is provided to generate a current or voltage of a specified amplitude (A) with the correct timing (PW, f) for the stimulation pulse. As previously mentioned, the DAC can be powered between the compliance voltage VH and ground. Also as previously mentioned but not in Figure 4 As shown in , a switch matrix may be interposed between the PDAC and the electrode node 39 and between the NDAC and the electrode node to route their outputs to one or more of the electrodes, including the conductive housing electrode 12 (Ec). Control signals for the switch matrix, if present, may also be carried by bus 118. Note that the current path to electrode 16 includes the previously described DC blocking capacitor 38, which provides safety by preventing inadvertent supply of DC current to the electrode and to patient tissue. Figure 4 In the embodiment shown in FIG. 1 , the passive charge recovery switch described above is composed of a passive charge recovery switch circuit 41. i As described above, the passive charge recovery switch circuit is used to couple the electrode node 39 to the common reference voltage V CM The passive charge recovery switch circuit is also used to passively restore any charge remaining on the DC blocking capacitor. CM A variable resistance path is provided between the passive charge recovery circuit and the variable resistor 188. For ease of discussion, the passive charge recovery circuit is shown as including the variable resistor 188. i This will be described in more detail below, for example, with reference to Fig.11 . Capacitor C R Can be set at V CM and ground (GND) to reduce the recovery impedance.

[0036] The IPG 100 also includes sensing circuitry 115, and one or more of the electrodes 16 may be used to sense neural responses, such as the ECAP described above. In this regard, each electrode node 39 may also be coupled to a sense amplifier circuit 110. Under control of the bus 114, the multiplexer 108 may select one or more electrodes to operate as sensing electrodes by coupling one or more electrodes to the sense amplifier circuit 110 at a given time, as further explained below. Although Figure 4Only one multiplexer 108 and sense amplifier circuit 110 is shown, but there may be more than one. For example, there may be four multiplexer 108 / sense amplifier circuit 110 pairs, each pairing operable within one of the four timing channels supported by the IPG 100 to provide stimulus. The analog waveforms including the ECAP are preferably converted to digital signals by one or more analog-to-digital converters (one or more ADCs) 112, which may, for example, sample the waveforms at 50 kHz. The one or more ADCs 112 may also reside within the control circuit 102, particularly if the control circuit 102 has A / D inputs. The multiplexer 108 may also provide a DC reference voltage Vamp (e.g., GND) to the sense amplifier circuit 110, as this is useful in single-ended sensing mode.

[0037] In order not to bypass the safety provided by the DC blocking capacitor 38, the input to the sense amplifier circuit 110 is preferably taken from the electrode node 39, and thus the DC blocking capacitor 38 is interposed between the electrode 16 where the ECAP is sensed and the electrode node 39. However, because the DC blocking capacitor 38 will pass the AC signal while blocking the DC component, the AC ECAP signal will pass through the capacitor 38 and still be easily sensed by the sense amplifier circuit 110. In other examples, the ECAP can be sensed directly at the electrode 16 without passing through the intervening capacitor 38.

[0038] As shown, the ECAP algorithm 124 is programmed into the control circuit 102 to receive and analyze the digitized ECAP. Those skilled in the art will appreciate that the ECAP algorithm 124 may include instructions that may be stored on a non-transitory machine-readable medium, such as a magnetic, optical, or solid-state memory within the IPG 100 (e.g., stored in association with the control circuit 102).

[0039] exist Figure 4 In the example shown in FIG. 1 , ECAP algorithm 124 operates within IPG 100 to determine one or more ECAP features, which may include, but are not limited to:

[0040] The height of any peak present in the ECAP (e.g., H_N1);

[0041] The peak-to-peak height between any two peaks (such as H_PtoP from N1 to P2);

[0042] Peak height ratio (e.g., H_N1 / H_P2);

[0043] The peak width of any peak (e.g., the full width at half maximum of N1, FWHM_N1);

[0044] The area under any peak (e.g., A_N1);

[0045] Total area (A_tot), which includes the area under the positive peaks minus or plus the area under the negative peaks;

[0046] The length of any part of the ECAP curve (e.g., the length of the curve from P1 to N2, L_P1toN2)

[0047] Any time that defines the duration of at least a portion of an ECAP (e.g., the time from P1 to N2, t_P1toN2);

[0048] The time delay from stimulation to the onset of the ECAP, which indicates the nerve conduction velocity of the ECAP, may vary in different types of neural tissue;

[0049] • Any mathematical combination or function of these variables (eg, H_N1 / FWHM_N1 will typically specify the quality factor of peak N1).

[0050] Once the ECAP algorithm 124 determines one or more of these characteristics, it can adjust the stimulation provided by the IPG 100, for example by providing new data to the stimulation circuit 28 via the bus 118. This is further explained in U.S. Patent Application Publication 2017 / 0296823 and U.S. Patent Application Serial No. 16 / 135,961 filed on September 19, 2018, the entire contents of which are incorporated herein by reference. In a simple example, the ECAP algorithm 124 can check the height of the ECAP (e.g., its peak-to-peak voltage) and adjust the amplitude of the stimulation current in a closed-loop manner to attempt ECAP and maintain the ECAP at a desired value. The ECAP algorithm 124 can also include sub-algorithms, such as a timing algorithm 150 and an adjustment algorithm 170, which will be further described below.

[0051] Embodiments of the microcontroller may include a recovery logic / control block 402 that implements logic that issues a plurality of control signals used to control passive charge recovery, including a control signal for controlling a resistor at which passive charge recovery occurs. Details of the recovery control and recovery logic for controlling a resistor at which passive charge recovery occurs are described in U.S. Patent Application Publication No. 2018 / 0071527, the entire contents of which are incorporated herein by reference. The recovery logic / control block 402 may receive data from the timing algorithm 150 and / or the adjustment algorithm 170 for adjusting aspects of passive charge recovery, as described in more detail below.

[0052] Figure 5A and Figure 5BA percutaneous lead 15 is shown (a paddle lead 19 or other lead may also be used), and an example of a stimulation procedure of FIG. 2A is shown, in which E4 and E5 are used to generate biphasic pulses in a bipolar stimulation mode, in which (during the first phase 30a) E4 comprises an anode and E5 comprises a cathode, although other electrode arrangements (e.g., tripolar, etc.) may also be used. This stimulation generates an electromagnetic (EM) field 130 in the patient's tissue volume around the selected electrodes. Some of the nerve fibers within the EM field 130 will be recruited and ignited, particularly those near the cathode electrode E5. It is hoped that the sum of the nerve fiber ignitions will mask the signals indicating pain in the SCS application, thereby providing the desired treatment. The total number of nerve fibers recruited generates an ECAP, which can travel rostrally toward the brain and caudally away from the brain. The ECAP is conducted by nerves through the spinal cord, and its speed depends on the nerve fibers involved in the conduction. In one example, the ECAP can move at a speed of approximately 5 cm / 1 ms.

[0053] The ECAP preferably senses differentially using two electrodes, and Figure 5A and Figure 5B Different examples are shown. Figure 5A In the example, a single electrode E8 on lead 15 is used for sensing (S+) and another signal is used as a reference (S-). In this example, the sensing reference S- comprises a further electrode in the electrode array 17 or (as shown) the housing electrode Ec. The reference S- may also comprise a fixed voltage provided by the IPG 100, such as ground or Vamp ( Figure 4 ), in which case the sensing can be said to be single-ended rather than differential. Figure 5B In the example, two lead-based electrodes are used for sensing, where the electrodes are adjacent to each other or at least relatively close to each other. Specifically, in this example, electrode E8 is used for sensing (S+) again, and adjacent electrode E9 provides a reference (S-). This can also be reversed, where E8 provides a reference (S-) for sensing (S+) at electrode E9. Sensing a given ECAP at different electrodes can allow the ECAP algorithm 124 to understand the time difference between the ECAP arriving at each of the electrodes. If the distance x between the electrodes is known, the ECAP algorithm 124 can calculate the speed of the ECAP. As mentioned above, the ECAP speed indicates the nerve fibers involved in neural recruitment and conduction, which is interesting to know by virtue of its own ability and may be useful to the ECAP algorithm 124 when adjusting the stimulation provided by the stimulation circuit 28.

[0054] Fig. 6AThe processing of an ECAP to be sensed at a sensing electrode S+ (e.g., E8) is shown. In this example, the sensing electrode E8 is assumed to be at a distance d=12 mm from the stimulation electrode (e.g., E5), and the electrodes in the array are assumed to be spaced at a distance x=4 mm. If the ECAP is assumed to travel at a speed of 50 mm / ms (again, this may vary depending on the neural tissue involved), the ECAP will begin to pass through the sensing electrode S+ at time t1=0.24 ms. The ECAP itself also propagates in time (t ECAP ). This duration is also variable, but Fig. 6A In the example, it is assumed that ECAP exists at the sensing electrode S+ for one millisecond as a reasonable nominal value (i.e., t ECAP =1 ms). Therefore, in this example, the ECAP will be at time t2=t1+t ECAP (e.g., t2=1.24 ms) to complete the passage through the sensing electrode S+. The time t taken by the ECAP to pass through the sensing electrode ECAP It is referred to herein as neural response duration.

[0055] Figure 6B Waveforms of a stimulation procedure are shown, as well as signals that would appear in the tissue at the sensing electrode E8 (S+). In addition to including the ECAP signal to be sensed (between time t1 and t2), the signal at the sensing electrode S+ also includes a stimulation artifact 134. The stimulation artifact 134 includes a voltage formed in the tissue due to the stimulation, i.e., due to the EM field 130 generated at the stimulation electrodes E4 and E5. As described in U.S. Provisional Patent Application Serial No. 62 / 650,844 filed on March 30, 2018, the entire contents of which are incorporated herein by reference, the PDAC and NDAC used to form a current in the tissue have a high output impedance. This may cause the voltage in the tissue to vary between ground and a compliance voltage VH used to power the DAC, which, as mentioned above, can be a high voltage (on the order of volts). Therefore, the magnitude of the stimulation artifact 134 at a given sensing electrode S+ or its reference S- can be very high (e.g., from millivolts to volts) and significantly higher than the magnitude of the ECAP. The magnitude of the stimulation artifact 134 at the sensing electrodes S+ and S- depends on many factors. For example, if the sensing electrodes are closer to the stimulation electrodes (E4, E5), the stimulation artifact 134 will be larger. The stimulation artifact 134 will also typically be larger during the time the pulse is provided (during phases 30a and 30b), and may still be present even after the pulse (i.e., the last phase 30b of the pulse) has ceased due to the capacitive properties of the tissue, which prevents the electric field 130 from immediately dissipating. As shown, the polarity of the stimulation artifact 134 changes between phases 30a and 30b of the stimulation pulse when the current reverses polarity. Although the sensing artifact 134 and ECAP are shown together for simplicity, the polarity of the stimulation artifact 134 is not shown in FIG. 1 . Figure 6B1 and 2, but in reality they will be superimposed (added) at the sensing electrode S+. Note that the sizes of the sensing artifact 134 and ECAP are not necessarily drawn to scale; in particular, the sensing artifact 134 may be much larger.

[0056] The relatively large signal background stimulation artifact 134 can make it difficult to distinguish and sense the small signal ECAP at the sense amplifier circuit 110. To improve this concern, it may be beneficial to use a sensing electrode S+ far away from the stimulation electrode. See, for example, U.S. Provisional Patent Application Serial No. 62 / 768,617 filed on November 16, 2018, the entire contents of which are incorporated herein by reference. This may be beneficial because the stimulation artifact 134 will be smaller at a more distant sensing electrode, and because the ECAP will pass through the distant sensing electrode at a later time when the stimulation artifact 134 may have dissipated. However, it is not always feasible or practical to use a distant sensing electrode. On the one hand, the electrode array 17 simply cannot be large enough, and therefore no electrode can be properly far enough away from the stimulation electrode to operate ideally as a sensing electrode. Similarly, the size of the ECAP also decreases as the distance from the stimulation electrode increases, and therefore although the stimulation artifact 134 will be smaller at a more distant sensing electrode, the ECAP will also be so, making sensing difficult again.

[0057] Then assume that E8 is still Figure 6B. In this example, it is assumed that pulse phases 30a and 30b have relatively long pulse widths, with PWa of the first phase 30a and PWb of the second phase 30b both equal to 0.25ms. In total, the pulse is actively driven by the DAC circuit (40 / 42) from 0 to 0.5ms, and therefore the stimulation artifact 134 dominates during this period. (This period may include an interphase period of short duration between phases 30a and 30b, although this is not shown for simplicity). Unfortunately, the stimulation artifact 134 overlaps in time with the ECAP at the sensing electrode S+, which again occurs between 0.24 (t1) and 1.24ms (t2). This makes it difficult to sense the ECAP at the sensing electrode S+. First, the stimulation artifact 134 may be significantly larger than the small signal ECAP. In addition, the stimulation artifact 134 changes significantly during the time when the ECAP is present at the sensing electrode S+. In particular, at 0.25 ms, the stimulus artifact 134 changes polarity (from phase 30a to 30b), swinging from a negative value to a positive value. In addition, the stimulus artifact 134 drops from a positive value to 0 at 0.5 ms (at the end of phase 30b), which occurs in the middle of the ECAP in this example. Because the ECAP is superimposed on the stimulus artifact 134, this makes the interpretation of the ECAP at the sense amplifier circuit 110 difficult.

[0058] Figure 6C This sensing problem is alleviated to some extent by making the pulse width smaller. In this example, PWa and PWb have each been reduced to 0.12ms. As such, when the ECAP first begins to appear at the sensing electrode S+ (at t1), the stimulation artifact 134 essentially ends at 0.24ms (at the end of phase 30b). As such, the ECAP and the stimulation artifact 134 do not overlap significantly at the sensing electrode S+, and even more so if the pulse width is further reduced. However, this solution may not be ideal. First, adjusting the pulse width may not be simple and feasible because they may not be what is needed to provide adequate stimulation therapy to the patient. In addition, if the ECAP is traveling relatively fast, it may not be possible to simply reduce the pulse width to avoid overlapping with the ECAP.

[0059] In addition, despite the Figure 6C The ECAP may no longer overlap significantly with the stimulation artifact 134, but the ECAP still overlaps during period 30c, during which it may be desirable to provide passive charge recovery after the active pulse phases 30a and 30b are completed. As mentioned previously, passive charge recovery involves closing the passive charge recovery switch circuit 41i ( Figure 4 ), which connects electrode node ei 39 to a reference potential (such as V CM). Even if the switch circuit 418 at the sensing electrode E8 is not closed, the effect of closing some switches will cause current to flow passively in the tissue, which also causes a variable voltage artifact in the tissue (not shown). See, for example, U.S. Patent Application Publication 2018 / 0140831. In short, passive charge recovery makes sensing of the ECAP difficult because it - like the stimulation artifact 134 - can produce a time-varying voltage in the tissue that is significantly larger than the ECAP. Note that Figure 6B The provision of a passive recovery 30c in is also problematic, since there the passive charge recovery period 30c again overlaps in time to some extent with the ECAP.

[0060] As previously mentioned, ECAP is preferably sensed differentially using electrodes S+ and S-, both of which are exposed to the tissue, thereby allowing artifacts in the tissue (i.e., stimulation artifact 134 or artifacts related to passive charge recovery) to be subtracted at least to some extent from the ECAP measurement. Figure 71 shows a sense amplifier circuit 110 that provides differential sensing. The sense amplifier circuit 110 includes a differential amplifier 111. An example of the circuitry within the differential amplifier 111 is also shown, but it should be noted that many different differential amplifier circuits exist and may also be used in the sense amplifier circuit 110. The sense electrode S+ and the sense reference electrode S- are coupled through a DC blocking capacitor 38 (if used) to derive signals X+ and X- at electrode nodes 39, which are presented to the positive and negative inputs of the differential amplifier 111. The signals X+ and X- will be substantially the same as the S+ and S- present at the selected sense electrode, but with the DC signal component removed. X+ and X- are provided to the gates (control terminals) of transistors M+ and M- in the differential amplifier 111. The drains of the transistors M+ and M- are connected to differential output terminals D+ and D-, which in turn are coupled to the amplifier's power supply voltage Vdd via resistors R+ and R-. The sources of transistors M+ and M- are connected to ground as another supply voltage through a common bias transistor Mb, which sets a total current Ib that can be summed up through each of the branches (I+, I-) of the differential amplifier. The resistors R+ and R- are equal and represented as simple resistors, although active devices (such as PMOS transistors) can also be used. The output Vo of amplifier 111 is equal to the voltage difference at the output terminals D+ and D-, which in turn is affected by the signal difference present at X+ and X-. If the signals X+ and X- are different (for example, if ECAP is present at S+), transistors M+ and M- will be turned on to different degrees, resulting in different currents I+ and I- flowing through each branch. This will produce different voltage drops across resistors R+ and R-, and therefore different voltages at D+ and D-. In short, Vo=D+-D-=A1(X+-X-), where A1 is the gain of amplifier 111.

[0061] The differential amplifier 111 may provide its output to various processing circuits 147 before being presented to the control circuit 102 and the ECAP algorithm 124. For example, the differential output Vo of the differential amplifier 111 may be provided to the input of another differential amplifier 146, and to yet another differential amplifier in series, and so on. This may help to increase the gain of the detected ECAP signal because the gain of each amplifier stage will be multiplied (A1*A2, etc.). Follower circuits or buffers may also be used in series as part of the processing circuit 147 between the differential amplifier 111 and the ADC 112, but such a stage is not shown. In addition, the processing circuit 147 may include a low pass filter (LPF) 148 to remove high frequency components of the ECAP signal that are not of interest or inconsistent with the rate at which the ADC 112 will sample the signal. In one example, the LFP 148 removes frequency components of 25kHz or higher. The processing circuit 147 may include a portion of the control circuit 102.

[0062] To prevent damage or improper operation of the differential amplifier 111 (i.e., the first differential amplifier in series), the inputs X+ and X- can be provided with clamp circuits 142+ and 142-, respectively. In the example shown, the clamp circuit 142+ includes diodes 144a and 144b connected in series, which are forward biased between a low clamp reference voltage reference (Vcl) and a high clamp reference voltage (Vch), and the signal X+ is connected to a node between the diodes. Vcl and Vch preferably include ground and a power supply voltage Vdd (e.g., 3.3V). In this example, it is assumed that the diodes 144a and 114b have a forward bias threshold voltage (Vtd) of 0.6V. If the voltage at X+ is less than -0.6 volts, the diode 144a will conduct (turn on). Since this conductance has a very low resistance, X+ is effectively clamped to a minimum value of Vmin=-0.6 volts. If Vdd = 3.3V is assumed, then if X+ is greater than 3.9V volts, diode 144b will conduct, which will clamp X+ to a maximum value of Vmax = 3.9V. If the voltage at X+ is at or between -0.6 and 3.9 volts, then neither diode 144a nor 144b in clamp circuit 142+ will conduct. Clamp circuit 142- is similar, but is connected to signal X-, and thus similarly clamps X- to a voltage at or between -0.6 and 3.9 volts. Clamp circuits 142+ and 142- may be modified to adjust the window of allowable voltages at which no clamping occurs. For example, Vcl and Vch may be generated by their own generator circuits to produce unique values ​​different from ground and Vdd; different numbers of diodes may be used; Zener diodes may be used to break down and thus clamp X+ or X- at a specified reverse bias voltage; and so on.

[0063] Figure 7 Also shown are blanking switches 141+ and 141-, which are used to pass the signals at X+ and X- to the differential amplifier, respectively. Blanking switches 141+ and 141- can be used to protect differential amplifier 111, and in particular to protect amplifier 111 from receiving excessively high voltages at signals X+ and X-. (Note, however, that clamping circuits 142+ and 142-, which limit the voltages at X+ and X-, can alleviate the need for blanking switches 141+ and 141- to some extent). As further described below, the blanking switches can be used in conjunction with the disclosed techniques. Note that blanking switches 141+ and 141- can include logic switches for routing electrode node 39 to sense amplifier circuit 110. For example, blanking switches 141+ and 141- can include multiplexer 108 ( Figure 4 ) within the device, or they may include separate switches.

[0064] The sense amplifier circuit 110 may also include DC level shift circuits 143+ and 143- to set the signals X+ and X- to a DC voltage reference consistent with the input requirements of the differential amplifier 111. The differential amplifier 111 can only operate reliably if the magnitude of the signals X+ and X- causes currents I+ and I- to flow in each branch of the amplifier. In this regard, to sense the small signal ECAP, X+ and X- should be higher than the threshold voltage of the amplifier input transistors M+ and M- (e.g., greater than Vtt=0.7V). It is further preferred that X+ and X- do not exceed the power supply voltage Vdd of the differential amplifier (e.g., Vdd=3.3V) for proper amplifier operation. Therefore, the signal provided to the differential amplifier 111 is preferably referenced relative to a DC voltage reference within this operating range. The reference may include 1 / 2Vdd (e.g., 1.65V), which includes the midpoint between Vdd and ground. More preferably, the DC voltage reference may comprise 1 / 2(Vdd-Vtt)+Vtt (e.g., 2.0V) because this value will be the midpoint within the operating range of 0.7V and 3.3V and thus allow X+ and X- to swing symmetrically + / -1.3V from the reference while still providing an input size suitable for operating differential amplifier 111. While such a circuit may take different forms, in the example shown, the DC level shifting circuits 143+ and 143- comprise a resistor ladder including resistors Ra and Rb biased in series between Vdd and ground, with signals X+ and X- connected to nodes between the resistors. This sets the DC voltage reference for X+ and X- to Ra / (Ra+Rb)*(Vdd-ground). Thus, by appropriately setting the values ​​of Ra and Rb, the DC voltage reference may be set to any desired value between Vdd and ground, such as 2.0V. The AC signal coupled to X+ and X- through capacitor 38 (such as ECAP and / or stimulus artifact 134) will then be referenced to (and ride on top of) this DC voltage reference. In general, this allows the differential amplifier 111 to be affected by the ECAP at X+, because the superposition of the ECAP and the DC voltage reference will result in a change in the current I+. Preferably, Ra and Rb are large resistors, such as 1 megohm or higher.

[0065] Because the stimulation artifact 134 is present at both the sensing electrode S+ and the reference electrode S-, the differential amplifier 111 will ideally subtract the artifacts in the tissue (i.e., the stimulation artifact 134 and artifacts associated with passive charge recovery) from the output (Vo) as a common-mode voltage, leaving only the ECAP to be sensed. However, it is not surprising that the size of such artifacts may not be exactly the same at the sensing electrodes S+ and S-, since each must be located at a different distance from the stimulation electrode. Therefore, the common-mode removal of such artifacts by the differential amplifier 111 may not be perfect. In addition, it is difficult to design the differential amplifier 111 to account for the ECAP when the artifacts are relatively large and vary over time. This is an earlier reference to the Figure 6B and Figure 6C A particular problem in the scenario discussed, where the ECAP overlaps temporally to a significant degree with the stimulation artifact 134 and the passive recovery artifact at the sensing electrode S+.

[0066] As previously described, conventional wisdom teaches that it is undesirable to sense ECAP during the delivery of pulses to tissue. Again, this is because stimulation artifacts - caused by active stimulation or passive charge recovery that may follow - may be large or change during these periods. However, contrary to this conventional wisdom, the inventors have designed a new ECAP sensing strategy that is capable of sensing ECAP during active and / or passive charge recovery phases. U.S. Provisional Patent Application Serial No. 62 / 825,982, filed by David Wagenbach et al. on March 29, 2019, describes an ECAP sensing strategy for sensing ECAP during the delivery of active stimulation / active charge recovery, the entire contents of which are incorporated herein by reference. The present disclosure describes ECAP sensing during passive charge recovery.

[0067] Figure 8 The waveform of a monophasic pulse 802 delivered at electrode E4 is shown. Passive charge recovery is used to restore charge after the pulse. Note that Figure 8 In FIG. 1 , although only the waveform of a single stimulation electrode E4 is shown, it is understood that another electrode, such as the housing electrode or one of the other lead electrodes, is used as a counter electrode. Note also that although Figure 8 A simple monophasic pulse is shown for clarity, but passive charge recovery can also be used in conjunction with biphasic pulses and other more complex waveforms. The ECAP strategy described herein can be used with any stimulation waveform that includes passive charge recovery.

[0068] The monophasic waveform 802 includes a monophasic stimulation pulse with an amplitude of +Aa, followed by a passive charge recovery phase. The passive charge recovery phase has an amplitude of -Aa. R,i The initial amplitude is essentially equal to the blocking capacitor V CThe voltage accumulation is divided by the tissue impedance R t In other words, -A R,i ≈V C / R t .

[0069] The amplitude of the passive charge recovery phase is calculated according to the time constant τ in the time period t R The time constant τ is equal to the capacitance of the capacitor multiplied by the tissue impedance R. t The time period tR during which substantially all of the charge is restored is approximately 5τ. As further explained below, the shape of the decay curve for passive charge recovery can be controlled / changed by including a variable or selectable resistor in series with the passive charge recovery switch 41 (see, e.g., FIG. 3 and Figure 4 ).

[0070] Still reference Figure 8 , also shown are signals 804 and 806 that appear in the tissue at the sensing electrodes (E8 and E9). Signals 804 and 806 include stimulation artifacts, which include voltages formed in the tissue due to stimulation, i.e., due to the EM field generated at the stimulation electrode E4. Signals 804 and 806 also include recovery artifacts, which include voltages formed in the tissue due to passive charge recovery. Similar to the passive charge recovery of the stimulation waveform 802, the recovery artifacts of signals 804 and 806 are each represented as an exponential decay curve. The time constants of the recovery artifact signals are each a function of the time constant of the passive charge recovery portion of the stimulation waveform 802 from which the artifacts are generated. In other words, changes in the passive charge recovery of the stimulation waveform 802 will be reflected in the artifact signals 804 and 806.

[0071] from Figure 8 As is apparent from the , if the ECAP signal to be sensed at the sensing electrodes overlaps with the recovery artifacts at those electrodes, then sensing of the ECAP signal will be difficult for the same reasons described above with respect to sensing an ECAP signal that overlaps with actively driven charge recovery. The inventors have discovered that ECAP signals that overlap with recovery artifacts can be better addressed by implementing high impedance passive charge recovery. For example, a high recovery impedance can be used during an initial passive recovery phase during the time period when an ECAP signal is expected at the sensing electrodes. The impedance of the passive charge recovery phase can be controlled by including a variable or selectable resistor in the passive charge recovery switch circuit, as explained in more detail below.

[0072] Figure 8 The waveform 808 is a monophasic stimulation pulse followed by a multi-step passive charge recovery. The multi-step passive charge recovery includes a high impedance (Z) duration, a medium impedance duration, and a low impedance duration. The initial high impedance phase has an initial amplitude of -A' R,i, which is lower than (of waveform 802) -A R,i , because the initial amplitude is now essentially equal to V C / (R t +R R ), where R R is the increased recovery impedance.

[0073] The high impedance passive charge recovery decays according to the time constant τ' which is the tissue resistance R t Plus the added recovery resistor R R function, (i.e., τ' is the capacitance multiplied by R t and R R The duration of the high impedance phase is denoted as t HZ , and can be controlled by the system. Note that during the high impedance passive charge recovery period, the system is in a near-steady state, i.e., the passive recovery current decays slowly and the decay curve is relatively flat. Also note that during the high impedance duration, all charge may not be recovered, i.e., the decay curve may not decay completely to the baseline. Therefore, after the high impedance duration, charge balance can be achieved by using a lower impedance passive charge recovery, thereby achieving a more aggressive (i.e., fast) charge recovery. Waveform 808 includes a waveform for time period t IZ The duration of the intermediate impedance implemented and the duration of the intermediate impedance implemented for the time period t LZ = The low impedance duration implemented. Note that the mid-impedance and low-impedance recovery have time constants τ″ and τ″′, respectively (although not indicated in the figure). The total passive charge recovery duration t R ' is the sum of the durations of the high impedance phase, the medium impedance phase, and the low impedance phase. It should be noted that the number of different impedance phases included during charge recovery may be more or less than three (which are shown for illustration purposes only). According to some embodiments, the impedance during the high impedance phase may be on the order of 10 kΩ; the medium impedance phase may be 300–1800 Ω, and the low impedance phase may be 50–100 Ω. These values ​​are exemplary only; other impedances may be used.

[0074] The benefit of using high impedance passive charge recovery during the time when ECAP is expected to be present at the sensing electrode is shown in the signals 810 and 812 sensed at the sensing electrode. As shown, the time period of passive charge recovery is extended and the high impedance duration t HZ The time period of the ECAP completely overlaps with the ECAP (i.e., the duration of the neural response) at the sensing electrode. This is beneficial to ECAP sensing in several ways. First, although the restoration artifact still exists when the ECAP is present at the sensing electrode, the artifact is smaller because the size of the artifact has been reduced. This helps the differential amplifier 111 ( Figure 7) for sensing because the differential amplifier can more easily handle (i.e., subtract) a smaller common-mode voltage that is closer to the size of the ECAP.

[0075] Second, by extending the duration of the passive charge recovery phase, the phase no longer starts or ends during (in the middle of) the ECAP period at the sensing electrode. This also simplifies sensing because the recovery artifact is relatively constant (ie, flat) during the ECAP period at the sensing electrode.

[0076] Furthermore, it should be noted that the stimulation therapy for the patient is not significantly altered. The monophasic stimulation pulse (or the first phase of the biphasic pulse) produces a significant therapeutic effect in the patient, and therefore the amplitude Aa and pulse width PWa are typically tailored to the patient. In the present example, these pulse parameters Aa are unchanged PWa. The passive charge recovery phase is typically not therapeutically significant, and therefore can be changed without significant impact on the patient.

[0077] Notice, Figure 8 There may be practical limitations to the solution. For example, if the pulses have a high frequency F, there may not be enough time between subsequent pulses to accommodate extended passive charge recovery. However, this problem can be simply mitigated by not delivering subsequent pulses until the ECAP measurement is complete. This should not cause much of a problem for the patient's treatment, as ECAP measurements will not typically be taken after every pulse, but only occasionally; an occasional delay or missed treatment pulse will not significantly affect the stimulation treatment.

[0078] In the disclosed technology, Figure 8 As shown in FIG. 1 , blanking should not occur during the passive charge recovery phase when ECAP is sensed. That is, the switches to the input terminals of the differential amplifier 111, such as 141+ and 141- ( Figure 7 ) should be closed to allow the sensed signals S+ and S- (as well as X+ and X-) to reach the inputs of the amplifier. During the stimulation phase, blanking may occur - that is, switches 141+ and 141- may be opened. This can help protect the differential amplifier 111 from saturation, which may occur if the stimulation artifacts are large during the stimulation phase. That being said, blanking is not strictly required during the stimulation phase, especially if clamp circuits 142+ and 142- are used to limit the voltage on X+ and X-.

[0079] In order to implement high impedance passive charge recovery to assist in sensing neural responses, several timing aspects need to be considered. First, it is generally desirable (although not always necessary) that all charge stored on the DC blocking capacitor during actively driven stimulation be restored during stimulation. In other words, if all charge is not restored during this period, charge may continue to accumulate on the capacitor for multiple periods. In addition, it is generally desirable to sense neural responses during the high impedance duration and for the high impedance duration to completely overlap with the neural response duration. Therefore, in accordance with an embodiment of the disclosed neural sensing strategy, charge recovery is provided and timed such that neural responses are sensed during the high impedance passive charge recovery phase and additional charge recovery (lower impedance passively driven passive charge recovery and / or active charge recovery for active driving) is provided to restore any additional residual charge.

[0080] Fig. 9 and Fig.10 Optional algorithms 150 and 170 are disclosed that may be used to adjust passive charge recovery to aid in ECAP sensing. Fig. 9 Determining when an ECAP will start (t1) and end (t2) (see Fig. 6A ) appears at the sensing electrodes S+ and S- that have been selected for ECAP sensing. In other words, the algorithm determines the duration of the neural response. The timing algorithm 150 can receive as input one or more selected sensing electrodes (e.g., S+=E8; S-=E9) and one or more stimulation electrodes (e.g., E4) and the distance (x) between the electrodes in the electrode array (e.g., 4 mm), or be programmed with them. From this, the algorithm 150 can calculate the distance (d) between the stimulation electrode and the sensing electrode (e.g., 12 mm). The timing algorithm 150 can also receive or be programmed with the expected ECAP speed (e.g., 5 cm / ms). Note that this speed can be an estimated speed or a speed actually measured by the IPG. Based on the distance d and the ECAP speed, the time t1 when the ECAP will first appear at the sensing electrode can be determined (e.g., d / speed=0.24 ms). The timing algorithm 150 can also receive the expected ECAP duration (t ECAP =1 ms), or programmed with it. Again, this value can also be measured in the IPG. This allows calculation of the time t2 when the ECAP will be complete to appear at the electrode (e.g., t2 = t1 + t2). ECAP If necessary, t1 and t2 may also be adjusted to provide additional margin—for example, t1 may be slightly lowered and t2 may be slightly increased to ensure that t1 and t2 are suitable for detecting ECAP (using the following adjustment algorithm 170 ).

[0081] Although not shown, the timing algorithm 150 can also use measurements alone to determine t1 and t2. For example, short test pulses with a low pulse width that are unlikely to produce significant artifacts can be used, where the resulting ECAP is measured by the sense amplifier circuit 110. Thus, t1 and t2 can be determined empirically.

[0082] Once t1 and t2 are determined using the timing algorithm 150 - the start and end of the ECAP at one or more sense electrodes S+ / S-, the adjustment algorithm 170 can use these values to determine how to adjust the prescribed pulses and passive charge recovery, as Fig.10 shown. In particular, the adjustment algorithm 170 can adjust the passive charge recovery to ensure that the high impedance duration of the passive charge recovery is long enough to overlap with the ECAP at the sense electrodes S+ / S-. In this regard, the pulse parameters of the received prescribed pulses - which may be determined to provide adequate patient treatment, include in this example the parameters for a single-phase pulse having an amplitude Aa and a pulse width PWa. As mentioned above, although a single-phase pulse is used as an example for simplicity, the methods described herein can be used with pulses of any shape.

[0083] As a first step, the adjustment algorithm 170 can optionally evaluate the timing of the pulse phase (PWa) to determine if it is less than t1. As previously discussed with respect to Figure 6B and Figure 6C , if PWa is not less than t1, this can be problematic for ECAP sensing because the ECAP will appear at the sense electrode S+ when the stimulus artifact 134 changes (e.g., between phase 30a and 30b or between 30a and passive charge recovery). If PWa is not less than t1, the adjustment algorithm 170 can take certain actions, such as adjusting PWa to make it less than t1 (even if this may change the treatment provided by the first phase 30a), or selecting one or more new sense electrodes S+ / S- that may be farther from the stimulation electrode. If it is known a priori that PWa < t1 and thus the ECAP should not overlap with the first phase 30a of the pulse, this step may not be necessary. Note that selecting new sense electrodes changes the timing t1 and t2 at which the ECAP will start and end at that new sense electrode, and thus one or more newly selected sense electrodes S+ / S- can be passed back to the timing algorithm 150 ( Fig. 9 ), such that t1 and t2 can be redetermined and the adjustment algorithm 170 repeated.

[0084] If PWa < t1, the adjustment algorithm 170 can continue by evaluating whether the durations of both the active pulse phase and the high impedance charge recovery phase are less than t2, i.e., if PWa + t HZ>t2. If this is true, then the ECAP at one or more sensing electrodes should fall completely within the high impedance charge recovery phase, as expected. In this case, the IPG can simply provide stimulation and sense the ECAP during the high impedance phase, similar to Figure 8 The content shown in .

[0085] If PWa+t HZ If t2 is not greater than t2, this means that the high impedance passive charge recovery phase ends somewhere in the middle of the time when the ECAP is expected to appear at one or more sensing electrodes. In other words, the high impedance duration does not completely overlap with the neural response duration. The adjustment algorithm 170 can therefore increase t HZ Make PWa+t HZ Now greater than t2 to adjust the timing of the high impedance passive charge recovery duration. At this point, the ECAP at the sensing electrode should fall completely within the high impedance passive charge recovery duration.

[0086] According to some embodiments, the adjustment algorithm 170 may also check to confirm that the passive charge recovery parameters allow for complete charge recovery during the pulse period, i.e., before the next stimulation pulse. The adjustment algorithm may adjust the timing and / or resistance used during the intermediate impedance and / or low impedance phases of passive charge recovery. For example, if the high impedance passive charge recovery is longer, the intermediate and / or low impedance phases may be applied more aggressively (i.e., with lower impedance) to ensure that complete charge recovery occurs before a subsequent stimulation pulse is issued. After making such adjustments to the passive charge recovery phase, the IPG may provide stimulation and sense ECAP during the adjusted high impedance passive charge recovery duration.

[0087] Although algorithms 150 and 170 are described as separate for ease of illustration, they may be combined into a single algorithm.

[0088] like Figure 4 As shown in FIG. 1 , the timing and adjustment algorithm may be included in the control circuit 102 ( Figure 4 ) is part of the ECAP algorithm 124 operable in ). As mentioned above, the timing and adjustment algorithm can provide data to the recovery logic / control 402, which issues control signals to the passive charge recovery circuit to implement the specified impedance and timing adjustments to the passive charge recovery phase. The impedance of the passive charge recovery phase is adjusted using the variable resistor 188 (i.e., the variable resistance of the passive charge recovery switch circuit 41 is used to adjust, Figure 4 ). Therefore, the restoration switch circuit 41 can be regarded as an example of a resistance circuit for controlling the restoration impedance.

[0089] Fig.11A subset of electrodes including electrodes E1-E3 and housing electrode Ec is shown. Passive charge recovery switch circuit 41 i Connected between electrode node ei 39 and common reference voltage V CM As mentioned above, V CM It can be VH / 2, Vbat, ground (GND), or some other reference voltage value.

[0090] As mentioned above, the passive charge recovery switch circuit 41 i At the electrode node ei and the common reference voltage V CM A variable resistance path is provided between Figure 4 The switch circuit 41 is represented by the variable resistor 188. i Each of the four resistor control signals RZ[4:1] from the restore logic / control 402 and can therefore assert any of these control signals to set the switch circuit 41 i The recovery impedance of each electrode can be independently controlled so that different impedances can be used on different electrodes at any given time. Thus, according to some embodiments, charge can be quickly and fully recovered on some electrodes while still presenting high impedance (slower recovery) to other electrodes.

[0091] exist Fig.11 In the embodiment shown in FIG. 1 , the switch circuit 412 includes a switch connected in parallel between the electrode node e2 and a common reference voltage (eg, V CM ) between four resistor transistors 189. The resistor control signal RZ[4:1] is each received at the gate of one of the resistor transistors 189. Each of the resistor transistors 189 preferably has a different size to provide a different resistance. For example, this size difference can be achieved by constructing each of the resistor transistors 189 with different lengths (e.g., 100x, 300x, 1800x, and 10000x). Similarly, the transistor width can also be sized to provide different resistances. In the example shown, RZ1 controls a 100 ohm resistor transistor 189; RZ2 controls 300 ohms; RX3 controls 1800 ohms; and RZ4 controls 10000 ohms. It should be understood that these resistance values ​​are exemplary only and other resistance values ​​can be selected. As mentioned above, other aspects of changing impedance during passive charge recovery are described in the introduced U.S. Patent Application Publication No. 2018 / 0071527.

[0092] like Figure 4 As shown in FIG. 1 , the timing and adjustment algorithm may be included in the control circuit 102 ( Figure 4) is part of the ECAP algorithm 124 that is operable in the IPG. However, these algorithms may also be implemented in whole or in part in an external computer device 158 (see, for example, Fig.12 ) such as an external controller for the patient or a clinician programmer. Such external device 158 typically communicates wirelessly with the IPG 100 and is described in U.S. Patent Application Publication 2019 / 0046800, which is incorporated herein by reference in its entirety. Fig.12 158. A graphical user interface (GUI) 160 presented on such an external device 158 is shown in GUI 160. User-selectable options 162 are shown in GUI 160 for setting stimulation parameters of the pulse or pulse phase of the IPG, such as amplitude (A), pulse width (PW) and frequency (F), as well as whether certain electrodes operate as anodes or cathodes, and the amplitude percentage (X%) applied to the electrode. In practice, GUIs 160 and 162 may be much more complex than what is shown.

[0093] The GUI 160 may include an option 164 to modify the otherwise specified pulse to one that is more suitable for ECAP sensing, such as by adding a multi-impedance passive charge recovery phase, or modifying an already specified passive charge recovery phase so that the high impedance phase of the passive charge recovery overlaps the ECAP at the sensing electrode, such as Figure 8 Option 164 can be selected using Figure 9-10 The IPG may transmit the ECAP test measurements back to the algorithm, such as the ECAP start and end times t1 and t2 measured at the sensing electrodes S+ / S-, if necessary. The algorithm may be stored in a non-transitory machine-readable medium in the external device 158, such as a magnetic, optical, or solid-state memory, which may be stored in association with the control circuit 166 of the external device 158, which may include one or more microcontrollers, microprocessors, FPGAs, DSPs, etc. In one example, the control circuit 166 may include one of the i5 series microprocessors manufactured by Intel Corporation.

[0094] It should be appreciated that the methods and systems disclosed herein provide sensing of ECAP or other neural responses during passive charge recovery by providing high impedance passive charge recovery during the duration of the neural response. Figure 8The examples shown in focus on providing a monophasic stimulation pulse followed by a multi-impedance passive charge recovery that includes three impedance durations that step from high impedance to low impedance. Typically, for the reasons explained above, it is preferred to sense the ECAP during the high impedance duration of the passive charge recovery. As mentioned above, other more complex waveforms can be implemented according to the sensing / passive charge recovery strategy disclosed herein. Figure 13A-13C Some examples of such more complex waveforms are shown that utilize a high impedance passive charge recovery phase during ECAP sensing.

[0095] Fig.13A A waveform 1302 is shown with a stimulation pulse having a stimulation phase 30a applied at a stimulation electrode (e.g., E4) followed by an active charge recovery phase 30b applied at the same electrode. Note that the active charge recovery phase 30b is insufficient to recover all of the charge stored during the stimulation pulse. Before the ECAP reaches the sensing electrodes S+ / S- (e.g., E8 / E9), the charge recovery switches from active recovery to passive recovery using high impedance passive charge recovery to recover the remaining stored charge, and the neural response is sensed during the high impedance passive charge recovery duration.

[0096] Fig. 13B A waveform 1304 is shown where the stimulation phase 30a is followed by a high impedance passive charge recovery interval during the time that the ECAP is present at the sensing electrode.After the high impedance passive charge recovery interval and sensing of the ECAP, a further active charge recovery phase 30b is used to recover the remaining charge.

[0097] Fig. 13C Waveform 1306 is shown, where the stimulation phase 30a is followed by an initial low impedance passive charge recovery duration. During the time when the ECAP is measured, the passive charge recovery switches to a high impedance passive charge recovery duration. Further passive charge recovery (e.g., intermediate impedance) can be used to recover the remaining charge after the ECAP sensing. It should be noted that waveforms 1302, 1304, and 1306 are just a few examples of waveforms contemplated by the present disclosure. In general, any combination of active and passive charge recovery can be used in accordance with the present disclosure, where the ECAP is preferably sensed during the high impedance passive charge recovery duration during the passive charge recovery phase.

[0098] As mentioned previously, ECAP is just one example of a neural response that can be sensed using the disclosed technology.

[0099] Although specific embodiments of the present invention have been shown and described, the above discussion is not intended to limit the present invention to these embodiments. It will be apparent to those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the present invention. Therefore, the present invention is intended to cover substitutions, modifications and equivalents that may fall within the spirit and scope of the present invention as defined by the claims.

Claims

1. A stimulator device comprising: a plurality of electrode nodes, each electrode node configured to couple to one of a plurality of electrodes configured to contact patient tissue; a stimulation circuit configured to provide actively driven stimulation at at least one stimulation node selected from the plurality of electrode nodes, wherein the stimulation comprises at least one pulse, the at least one pulse comprising at least a first phase; as well as a passive charge recovery circuit configured to provide passively driven passive charge recovery during a passive charge recovery duration, wherein the passive charge recovery circuit includes a resistor circuit configurable to adjust a recovery impedance during the passive charge recovery duration; as well as a sensing circuit configured to sense a neural response at at least one sensing node selected from the plurality of electrode nodes during the passive charge recovery duration; wherein the resistance circuit comprises a variable resistance circuit configured to provide a first recovery impedance for a high impedance portion of the passive charge recovery duration and to provide a second recovery impedance for a low impedance portion of the passive charge recovery duration, wherein the first recovery impedance is greater than the second recovery impedance; and Wherein the sensing circuit is configured to sense the neural response during a high impedance portion of the passive charge recovery duration.

2. A stimulator device according to claim 1, wherein the passive charge recovery circuit comprises a plurality of switching circuits, wherein each of the plurality of switching circuits is coupled to a different one of the electrode nodes and is configured to provide a variable impedance between its corresponding electrode node and a common node when selected.

3. A stimulator device according to claim 2, wherein, The common node includes a reference voltage selected from the group consisting of a battery voltage, a compliance voltage, a portion of the compliance voltage, and ground.

4. A stimulator device according to claim 2, wherein each of the plurality of switching circuits comprises a plurality of switches, wherein the switches are selectable to change the resistance.

5. A stimulator device according to claim 4, wherein The plurality of switches include a plurality of transistors connected in parallel.

6. A stimulator device according to any one of claims 1-5, further comprising a control circuit configured with at least one algorithm, wherein the at least one algorithm is configured to determine the time when the neural response will appear at the sensing node, and to time the passive charge recovery duration so that the high impedance passive charge recovery portion will completely overlap with the time when the neural response will appear at the sensing node.

7. A stimulator device according to claim 1, further comprising a control circuit configured with at least one algorithm, wherein the at least one algorithm is configured to determine when the neural response will occur at the sensing node.

Citation Information

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