Method for controlling nanoscale gap of semiconductor chip epoxy resin package

Abstract

The application discloses a kind of semiconductor chip epoxy resin encapsulation nanoscale gap control method, it is related to semiconductor packaging technical field.The present application includes: S1, wafer is taken out from vacuum packaging and is carried out dicing processing, plasma cleaning machine is cleaned, and is carried out and leads wire;S2, after wire bonding, injection molding is carried out;S3, nanoscale gap growth film method;S4, confirm growth dense film;S5, using 150 DEG C baking 55-65 minutes, ensure that internal water vapor is normally removed;S6, normal arrangement laser overflow glue and plating process, surface water removal normal baking after plating is completed;S7, after cutting rib, arrange electrical characteristic parameter test, leakage current IR, forward voltage drop VF, VB avalanche voltage.The present application solves the problem of product reliability caused by the fact that the pressure of plastic encapsulating material and injection molding equipment is not enough due to small packaging, which is beneficial to improve the problem of high-quality miniaturization of industrial equipment, and reduces the influence of device problems on system.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor packaging technology, and in particular relates to a method for controlling nanoscale gaps in epoxy resin encapsulation of semiconductor chips. Background Technology

[0002] As devices become increasingly miniaturized and integrated, in the fields of automotive electronic integrated circuits and power devices, wafer fabrication by well-known manufacturers such as TSMC and ZTE Corporation can meet the requirements for chip logic functions. However, the process design and control point layout of the chip back-end packaging are often constrained by the need for precision.

[0003] Currently, high-end epoxy resin materials for chips are still mainly from Henkel, Sumitomo, and Hitachi. With the EU's REACH environmental requirements, device molding compounds also need fire resistance. As a result, molding compound manufacturers use materials such as silica, alumina, aluminum hydroxide, and magnesium hydroxide to add flame retardants. This leads to the formation of nanoscale gaps after molding. The presence of nanoscale gaps inside the device can pose a risk to the reliability of the product. Summary of the Invention

[0004] This invention provides a method for controlling nanoscale gaps in epoxy resin encapsulation of semiconductor chips, solving the above-mentioned problems.

[0005] To solve the above-mentioned technical problems, the present invention is achieved through the following technical solution:

[0006] The present invention provides a method for controlling nanoscale gaps in epoxy resin encapsulation of semiconductor chips, comprising the following steps:

[0007] S1. After the wafer is removed from the vacuum packaging, it is diced and then the chip is fixed on the frame or base island. Then it is cleaned by a plasma cleaner to remove residual photoresist and dirt in the soldering area, thereby improving the surface solderability of the welded body and performing wire bonding.

[0008] S2. After the wire bonding is completed, injection molding is performed. The curing process is completed according to the characteristics of the molding compound. After curing, a density test is performed. An ultrasonic scanner is used to scan the inside of the molding compound to confirm whether there is any delamination problem.

[0009] S3. Membranes with nanoscale gaps: Fillers added to the epoxy resin potting compound include silica, alumina, aluminum hydroxide, and magnesium hydroxide. The membrane utilizes the material properties of aluminum hydroxide; Al(OH)3 is heated to 245°C. +At 5℃ for 35-50 seconds, Al2O3 and H2O will form inside; a small amount of water molecules will be released from the encapsulated body. If an electric field is applied within 120 minutes and the voltage is 1.3 times the continuous working voltage of the semiconductor chip device, an electrochemical Al2O3 and silicon dioxide will form a protective film.

[0010] S4. Confirm the growth of a dense film: First, use a chip metallographic cutting CP device to dissect the device non-destructively. Use a FIB focused ion micro-cutting instrument to cut the four corners of the chip; observe to ensure that a protective film has been formed inside.

[0011] S5. Bake at 150℃ for 55-65 minutes, ensuring that the maximum temperature does not exceed 156℃, which is lower than the curing temperature of the molding compound, so that all the moisture inside the molding compound is baked out and the internal moisture is properly removed.

[0012] S6. Normally arrange laser removal of excess adhesive and electroplating processes, and after electroplating, remove water from the surface and bake normally.

[0013] S7. Cut the reinforcing bar, and then arrange electrical characteristic parameter tests, including leakage current, forward voltage drop, and avalanche voltage. All parameters should be controlled using a consistent normal distribution.

[0014] Furthermore, in step S1, after the chip is fixed, a plasma cleaner is used to remove residual photoresist and silicon powder particles remaining from the dicing process. The cleaning time until the wire bonding process does not exceed 30 minutes to prevent oxidation, and the plasma cleaner is used no more than twice.

[0015] Furthermore, in step S2, the quality of the molding compound injection is assessed by scanning with an ultrasonic scanner according to AQL quality sampling levels to ensure there is no delamination and that it complies with the Joint Industrial Standard (JEDEC JSTD020D) without any abnormalities.

[0016] Furthermore, the molding compound used contains aluminum hydroxide, an inorganic material with a flame-retardant component. Utilizing its endothermic peak at 235°C, it decomposes into Al₂O₃ and H₂O upon heating. A 4°C pressure is applied across the device terminals. + Under a 0.2V electric field, through electrochemical processes, the Al2O3 decomposed from the endothermic peak will precipitate a nanoscale film with the silicon dioxide passivation layer or the silicon dioxide of the molding compound on the chip surface.

[0017] Furthermore, in step S4, the observation ensures the formation of a protective film inside. Specifically, a double aberration-corrected transmission electron microscope is used. High-performance transmission electron microscopes can detect the structure and chemical composition of materials at the atomic scale. The correctness of the structure and chemical composition of the material is verified by referring to the PDF material card published by the American Society for Testing and Materials (ASTM).

[0018] Furthermore, the electronic parameter indicators of the product are statistically analyzed using software computers. These parameters are controlled using 3σ, and the parameter specifications fall within three standard deviations of the median value of a normal distribution. Finally, a 3D5S optical inspection process is used to ensure that the appearance meets the specifications.

[0019] The present invention has the following advantages over the prior art:

[0020] This invention utilizes chip plasma cleaning, a mixture of epoxy resins with selected additives, and electrochemical parameters to form a dense, protective film. The film formation is confirmed using an electron microscope. Product parameters are tested using a testing machine, and electronic parameters are statistically analyzed using computer software. This invention fills the nanoscale gaps in the molding compound through electrochemical principles, improving product stability and solving reliability issues in ultra-small packages caused by insufficient molding compound particles and injection molding pressure. It also contributes to the high-quality miniaturization of industrial equipment and reduces the impact of device problems on the system.

[0021] Of course, any product implementing this invention does not necessarily need to achieve all of the advantages described above at the same time. Attached Figure Description

[0022] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 A micrograph of the overall structure inside a semiconductor chip;

[0024] Figure 2 for Figure 1 Microscopic images of medium- to nanoscale gaps;

[0025] Figure 3 for Figure 2 Microscopic magnification of the medium-nanometer-scale gap;

[0026] Figure 4 This is a magnified micrograph of a filling film formed in nanoscale gaps using a filler.

[0027] Figure 5 Microscopic identification status diagram for verifying the correctness of materials using the reference PDF card in step S4;

[0028] Figure 6 This is a schematic diagram of the principle of nanoscale gap growth film;

[0029] Figure 7A schematic diagram illustrating the 3σ control method for parameter indicators. Detailed Implementation

[0030] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0031] Please see Figure 1-6 As shown, the present invention provides a method for controlling nanoscale gaps in epoxy resin encapsulation of semiconductor chips, comprising the following steps:

[0032] S1. After the wafer is removed from the vacuum packaging, it is diced and then the chip is fixed on the frame or base island. Then it is cleaned by a plasma cleaner to remove residual photoresist and dirt in the soldering area, thereby improving the surface solderability of the welded body and performing wire bonding.

[0033] S2. After the wire bonding is completed, injection molding is performed. The curing process is completed according to the characteristics of the molding compound. After curing, a density test is performed. An ultrasonic scanner is used to scan the inside of the molding compound to confirm whether there is any delamination problem.

[0034] S3. Membranes with nanoscale gaps: Fillers added to the epoxy resin potting compound include silica, alumina, aluminum hydroxide, and magnesium hydroxide. The membrane utilizes the material properties of aluminum hydroxide; Al(OH)3 is heated to 245°C. + At 5℃ for 35-50 seconds, Al2O3 and H2O will be formed inside; a small amount of water molecules will be released from the encapsulated body. An electric field is applied within 120 minutes, and the voltage is 1.3 times the continuous working voltage of the semiconductor chip device. Electrochemical Al2O3 and silicon dioxide will form a protective film. In this specific embodiment, the heating temperature is 250℃ for 45 seconds.

[0035] S4. Confirm the growth of a dense film: First, use a chip metallographic cutting CP device to dissect the device non-destructively. Use a FIB focused ion micro-cutting instrument to cut the four corners of the chip; observe to ensure that a protective film has been formed inside.

[0036] S5. Bake at 150℃ for 55-65 minutes, ensuring that the maximum temperature does not exceed 156℃, which is lower than the curing temperature of the molding compound, so that all the moisture inside the molding compound is baked out and the internal moisture is properly removed. In this specific embodiment, baking for 60 minutes is selected.

[0037] S6. Normally arrange laser removal of excess adhesive and electroplating processes, and after electroplating, remove water from the surface and bake normally.

[0038] S7. Cut the reinforcing bar, and then arrange electrical characteristic parameter tests, including leakage current, forward voltage drop, and avalanche voltage. All parameters should be controlled using a consistent normal distribution.

[0039] In step S1, after the chip is fixed, a plasma cleaner is used to remove residual photoresist and silicon powder particles left over from the dicing process. The cleaning time until the wire bonding process does not exceed 30 minutes to prevent oxidation. The plasma cleaner is used no more than twice. In this specific embodiment, one cleaning is selected, and the time is 25 minutes.

[0040] In step S2, the molding compound is inspected for quality by scanning it with an ultrasonic scanner according to AQL quality sampling levels to ensure there is no delamination and that it meets the Joint Industrial Standard (JEDEC JSTD020D) without any abnormalities.

[0041] The molding compound used contains aluminum hydroxide, an inorganic material with a flame-retardant component. Utilizing its endothermic peak at 235℃, it decomposes into Al₂O₃ and H₂O upon heating. A 4-degree arc fault is applied across the device terminals. + Under a 0.2V electric field, through electrochemical processes, the Al2O3 decomposed from the endothermic peak will precipitate a nanoscale film together with the purified silicon dioxide layer on the chip surface or the silicon dioxide of the molding compound.

[0042] In step S4, the observation and confirmation of the formation of the internal protective film are specifically performed using a double aberration-corrected transmission electron microscope. High-performance transmission electron microscopes can detect the structure and chemical composition of materials at the atomic scale. The correctness of the structure and chemical composition of the material is verified by referring to the PDF material card published by the American Society for Testing and Materials (ASTM).

[0043] Among them, such as Figure 7 As shown, the electronic parameter indicators of the product are statistically analyzed using software computers. These parameters are controlled using 3σ, and the parameter specifications fall within three standard deviations of the median value of a normal distribution. Finally, a 3D5S optical inspection process is used to ensure that the appearance meets the specifications.

[0044] Beneficial effects:

[0045] This invention utilizes chip plasma cleaning, a mixture of epoxy resins with selected additives, and electrochemical parameters to form a dense, protective film. The film formation is confirmed using an electron microscope. Product parameters are tested using a testing machine, and electronic parameters are statistically analyzed using computer software. This invention fills the nanoscale gaps in the molding compound through electrochemical principles, improving product stability and solving reliability issues in ultra-small packages caused by insufficient molding compound particles and injection molding pressure. It also contributes to the high-quality miniaturization of industrial equipment and reduces the impact of device problems on the system.

[0046] The preferred embodiments of the present invention disclosed above are merely illustrative of the invention. These preferred embodiments do not exhaustively describe all details, nor do they limit the invention to the specific implementations described. Clearly, many modifications and variations can be made based on the content of this specification. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to better understand and utilize the invention. The invention is limited only by the claims and their full scope and equivalents.

Claims

1. A method for controlling nanoscale gaps in epoxy resin encapsulation of semiconductor chips, characterized in that, It comprises the following steps: S1. After the wafer is taken out from the vacuum package, it is subjected to dicing, fixed, cleaned by a plasma cleaning machine to remove residual photoresist and contaminants in the soldering area, and then soldered; After the chip is fixed, the photoresist and silicon particles remaining in the dicing process are removed by a plasma cleaning machine within 30 minutes to prevent oxidation, and the cleaning is not more than twice; S2. After soldering, injection molding is performed, and a curing process is completed according to the characteristics of the plastic packaging material. After curing, a density test is performed, and an ultrasonic scanner is used to scan the inside of the plastic package to determine whether there is a delamination problem; Whether the injection molding of the plastic packaging material is good, according to the AQL quality sampling level, an ultrasonic scanner is used for scanning to ensure that there is no delamination phenomenon and to ensure that it meets the international standard (JEDEC JSTD020D) without abnormalities; S3. Growth of nanoscale gap film: the filler added in the epoxy resin filling material includes silicon dioxide, aluminum oxide, aluminum hydroxide, and magnesium hydroxide material. The film utilizes the material properties of aluminum hydroxide, Al(OH)3 is heated to 245±5℃, 35-50S, and Al2O3 and H2O are formed inside; a small amount of water molecules is released inside the plastic package, and an electric field is applied for 120 minutes, using a semiconductor chip device with a working voltage of 1.3 times the voltage, and an electrochemical Al2O3 and silicon dioxide will generate a protective film; S4. Confirm the growth of the dense film: first, use the chip metallographic cutting CP equipment to non-destructively dissect the device, and use the FIB focused ion microcutter instrument on the four corners of the chip; observe to ensure that a protective film is generated inside; Observe to ensure that a protective film is generated inside, specifically using a double spherical aberration correction transmission electron microscope, which can detect the structure and chemical composition of the material at the atomic scale. According to the ASTM card published by the American Materials Testing Association, refer to the PDF material card, and check the correctness of the structure and chemical composition of the material; S5. Use 150℃ baking for 55-65 minutes, ensure that the maximum temperature does not exceed 156℃, which is lower than the curing temperature of the plastic packaging material, so that the water vapor in the plastic package is completely dried, and the internal water vapor is normally removed; S6. Normally arrange the laser overflow glue and plating process, and normally bake after water removal on the surface after plating; S7. Cut the ribs, then arrange the electrical characteristic parameter test, including leakage current, forward voltage drop, and avalanche voltage, and all parameter indicators are controlled by consistent normal distribution; The plastic packaging material used in the application adds flame-retardant material aluminum hydroxide, which is an inorganic substance. By utilizing its 235℃ heat absorption peak characteristics, it is decomposed into Al2O3 and H2O under heat. An electric field of 4±0.2V is applied to both ends of the device, and through electrochemistry, the Al2O3 decomposed by the heat absorption peak and the purified layer of silicon dioxide on the surface of the chip or the silicon dioxide of the plastic packaging material will precipitate a nanoscale film.

2. The method of claim 1, wherein the method is used for controlling the nanoscale gap of a semiconductor chip encapsulated by an epoxy resin. Electronic parameter indicators of the statistical products of software computer are calculated, the parameter indicators are controlled by 3 Sigma, the parameter specifications fall within 3 standard deviations of the middle value of normal distribution, and finally, 3D5S light inspection procedures are used to ensure that the appearance meets the specifications.

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