Display panel and method for manufacturing the same

By setting a hydrogen supplement layer with high hydrogen content on the oxide active layer of the OLED screen and performing heat treatment, the complex and uneven conduction process is solved, and simplified process and performance improvement is achieved.

CN114628406BActive Publication Date: 2025-03-04WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202210226705.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-03-09
Publication Date
2025-03-04
Estimated Expiration
2042-03-09

AI Technical Summary

Technical Problem

In existing OLED screens, the conduction process of the oxide active layer is complex and uneven, which affects the performance of the display panel.

Method used

By providing a multi-layer hydrogen replenishment layer above the oxide active layer, the atomic percentage hydrogen content of the first hydrogen replenishment layer is greater than or equal to 10%, and heat treatment is performed to make hydrogen active between the film layers, thereby realizing the conductor portion conduction and avoiding the doping process.

Benefits of technology

The preparation process of the display panel is simplified, the conduction uniformity of the conductor portion is improved, the production cost is reduced, and the stability and trust of the transistor are improved.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application provides a display panel and a preparation method thereof, wherein the display panel includes a substrate, an oxide active layer, an insulating layer and a hydrogen replenishment layer, wherein the oxide active layer is arranged on the substrate, the oxide active layer includes a semiconductor part and a conductor part arranged on both sides of the semiconductor part, and the insulating layer is arranged on the oxide active layer; the hydrogen replenishment layer is arranged on the insulating layer, and the hydrogen replenishment layer has multiple layers, wherein the multiple hydrogen replenishment layers include at least one first hydrogen replenishment layer, and the atomic percentage hydrogen content in the first hydrogen replenishment layer is greater than or equal to 10%. By arranging the first hydrogen replenishment layer above the oxide active layer, and the atomic percentage hydrogen content in the first hydrogen replenishment layer is set to be greater than or equal to 10%, when the first hydrogen replenishment layer is heat-treated, the connection bond connected to hydrogen will be broken, so that hydrogen moves back and forth between the film layers, thereby causing the conductor part of the oxide active layer to be conductive, and there is no need to use a doping process to make the conductor part conductive, thereby simplifying the preparation process of the display panel.
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Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a method for preparing the same. Background Art

[0002] In the field of smartphone screens, there is a growing trend toward using organic electroluminescence display (OLED) screens, which typically use a new backplane material, low temperature polycrystalline oxide (LTPO).

[0003] However, there are still some difficult to solve problems in the current OLED screen. For the existing oxide active layer transistor (Thin Film Transistor, TFT), there are usually two processes for the conductorization of the oxide active layer. One is to deposit a gate insulating layer after the oxide active layer is patterned, and pattern it to form a channel and a non-channel area, and then use a process to dope the oxide active layer to make it conductorized, and then further form a gate and a buffer layer. The second is to form a gate insulating layer on the oxide active layer after the oxide active layer is patterned, and continue to further form the gate patterning, and use a process to dope the oxide active layer to make it conductorized, and then perform subsequent processes. However, both methods inevitably introduce a conductorization process, which complicates the preparation process of the display panel, and the conductor part of the oxide active layer is unevenly conductorized, thereby affecting the performance of the display panel. Summary of the invention

[0004] The embodiments of the present application provide a display panel and a method for manufacturing the same, which simplifies the manufacturing process of the display panel.

[0005] The present application provides a display panel, comprising:

[0006] substrate;

[0007] An oxide active layer is disposed on the substrate, wherein the oxide active layer comprises a semiconductor portion and a conductor portion disposed on both sides of the semiconductor portion;

[0008] an insulating layer, disposed on the oxide active layer; and

[0009] The hydrogen replenishment layer is disposed on the insulating layer, and the hydrogen replenishment layer has multiple layers, wherein the multiple hydrogen replenishment layers include at least one first hydrogen replenishment layer, and the atomic percentage hydrogen content in the first hydrogen replenishment layer is greater than or equal to 10%.

[0010] Optionally, in some embodiments of the present application, the display panel also includes a second hydrogen replenishment layer, which is arranged on a surface of the first hydrogen replenishment layer away from the substrate, and the atomic percentage hydrogen content in the second hydrogen replenishment layer is greater than or equal to 10%, and the atomic percentage hydrogen content of the second hydrogen replenishment layer is less than the atomic percentage hydrogen content of the first hydrogen replenishment layer.

[0011] Optionally, in some embodiments of the present application, the atomic percentage hydrogen content of the first hydrogen replenishment layer is greater than 40%.

[0012] Optionally, in some embodiments of the present application, the materials of the first hydrogen replenishment layer and the second hydrogen replenishment layer both include at least one of silicon nitride and silicon oxynitride.

[0013] Optionally, in some embodiments of the present application, the display panel also includes a first gate and a source and drain electrode, the first gate is arranged between the insulating layer and the first hydrogen replenishment layer, the second hydrogen replenishment layer is provided with a through hole, the through hole penetrates the second hydrogen replenishment layer, the first hydrogen replenishment layer and the insulating layer to expose the oxide active layer, the source and drain electrode are arranged on the second hydrogen replenishment layer and extend into the through hole to be connected to the oxide active layer, and the materials of the first hydrogen replenishment layer and the second hydrogen replenishment layer are both silicon nitride.

[0014] Optionally, in some embodiments of the present application, the hydrogen replenishing layer further includes an interlayer layer, the interlayer layer is arranged between the first hydrogen replenishing layer and the second hydrogen replenishing layer, and the material of the interlayer layer includes silicon oxide.

[0015] Accordingly, the present application also provides a method for preparing a display panel, comprising:

[0016] providing a substrate;

[0017] Disposing an oxide active layer material on the substrate;

[0018] An insulating layer and a hydrogen replenishment layer are sequentially stacked on the oxide active layer material, wherein the hydrogen replenishment layer has multiple layers, wherein the multiple hydrogen replenishment layers include at least one first hydrogen replenishment layer, and the atomic percentage hydrogen content in the first hydrogen replenishment layer is greater than or equal to 10%; and

[0019] The first hydrogen replenishing layer is subjected to a heat treatment, and the oxide active layer material forms an oxide active layer, wherein the oxide active layer includes a semiconductor portion and a conductor portion disposed on both sides of the semiconductor portion.

[0020] Optionally, in some embodiments of the present application, before the step of heat-treating the first hydrogen replenishing layer and forming the oxide active layer from the oxide active layer material, the method further includes:

[0021] forming a second hydrogen replenishment layer on a surface of the first hydrogen replenishment layer away from the substrate, wherein the gas forming the second hydrogen replenishment layer includes at least one of hydrogen and argon; the atomic percentage hydrogen content in the second hydrogen replenishment layer is greater than or equal to 10%, and the atomic percentage hydrogen content in the second hydrogen replenishment layer is less than the atomic percentage hydrogen content in the first hydrogen replenishment layer;

[0022] The step of heat-treating the first hydrogen replenishing layer and forming the oxide active layer from the oxide active layer material comprises:

[0023] The first hydrogen replenishing layer and the second hydrogen replenishing layer are subjected to a heat treatment.

[0024] Optionally, in some embodiments of the present application, after the step of heat treating the first hydrogen replenishment layer and the second hydrogen replenishment layer, the method further includes:

[0025] The second hydrogen replenishment layer is patterned to form a second hydrogen replenishment layer having a through hole, wherein the through hole penetrates the second hydrogen replenishment layer, the first hydrogen replenishment layer and the insulating layer to expose the oxide active layer.

[0026] Optionally, in some embodiments of the present application, after the step of patterning the second hydrogen replenishing layer to form the second hydrogen replenishing layer having through holes, the method further includes:

[0027] A conductive layer is provided on the second hydrogen replenishing layer and is etched, wherein the conductive layer forms a source and a drain, and extends into the through hole to be connected with the oxide active layer;

[0028] A conductive layer is disposed on the second hydrogen replenishing layer and an etching process is performed. In the step of forming source and drain electrodes with the conductive layer, the etching loss of the second hydrogen replenishing layer is less than 2 angstroms / second.

[0029] The present application provides a display panel and a preparation method thereof, wherein the display panel includes a substrate, an oxide active layer, an insulating layer and a hydrogen replenishment layer, wherein the oxide active layer is arranged on the substrate, the oxide active layer includes a semiconductor part and a conductor part arranged on both sides of the semiconductor part, and the insulating layer is arranged on the oxide active layer; the hydrogen replenishment layer is arranged on the insulating layer, and the hydrogen replenishment layer has multiple layers, wherein the multiple hydrogen replenishment layers include at least one first hydrogen replenishment layer, and the atomic percentage hydrogen content in the first hydrogen replenishment layer is greater than or equal to 10%. By arranging the first hydrogen replenishment layer above the oxide active layer, and the atomic percentage hydrogen content in the first hydrogen replenishment layer is set to be greater than or equal to 10%, when the first hydrogen replenishment layer is heat-treated, the connection bond connected to hydrogen will be broken, so that hydrogen moves between film layers, thereby causing the conductor part of the oxide active layer to be conductive, and there is no need to use a doping process to make the conductor part conductive, thereby simplifying the preparation process of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0031] Figure 1 This is a schematic diagram of the first structure of the display panel provided in the embodiment of the present application.

[0032] Figure 2 This is a second structural schematic diagram of the display panel provided in the embodiment of the present application.

[0033] Figure 3 This is a third structural schematic diagram of the display panel provided in the embodiment of the present application.

[0034] Figure 4 This is a fourth structural schematic diagram of the display panel provided in the embodiment of the present application.

[0035] Figure 5 This is a fifth structural schematic diagram of the display panel provided in the embodiment of the present application.

[0036] Figure 6 It is a flow chart of the steps of the method for preparing a display panel provided in an embodiment of the present application.

[0037] Figure 7 It is a schematic diagram of the structure of a display panel in the prior art. DETAILED DESCRIPTION

[0038] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application. In addition, it should be understood that the specific implementation methods described herein are only used to illustrate and explain the present application, and are not used to limit the present application. In the present application, unless otherwise stated, the directional words used, such as "upper" and "lower", generally refer to the upper and lower parts of the device in actual use or working state, specifically the drawing direction in the accompanying drawings; and "inside" and "outside" refer to the outline of the device. In the present application, "reaction" can be a chemical reaction or a physical reaction.

[0039] The present application provides a display panel and a preparation method thereof. The display panel includes a substrate, an oxide active layer, an insulating layer and a hydrogen replenishing layer. The oxide active layer is arranged on the substrate, the oxide active layer includes a semiconductor part and a conductor part arranged on both sides of the semiconductor part, and the insulating layer is arranged on the oxide active layer; the hydrogen replenishing layer is arranged on the insulating layer, and the hydrogen replenishing layer has multiple layers, wherein the multiple hydrogen replenishing layers include at least one first hydrogen replenishing layer, and the atomic percentage hydrogen content in the first hydrogen replenishing layer is greater than or equal to 10%.

[0040] In the present application, a first hydrogen replenishment layer is arranged above the oxide active layer, and the atomic percentage hydrogen content in the first hydrogen replenishment layer is set to be greater than or equal to 10%. The first hydrogen replenishment layer contains hydrogen. When the first hydrogen replenishment layer is heat-treated, the connection bond connected to the hydrogen will be broken, so that the hydrogen moves between the film layers, thereby causing the conductor part of the oxide active layer to be conductive. There is no need to use a doping process to make the conductor part conductive, which simplifies the preparation process of the display panel and reduces the production cost of the display panel.

[0041] See also Figure 1 The present application provides a display panel 10. The display panel 10 includes a substrate 100, a first interlayer dielectric layer 200, an oxide active layer 300, an insulating layer 400, a first gate 500, a second gate 600, an interlayer 700, a first hydrogen replenishing layer 800, a second hydrogen replenishing layer 900, a source and drain 1000, and a planar layer 1100.

[0042] Specifically, the second gate 600 is disposed on the substrate 100. The material of the second gate 600 includes at least one of molybdenum, titanium, aluminum and silver.

[0043] In one embodiment, the thickness h of the second gate 600 is 2000-3000 angstroms. Specifically, the thickness h of the second gate 600 can be 2000 angstroms, 2300 angstroms, 2600 angstroms, 2800 angstroms or 3000 angstroms.

[0044] In the present application, the thickness h of the second gate 600 is set to 2000-3000 angstroms, which can improve the control effect of the second gate 600.

[0045] Next, the first interlayer dielectric layer 200 is disposed on the substrate 100 and the second gate 600. The first interlayer dielectric layer 200 includes a first dielectric layer 210 and a second dielectric layer 220 which are stacked in sequence. The second dielectric layer 220 is located on a side of the first dielectric layer 210 away from the substrate 100. The material of the first dielectric layer 210 includes at least one of silicon nitride and silicon oxynitride. The material of the second dielectric layer 220 includes at least one of silicon oxide and aluminum oxide. In this embodiment, the material of the first dielectric layer 210 is silicon nitride. The material of the second dielectric layer 220 includes silicon oxide.

[0046] In one embodiment, the thickness d1 of the first dielectric layer 210 is 500-2000 angstroms. Specifically, the thickness d1 of the first dielectric layer 210 can be 500 angstroms, 1000 angstroms, 1500 angstroms, or 2000 angstroms.

[0047] In one embodiment, the thickness d2 of the second dielectric layer 220 is 2000-3500 angstroms. Specifically, the thickness d1 of the first dielectric layer 210 may be 2000 angstroms, 2500 angstroms, 3000 angstroms, or 3500 angstroms.

[0048] Next, the oxide active layer 300 is disposed on the second dielectric layer 220. The oxide active layer 300 includes a semiconductor portion 310 and a conductor portion 320 disposed on both sides of the semiconductor portion 310. The semiconductor portion 310 is disposed corresponding to the second gate 600. The material of the oxide active layer 300 includes In-X-Zn oxide, where X includes at least one of Ga, Al, Y and Sn. In this embodiment, the material of the oxide active layer 300 is IGZO.

[0049] It should be noted that the corresponding setting means that the film layer is located directly above or directly below another film layer.

[0050] In one embodiment, the thickness d3 of the oxide active layer 300 is 200-450 angstroms. Specifically, the thickness d3 of the oxide active layer 300 may be 200 angstroms, 250 angstroms, 300 angstroms, 400 angstroms, or 450 angstroms.

[0051] Next, the insulating layer 400 is disposed on the second dielectric layer 220 and the oxide active layer 300. The material of the insulating layer 400 includes at least one of silicon oxide and aluminum oxide.

[0052] In one embodiment, the thickness d4 of the insulating layer 400 is 1000-2000 angstroms. Specifically, the thickness d4 of the insulating layer 400 may be 1000 angstroms, 1200 angstroms, 1500 angstroms, 1800 angstroms or 2000 angstroms.

[0053] Next, the first gate 500 is disposed on the insulating layer 400. The first gate 500 is disposed corresponding to the semiconductor portion 310. The material of the first gate 500 includes at least one of molybdenum, titanium, aluminum, and silver.

[0054] In one embodiment, the first gate 500 may be formed by stacking multiple film layers. For example, the first gate 500 includes a first gate layer and a second gate layer stacked on the insulating layer 400. The thickness of the first gate layer is 200-500 angstroms. Specifically, the thickness of the first gate layer may be 200 angstroms, 300 angstroms, 400 angstroms or 500 angstroms. The material of the first gate layer is titanium. The thickness of the second gate layer is 2000-4500 angstroms. Specifically, the thickness of the second gate layer may be 2000 angstroms, 3000 angstroms, 3200 angstroms, 4000 angstroms or 4500 angstroms. The material of the second gate layer is molybdenum.

[0055] Next, the interlayer 700 is disposed on the insulating layer 400 and the first gate 500. The material of the interlayer 700 includes at least one of silicon oxide and aluminum oxide.

[0056] In one embodiment, the thickness t1 of the interlayer 700 is 2000-4500 angstroms. Specifically, the thickness t1 of the interlayer 700 can be 2000 angstroms, 3000 angstroms, 3200 angstroms, 4000 angstroms, or 4500 angstroms.

[0057] Next, the first hydrogen replenishment layer 800 is disposed on the insulating layer 400. Specifically, the first hydrogen replenishment layer 800 is disposed on the interlayer 700. The atomic percentage hydrogen content in the first hydrogen replenishment layer 800 is greater than or equal to 10%. Specifically, the atomic percentage hydrogen content in the first hydrogen replenishment layer 800 can be greater than or equal to 10%, 20%, 50%, 60%, 80% or 90%, etc.

[0058] In the present application, the atomic percentage hydrogen content in the first hydrogen replenishment layer 800 is set to be greater than or equal to 10%, so that when the first hydrogen replenishment layer 800 is subsequently heat-treated, the hydrogen active between the film layers can conduct the oxide active layer 300. If the atomic percentage hydrogen content is set to be less than 10%, even if the first hydrogen replenishment layer 800 is heat-treated, the conductor part 320 cannot be conducted, thereby affecting the performance of the display panel 10.

[0059] In the prior art, the oxide active layer 300 is usually doped with the first gate 500 as a shield to make it partially conductive. However, since the first gate 500 is composed of a molybdenum-titanium stack, it is difficult to achieve uniformity and shorten the taper, resulting in the length of the first gate 500 being uneven with the length of the oxide active layer 300, thereby causing uneven conductiveness of the conductor portion 320. In the present application, a first hydrogen replenishing layer 800 is provided above the oxide active layer 300, and the atomic percentage hydrogen content in the first hydrogen replenishing layer 800 is set to be greater than or equal to 10%. The first hydrogen replenishing layer 800 is heat-treated to break the connection bond with hydrogen, so that hydrogen moves between the film layers, thereby making the conductor part 320 of the oxide active layer 300 conductive and uniformly conductive, and no doping process is required for conductive, which simplifies the preparation process of the display panel 10. At the same time, since no external doping is introduced, the threshold voltage (Vth) and positive pressure high temperature aging test (PBTS) of the transistor are improved, the stability and reliability of the transistor are improved, and the performance of the display panel 10 is improved.

[0060] In one embodiment, the atomic percentage hydrogen content of the first hydrogen replenishing layer 800 is greater than 40%. Specifically, the atomic percentage hydrogen content of the first hydrogen replenishing layer 800 may be greater than 40%, 50%, 60%, 80% or 90%.

[0061] In the present application, the atomic percentage hydrogen content of the first hydrogen replenishing layer 800 is set to be greater than 40%, thereby increasing the atomic percentage hydrogen content in the first hydrogen replenishing layer 800. When the first hydrogen replenishing layer 800 is heat-treated, the connecting bonds connected to the hydrogen will be broken, thereby increasing the content of hydrogen activity between the film layers, thereby further improving the conductor efficiency of the conductor part 320 of the oxide active layer 300 and shortening the production cycle.

[0062] In one embodiment, the material of the first hydrogen replenishing layer 800 includes at least one of silicon nitride and silicon oxynitride. In this embodiment, the material of the first hydrogen replenishing layer 800 is silicon nitride. Alternatively, the material of the first hydrogen replenishing layer 800 may also be other materials.

[0063] In one embodiment, the thickness t2 of the first hydrogen replenishment layer 800 is 600-2500 angstroms. Specifically, the thickness t2 of the first hydrogen replenishment layer 800 can be 600 angstroms, 1000 angstroms, 1200 angstroms, 2000 angstroms, or 2500 angstroms.

[0064] In the present application, the thickness t2 of the first hydrogen replenishing layer 800 is set to 600-2500 angstroms to increase its hydrogen content, thereby further improving the conductor efficiency of the conductor part 320 .

[0065] The interlayer layer 700 and the first hydrogen replenishing layer 800 constitute a hydrogen replenishing layer. The hydrogen replenishing layer may be a second interlayer dielectric layer.

[0066] Next, the second hydrogen replenishing layer 900 is disposed on a surface of the first hydrogen replenishing layer 800 away from the substrate 100. The atomic percentage hydrogen content in the second hydrogen replenishing layer 900 is greater than or equal to 10%. The atomic percentage hydrogen content of the second hydrogen replenishing layer 900 is less than the atomic percentage hydrogen content of the first hydrogen replenishing layer 800. The etching barrier performance of the second hydrogen replenishing layer 900 is greater than the etching barrier performance of the first hydrogen replenishing layer 800. Specifically, when the second hydrogen replenishing layer 900 etches the source and drain 1000, the etching loss of the film layer is less than 2 angstroms / second.

[0067] In the present application, a second hydrogen replenishing layer 900 is arranged on the first hydrogen replenishing layer 800, so that the second hydrogen replenishing layer 900 can further replenish hydrogen for the oxide active layer 300, thereby further improving the efficiency of the conductor part 320 being conductive, and making the conductor part 320 conductive uniformly. At the same time, the second hydrogen replenishing layer 900 can serve as an etching barrier layer to prevent the source and drain electrodes 1000 from damaging other film layer structures during etching, thereby ensuring the display effect of the display panel 10 and ensuring the yield of the display panel 10.

[0068] In one embodiment, the hydrogen replenishing layer and the second hydrogen replenishing layer 900 constitute a second interlayer dielectric layer, that is, the interlayer layer 700 , the first hydrogen replenishing layer 800 and the second hydrogen replenishing layer 900 constitute a second interlayer dielectric layer.

[0069] In one embodiment, the atomic percentage hydrogen content in the second hydrogen replenishing layer 900 may be greater than or equal to 10%, 20%, 50%, 60%, 80% or 90%, etc.

[0070] In one embodiment, the atomic percentage hydrogen content of the second hydrogen replenishing layer 900 is less than the atomic percentage hydrogen content of the first hydrogen replenishing layer 800 .

[0071] In one embodiment, the material of the second hydrogen replenishing layer 900 includes at least one of silicon nitride and silicon oxynitride. In this embodiment, the material of the second hydrogen replenishing layer 900 is silicon nitride.

[0072] The interlayer layer 700 , the first hydrogen replenishing layer 800 and the second hydrogen replenishing layer 900 constitute the second interlayer layer 700 .

[0073] In one embodiment, the second hydrogen replenishment layer 900 is provided with a through hole 901. The through hole 901 penetrates the second hydrogen replenishment layer 900, the first hydrogen replenishment layer 800 and the insulating layer 400 to expose the oxide active layer 300. The source and drain electrodes 1000 are disposed on the second hydrogen replenishment layer 900 and extend into the through hole 901 to connect with the oxide active layer 300.

[0074] Next, the planar layer 1100 is disposed on the second hydrogen replenishing layer 900 and the source and drain electrodes 1000 .

[0075] The first interlayer dielectric layer 200, the oxide active layer 300, the insulating layer 400, the first gate 500, the second gate 600 and the source and drain 1000 constitute the switch transistor 20 of the display panel 10. The switch transistor 20, the interlayer 700, the first hydrogen replenishment layer 800, the second hydrogen replenishment layer 900 and the planarization layer 1100 constitute a transistor layer.

[0076] See also Figure 2 In one embodiment, the transistor layer further includes a driving transistor 30 connected to the switch transistor 20, a connecting electrode 40, a shielding metal layer 50, a wiring layer 60, and a buffer layer 70. The orthographic projection of the switch transistor 20 on the substrate 100 is staggered with the orthographic projection of the driving transistor 30 on the substrate 100. The driving transistor 30 is used to drive the light-emitting structure 1200 to emit light. The driving transistor 30 includes a silicon-based active layer 31, a first gate insulating layer 32, a third gate 33, a second gate insulating layer 34, a fourth gate 35, and a source-drain electrode 36.

[0077] The shielding metal layer 50 is disposed on the substrate 100. The buffer layer 70 is disposed on the substrate 100 and the shielding metal layer 50. The silicon-based active layer 31 is disposed on the buffer layer 70. The silicon-based active layer 31 includes a main body and conductive parts disposed on both sides thereof. The first gate insulating layer 32, the third gate 33, the second gate insulating layer 34 and the fourth gate 35 are stacked and disposed on the silicon-based active layer 31 in sequence. The third gate 33 and the fourth gate 35 are disposed corresponding to the main body. And the fourth gate 35 is in the same layer as the second gate 600 and is disposed on the second gate insulating layer 34 at intervals. The fourth gate 35 and the second gate 600 are formed by one process. The second hydrogen replenishing layer 900 also includes a via and a connecting hole. The via penetrates the second hydrogen replenishing layer 900, the interlayer layer 700, the first hydrogen replenishing layer 800, the insulating layer 400, the first interlayer dielectric layer 200, the second gate insulating layer 34 and the first gate insulating layer 32 to expose the silicon-based active layer 31. The connection hole penetrates the second hydrogen replenishment layer 900, the interlayer layer 700, the first hydrogen replenishment layer 800, the insulating layer 400, the first interlayer dielectric layer 200, the second gate insulating layer 34, the buffer layer 70 and the first gate insulating layer 32 to expose the shielding metal layer 50, and is located on the side of the switch transistor 20 away from the driving transistor 30. The source and drain electrodes 36 are arranged on the second hydrogen replenishment layer 900, and extend into the via holes to connect with the silicon-based active layer 31. The source and drain electrodes 1000 also extend into the via holes to connect with the silicon-based active layer 31. The lower wiring portion of the wiring layer 60 is arranged on the second hydrogen replenishment layer 900, and extends into the connection holes to connect with the shielding metal layer 50. The flat layer 1100 includes a first flat layer and a second flat layer stacked on the second hydrogen replenishment layer 900 in sequence. The connecting electrode 40 is arranged on the first flat layer 1100, and is connected to the source and drain electrodes 36 through the prefabricated holes of the first flat layer. The upper wiring portion of the wiring layer 60 is in the same layer as the connecting electrode 40 and is disposed on the first flat layer 1100 at intervals, and extends into the prefabricated hole of the first flat layer to connect with the lower wiring portion of the wiring layer 60 .

[0078] In one embodiment, the display panel 10 further includes a light emitting structure 1200. The light emitting structure 1200 is disposed on the transistor layer. Specifically, the light emitting structure 1200 includes a pixel definition layer 1210, an anode 1220, and a support column 1230. The anode 1220 is disposed on the planar layer 1100 and connected to the connection electrode 40. The pixel definition layer 1210 is disposed on the anode 1220 and the planar layer 1100. The pixel definition layer 1210 is provided with an opening, and the opening exposes the anode 1220. The support column 1230 is disposed on the pixel definition layer 1210.

[0079] It should be noted that the light emitting structure 1200 , the planar layer 1100 , the interlayer stratification 700 , the driving transistor 30 , the connecting electrode 40 , the shielding metal layer 50 , the wiring layer 60 and the buffer layer 70 may be removed as needed.

[0080] See also Figure 3 It should be noted that the difference between the third structure and the first structure is:

[0081] The interlayer 700 is disposed between the first hydrogen replenishing layer 800 and the second hydrogen replenishing layer 900. The other structures are the same as the first structure and will not be described in detail here.

[0082] See also Figure 4 It should be noted that the difference between the fourth structure and the third structure is:

[0083] The material of the first hydrogen replenishing layer 800 is silicon oxynitride. The other structures are the same as the third structure and will not be described here.

[0084] See also Figure 5 It should be noted that the difference between the fifth structure and the first structure is that:

[0085] The hydrogen replenishing layer also includes an additional intermediate layer 1300. The additional intermediate layer 1300 is disposed between the first hydrogen replenishing layer 800 and the second hydrogen replenishing layer 900. The material of the additional intermediate layer 1300 is silicon oxide. The thickness t3 of the additional intermediate layer 1300 is 2000-4500 angstroms. Specifically, the thickness t3 of the additional intermediate layer 1300 can be 2000 angstroms, 3000 angstroms, 3200 angstroms, 4000 angstroms or 4500 angstroms, etc. The other structures are the same as the first structure and will not be repeated here.

[0086] The present application also provides a method for preparing a display panel, comprising:

[0087] B11. Provide a substrate.

[0088] B12. Arrange an oxide active layer material on the substrate.

[0089] B13. An insulating layer and a hydrogen replenishing layer are sequentially stacked on the oxide active layer material, wherein the hydrogen replenishing layer has multiple layers, wherein the multiple hydrogen replenishing layers include at least one first hydrogen replenishing layer, and the atomic percentage hydrogen content in the first hydrogen replenishing layer is greater than or equal to 10%.

[0090] B14. Heat-treating the first hydrogen replenishing layer, and forming an oxide active layer from the oxide active layer material. The oxide active layer includes a semiconductor portion and a conductor portion disposed on both sides of the semiconductor portion.

[0091] In the present application, a hydrogen replenishment layer is provided above the oxide active layer, and a first hydrogen replenishment layer is also provided, and the atomic percentage hydrogen content in the first hydrogen replenishment layer is greater than or equal to 10%. After the first hydrogen replenishment layer is formed, the first hydrogen replenishment layer is heat treated to break the hydrogen connection bonds in the first hydrogen replenishment layer, so that hydrogen moves back and forth between the film layers, thereby making the conductor part conductive. There is no need to use a doping conductive process to make the conductor part conductive, thereby simplifying the preparation process of the display panel.

[0092] See also Figure 6 The present application also provides a method for preparing a display panel 10, comprising:

[0093] Example 1

[0094] B11. Provide a substrate.

[0095] Please continue reading Figure 1 and Figure 2 In one embodiment, after step B11, the method further includes:

[0096] A shielding metal layer 50 and a buffer layer 70 are sequentially stacked on the substrate 100. Then, a material of a silicon-based active layer 31 is disposed on the buffer layer 70, and the silicon-based active layer 31 is formed by etching. Then, a first gate insulating layer 32 and a third gate 33 are sequentially stacked on the buffer layer 70 and the silicon-based active layer 31.

[0097] Then, a second gate insulating layer 34 is formed on the first gate insulating layer 32 and the third gate 33. Then, with the third gate 33 as a shield, the silicon-based active layer 31 is doped, i.e., ion implanted, to make it conductive, and form a silicon-based active layer 31 having a body portion and a conductive portion surrounding the body portion. The body portion is arranged corresponding to the third gate 33.

[0098] Then, the material of the fourth gate 35 and the material of the second gate 600 are deposited on the second gate insulating layer 34, and patterning, dry etching, stripping and other processes are performed to form the fourth gate 35 and the second gate 600 which are arranged at intervals. The fourth gate 35 is arranged corresponding to the silicon-based active layer 31. The material of the second gate 600 includes at least one of molybdenum, titanium, aluminum and silver.

[0099] In one embodiment, the thickness h of the second gate 600 is 2000-3000 angstroms. Specifically, the thickness h of the second gate 600 can be 2000 angstroms, 2300 angstroms, 2600 angstroms, 2800 angstroms or 3000 angstroms.

[0100] In the present application, the thickness h of the second gate 600 is set to 2000-3000 angstroms, which can improve the control effect of the second gate 600.

[0101] Then, the material of the first dielectric layer 210 and the material of the second dielectric layer 220 are sequentially deposited on the second gate insulating layer 34 , the fourth gate 35 and the second gate 600 by a chemical vapor deposition (CVD) process to form the first dielectric layer 210 and the second dielectric layer 220 , and an annealing treatment is performed.

[0102] The material of the first dielectric layer 210 includes at least one of silicon nitride and silicon oxynitride. The material of the second dielectric layer 220 includes at least one of silicon oxide and aluminum oxide. In this embodiment, the material of the first dielectric layer 210 is silicon nitride. The material of the second dielectric layer 220 includes silicon oxide.

[0103] In the present application, the first dielectric layer 210 and the second dielectric layer 220 are annealed so that the silicon-based active layer 31 can restore the lattice structure destroyed during the ion implantation process and drive the impurities to diffuse to the lattice position, so that the impurities have the function of changing the conductive properties of the silicon-based active layer 31, thereby improving the threshold voltage and leakage current of the device, thereby improving the stability of the display panel 10.

[0104] In one embodiment, the annealing temperature is 200-480 degrees Celsius. Specifically, the annealing temperature may be 200 degrees Celsius, 230 degrees Celsius, 300 degrees Celsius, 400 degrees Celsius, or 480 degrees Celsius. Setting the annealing temperature to 200-480 degrees Celsius further enables the silicon-based active layer 31 to restore the lattice structure destroyed during the ion implantation process, and further drives the impurities to diffuse to the lattice position, further enabling the impurities to have the function of changing the conductive properties of the silicon-based active layer 31, further improving the threshold voltage and leakage current of the device, thereby improving the stability of the display panel 10.

[0105] In one embodiment, the annealing time is 0.5-1.5 hours. Specifically, the annealing time can be 0.5 hours, 0.8 hours, 1 hour or 1.5 hours. Setting the annealing time to 0.5-1.5 hours further enables the silicon-based active layer 31 to restore the lattice structure destroyed during the ion implantation process, and further drives the impurities to diffuse to the lattice position, further enabling the impurities to have the function of changing the conductive properties of the silicon-based active layer 31, further improving the threshold voltage and leakage current of the device, thereby improving the stability of the display panel 10.

[0106] In one embodiment, the annealing is performed in nitrogen.

[0107] In one embodiment, the thickness d1 of the first dielectric layer 210 is 500-2000 angstroms. Specifically, the thickness d1 of the first dielectric layer 210 can be 500 angstroms, 1000 angstroms, 1500 angstroms, or 2000 angstroms.

[0108] In one embodiment, the thickness d2 of the second dielectric layer 220 is 2000-3500 angstroms. Specifically, the thickness d1 of the first dielectric layer 210 may be 2000 angstroms, 2500 angstroms, 3000 angstroms, or 3500 angstroms.

[0109] B12. Arrange an oxide active layer material on the substrate.

[0110] Specifically, the oxide active layer 300 material is deposited on the second dielectric layer 220, and a patterned active layer is formed by patterning, wet etching, and stripping. Then, the patterned active layer is annealed to form an active intermediate layer. The oxide active layer 300 material includes In-X-Zn oxide, where X includes at least one of Ga, Al, Y, and Sn. In this embodiment, the oxide active layer 300 material is IGZO.

[0111] In the present application, the patterned active layer is annealed to eliminate internal defects of the active intermediate layer caused during deposition and remove water and oxygen in the environment, thereby ensuring the stability of the oxide active layer 300 and thus ensuring the performance of the display panel 10.

[0112] In one embodiment, the annealing temperature is 200-380 degrees Celsius. Specifically, the annealing temperature may be 200 degrees Celsius, 230 degrees Celsius, 280 degrees Celsius, 300 degrees Celsius, or 380 degrees Celsius.

[0113] In the present application, the annealing temperature is set to 200-380 degrees Celsius to further eliminate internal defects that cause the active intermediate layer during deposition and further remove water and oxygen in the environment, thereby further ensuring the stability of the oxide active layer 300 and further ensuring the performance of the display panel 10.

[0114] In one embodiment, the annealing time is 0.5-1.5 h. Specifically, the annealing time can be 0.5 h, 0.8 h, 1 h or 1.5 h.

[0115] In the present application, the annealing time is set to 0.5-1.5h to further eliminate internal defects of the active intermediate layer caused during deposition and further remove water and oxygen in the environment, thereby further ensuring the stability of the oxide active layer 300 and further ensuring the performance of the display panel 10.

[0116] Then, the material of the insulating layer 400 is deposited on the second dielectric layer 220 and the active intermediate layer to form the insulating layer 400. The material of the insulating layer 400 includes at least one of silicon oxide and aluminum oxide.

[0117] In one embodiment, the thickness d4 of the insulating layer 400 is 1000-2000 angstroms. Specifically, the thickness d4 of the insulating layer 400 may be 1000 angstroms, 1200 angstroms, 1500 angstroms, 1800 angstroms or 2000 angstroms.

[0118] B13. An insulating layer and a hydrogen replenishing layer are sequentially stacked on the oxide active layer material, wherein the hydrogen replenishing layer has multiple layers, wherein the multiple hydrogen replenishing layers include at least one first hydrogen replenishing layer, and the atomic percentage hydrogen content in the first hydrogen replenishing layer is greater than or equal to 10%.

[0119] Specifically, the material of the first gate 500 is disposed on the insulating layer 400, and patterning is performed to form the first gate 500. The material of the first gate 500 includes at least one of molybdenum, titanium, aluminum and silver.

[0120] In one embodiment, the first gate 500 may be formed by stacking multiple film layers. For example, the first gate 500 includes a first gate 500 layer and a second gate 600 layer stacked on the insulating layer 400. The thickness of the first gate 500 layer is 200-500 angstroms. Specifically, the thickness of the first gate 500 layer can be 200 angstroms, 300 angstroms, 400 angstroms or 500 angstroms. The material of the first gate 500 layer is titanium. The thickness of the second gate 600 layer is 2000-4500 angstroms. Specifically, the thickness of the second gate 600 layer can be 2000 angstroms, 3000 angstroms, 3200 angstroms, 4000 angstroms or 4500 angstroms. The material of the second gate 600 layer is molybdenum.

[0121] Then, an interlayer 700 is formed on the first gate 500 and the insulating layer 400 .

[0122] In one embodiment, the material of the interlayer 700 includes at least one of silicon oxide and aluminum oxide.

[0123] In one embodiment, the thickness t1 of the interlayer 700 is 2000-4500 angstroms. Specifically, the thickness t1 of the interlayer 700 can be 2000 angstroms, 3000 angstroms, 3200 angstroms, 4000 angstroms, or 4500 angstroms.

[0124] Then, a material for the first hydrogen replenishing layer 800 is deposited on the interlayer 700 by using a CVD process to form the first hydrogen replenishing layer 800 .

[0125] The atomic percentage of hydrogen in the first hydrogen replenishing layer 800 may be greater than or equal to 10%, 20%, 50%, 60%, 80% or 90%, etc.

[0126] In one embodiment, the atomic percentage hydrogen content of the first hydrogen replenishing layer 800 is greater than 40%. Specifically, the atomic percentage hydrogen content of the first hydrogen replenishing layer 800 may be greater than 40%, 50%, 60%, 80% or 90%.

[0127] In the present application, the atomic percentage hydrogen content of the first hydrogen replenishing layer 800 is set to be greater than 40%, thereby increasing the atomic percentage hydrogen content in the first hydrogen replenishing layer 800. When the first hydrogen replenishing layer 800 is heat-treated, the connecting bonds connected to the hydrogen will be broken, thereby increasing the content of hydrogen activity between the film layers, thereby further improving the conductor efficiency of the conductor part 320 of the oxide active layer 300 and shortening the production cycle.

[0128] In one embodiment, the material of the first hydrogen replenishing layer 800 includes at least one of silicon nitride and silicon oxynitride. In this embodiment, the material of the first hydrogen replenishing layer 800 is silicon nitride. Alternatively, the material of the first hydrogen replenishing layer 800 may also be other materials.

[0129] In one embodiment, the thickness t2 of the first hydrogen replenishment layer 800 is 600-2500 angstroms. Specifically, the thickness t2 of the first hydrogen replenishment layer 800 can be 600 angstroms, 1000 angstroms, 1200 angstroms, 2000 angstroms, or 2500 angstroms.

[0130] In the present application, the thickness t2 of the first hydrogen replenishing layer 800 is set to 600-2500 angstroms, which increases the hydrogen content thereof, thereby further improving the conductor efficiency of the conductor part 320 .

[0131] In one embodiment, the gas used to form the first hydrogen replenishment layer 800 is silane, nitrogen and ammonia, which can increase the atomic percentage hydrogen content of the first hydrogen replenishment layer 800 , so that the oxide active layer 300 can be subsequently conductive, thereby improving the performance of the display panel 10 .

[0132] B14. Heat-treating the first hydrogen replenishing layer 800 , and forming the oxide active layer 300 from the material of the oxide active layer 300 . The oxide active layer 300 includes a semiconductor portion 310 and a conductor portion 320 disposed on both sides of the semiconductor portion 310 .

[0133] A second hydrogen replenishment layer 900 is formed on a surface of the first hydrogen replenishment layer 800 away from the substrate 100, wherein the gas used to form the second hydrogen replenishment layer 900 includes silane, nitrogen, ammonia, hydrogen, and argon. The atomic percentage hydrogen content in the second hydrogen replenishment layer 900 is greater than or equal to 10%. The atomic percentage hydrogen content of the second hydrogen replenishment layer 900 is less than the atomic percentage hydrogen content of the first hydrogen replenishment layer 800.

[0134] In the present application, the gas used to form the second hydrogen replenishment layer 900 uses one of hydrogen and argon, which can improve the etching barrier performance of the second hydrogen replenishment layer 900, so that in the process of forming the source and drain 1000, the etching loss of the second hydrogen replenishment layer 900 is less than 2 angstroms / second, thereby avoiding damage to other film layers. At the same time, the gas used to form the second hydrogen replenishment layer 900 uses one of hydrogen and argon, which can control the atomic percentage hydrogen content in the second hydrogen replenishment layer 900, that is, the CVD process can be used to adjust the atomic percentage hydrogen content in the first hydrogen replenishment layer 800 and the second hydrogen replenishment layer 900, thereby ensuring the display effect of the display panel 10, thereby ensuring the performance of the display panel 10.

[0135] Then, the second hydrogen replenishment layer 900 is patterned to form a second hydrogen replenishment layer 900 having a via hole. The via hole penetrates the second hydrogen replenishment layer 900, the interlayer 700, the first hydrogen replenishment layer 800, the insulating layer 400, the first interlayer dielectric layer 200, the second gate insulating layer 34 and the first gate insulating layer 32 to expose the silicon-based active layer 31.

[0136] Then, the first hydrogen replenishing layer 800 and the second hydrogen replenishing layer 900 are heat-treated, and the active intermediate layer forms an oxide active layer 300. The oxide active layer 300 includes a semiconductor portion 310 and a conductor portion 320 disposed on both sides of the semiconductor portion 310.

[0137] In the prior art, the oxide active layer is usually doped with the first gate as a shield to make it partially conductive. However, since the first gate is composed of a molybdenum-titanium stack, it is difficult to achieve uniformity and shorten the taper, resulting in an uneven length of the first gate and the oxide active layer, which leads to uneven conductiveness of the conductive part. In the present application, a first hydrogen replenishment layer 800 is provided above the oxide active layer 300, and the atomic percentage hydrogen content in the first hydrogen replenishment layer 800 is set to be greater than or equal to 10%. Since the first hydrogen replenishment layer 800 contains hydrogen, heat treatment of the first hydrogen replenishment layer 800 will break the connection bond connected to the hydrogen, thereby making the hydrogen active between the film layers, thereby making the conductor part 320 of the oxide active layer 300 conductive, and there is no need to use a doping process to make it conductive, which simplifies the preparation process of the display panel 10, and the conductor part 320 is conductive uniformly. At the same time, since no external doping is introduced, the threshold voltage (Vth) and positive pressure high temperature aging test (PBTS) of the transistor are improved, the stability and reliability of the transistor are improved, and thus the performance of the display panel 10 is improved.

[0138] In the present application, since the silicon-based active layer 31 is exposed by the via, when the first hydrogen replenishing layer 800 is heat-treated to make the oxide active layer 300 conductive, part of the hydrogen in the silicon-based active layer 31 overflows from the via, that is, the silicon-based active layer 31 is dehydrogenated, thereby reducing the hydrogen content of the silicon-based active layer 31, thereby avoiding the increase of the operating voltage range (DR) and the subthreshold swing (SS), thereby avoiding the deterioration of the silicon-based active layer 31 due to excessive hydrogen content, thereby affecting the performance of the display panel 10.

[0139] Then, the second hydrogen replenishment layer 900 is patterned to form a second hydrogen replenishment layer 900 having a through hole 901. The through hole 901 penetrates the second hydrogen replenishment layer 900, the first hydrogen replenishment layer 800 and the insulating layer 400 to expose the oxide active layer 300. Then, etching is performed to form a second hydrogen replenishment layer 900 having a prefabricated hole. The connecting hole penetrates the second hydrogen replenishment layer 900, the first hydrogen replenishment layer 800, the insulating layer 400, the second dielectric layer 220, the first dielectric layer 210, the first gate insulating layer 32, the second gate insulating layer 34, and the buffer layer 70 to expose the shielding metal layer 50.

[0140] Then, a conductive layer is disposed on the second hydrogen replenishing layer 900 and etched to form a source-drain electrode 1000, a source-drain electrode 36 and a wiring layer 60 that are spaced apart. The source-drain electrode 1000 extends into the through hole 901 and is connected to the oxide active layer 300. The source-drain electrode 36 extends into the via hole and is connected to the silicon-based active layer 31. The wiring layer 60 extends into the connection hole and is connected to the shielding metal layer 50.

[0141] The second gate 600 , the first interlayer dielectric layer 200 , the oxide active layer 300 , the insulating layer 400 , the first gate 500 , and the source and drain 1000 constitute an IGZO transistor.

[0142] Then, a planarization layer 1100 is formed on the wiring layer 60 , the source and drain electrodes 1000 , and the source and drain electrodes 36 .

[0143] Then, subsequent processes such as forming the connection electrode 40 and forming the light emitting structure 1200 are sequentially performed to complete the preparation of the display panel 10 and perform testing.

[0144] Comparative Example

[0145] See also Figure 7 It should be noted that the display panel 2000 provided in the comparative example is different from that in the embodiment 1 in that:

[0146] A second gate 2600, a first interlayer dielectric 2200, an insulating layer 2400, and a first gate 2500 are formed on a substrate 2100. The first interlayer dielectric 2200 includes a first dielectric layer 2210 and a second dielectric layer 2200 stacked on the second gate 2600. Then, after the step of forming the first gate 500 on the insulating layer 2400, the active intermediate layer is doped so that the active intermediate layer forms an oxide active layer 2300. The oxide active layer 2300 includes a semiconductor portion 2310 and a conductor portion 2320 disposed on both sides thereof. Then, a first interlayer dielectric layer 2700 and a second interlayer dielectric layer 2800 are stacked sequentially on the insulating layer 2400 and the first gate 500. The material of the first interlayer dielectric layer 2700 is silicon oxide. The material of the second interlayer dielectric layer 2800 is silicon nitride. The first interlayer dielectric layer 2700 and the second interlayer dielectric layer 2800 constitute dielectric layers. Then, the dielectric layer is patterned to form a dielectric layer having a through hole 2801. The through hole 2801 penetrates the dielectric layer and the insulating layer 2400 to expose the oxide active layer 2300. Then, a source and drain electrode 2900 and a planar layer 3000 are formed, and the source and drain electrode 2900 extends into the through hole 2801. Others are the same as in Embodiment 1 and are not described here.

[0147] Example 2

[0148] It should be noted that the difference between Example 2 and Example 1 is that:

[0149] Please continue reading Figure 3 and Figure 6 After the step of forming the first gate 500, the first hydrogen replenishing layer 800 is formed first, then the interlayer 700 is formed, and finally, the second hydrogen replenishing layer 900 is formed. The rest is the same as in the first embodiment and will not be described in detail here.

[0150] Example 3

[0151] It should be noted that the difference between Example 3 and Example 2 is that:

[0152] Please continue reading Figure 4 and Figure 6 , silicon oxynitride is used to form the first hydrogen replenishing layer 800. Others are the same as those in Embodiment 2 and will not be described in detail here.

[0153] Example 4

[0154] It should be noted that the difference between Example 4 and Example 1 is that:

[0155] Please continue reading Figure 5 and Figure 6After forming the first hydrogen replenishing layer 800 on the interlayer stratification 700, an additional intermediate layer is formed on the first hydrogen replenishing layer 800. The material of the additional intermediate layer is silicon oxide. Then, a second hydrogen replenishing layer 900 is formed on the additional intermediate layer. Other steps are the same as those in Embodiment 1 and will not be described in detail here.

[0156] (1) Normal characteristics of IGZO transistor device: When Vd = 0.1V, the device is positively swept from -15V to IdVg, and Id = 10 -9 At nA, the Vg value is recorded as the Vth value of the IGZO transistor.

[0157] (2) PBTS detection characteristics of IGZO transistor device: A +30V forward voltage is applied to the first gate 500 end, and Vg extraction is taken at the stress time node Id at t=0s, t=10s, t=50s, t=100s, t=500s, t=1000s, t=3600s, t=5400s, and t=7200s, respectively, to confirm that the Id-Vg curve is positively shifted, and the average value of 10-20 points of the large plate is taken for measurement to confirm the Vth shift changes at these times. The IGZO transistor devices prepared in the comparative example, embodiment 1, embodiment 2, embodiment 3, and embodiment 4 are measured, and the measured average and maximum values ​​are as shown in the following table:

[0158] surface:

[0159]

[0160]

[0161] As can be seen from the table, the prior art uses a doping method to make the oxide active layer conductive, the Vth and PBTS are seriously offset, and the process is complicated. However, the present application does not introduce a doping method to make the oxide active layer 300 conductive, which can simplify the preparation process and improve the problem of severe Vth and PBTS offset. It can be seen that by setting the first hydrogen replenishment layer 800 above the oxide active layer 300, and the atomic percentage hydrogen content in the first hydrogen replenishment layer 800 is set to be greater than or equal to 10%, the first hydrogen replenishment layer 800 is heat-treated to break the connection bond connected to hydrogen, so that hydrogen is active between the film layers, thereby causing the conductor part 320 of the oxide active layer 300 to be conductive. At the same time, because no external doping is introduced, the Vth of the display panel 10 is reduced, that is, the Vth offset of the display panel 10 is reduced, and the PBTS is reduced, thereby improving the Vth and PBTS of the display panel 10, thereby improving the stability and reliability of the transistor, thereby improving the performance of the display panel 10. In addition, there is no need to use a doping process to make the conductor part 320 conductive, which simplifies the manufacturing process of the display panel 10 and reduces the production cost of the display panel 10 .

[0162] The present application provides a display panel 10 and a method for manufacturing the same. The method for manufacturing the display panel 10 includes: providing a substrate 100; then, forming an oxide active layer 300 material on the substrate 100; then, sequentially stacking an insulating layer 400 and a first hydrogen replenishing layer 800 on the oxide active layer material, wherein the atomic percentage hydrogen content in the first hydrogen replenishing layer 800 is greater than or equal to 10%; then, heat-treating the first hydrogen replenishing layer 800, and the oxide active layer 300 material forms an oxide active layer 300, wherein the oxide active layer 300 includes a semiconductor portion 310 and a conductor portion 320 disposed on both sides of the semiconductor portion 310. By arranging the first hydrogen replenishment layer 800 on the oxide active layer 300, and setting the atomic percentage hydrogen content in the first hydrogen replenishment layer 800 to be greater than or equal to 10%, and by heat treating the first hydrogen replenishment layer 800, the connection bond connected to hydrogen is broken, so that hydrogen is active between film layers, thereby making the conductor part 320 of the oxide active layer 300 conductive, and no doping process is required to make the conductor part 320 conductive, which simplifies the preparation process of the display panel 10 and reduces the production cost of the display panel 10. At the same time, because no external doping is introduced, the Vth of the display panel 10 is reduced, that is, the Vth offset of the display panel 10 is reduced, and the PBTS is reduced, thereby improving the Vth and PBTS of the display panel 10, thereby improving the stability and reliability of the transistor, and thus improving the performance of the display panel 10.

[0163] The above is a detailed introduction to a display panel and a preparation method thereof provided in an embodiment of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A display panel, characterized in that: include: substrate; An oxide active layer is disposed on the substrate, wherein the oxide active layer comprises a semiconductor portion and a conductor portion disposed on both sides of the semiconductor portion; an insulating layer, disposed on the oxide active layer; and A hydrogen replenishment layer is disposed on the insulating layer, and the hydrogen replenishment layer has multiple layers, wherein the multiple hydrogen replenishment layers include at least one first hydrogen replenishment layer, and the atomic percentage hydrogen content in the first hydrogen replenishment layer is greater than or equal to 10%; The display panel also includes a second hydrogen replenishment layer, which is arranged on a surface of the first hydrogen replenishment layer away from the substrate. The atomic percentage hydrogen content in the second hydrogen replenishment layer is greater than or equal to 10%, and the atomic percentage hydrogen content in the second hydrogen replenishment layer is less than the atomic percentage hydrogen content in the first hydrogen replenishment layer.

2. The display panel according to claim 1, characterized in that: The atomic percentage hydrogen content of the first hydrogen replenishing layer is greater than 40%.

3. The display panel according to claim 2, characterized in that: The materials of the first hydrogen replenishing layer and the second hydrogen replenishing layer both include at least one of silicon nitride and silicon oxynitride.

4. The display panel according to claim 1, characterized in that: The display panel also includes a first gate and a source and drain electrode. The first gate is arranged between the insulating layer and the first hydrogen replenishment layer. The second hydrogen replenishment layer is provided with a through hole. The through hole penetrates the second hydrogen replenishment layer, the first hydrogen replenishment layer and the insulating layer to expose the oxide active layer. The source and drain electrodes are arranged on the second hydrogen replenishment layer and extend into the through hole to be connected with the oxide active layer. The materials of the first hydrogen replenishment layer and the second hydrogen replenishment layer are both silicon nitride.

5. The display panel according to claim 1, characterized in that: The hydrogen replenishing layer further includes an interlayer layer, and the interlayer layer is arranged between the first hydrogen replenishing layer and the second hydrogen replenishing layer. The material of the interlayer layer includes silicon oxide.

6. A method for preparing a display panel, characterized in that: include: providing a substrate; Disposing an oxide active layer material on the substrate; An insulating layer and a hydrogen replenishment layer are sequentially stacked on the oxide active layer material, wherein the hydrogen replenishment layer has multiple layers, wherein the multiple hydrogen replenishment layers include at least one first hydrogen replenishment layer, and the atomic percentage hydrogen content in the first hydrogen replenishment layer is greater than or equal to 10%; and The first hydrogen replenishing layer is subjected to a heat treatment, and the oxide active layer material forms an oxide active layer, wherein the oxide active layer includes a semiconductor portion and a conductor portion disposed on both sides of the semiconductor portion; Before the step of heat-treating the first hydrogen replenishing layer and forming the oxide active layer from the oxide active layer material, the method further comprises: forming a second hydrogen replenishment layer on a surface of the first hydrogen replenishment layer away from the substrate, wherein the gas forming the second hydrogen replenishment layer includes at least one of hydrogen and argon; the atomic percentage hydrogen content in the second hydrogen replenishment layer is greater than or equal to 10%, and the atomic percentage hydrogen content in the second hydrogen replenishment layer is less than the atomic percentage hydrogen content in the first hydrogen replenishment layer; The step of heat-treating the first hydrogen replenishing layer and forming the oxide active layer from the oxide active layer material comprises: The first hydrogen replenishing layer and the second hydrogen replenishing layer are subjected to a heat treatment.

7. The method for preparing a display panel according to claim 6, characterized in that: After the step of heat treating the first hydrogen replenishing layer and the second hydrogen replenishing layer, the method further includes: The second hydrogen replenishment layer is patterned to form a second hydrogen replenishment layer having a through hole, wherein the through hole penetrates the second hydrogen replenishment layer, the first hydrogen replenishment layer and the insulating layer to expose the oxide active layer.

8. The method for preparing a display panel according to claim 7, characterized in that: After the step of patterning the second hydrogen replenishing layer to form the second hydrogen replenishing layer having through holes, the method further includes: A conductive layer is provided on the second hydrogen replenishing layer and is etched, wherein the conductive layer forms a source and a drain, and extends into the through hole to be connected with the oxide active layer; A conductive layer is disposed on the second hydrogen replenishing layer and an etching process is performed. In the step of forming source and drain electrodes with the conductive layer, the etching loss of the second hydrogen replenishing layer is less than 2 angstroms / second.

Citation Information

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