Multiplexing radar beat signals

Abstract

A device for multiplexing radar beat signals is disclosed. In one example, the device includes an antenna array and a wireless transceiver, which are collectively configured to transmit a radar transmit signal and receive two or more radar receive signals. The two or more radar receive signals represent portions of the radar transmit signal that were reflected by an object. The wireless transceiver includes a radio frequency integrated circuit having two or more receive chains. Each of the two or more receive chains is configured to generate a radar beat signal by downconverting a corresponding radar receive signal of the two or more radar receive signals using the radar transmit signal. A multiplexing circuit is coupled to the two or more receive chains and is configured to multiplex the two or more radar beat signals together to generate a composite radar beat signal.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This patent application claims priority to non-provisional application No. 16 / 696,550, filed on November 26, 2019, entitled “MULTIPLEXING RADAR BEATSIGNALS,” which is assigned to the assignee of the present application and is expressly incorporated herein by reference. Technical Field

[0003] The present disclosure relates generally to wireless transceivers and, more particularly, to wireless transceivers for radar signals. Background Art

[0004] To increase transmission rates and throughput, cellular and other wireless networks are using signals with higher frequencies and smaller wavelengths. For example, fifth-generation (5G)-enabled devices communicate with the network using frequencies including those at or near the extremely high frequency (EHF) spectrum, which has wavelengths at or near millimeter wavelengths. These signals present various technical challenges, such as having higher path loss than signals used for previous generations of wireless communications. In some cases, 5G wireless signals may have difficulty propagating far enough to make cellular communications feasible at these higher frequencies.

[0005] Transmit power levels can be increased, or transmit beamforming can focus energy in a specific direction to compensate for higher path loss. However, these types of compensation techniques increase power density. The Federal Communications Commission (FCC) has established maximum permissible exposure (MPE) limits to accommodate these higher power densities. To meet target guidelines based on this MPE limit, devices need to balance performance with transmit power and other considerations. This balancing act can be difficult to achieve given cost, size, and functionality design goals and / or constraints. Summary of the Invention

[0006] A device is disclosed that implements a technique for multiplexing radar beat signals that can be used for object detection, which can also include object identification and / or ranging. In an example implementation, a wireless transceiver includes a radio frequency integrated circuit, a processor, and an interface circuit system. The interface circuit system couples the radio frequency integrated circuit to the processor and includes at least one communication path, which may have a limited bandwidth. The radio frequency integrated circuit includes a plurality of receive chains that generate corresponding radar beat signals by down-converting a plurality of radar receive signals using a radar transmit signal. The down-conversion operation implements a beat operation using the radar transmit signal, and the bandwidth of the radar beat signal is narrower than the bandwidth of the radar receive signal.

[0007] A multiplexing circuit that can be arranged within a radio frequency integrated circuit multiplexes the radar beat signals together to generate at least one composite radar beat signal. The multiplexing circuit can use, for example, analog frequency division multiplexing (FDM), digital frequency division multiplexing, code division multiplexing (CDM), digital time division multiplexing (TDM), or digital bit packing. In some implementations, due to the sparsity of the spectral content of the beat signal, the multiplexing circuit performs sub-Nyquist sampling to reduce the sampling rate of the analog-to-digital converter. The multiplexing circuit can also generate a composite radar beat signal so that the bandwidth of the composite radar beat signal is narrower than the bandwidth of the interface circuit system. Even if the communication path resources are limited, the interface circuit system can transmit multiple radar beat signals from the radio frequency integrated circuit to the processor in parallel using the composite radar beat signal.

[0008] The demultiplexing circuit, for example, is implemented by a processor and demultiplexes the composite radar beat signal to extract the radar beat signal. For example, for object detection or identification purposes, the processor implements a digital beamformer that processes the radar beat signal to generate a spatial response. By analyzing the spatial response, the processor can determine the angle with respect to the object that reflected the radar transmit signal. Based on the determined angle, the wireless transceiver can adjust the transmit parameters used to transmit the subsequent uplink signal. By adjusting the transmit parameters, the processor can control the power density of the uplink signal at the object and meet target criteria.

[0009] In one example aspect, a device for multiplexing radar beat signals is disclosed. The device includes an antenna array and a wireless transceiver coupled to the antenna array. The antenna array and the wireless transceiver are collectively configured to transmit a radar transmit signal and receive two or more radar receive signals. The two or more radar receive signals represent portions of the radar transmit signal that were reflected by an object. The wireless transceiver includes a radio frequency integrated circuit having two or more receive chains and a multiplexing circuit. Each of the two or more receive chains is configured to generate a radar beat signal by down-converting a corresponding radar receive signal of the two or more radar receive signals using the radar transmit signal. The multiplexing circuit is coupled to the two or more receive chains and is configured to multiplex the radar beat signals together to generate a composite radar beat signal.

[0010] In one example aspect, an apparatus for multiplexing radar beat signals is disclosed. The apparatus includes a transmitting component for transmitting a radar transmit signal and a receiving component for receiving two or more radar receive signals. The two or more radar receive signals represent portions of the radar transmit signal that are reflected by an object. The apparatus also includes a downconversion component for downconverting the two or more radar receive signals using the radar transmit signal to generate the two or more radar beat signals. The apparatus also includes a multiplexing component for multiplexing the two or more radar beat signals to generate a composite radar beat signal.

[0011] In an example aspect, a method for multiplexing radar beat signals to facilitate propagation across resource-constrained interface circuitry is disclosed. The method includes transmitting a radar transmit signal and receiving two or more radar receive signals. The two or more radar receive signals represent portions of the radar transmit signal that were reflected by an object. The method also includes down-converting the two or more radar receive signals using the radar transmit signal to generate two or more radar beat signals. The method also includes multiplexing the two or more radar beat signals together to generate a composite radar beat signal, and propagating the composite radar beat signal across the resource-constrained interface circuitry.

[0012] In one example aspect, an apparatus for multiplexing radar beat signals is disclosed. The apparatus includes a wireless transceiver having a radio frequency integrated circuit (RFIC), the transceiver including a transmit chain, two or more receive chains, and a multiplexing circuit. The RFIC is configured to connect to an antenna array. The transmit chain includes an upconversion mixer. The two or more receive chains each include a downconversion mixer having an input coupled to an output of the upconversion mixer. The multiplexing circuit is coupled to the outputs of the two or more downconversion mixers. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 An example computing device for multiplexing radar beat signals is shown.

[0014] Figure 2-1 An example operating environment for a computing device is shown.

[0015] Figure 2-2 Another example operating environment for a computing device is shown.

[0016] Figure 3 An example sequence flow diagram for operating a computing device is shown.

[0017] Figure 4 An example wireless transceiver for multiplexing radar beat signals is shown, including a processor, a radio frequency integrated circuit, and a multiplexing circuit.

[0018] Figure 5-1 An example radio frequency integrated circuit for multiplexing radar beat signals is shown.

[0019] Figure 5-2 An example processor that supports multiplexing of radar beat signals is shown.

[0020] Figure 6 Different example types of multiplexing circuits for multiplexing radar beat signals are shown.

[0021] Figure 7-1 An example analog frequency division multiplexing circuit for multiplexing radar beat signals is shown.

[0022] Figure 7-2 An example digital frequency division multiplexing circuit for multiplexing radar beat signals is shown.

[0023] Figure 8 An example code division multiplexing circuit for multiplexing radar beat signals is shown.

[0024] Figure 9-1 An example digital time division multiplexing circuit for multiplexing radar beat signals is shown.

[0025] Figure 9-2 An example digital packaging circuit for multiplexing radar beat signals is shown.

[0026] Figure 10 is a flow chart illustrating an example process for multiplexing radar beat signals. DETAILED DESCRIPTION

[0027] The implementation of high frequency and small wavelength communications may require a balance between performance and the need to meet the Federal Communications Commission's maximum permissible exposure limits (e.g., the FCC's MPE limits). Devices that correctly perform this balance can take advantage of increased data rates, such as those achieved through 5G and Wi-Fi 6. TM The data rate achieved by wireless communications. Because MPE limits are affected by the user's proximity to the device's antenna, the techniques described in this document can be used to detect the user's proximity to the device to improve wireless performance while staying within the FCC's MPE limits. Based on the detected proximity, the device can balance the power density of the transmitted wireless signal with the requirement to meet the MPE limits. As a result, the device is allowed to transmit wireless signals at higher average power levels, which enables the wireless signals to travel farther, such as between a smartphone and a remote cellular base station.

[0028] Some proximity detection technologies use dedicated sensors to detect users, such as cameras or infrared sensors. However, these sensors can be bulky or expensive. In addition, a single electronic device can include multiple antennas located on different surfaces (e.g., on the top side, on the bottom side, on the front side, or on opposite sides). In order to account for each of these antennas, multiple cameras or other sensors may need to be installed near each of these antennas, further increasing the cost and size of the electronic device.

[0029] The technology described herein uses a wireless transceiver to perform radar sensing in addition to wireless communication. Using radar sensing, nearby objects (e.g., a user's appendage) can be detected, and the transmission parameters of subsequent uplink signals used for wireless communication can be adjusted to meet target criteria, such as MPE limits determined by the FCC. In particular, the wireless transceiver can use radar sensing to determine the distance to the object (e.g., slant distance) and adjust the power density of the uplink signal based on the distance to the object.

[0030] It is also desirable to determine the angle to the object so that subsequent uplink signals can be directed away from the object to reduce the power density at the object. However, the design of the wireless transceiver can make determining this angle via radar sensing challenging. For example, if the wireless transceiver uses analog phase shifters to perform analog beamforming, these analog phase shifters may not have sufficient bit resolution to achieve the desired angle resolution for radar sensing.

[0031] In addition to or instead of using analog beamforming, digital beamforming can be used to determine the angle to an object. Typically, digital beamforming analyzes phase rotation across multiple receive antenna elements in the digital domain to determine the angle of arrival of the received signal. However, the design of a wireless transceiver can make it challenging to communicate information from multiple receive chains to a processor (e.g., a modem or digital signal processor) for digital beamforming. For example, the interface between the RFIC and the processor may include one fewer communication path (e.g., an electrical connector) for receiving than there are antennas for receiving signals. While using a limited number of communication paths (including one) for receiving can reduce interference and noise within the wireless transceiver and reduce implementation area, it does not easily support the parallel propagation of multiple receive signals associated with multiple receive chains. Furthermore, the bandwidth of the electrical connector(s) can be smaller than the bandwidth of the received radar signal. Therefore, during radar sensing, communicating individual radar signals associated with different antenna elements of an antenna array can be more challenging for techniques such as digital beamforming or classification of detected objects.

[0032] To address this challenge, this document describes techniques for multiplexing radar beat signals that can be used for object detection. Object detection can also include object identification and / or ranging. In an example implementation, a wireless transceiver includes a radio frequency integrated circuit, a processor, and an interface circuit system. The interface circuit system couples the radio frequency integrated circuit to the processor and includes at least one communication path, which may have a limited bandwidth. The radio frequency integrated circuit includes multiple receive chains that generate corresponding radar beat signals by down-converting multiple radar receive signals using a radar transmit signal. The down-conversion operation implements a beat operation using the radar transmit signal, and the bandwidth of the radar beat signal is narrower than the bandwidth of the radar receive signal.

[0033] A multiplexing circuit that can be arranged within the radio frequency integrated circuit generates at least one composite radar beat signal by multiplexing the radar beat signals together. The multiplexing circuit can use, for example, analog frequency division multiplexing (FDM), digital frequency division multiplexing, code division multiplexing (CDM), digital time division multiplexing (TDM), or digital bit packing. In some implementations, due to the sparseness of the spectral content of the beat signal, the multiplexing circuit performs sub-Nyquist sampling to reduce the sampling rate of the analog-to-digital converter. The multiplexing circuit can also generate the composite radar beat signal so that the bandwidth of the composite radar beat signal is narrower than the bandwidth of the interface circuit system. Even if the communication path resources are limited, the interface circuit system can use the composite radar beat signal to pass multiple radar beat signals from the radio frequency integrated circuit to the processor in parallel.

[0034] The demultiplexing circuit, implemented, for example, by a processor, demultiplexes the composite radar beat signal to extract the radar beat signal. For object detection purposes, the processor implements a digital beamformer that processes the radar beat signal to generate a spatial response. By analyzing the spatial response, the processor can determine the angle of the object that reflected the radar transmit signal. Based on the determined angle, the wireless transceiver can adjust the transmit parameters used to transmit the subsequent uplink signal. By adjusting the transmit parameters, the processor can control the power density of the uplink signal at the object and meet target criteria.

[0035] Figure 1An example computing device 102 is shown for multiplexing radar beat signals. In environment 100, computing device 102 communicates with base station 104 via wireless communication link 106 (wireless link 106). In this example, computing device 102 is depicted as a smartphone. However, computing device 102 can be implemented as any suitable computing or electronic device, such as a modem, a cellular base station, a broadband router, an access point, a cellular phone, a gaming device, a navigation device, a media device, a laptop computer, a desktop computer, a tablet computer, a wearable computer, a server, a network attached storage (NAS) device, a smart appliance or other Internet of Things (IoT) device, a medical device, a vehicle-based communication system, a radar, a radio, and the like.

[0036] Base station 104 communicates with computing device 102 via wireless link 106, which can be implemented as any suitable type of wireless link. Although depicted as a tower of a cellular network, base station 104 can represent or be implemented as another device, such as a satellite, a server device, a terrestrial television broadcast tower, an access point, a peer device, a mesh network node, etc. Thus, computing device 102 can communicate with base station 104 or another device via a wireless connection, or a combination of wireless and wired connections.

[0037] Wireless link 106 may include a downlink of data or control information transmitted from base station 104 to computing device 102, or an uplink of other data or control information transmitted from computing device 102 to base station 104. Wireless link 106 may be implemented using any suitable communication protocol or standard, such as second generation (2G), third generation (3G), fourth generation (4G), or fifth generation (5G) cellular; IEEE 802.11 (e.g., Wi-Fi); TM ); IEEE 802.15 (e.g., Bluetooth TM ); IEEE 802.16 (e.g., WiMAX TM ); etc. In some implementations, the base station 104 is the power source and the wireless link 106 provides power from the base station 104 to the computing device 102 wirelessly.

[0038] As shown, computing device 102 includes an application processor 108 and a computer-readable storage medium 110 (CRM 110). Application processor 108 may include any type of processor, such as a multi-core processor, that executes processor-executable code stored by CRM 110. CRM 110 may include any suitable type of data storage medium, such as volatile memory (e.g., random access memory (RAM)), non-volatile memory (e.g., flash memory), optical media, magnetic media (e.g., disk), etc. In the context of the present disclosure, CRM 110 is implemented to store instructions 112, data 114, and other information for computing device 102, and therefore does not include transient propagating signals or carrier waves.

[0039] The computing device 102 may also include input / output ports 116 (I / O ports 116) and a display 118. The I / O ports 116 enable data exchange or interaction with other devices, networks, or users. The I / O ports 116 may include a serial port (e.g., a universal serial bus (USB) port), a parallel port, an audio port, an infrared (IR) port, a user interface port (such as a touch screen), etc. The display 118 presents graphics of the computing device 102, such as a user interface associated with an operating system, program, or application. Alternatively or additionally, the display 118 may be implemented as a display port or a virtual interface through which the graphical content of the computing device 102 is presented.

[0040] The wireless transceiver 120 of the computing device 102 provides connectivity to a corresponding network and other electronic devices connected to the computing device 102. Alternatively or in addition, the computing device 102 may include a wired transceiver, such as an Ethernet or fiber optic interface, for communicating over a local network, an intranet, or the Internet. The wireless transceiver 120 may facilitate communication over any suitable type of wireless network, such as a wireless local area network (LAN) (WLAN), a peer-to-peer (P2P) network, a mesh network, a cellular network, a wireless wide area network (WWAN), and / or a wireless personal area network (WPAN). In the context of the example environment 100, the wireless transceiver 120 enables the computing device 102 to communicate with the base station 104 and the network connected thereto. However, the wireless transceiver 120 may also enable the computing device 102 to communicate "directly" with other devices or networks.

[0041] The wireless transceiver 120 includes circuitry and logic for transmitting and receiving communication signals via the antenna array 122. Components of the wireless transceiver 120 may include amplifiers, switches, mixers, analog-to-digital converters, filters, and the like for conditioning communication signals (e.g., for generating or processing signals). The wireless transceiver 120 may also include logic for performing in-phase / quadrature (I / Q) operations such as synthesis, encoding, modulation, decoding, and demodulation. In some cases, the components of the wireless transceiver 120 are implemented as separate receiver and transmitter entities. Additionally or alternatively, the wireless transceiver 120 may be implemented using multiple or different components to implement corresponding receive and transmit operations (e.g., separate transmit and receive chains). Generally, the wireless transceiver 120 processes data and / or signals associated with data transmitted by the computing device 102 via the antenna array 122.

[0042] The wireless transceiver 120 also includes a radio frequency integrated circuit (IC) 124, a processor 126, and an interface circuit system 128. The interface circuit system 128 couples the radio frequency integrated circuit 124 to the processor 126. In some implementations, at least a portion of the interface circuit system 128 includes a resource-constrained interface. The resource-constrained interface can prevent the wireless transceiver 120 from propagating information from multiple receive chains of the radio frequency integrated circuit 124 to the processor 126 in an independent and parallel manner (or in an independent and concurrent manner).

[0043] For example, the resource-constrained interface may have a limited number of communication paths (e.g., a limited number of electrical connectors) between at least two circuits for processing a receive operation involving propagating a receive signal between the at least two circuits. The two circuits may include the RFIC 124 and the processor 126, the RFIC 124 and another integrated circuit, or another integrated circuit and the processor 126. For example, the limited number of communication paths may be less than the number of receive signals to be propagated to perform digital beamforming. In this case, there are insufficient communication paths to independently and concurrently propagate the receive signals.

[0044] Additionally or alternatively, the bandwidth of the resource-constrained interface may be smaller than the bandwidth of the radar receive signal. For example, the bandwidth of the resource-constrained interface may be on the order of one hundred megahertz (e.g., approximately 100 MHz), while the bandwidth of the radar receive signal may be on the order of gigahertz (GHz) (e.g., 1 GHz or higher). Consequently, there is insufficient bandwidth to directly and independently propagate the radar receive signal without losing information. To address these challenges caused by a limited number of communication paths or bandwidth limitations, the techniques described herein for multiplexing radar beat signals enable information from multiple receive chains to be propagated across such a resource-constrained interface.

[0045] In some cases, the interface circuitry 128 includes a single communication path between at least two circuits within the wireless transceiver 120. Using this single communication path, the interface circuitry 128 can communicate transmitted signals, received signals, and control information. In some implementations, the control information propagates through the communication path while the transmitted or received signals propagate through the communication path. The interface circuitry 128 can include a serial interface and use Manchester encoding and decoding to pass control information from the processor 126 to another circuit within the wireless transceiver 120 across the serial interface.

[0046] The interface circuitry 128 may include other integrated circuits, such as a baseband integrated circuit and / or an intermediate frequency integrated circuit. The baseband integrated circuit may include a digital-to-analog converter and an analog-to-digital converter, which convert baseband signals between the digital and analog domains. The intermediate frequency integrated circuit may include a mixer, which upconverts the baseband signal to an intermediate frequency or downconverts the intermediate frequency signal to baseband. The intermediate frequency may be on the order of several GHz, for example, between approximately 5 and 15 GHz.

[0047] The RFIC 124 up-converts baseband or IF signals to RF and down-converts RF signals to baseband or IF. RF may include frequencies in the very high frequency spectrum, such as frequencies between approximately 24 GHz and 39 GHz, or higher frequencies (e.g., 57 GHz to 66 GHz, 71 GHz to 86 GHz, or frequencies therebetween or higher). The RFIC 124 includes multiple receive chains (e.g., Figure 5-1 ) and a multiplexing circuit 130. The plurality of reception chains receive a plurality of radar reception signals and perform a beat operation of down-converting the radar reception signals using radar transmission signals to generate a plurality of radar beat signals.

[0048] Multiplexing circuitry 130 generates at least one composite radar beat signal by multiplexing the radar beat signals. By providing the composite radar beat signal to interface circuitry 128, interface circuitry 128 can propagate the radar beat signals in parallel from RFIC 124 to processor 126. Generally speaking, multiplexing circuitry 130 combines corresponding receive signals propagated through multiple receive chains into one or more composite signals. Although described with respect to radar beat signals, multiplexing circuitry 130 can also be used to multiplex multiple downlink signals and support digital beamforming during wireless communications. Alternatively, multiplexing circuitry 130 can be bypassed during wireless communications.

[0049] The processor 126, which may include a modem or a digital signal processor, may be implemented within the wireless transceiver 120 or independently of the wireless transceiver 120. Although not explicitly shown, the processor 126 may include a portion of the CRM 110 or may access the CRM 110 to obtain computer-readable instructions. The processor 126 controls the wireless transceiver 120 and enables wireless communication and object detection. For object detection, the processor 126 may determine the proximity of an object (e.g., tilt range) or the angular position of an object. The processor 126 may provide communication data to the wireless transceiver 120 for transmission. The processor 126 may also process a baseband version of a signal received from the wireless transceiver 120 to generate data that may be provided to other portions of the computing device 102 via a communication interface for wireless communication or object detection.

[0050] In general, the processor 126 can control the operating mode or the active operating mode of the wireless transceiver 120. Different operating modes can include object detection mode, wireless communication mode, different transceiver modes (e.g., transmit mode or receive mode), different power modes (e.g., low power mode or high power mode), different resource control states (e.g., connected mode, inactive mode, or idle mode), different modulation modes (e.g., low-order modulation mode (such as quadrature phase shift keying (QPSK) mode) or high-order modulation mode (such as 64-quadrature amplitude modulation (QAM) or 256QAM), etc.). In addition, the processor 126 can adjust one or more transmission parameters of the wireless transceiver 120.

[0051] The processor 126 may include baseband circuitry to perform high-speed sampling processes that may include analog-to-digital conversion, digital-to-analog conversion, gain correction, skew correction, frequency conversion, demultiplexing, digital beamforming, MPE techniques, etc. Figure 1 In FIG, the processor 126 includes a demultiplexing circuit 132 and a digital beamformer 134. The demultiplexing circuit 132 demultiplexes the composite radar beat signal to extract the radar beat signal.

[0052] The digital beamformer 134 processes the radar beat signal to generate a spatial response. Generally, due to the limited space available within other circuitry of the wireless transceiver 120, the digital beamformer 134 is implemented by the processor 126. However, other implementations may integrate the digital beamformer 134 within another circuitry of the wireless transceiver 120. Consider an example in which the RFIC 124 includes a digital signal processor with sufficient processing power to implement the digital beamformer 134. In this case, the digital beamformer 134 is integrated into the RFIC 124 rather than the processor 126.

[0053] Processor 126 analyzes the spatial response to determine the angle to the object that reflected the radar transmission signal. Based on the determined angle, processor 126 may adjust one or more transmit parameters of wireless transceiver 120 for transmitting subsequent uplink signals. Specifically, processor 126 may adjust the transmit parameters to control the power density of the uplink signal at the object and meet the MPE criteria.

[0054] Typically, the multiplexing circuit 130 and the demultiplexing circuit 132 are arranged in two separate circuits connected together by a resource-constrained interface. Figure 1 In the implementation shown above, a resource-constrained interface exists between the RFIC 124 and the processor 126. Thus, the multiplexing circuit 130 is implemented within the RFIC 124, while the demultiplexing circuit 132 is implemented within the processor 126.

[0055] In another implementation, not shown, a resource-constrained interface exists across a portion of the interface circuitry 128, such as between the RF integrated circuit 124 and another integrated circuit (e.g., an intermediate frequency integrated circuit) disposed within the interface circuitry 128. In this case, the multiplexing circuit 130 is disposed within the RF integrated circuit 124, while the demultiplexing circuit is disposed within an integrated circuit within the interface circuitry 128. In an additional implementation, not shown, a resource-constrained interface exists between an integrated circuit disposed within the interface circuitry 128 and the processor 126. Thus, the multiplexing circuit 130 is disposed within the interface circuitry 128, and the demultiplexing circuit 132 is disposed within the processor 126. Depending on where the multiplexing circuit 130 or the demultiplexing circuit 132 is implemented within the wireless transceiver 120, these circuits may be implemented using analog components, digital components, or a combination thereof.

[0056] Figure 2-1 An example operating environment 200 is shown for computing device 102. In example environment 200, a user's hand 214 is holding computing device 102. In one aspect, computing device 102 communicates with base station 104 by transmitting uplink signals 202 (UL signals 202) or receiving downlink signals 204 (DL signals 204) via antenna array 122. However, the user's thumb may represent a nearby object 206, which may be exposed to radiation via uplink signal 202 and block at least a portion of antenna array 122.

[0057] The antenna array 122 includes a plurality of antenna elements 208, such as antenna elements 208-1, 208-2, ..., 208-N, where N represents a positive integer greater than two. The antenna array 122 can be a linear antenna array or a multi-dimensional antenna array and can be configured for beam management techniques, such as beam determination, beam measurement, beam reporting, or beam scanning. The distance between the antenna elements 208 within the antenna array 122 can be based on the frequency transmitted by the wireless transceiver 120. For example, the antenna elements 208-1 to 208-N can be spaced approximately half a wavelength apart from each other (e.g., approximately half a centimeter (cm) for a frequency of approximately 30 GHz). The antenna elements 208-1 to 208-N can be implemented using any type of antenna, including patch antennas, dipole antennas, bow-tie antennas, or combinations thereof.

[0058] To detect whether object 206 is present or within a detectable range and angle, computing device 102 transmits radar transmit signal 210 via at least one antenna element 208 of antenna array 122. Radar transmit signal 210 may be a frequency modulated continuous wave (FMCW) signal or a frequency modulated pulse signal. The type of frequency modulation may include linear frequency modulation, triangular frequency modulation, sawtooth frequency modulation, etc.

[0059] Computing device 102 additionally receives two or more radar receive signals 212-1 through 212-M via two or more other antenna elements 208 of antenna array 122, where M represents a positive integer greater than one. Radar receive signals 212-1 through 212-M represent portions of radar transmit signal 210 that were reflected by object 206 and received individually by antenna elements 208 of antenna array 122. Due to the different physical locations of antenna elements 208 and scattering of radar transmit signal 210, radar receive signals 212-1 through 212M may have different phases relative to one another. In some cases, radar receive signals 212-1 through 212-M are received during a portion of the time that radar transmit signal 210 is transmitted. Based on radar receive signals 212-1 through 212-M, the range and angle to object 206 can be determined.

[0060] In general, the number of antenna elements 208-1 to 208-M used for transmission or reception can vary based on the operating mode of the wireless transceiver 120, or can vary over time for the same operating mode. During object detection mode, for example, one of the antenna elements 208-1 to 208-N is used for transmission, and at least one other of the antenna elements 208-1 to 208-N is used for reception. During reception, a single antenna element 208 can be used to enable the computing device 102 to determine the range to the object 206. Alternatively or additionally, at least two antenna elements 208 can be used to enable the computing device 102 to determine the angle to the object. In contrast, during a wireless communication mode using time division duplexing, all antenna elements 208-1 to 208-N can be used to transmit uplink signals 202 during a first period of time, and all antenna elements 208-1 to 208-N can be used to receive downlink signals 204 during a second period of time. In other words, the wireless transceiver 120 dynamically uses any number of antenna elements 208 - 1 through 208 -M for transmission and reception.

[0061] Figure 2-2 Another example operating environment 216 for computing device 102 is shown. In the depicted configuration, computing device 102 includes antenna arrays 122-1 and 122-2. Through antenna arrays 122-1 and 122-2, computing device 102 can communicate with base station 104 via multiple signal paths 218-1 through 218-3. First signal path 218-1 represents a direct signal path between antenna array 122-1 and base station 104. Second signal path 218-2 represents an indirect signal path between antenna array 122-1, reflector 220, and base station 104. Third signal path 218-3 represents an indirect signal path between antenna array 122-2, reflector 220, and base station 104.

[0062] In the depicted environment, finger 206 blocks first signal path 218-1. Through object detection, computing device 102 determines that antenna array 122-1 is blocked. Thus, computing device 102 can adjust transmit parameters for uplink signal 202 based on the detection. In some implementations, the transmit parameters specify a different beam steering angle that enables uplink signal 202 to be transmitted using second signal path 218-2 rather than using first signal path 218-1 and via antenna array 122-1. The beam steering angle can reduce radiation exposure at finger 206 by directing the main lobe of uplink signal 202 away from finger 206. Additionally or alternatively, the transmit power for uplink signal 202 can be reduced for either second signal path 218-2 or first signal path 218-1. In other cases, the transmit parameters can specify a different antenna array 122 for transmitting communication signals. For example, antenna array 122-2 may be used instead of antenna array 122-1 to transmit uplink signal 202 using third signal path 218-3. By adjusting the transmission parameters, computing device 102 may maintain communication with base station 104 while ensuring compliance. Figure 3 An example sequence for switching between wireless communication mode and object detection mode is further described.

[0063] Figure 3 An example sequence flow chart 300 for operating computing device 102 is shown, with time flowing in a downward direction. Examples of wireless communication modes are shown at 302 and 306, and examples of object detection modes are shown at 304 and 308. Object detection mode can occur at fixed time intervals, between active data periods occurring during wireless communication, at predetermined times set by processor 126, during unused random access channel (RACH) time slots, as part of an initialization process before wireless communication occurs, in response to detection of device movement, or based on an indication that a user may be approaching the device (e.g., based on wireless transceiver 120 observing a power drop in downlink signal 204 or application processor 108 determining that a user is interacting with display 118 of computing device 102), or at other times or in response to other events. In some cases, computing device 102 multiplexes radar beat signals at 304 and / or 308 during object detection mode to determine the angle to an object. However, for certain types of radar sensing, such as determining the distance to an object, multiplexing of radar beat signals is not required.

[0064] At 302, wireless transceiver 120 transmits a high-power (e.g., normal) uplink signal 202-1, which is configured to provide sufficient range to a destination (such as base station 104). After transmitting uplink signal 202-1, at 304, radar transmit signal 210-1 is transmitted via wireless transceiver 120 and antenna array 122. As described above, radar transmit signal 210 can enable computing device 102 to detect object 206 and determine whether object 206 is in proximity to computing device 102. In this case, radar transmit signal 210-1 is represented by a low-power broadband signal. Based on the detection, wireless transceiver 120 can adjust the transmission parameters for subsequent uplink signals 202 to account for MPE compliance criteria.

[0065] The object detection mode can also determine the range and angle to the object 206, thereby enabling the transmission of the uplink signal 202 to comply with range-related and angle-related criteria, such as maximum power density. Because power density is proportional to transmit power and inversely proportional to distance, for the same transmit power level, an object 206 at a closer range is exposed to a higher power density than another object 206 at a farther range. Therefore, similar power density can be achieved at the object 206 by increasing the transmit power level if the object 206 is at a farther range and by reducing the transmit power level if the object 206 is at a closer range.

[0066] The power density at the object 206 also depends on the beam steering angle (e.g., the main lobe angle of the radiation pattern). For example, steering the beam steering angle in a manner away from the angle to the object will reduce the power density at the object 206. By controlling the transmit power and / or the beam steering angle, the wireless transceiver 120 can customize the transmission of the uplink signal 202 so that the power density at the object 206 is below the maximum power density. At the same time, because the range and angle are known, the transmit power level can be increased to a level that promotes wireless communication and meets compliance regulations.

[0067] At 306, wireless transceiver 120 transmits a subsequent uplink signal 202. In the depicted example, if object 206 is not detected, high-power uplink signal 202-2 is transmitted. Alternatively, if object 206 is detected, low-power uplink signal 202-3 is transmitted. For example, at 302, the low transmit power may be between approximately 5 and 20 decibel-milliwatts (dBm) less than the high-power signal. In addition to or in lieu of varying the power of subsequent uplink signal 202, uplink signal 202 may be transmitted using a different antenna array within computing device 102, using a different beam steering angle, using a different frequency, or using a different communication protocol (e.g., relative to the antenna array, beam steering angle, frequency, or communication protocol used to transmit uplink signal 202-1 at 302). Although not shown, the wireless transceiver 120 may alternatively skip the wireless communication mode at 306 and perform another object detection mode using another antenna array or a different transmit power level to detect objects 206 at different locations or distances around the computing device 102 .

[0068] At 308, wireless transceiver 120 and antenna array 122 transmit another radar transmit signal 210-2 to attempt to detect object 206. By scheduling multiple radar transmit signals 210 over time periods, the transmission of uplink signal 202 can be dynamically adjusted based on changing conditions or the movement of object 206. Additionally, appropriate adjustments can be made to balance communication performance with regulatory compliance or emissions requirements.

[0069] The above sequence can also be applied to other antenna arrays within the computing device 102. Other antenna arrays can transmit multiple radar transmit signals 210 sequentially or in parallel. To implement digital beamforming for object detection, the wireless transceiver 120 multiplexes multiple radar beat signals together, as described with respect to FIG. Figure 4 and 5-1 Further described.

[0070] Figure 4 An example wireless transceiver 120 for multiplexing radar beat signals is shown. The wireless transceiver 120 includes at least one radio frequency transmit (RF TX) node 402 and two or more radio frequency receive (RF RX) nodes 404, such as RF receive nodes 404-1, 404-2, ..., 404-M. The RF transmit node 402 and the RF receive nodes 404-1 to 404-M are coupled to respective antenna elements 208-1 to 208-N (e.g., 208-N) of the antenna array 122. Figure 2-1 ). Wireless transceiver 120 also includes a transmitter 406 and a receiver 408, portions of which are disposed within the radio frequency integrated circuit, interface circuitry 128, and processor 126.

[0071] During operation, processor 126 obtains data 410 from computing device 102. Data 410 may include communication data to be sent to another entity, such as base station 104. In some cases, data 410 includes a request from a radar-based function or application of computing device 102 to perform object detection. As an example, data 410 may be provided by application processor 108. For wireless communication, processor 126 provides data 410 to interface circuitry 128 (e.g., to transmitter 406). However, it is noted that the object detection process may be initiated by processor 126 autonomously or independently of application processor 108. For example, processor 126 may determine a beamforming mode without explicit instruction from application processor 108.

[0072] The interface circuitry 128 provides a transmit signal 412 to the RFIC 124. In addition, the interface circuitry 128 provides control information 420 to the RFIC 124. In some implementations, the processor 126 uses frequency division multiplexing to enable both the transmit signal 412 and the control information 420 to be communicated over a single communication path within the interface circuitry 128. In other implementations, the transmit signal 412 and the control information 420 are communicated to the RFIC 124 using separate communication paths.

[0073] The control information 420 includes at least one transmit parameter and / or at least one receive parameter that respectively configures at least one component within the transmitter 406 or the receiver 408. By way of example, the control information 420 specifies the gain of an amplifier (e.g., a power amplifier, a low noise amplifier, or a variable gain amplifier), phase shift information for an analog phase shifter, an operating state of a switch that connects the antenna elements 208 of the selected antenna array 122 to the transmitter 406 or the receiver 408, etc.

[0074] Depending on the operating mode of wireless transceiver 120, transmit signal 412 may be used to generate uplink signal 202 or radar transmit signal 210. Processor 126 or interface circuitry 128 may generate transmit signal 412. In some implementations, interface circuitry 128 further conditions transmit signal 412. For example, interface circuitry 128 may convert transmit signal 412 from the digital domain to the analog domain, filter transmit signal 412 based on the characteristics of data 410 modulating transmit signal 412, or upconvert transmit signal 412.

[0075] To generate uplink signal 202 or radar transmit signal 210, RFIC 124 upconverts transmit signal 412 from baseband or an intermediate frequency to a radio frequency. RFIC 124 provides uplink signal 202 or radar transmit signal 210 to antenna array 122 for transmission.

[0076] The antenna array 122 can also receive multiple downlink signals 204-1, 204-2, ..., 204-M or radar receive signals 212-1 to 212-M using multiple antenna elements 208. Depending on the wireless communication mode, the RFIC 124 downconverts the downlink signals 204-1 to 204-M using a local oscillator signal. In some implementations, the RFIC 124 includes an analog beamformer that adjusts the phase of the multiple downlink signals 204-1 to 204-M and combines the phase-shifted downlink signals 204-1 to 204-M to generate a composite downlink signal 414. In other implementations, the multiplexing circuit 130 generates the composite downlink signal 414 by multiplexing the multiple downlink signals 204-1 to 204-M together, for example, for digital beamforming.

[0077] For object detection, the RFIC 124 performs a beating operation using the radar receive signals 212-1 to 212-M and the radar transmit signal 210 to generate a radar beat signal (eg, Figure 5-1 As shown above). The multiplexing circuit 130 multiplexes the radar beat signals together to generate a composite radar beat signal 416. Figure 1 As depicted, multiplexing circuitry 130 may be implemented within RFIC 124 or within another integrated circuit within interface circuitry 128. Depending on the implementation, analog beamformers may also adjust the phases of radar receive signals 212-1 through 212-M before multiplexing circuitry 130 generates composite radar beat signal 416.

[0078] Interface circuitry 128 provides composite downlink signal 414 or composite radar beat signal 416 to demultiplexing circuitry 132, which may be implemented within processor 126 or within another integrated circuit of interface circuitry 128, as described above with respect to FIG. Figure 1 In some implementations, interface circuitry 128 further conditions composite downlink signal 414 or composite radar beat signal 416. For example, interface circuitry 128 may further downconvert composite downlink signal 414 or composite radar beat signal 416, filter composite downlink signal 414 or composite radar beat signal 416, or convert composite downlink signal 414 or composite radar beat signal 416 from the analog domain to the digital domain.

[0079] Demultiplexing circuitry 132 demultiplexes composite downlink signal 414 and extracts downlink signals 204-1 through 204-M for the wireless communication mode. Additionally or alternatively, demultiplexing circuitry 132 demultiplexes composite radar beat signal 416 and extracts radar beat signals associated with at least a portion of antenna elements 208-1 through 208-N for the object detection mode.

[0080] The processor 126 obtains and analyzes the demultiplexed downlink signals 204-1 to 204-M or the demultiplexed radar beat signals to generate data 418 for the computing device 102. The data 418 may be provided to the processor 108 to transmit the data to the user or provide a proximity alert. The processor 126 may also use digital beamforming to analyze the demultiplexed signals and determine the angle to the base station for wireless communication mode or the angle to the object 206 for object detection mode. The components of the transmitter 406 and the receiver 408 will be referred to in detail. Figure 5-1 Further description.

[0081] Figure 5-1 An example RFIC 124 is shown for multiplexing radar beat signals. Although described with respect to object detection mode, Figure 5-1 The components in can perform similar operations for wireless communication mode.

[0082] In the depicted configuration, the RFIC 124 includes at least one RF transmit chain 502 arranged in the transmitter 406 and a plurality of RF receive chains 504-1 through 504-M arranged in the receiver 408. The RF transmit chain 502 is coupled to a transmit antenna element 506 of the antenna array 122. The RF receive chains 504-1 through 504-M are coupled to receive antenna elements 508-1 through 508-M of the antenna array 122, respectively. The transmit antenna element 506 and the receive antenna elements 508-1 through 508-M together represent Figure 2-1 At least a portion of the antenna elements 208-1 through 208-N shown in FIG.

[0083] RF transmit chain 502 includes an up-converting mixer 510 and an amplifier 512 (e.g., a power amplifier). One input of up-converting mixer 510 is coupled to a local oscillator 514, and another input of up-converting mixer 510 is coupled to interface circuitry 128. Local oscillator 514 can be implemented as a voltage-controlled oscillator that generates a local oscillator signal 516. For wireless communication mode, local oscillator 514 generates local oscillator signal 516 to have a stable frequency that does not change substantially over time. However, for object detection mode, local oscillator 514 generates local oscillator signal 516 to have a frequency that varies over time (e.g., increases or decreases linearly over time). Using local oscillator signal 516, up-converting mixer 510 increases the frequency of transmit signal 412 to generate radar transmit signal 210. Amplifier 512 further amplifies radar transmit signal 210 for transmission.

[0084] The RF receive chains 504-1 to 504-M include amplifiers 518-1 to 518-M (e.g., low-noise amplifiers) and down-conversion mixers 520-1 to 520-M, respectively. The amplifiers 518-1 to 518-M are coupled to the receive antenna elements 508-1 to 508-M, respectively, and amplify the radar receive signals 212-1 to 212-M. The inputs of the down-conversion mixers 520-1 to 520-M are coupled to a switch 540. The switch 540 dynamically connects the inputs of the down-conversion mixers 520-1 to 520-M to the output of the up-conversion mixer 510 for object detection mode or to the output of the local oscillator 514 for wireless communication mode. The other input of each down-conversion mixer 520-1 to 520-M is coupled to a corresponding amplifier 518-1 to 518-M. Output terminals of the down-conversion mixers 520-1 to 520-M are coupled to the multiplexing circuit 130. The down-conversion mixers 520-1 to 520-M down-convert the radar reception signals 212-1 to 212-M using the radar transmission signal 210 provided by the up-conversion mixer 510. Using the radar transmission signal 210, the down-conversion mixers 520-1 to 520-M perform a beat operation to generate radar beat signals 522-1 to 522-M.

[0085] In an example implementation, radar beat signals 522-1 through 522-M are time-domain signals whose respective frequencies are approximately equal to the respective differences between the frequencies of radar transmit signal 210 and the respective frequencies of radar receive signals 212-1 through 212-M. Based on these differences and assuming a detection range of approximately 30 centimeters for object detection mode, the frequencies of radar beat signals 522-1 through 522-M can be, for example, less than approximately 1 MHz. Therefore, the frequencies of radar beat signals 522-1 through 522-M are proportional to the distance between antenna array 122 and at least a portion of object 206 that reflected radar transmit signal 210. Due to the beat operation, the bandwidths of radar beat signals 522-1 through 522-M are narrower than the bandwidths of corresponding radar receive signals 212-1 through 212-M. In some cases, these bandwidths are also narrower than the bandwidths of downlink signals 204-1 through 204-M, which can be on the order of hundreds of MHz. The RF receive chains 504 - 1 to 504 -M provide radar beat signals 522 - 1 to 522 -M to the multiplexing circuit 130 .

[0086] The multiplexing circuit 130 multiplexes the radar beat signals 522-1 through 522-M together to generate the composite radar beat signal 416, which is provided to the interface circuit system 128. Figures 6 to 9-2 An example method for generating composite radar beat signal 416 (which may be analog or digital) is described. Interface circuitry 128 communicates composite radar beat signal 416 to demultiplexing circuitry 132 using at least one communication path (not explicitly shown). Typically, the number of communication paths across at least a portion of interface circuitry 128 is less than the number of radar beat signals 522-1 through 522-M (e.g., the number of communication paths is less than M).

[0087] Multiplexing circuitry 130 may generate composite radar beat signal 416 such that the bandwidth of composite radar beat signal 416 is less than the bandwidth of interface circuitry 128. For example, if the bandwidth of interface circuitry 128 is approximately 100 MHz, the bandwidth of composite radar beat signal 416 may be less than 50 MHz. In some implementations, the bandwidth of composite radar beat signal 416 may be on the order of several MHz, such as less than 5 MHz. Generally, the bandwidth of composite radar beat signal 416 depends on the number of radar beat signals 522-1 through 522-M and / or the design of multiplexing circuitry 130, as described with respect to FIG. Figure 6 The radar beat signal 416 is provided to the demultiplexing circuit 132 as further described. Figure 5-2 Further described.

[0088] Certain figures discussed herein illustrate RFIC 124 coupled to antenna array 122. In some embodiments, each antenna array 122 is coupled to a corresponding RFIC 124. In some such embodiments, antenna array 122 and corresponding RFIC 124 are packaged together in the same module. In some embodiments, several antenna arrays (e.g., antenna arrays 122-1 and 122-2) are coupled to a common RFIC 124.

[0089] Figure 5-2 An example processor 126 is shown that supports multiplexing of radar beat signals. In the depicted configuration, the processor 126 includes a demultiplexing circuit 132; digital receive chains 524-1, 524-2, ..., 524-M; and a digital beamformer 134. The processor 126 also includes an object classification module 528, an angle estimation module 530, and a transmit (TX) parameter adjustment module 532.

[0090] Interface circuitry 128 provides composite radar beat signal 416 to demultiplexing circuitry 132 . In some cases, interface circuitry 128 or processor 126 digitizes composite radar beat signal 416 using an analog-to-digital converter before providing composite radar beat signal 416 to demultiplexing circuitry 132 .

[0091] The demultiplexing circuit 132 is coupled between the interface circuitry 128 and the digital receive chains 524-1 through 524-M. The demultiplexing circuit 132 demultiplexes 416 the composite radar beat signal to extract radar beat signals 522-1, 522-2, ..., 522-M. To demultiplex the composite radar beat signal 416, the demultiplexing circuit 132 performs a reciprocal operation relative to the multiplexing operation performed by the multiplexing circuit 130. The demultiplexing circuit 132 provides the radar beat signals 522-1 through 522-M to the digital receiver chains 524-1 through 524-M, respectively.

[0092] The digital receive chains 524-1 through 524-M provide the radar beat signals 522-1 through 522-M to the digital beamformer 134. In some implementations, the digital receive chains 524-1 through 524-M further condition the radar beat signals 522-1 through 522-M (e.g., filter the radar beat signals 522-1 through 522-M).

[0093] The digital beamformer 134 includes digital weighting circuits 534-1, 534-2, ..., 534-M and at least one summing circuit 536. The digital weighting circuits 534-1 through 534-M apply complex weights to adjust the amplitude and / or phase of the radar beat signals 522-1 through 522-M. The summing circuit 536 combines the weighted radar beat signals 522-1 through 522-M to generate a spatial response 538. The spatial response 538 represents the complex amplitude of the radar beat signals 522-1 through 522-M for different beam steering angles formed across one or more angular dimensions (e.g., across an azimuth dimension, across an elevation dimension, or across both an azimuth dimension and an elevation dimension). The digital beamformer 134 provides the spatial response 538 to the object classification module 528 and the angle estimation module 530.

[0094] The object classification module 528 analyzes the spatial response 538 to determine whether the object 206 is likely associated with an animate object (e.g., a person) or an inanimate object (e.g., a table). Based on the spatial response 538, the object classification module 528 measures the amount of scatter observed from the object 206. Generally, an object 206 having a flat surface exhibits a smaller amount of scatter than an object 206 having a curved surface. If the amount of scatter indicates that the object 206 is relatively flat, the object classification module 528 classifies the object 206 as an inanimate object. Alternatively, if the amount of scatter indicates that the object 206 is relatively curved, the object classification module 528 classifies the object 206 as a likely animate object.

[0095] The angle estimation module 530 analyzes the spatial response 538 to determine the angle to the object 206. As an example, the angle estimation module 530 can determine the angle to the object 206 based on the angle associated with the highest peak amplitude within the spatial response 538. Although not explicitly shown, the processor 126 can also include an object detection module that performs a fast Fourier transform operation based on the radar beat signals 522-1 to 522-M or the spatial response 538. The object detection module can generate one or more range-Doppler maps for use in determining the range to the object 206 and the range rate of the object 206.

[0096] The transmit parameter adjustment module 532 may be provided with information from the object classification module 528, the angle estimation module 530, and / or the object detection module. Using this information, the transmit parameter adjustment module 532 adjusts the transmit parameters of the wireless transceiver 120 to meet target criteria (e.g., MPE criteria). Example transmit parameters include transmit power level, beam steering angle, frequency, selected antenna array, and / or communication protocol. For example, upon detecting the object 206, the transmit parameter adjustment module 532 causes the wireless transceiver 120 to transmit a later uplink signal 202-3 at a lower power, such as Figure 3Alternatively or additionally, the transmission parameter adjustment module 532 causes the wireless transceiver 120 to use another antenna array 122 (such as Figure 2-2 antenna array 122-2) to transmit a later uplink signal 202.

[0097] Although described in terms of object detection mode, Figure 5-1 and 5-2 The components of may perform similar operations to enable digital beamforming for wireless communication mode, which may enable computing device 102 to determine the angle to base station 104. However, in wireless communication mode, Figure 5-1 The inputs of the down-conversion mixers 520-1 to 520-M are coupled to the output of the local oscillator 514 instead of the output of the up-conversion mixer 510. The RFIC 124 may further include a switching circuit (not shown) that can selectively connect the inputs of the down-conversion mixers 520-1 to 520-M to the output of the up-conversion mixer 510 based on the object detection mode or to the local oscillator 514 based on the wireless communication mode.

[0098] If the interface circuitry 128 includes more than one available communication path during reception, the multiplexing circuitry 130 may alternatively multiplex the radar beat signals 522-1 through 522-M together into two or more groups to generate two or more composite radar beat signals 416. In some cases, this enables each of the plurality of composite radar beat signals 416 to have a smaller bandwidth relative to an implementation that generates a single composite radar beat signal 416.

[0099] The techniques described herein are also applicable to hybrid beamforming. In the case of hybrid beamforming, the analog beamformer within the RFIC 124 can combine two or more sets of radar receive signals 212-1 to 212-M. Thus, the radar beat signals 522-1 to 522-M generated by the down-conversion mixers 520-1 to 520-M represent combined versions of the radar receive signals. In this case, each of the radar beat signals 522-1 to 522-M is associated with a set of receive antenna elements, and the number of receive antenna elements 508 is greater than the number of radar beat signals 522.

[0100] Figure 6 Different example types of multiplexing circuits 130 for multiplexing radar beat signals are shown. The multiplexing circuit 130 can be implemented as a frequency division multiplexing (FDM) circuit 602, a code division multiplexing (CDM) circuit 604, or a time division multiplexing (TDM) circuit 606. Although not explicitly shown, the demultiplexing circuit 132 can be implemented using analog circuits that perform reciprocal operations with respect to the multiplexing circuit 130.

[0101] Example types of frequency division multiplexing circuitry 602 include analog frequency division multiplexing circuitry 608 and digital frequency division multiplexing circuitry 610. Analog frequency division multiplexing circuitry 608 performs frequency division multiplexing in the analog domain to generate the composite radar beat signal 416 based on the radar beat signals 522-1 through 522-M. In contrast, digital frequency division multiplexing circuitry 610 performs frequency division multiplexing in the digital domain to generate the composite radar beat signal 416 based on the radar beat signals 522-1 through 522-M. Figure 7-1 and 7-2 Analog frequency division multiplexing circuit 608 and digital frequency division multiplexing circuit 610 are further described.

[0102] In general, the bandwidth of the composite radar beat signal 416 generated using frequency division multiplexing depends on the number of receive antenna elements 508-1 through 508-M (e.g., the number of radar beat signals 522-1 through 522-M) and the detection range of the wireless transceiver 120. In cases where the bandwidth of the composite radar beat signal 416 may be greater than the bandwidth of the interface circuitry 128, the multiplexing circuit 130 may alternatively be implemented using the code division multiplexing circuit 604 or the time division multiplexing circuit 606.

[0103] The code division multiplexing circuit 604 performs code division multiplexing to generate the composite radar beat signal 416 based on the radar beat signals 522-1 to 522-M. Figure 8 Further description.

[0104] To further improve the signal-to-noise ratio of the composite radar beat signal 416, the multiplexing circuit 130 can be implemented using a time-division multiplexing circuit 606. The time-division multiplexing circuit 606 does not require a combiner circuit or a summing circuit to combine the radar beat signals 522-1 to 522-M. Therefore, the additional noise introduced by the combiner circuit or the summing circuit through the folding can be reduced.

[0105] Example types of time division multiplexing circuits 606 include digital time division multiplexing circuits 612 and digital packing circuits 614. The digital time division multiplexing circuit 612 interleaves different time periods of the radar beat signals 522-1 to 522-M to generate the composite radar beat signal 416. In contrast, the digital packing circuit 614 concatenates similar time periods of the radar beat signals 522-1 to 522-M to generate the composite radar beat signal 416. The digital time division multiplexing circuit 612 and the digital packing circuit 614 are referred to as Figure 9-1 and 9-2 Further description.

[0106] Figure 7-1An example analog frequency division multiplexing circuit 608 for multiplexing radar beat signals is shown. In the depicted configuration, the analog frequency division multiplexing circuit 608 includes at least one frequency shifting circuit 702 and at least one combiner circuit 704. In this case, the analog frequency division multiplexing circuit 608 includes frequency shifting circuits 702-1 to 702-M, which are respectively arranged in the RF receive chains 504-1 to 504-M and include analog mixers 706-1 to 706-M and frequency synthesizers 708-1 to 708-M, respectively. The input terminals of the analog mixers 706-1 to 706-M are respectively coupled to ( Figure 5-1 The outputs of the down-conversion mixers 520-1 to 520-M are coupled to the analog mixers 706-1 to 706-M. The other inputs of the analog mixers 706-1 to 706-M are coupled to the frequency synthesizers 708-1 to 708-M, respectively. The frequency shift circuits 702-1 to 702-M shift the frequencies of the radar beat signals 522-1 to 522-M, respectively. For example, the frequency shift between each radar beat signal 522-1 to 522-M can be between approximately 1.5 and 2 MHz.

[0107] The combiner circuit 704 is coupled to the outputs of the analog mixers 706-1 through 706-M and the interface circuitry 128. The combiner circuit 704 can be implemented as a Wilkinson combiner, a transformer, a directional coupler, etc. In general, the combiner circuit 704 combines the radar beat signals 522-1 through 522-M to generate the composite radar beat signal 416.

[0108] During operation, frequency synthesizers 708-1 to 708-M generate analog reference signals 710-1 to 710-M having different frequencies 712-1 to 712-M. The frequency difference between the analog reference signals 710-1 to 710-M causes the corresponding radar beat signals 522-1 to 522-M to be shifted in frequency by different amounts, such that the beat signals differ in frequency (e.g., do not overlap in frequency). For example, the frequencies 712-1 to 712-M may differ by approximately 1.5 to 2 MHz. Typically, frequency synthesizers 708-1 to 708-M generate analog reference signals 710-1 to 710-M based on a reference clock signal or a local oscillator signal (such as local oscillator signal 516). Alternatively, frequency synthesizers 708-1 to 708-M may be implemented as local oscillators.

[0109] Analog mixers 706-1 through 706-M mix the radar beat signals 522-1 through 522-M with analog reference signals 710-1 through 710-M, respectively, to generate frequency-shifted radar beat signals 714-1 through 714-M. Combiner circuit 704 combines the frequency-shifted radar beat signals 714-1 through 714-M to generate composite radar beat signal 416. In this example, composite radar beat signal 416 is an analog signal.

[0110] In an alternative implementation, the analog frequency division multiplexing circuit 608 does not include, disables, or bypasses one of the frequency shifting circuits 702-1 through 702-M. Consider that if the frequency shifting circuit 702-1 were not included, the radar beat signal 522-1 would be passed directly to the combiner circuit 704. Therefore, the combiner circuit 704 combines the radar beat signal 522-1 with the frequency-shifted radar beat signals 714-2 through 714-M. To separate the radar beat signal 522-1 from the frequency-shifted radar beat signals 714-2 through 714-M in the frequency domain, the frequencies 712-2 through 712-M of the analog reference signals 710-2 through 710-M are determined such that the frequency-shifted radar beat signals 714-2 through 714-M are shifted by different amounts relative to the radar beat signal 522-1.

[0111] In some embodiments, although analog frequency division multiplexing circuit 608 is relatively Figure 6 Some other types of multiplexing circuits 130 described in the accompanying drawings can save space within the RFIC 124, but the frequency synthesizer 708-1 can increase the cost of the RFIC 124. In addition, in some embodiments, the proximity of the frequency synthesizers 708-1 to 708-M to other signal generating components within the RFIC 124 can increase interference and reduce the dynamic range of the wireless transceiver 120. Alternatively, the multiplexing circuit 130 can be implemented as a digital frequency division multiplexing circuit 610 that uses a digital signal generator to shift the frequency of the radar beat signals 522-1 to 522-M. In some implementations, the digital signal generator may be easier and less expensive to implement than the frequency synthesizers 708-1 to 708-M.

[0112] As described above, although the demultiplexing circuit 132 is not explicitly shown, it can be implemented using analog circuits that perform reciprocal operations with respect to the multiplexing circuit 130. For example, Figure 7-1The demultiplexing circuit 132 includes filters and mixers (or multipliers), which can be implemented using analog or digital components. The filters extract the frequency-shifted radar beat signals 714-1 to 714-M from the composite radar beat signal 416, and the mixers (or multipliers) shift the frequencies of the frequency-shifted radar beat signals 714-1 to 714-M to recover the radar beat signals 522-1 to 522-M (or some version thereof, such as a digital version).

[0113] Figure 7-2 An example digital frequency division multiplexing circuit 610 for multiplexing radar beat signals is shown. In the depicted configuration, the digital frequency division multiplexing circuit 610 includes at least one frequency shifting circuit 702 and at least one summing circuit 716. In this example, the digital frequency division multiplexing circuit 610 includes frequency shifting circuits 702-1 through 702-M, which are respectively arranged in the RF receive chains 504-1 through 504-M. The summing circuit 716 is coupled to the frequency shifting circuits 702-1 through 702-M and the interface circuitry 128. The digital frequency division multiplexing circuit 610 also includes bandpass filters 718-1 through 718-M and analog-to-digital converters 720-1 through 720-M. The bandpass filters 718-1 through 718-M, the analog-to-digital converters 720-1 through 720-M, and the frequency shifting circuits 702-1 through 702-M are respectively arranged in the RF receive chains 504-1 through 504-M.

[0114] Bandpass filters 718-1 through 718-M are coupled to the outputs of the downconversion mixers 520-1 through 520-M, respectively, and filter the radar beat signals 522-1 through 522-M. In some implementations, the bandpass filters 718-1 through 718-M have a bandwidth of approximately 1 GHz and provide approximately 10 decibels of attenuation (e.g., suppression). In other implementations, the bandpass filters 718-1 through 718-M are implemented as low-pass filters with a bandwidth of approximately 8 GHz. The bandpass filters 718-1 through 718-M can improve the signal-to-noise ratio of the composite radar beat signal 416 by attenuating noise within the radar beat signals 522-1 through 522-M. This can reduce the amount of noise that is folded back when the radar beat signals 522-1 through 522-M are combined by the summing circuit 716.

[0115] The analog-to-digital converters 720-1 through 720-M are coupled to the bandpass filters 718-1 through 718-M, respectively. In some implementations, the analog-to-digital converters 720-1 through 720-M sample the radar beat signals 522-1 through 522-M, respectively, at a sampling rate that is less than the Nyquist rate of the radar beat signals 522-1 through 522-M. For example, in other words, the sampling rate of the analog-to-digital converters 720-1 through 720-M comprises a sub-Nyquist sampling rate, which may be 32 or 64 times lower than the Nyquist sampling rate. Using a sub-Nyquist sampling rate, the analog-to-digital converters 720-1 through 720-M can reduce the sampling rate, thereby reducing the bandwidth requirements of the interface circuitry 128 coupling the RFIC 124 to the processor 126.

[0116] Frequency shifting circuits 702-1 to 702-M include digital mixer circuits 722-1 to 722-M and digital signal generators 724-1 to 724-M. In some implementations, digital signal generators 724-1 to 724-M are implemented as digitally controlled oscillators. Inputs of digital mixer circuits 722-1 to 722-M are coupled to analog-to-digital converters 720-1 to 720-M, respectively. Other inputs of digital mixer circuits 722-1 to 722-M are coupled to digital signal generators 724-1 to 724-M, respectively. Frequency shifting circuits 702-1 to 702-M shift the frequency of radar beat signals 522-1 to 522-M, respectively. For example, the frequency shift between each radar beat signal 522-1 to 522-M can be between approximately 1.5 and 2 MHz.

[0117] The summing circuit 716 is coupled to the outputs of the digital mixer circuits 722 - 1 through 722 -M and the interface circuitry 128 . Generally speaking, the summing circuit 716 combines the radar beat signals 522 - 1 through 522 -M to generate the composite radar beat signal 416 .

[0118] During operation, the bandpass filters 718-1 to 718-M filter the radar beat signals 522-1 to 522-M to generate filtered radar beat signals 726-1 to 726-M. The analog-to-digital converters 720-1 to 720-M digitize the filtered radar beat signals 726-1 to 726-M to generate digital radar beat signals 728-1 to 728-M, which are provided to the digital mixer circuits 722-1 to 722-M.

[0119] Within the frequency shifting circuits 702-1 to 702-M, digital signal generators 724-1 to 724-M generate digital reference signals 730-1 to 730-M having different frequencies 712-1 to 712-M. Digital mixer circuits 722-1 to 722-M mix the digital radar beat signals 728-1 to 728-M with the digital reference signals 730-1 to 730-M to generate frequency-shifted radar beat signals 714-1 to 714-M. Summing circuit 716 combines the frequency-shifted radar beat signals 714-1 to 714-M to generate composite radar beat signal 416. In this example, composite radar beat signal 416 is a digital signal.

[0120] In an alternative implementation, the digital frequency division multiplexing circuit 610 does not include, disables, or bypasses the frequency shifting circuit 702-1. In this case, the digital radar beat signal 728-1 is passed directly to the summing circuit 716. Therefore, the summing circuit 716 combines the digital radar beat signal 728-1 with the frequency-shifted radar beat signals 714-2 to 714-M. To separate the digital radar beat signal 728-1 from the frequency-shifted radar beat signals 714-2 to 714-M in the frequency domain, the frequencies 712-2 to 712-M of the digital reference signals 730-2 to 730-M are determined such that the frequency-shifted radar beat signals 714-2 to 714-M are shifted by different amounts relative to the digital radar beat signal 728-1.

[0121] As described above, although the demultiplexing circuit 132 is not explicitly shown, it can be implemented using analog circuits that perform reciprocal operations with respect to the multiplexing circuit 130. For example, Figure 7-2 The example digital frequency division multiplexing circuit 610 of the demultiplexing circuit 132 includes filters and multipliers, which can be implemented using digital components. The filters extract the frequency-shifted radar beat signals 714-1 to 714-M from the composite radar beat signal 416, and the multipliers shift the frequencies of the frequency-shifted radar beat signals 714-1 to 714-M to recover the radar beat signals 522-1 to 522-M.

[0122] Figure 8 An example code division multiplexing circuit 604 for multiplexing radar beat signals is shown. The code division multiplexing circuit 604 includes bandpass filters 718-1 to 718-M, analog-to-digital converters 720-1 to 720-M, and summing circuit 716, which are described above with respect to Figure 7-2 However, instead of including Figure 7-2The code division multiplexing circuit 604 includes frequency shift circuits 702-1 to 702-M, and modulation circuits 802-1 to 802-M, which are respectively arranged in the RF receive chains 504-1 to 504-M. The modulation circuits 802-1 to 802-M respectively include code generators 804-1 to 804-M and digital mixer circuits 722-1 to 722-M. Generally speaking, the modulation circuits 802-1 to 802-M modulate the phase of the radar beat signals 522-1 to 522-M.

[0123] During operation, code generators 804-1 to 804-M generate mutually orthogonal code sequences 806-1 to 806-M. As an example, code sequences 806-1 to 806-M can be Walsh code sequences. Digital mixer circuits 722-1 to 722-M generate coded radar beat signals 808-1 to 808-M by modulating digital radar beat signals 728-1 to 728-M based on code sequences 806-1 to 806-M. Summing circuit 716 combines the coded radar beat signals 808-1 to 808-M to generate composite radar beat signal 416. In this example, composite radar beat signal 416 is a digital signal.

[0124] As described above, although the demultiplexing circuit 132 is not explicitly shown, it can be implemented using analog circuits that perform reciprocal operations with respect to the multiplexing circuit 130. For example, Figure 8 , the demultiplexing circuit 132 includes other digital mixer circuits that demodulate the composite radar beat signal 416 using the code sequences 806 - 1 through 806 -M to recover the digital radar beat signals 728 - 1 through 728 -M.

[0125] Figure 9-1 An example digital time division multiplexing circuit 612 for multiplexing radar beat signals is shown. The digital time division multiplexing circuit 612 includes bandpass filters 718-1 to 718-M and analog-to-digital converters 720-1 to 720-M, which are described above with respect to FIG. Figure 7-2 However, instead of including Figure 7-2 In addition to the frequency shift circuits 702 - 1 to 702 -M, the digital time division multiplexing circuit 612 includes a switching circuit 902 that is coupled to the analog-to-digital converters 720 - 1 to 720 -M and to the interface circuit system 128 .

[0126] In the depicted configuration, switch circuit 902 is implemented as a single-pole, multi-throw switch, with throws 904-1 through 904-M coupled to analog-to-digital converters 720-1 through 720-M, respectively, and pole 906 coupled to interface circuitry 128. Alternatively, switch circuit 902 may be implemented as a multiplexer.

[0127] During operation, the switching circuit 902 selectively connects the analog-to-digital converters 720-1 through 720-M to the interface circuitry 128. Thus, the switching circuit 902 interleaves different time periods of the digital radar beat signals 728-1 through 728-M to generate the composite radar beat signal 416. As an example, the composite radar beat signal 416 includes a first set of bits of the digital radar beat signal 728-1 associated with a first time interval, a second set of bits of the digital radar beat signal 728-M associated with a second time interval, a third set of bits of the digital radar beat signal 728-1 associated with a third time interval, and so on. In this example, the composite radar beat signal 416 is a digital signal.

[0128] Due to the operation of the switch circuit 902, some bits of the digital radar beat signals 728-1 through 728-M are not included in the composite radar beat signal 416. To avoid this, the multiplexing circuit 130 may alternatively be implemented by the digital packing circuit 614 so that the composite radar beat signal 416 includes all bits associated with the digital radar beat signals 728-1 through 728-M.

[0129] As described above, although the demultiplexing circuit 132 is not explicitly shown, it can be implemented using analog circuits that perform reciprocal operations with respect to the multiplexing circuit 130. For example, Figure 9-1 , the demultiplexing circuit 132 includes another switching circuit that demodulates the composite radar beat signal 416 to recover the digital radar beat signals 728 - 1 through 728 -M.

[0130] Figure 9-2 An example digital packaging circuit 614 for multiplexing radar beat signals is shown. The digital packaging circuit 614 includes bandpass filters 718-1 to 718-M and analog-to-digital converters 720-1 to 720-M, which are described above with respect to FIG. Figure 7-2 However, instead of including Figure 7-2 In addition to the frequency shifting circuits 702-1 through 702-M, the digital packing circuit 614 includes a bit packing circuit 908 that is coupled to the analog-to-digital converters 720-1 through 720-M and to the interface circuitry 128. The bit packing circuit 908 includes registers 910-1 through 910-M.

[0131] During operation, bit packing circuit 908 performs a series-to-parallel operation. Specifically, bit packing circuit 908 stores the bit sets of digital radar beat signals 728-1 to 728-M in registers 910-1 to 910-M. Although these bit sets come from different digital radar beat signals 728-1 to 728-M, these bit sets are associated with the same time interval. Once registers 910-1 to 910-M are full, bit packing circuit 908 concatenates the bit sets within registers 910-1 to 910-M and passes the concatenated bit sets to interface circuitry 128. The process continues for subsequent bit sets associated with subsequent time intervals. Thus, composite radar beat signal 416 includes a series of concatenated bit sets associated with digital radar beat signals 728-1 to 728-M and grouped together based on given time intervals.

[0132] As described above, although the demultiplexing circuit 132 is not explicitly shown, it can be implemented using analog circuits that perform reciprocal operations with respect to the multiplexing circuit 130. For example, Figure 9-2 The demultiplexing circuit 132 depacketizes the composite radar beat signal 416 using the example digital packing circuit 614 to recover the digital radar beat signals 728 - 1 to 728 -M.

[0133] Figure 10 1 is a flow chart illustrating an example process 1000 for multiplexing radar beat signals. The process 1000 is described in terms of a set of blocks 1002 to 1010, which specify operations that may be performed. However, the operations are not necessarily limited to Figure 10 1000 or the order shown in or described herein, as the operations may be performed in an alternative order or in a completely or partially overlapping manner. In addition, more, fewer, and / or different operations may be implemented to perform process 1000 or an alternative process. The operations represented by the illustrated blocks of process 1000 may be represented by (e.g., Figure 1 or 4) wireless transceiver 120 or (for example, Figure 1 、 4 More specifically, the operations of process 1000 may be performed at least in part by a Figure 4 、 5-1 and the multiplexing circuit 130 shown in 7-1 to 9-2.

[0134] At block 1002, a radar transmit signal is transmitted. For example, at least one transmit antenna element 506 of the antenna array 122 and at least one RF transmit chain 502 transmit a radar signal. Figure 2-1The radar transmit signal 210 may be a frequency modulated continuous wave (FMCW) signal or a frequency modulated pulse signal. The type of frequency modulation may include linear frequency modulation, triangular frequency modulation, sawtooth frequency modulation, etc.

[0135] At block 1004, two or more radar receive signals are received. The two or more radar receive signals represent portions of the radar transmit signal that are reflected by an object. For example, two or more receive antenna elements 508-1 to 508-M and two or more receive chains 504-1 to 504-M of the antenna array 122 receive two or more radar receive signals 212-1 to 212-M, respectively. Figure 5-1 Radar receive signals 212 - 1 through 212 -M represent portions of radar transmit signal 210 that are reflected by object 206 , such as a user's appendage.

[0136] Radar receive signals 212-1 to 212-M and radar transmit signal 210 are associated with the same frequency band. For example, the frequency band may be a band below 6 GHz or a band associated with millimeter wavelengths. The frequency band may also be associated with a specific radar frequency band, such as the L-band, S-band, C-band, X-band, Ka-band, etc. The L-band includes frequencies between 1 and 2 GHz, the S-band includes frequencies between 2 and 4 GHz, the C-band includes frequencies between 4 and 8 GHz, the X-band includes frequencies between 8 and 12 GHz, and the Ka-band includes frequencies between 27 and 40 GHz.

[0137] At block 1006, two or more radar receive signals are downconverted to generate two or more radar beat signals using the radar transmit signal. For example, downconversion mixers 520-1 through 520-M generate radar beat signals 522-1 through 522-M, respectively, by downconverting radar receive signals 212-1 through 212-M using radar transmit signal 210. Because the downconversion operation uses radar transmit signal 210, the downconversion operation is a beat operation that demodulates radar receive signals 212-1 through 212-M. Due to the beat operation, the frequency of radar beat signals 522-1 through 522-M is proportional to the distance between antenna array 122 and at least a portion of reflected radar transmit signal 210 from object 206. Furthermore, the bandwidth of radar beat signals 522-1 through 522-M is narrower than the bandwidth of the corresponding radar receive signals 212-1 through 212-M.

[0138] At block 1008, two or more radar beat signals are multiplexed together to generate a composite radar beat signal. For example, the multiplexing circuit 130 multiplexes the radar beat signals 522-1 to 522-M together to generate the composite radar beat signal 416, as shown in FIG. Figure 5-1As shown. Depending on the implementation of the multiplexing circuit 130, the composite radar beat signal 416 can be an analog signal or a digital signal. The multiplexing circuit 130 can be implemented as a frequency division multiplexing (FDM) circuit 602 (such as Figure 7-1 and 7-2 As shown), code division multiplexing (CDM) circuit 604 (as shown Figure 8 As shown), time division multiplexing (TDM) circuit 606 (as shown Figure 9-1 and 9-2 shown) etc.

[0139] At block 1010, the composite radar beat signal is propagated across the interface circuitry. For example, the interface circuitry 128 propagates the composite radar beat signal 416 from the RFIC 124 to the processor 126. In some cases, at least a portion of the interface circuitry 128 comprises a resource-constrained interface. The resource-constrained interface may have a limited number of available communication paths (e.g., electrical connectors) and / or limited bandwidth during reception. As an example, the resource-constrained interface includes a relatively small number of communication paths relative to the number of two or more radar beat signals 522-1 through 522-M. As another example, the bandwidth of the resource-constrained interface may be less than the bandwidth of any of the radar receive signals 212-1 through 212-M. By propagating the composite radar beat signal 416, the interface circuitry 128 may effectively transfer the radar beat signals 522-1 through 522-M from the RFIC 124 to the processor 126 in parallel, even across the resource-constrained interface.

[0140] Although not shown, additional operations may be performed as part of process 1000. For example, in some implementations, demultiplexing circuit 132 demultiplexes composite radar beat signal 416, such as Figure 5-2 As shown. Digital beamformer 134 may also generate spatial response 538 based on demultiplexed radar beat signals 522-1 through 522-M. In addition, computing device 102 may use object classification module 528 and / or angle estimation module 530 to detect object 206 and determine characteristics about object 206. Upon detecting object 206, transmit parameter adjustment module 532 may adjust transmit parameters for subsequent signals, such as uplink signal 202, that are transmitted later.

[0141] Unless the context dictates otherwise, use of the word "or" herein may be construed as use of an "inclusive or" or a term permitting the inclusion or application of one or more items linked by the word "or" (e.g., the phrase "A or B" may be construed as permitting only "A," only "B," or both "A" and "B"). Furthermore, items represented in the figures and terms discussed herein may refer to one or more items or terms, and thus, singular or plural references to items and terms in this written description may be made interchangeably. Finally, although the subject matter has been described in language specific to structural features or methodological operations, it should be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or operations described above, including without limitation to the organization of the features or the order in which the operations are performed.

Claims

1. A device comprising: A radio frequency integrated circuit configured to be coupled to an antenna array, the radio frequency integrated circuit configured to: transmitting a radar transmit signal using the antenna array; as well as receiving, using the antenna array, two or more radar receive signals representing portions of the radar transmit signal reflected by an object, The radio frequency integrated circuit comprises: two or more receive chains, each receive chain configured to generate a radar beat signal by down-converting a corresponding radar receive signal of the two or more radar receive signals using the radar transmit signal; and a multiplexing circuit coupled to the two or more receive chains, the multiplexing circuit configured to multiplex the radar beat signals together to generate a composite radar beat signal; demultiplexing circuitry; and An interface circuit system is coupled to the multiplexing circuit and is configured to be coupled to a processor, the interface circuit system including at least one communication path, the number of the radar beat signals being greater than the number of paths in the at least one communication path, the interface circuit system being configured to transmit the composite radar beat signal from the multiplexing circuit to the demultiplexing circuit.

2. The device according to claim 1, wherein: The radar transmit signal and the two or more radar receive signals are associated with the same frequency band.

3. The apparatus of claim 1 , further comprising the processor, wherein: The demultiplexing circuit is implemented within the processor.

4. The device according to claim 1, wherein: The demultiplexing circuit is implemented within the interface circuitry.

5. The apparatus according to claim 1, wherein: The at least one communication path includes at least one electrical connection coupled between the multiplexing circuitry and the demultiplexing circuitry.

6. The apparatus of claim 1 , further comprising the processor, wherein: The processor includes two or more digital receive chains, the number of digital receive chains in the two or more digital receive chains being equal to the number of receive chains in the two or more receive chains of the radio frequency integrated circuit; and The demultiplexing circuit is coupled between the interface circuitry and the two or more digital receive chains, the demultiplexing circuit being configured to: demultiplexing the composite radar beat signal to extract the radar beat signal; and The extracted radar beat signals are provided to the two or more digital receiving chains respectively.

7. The device according to claim 6, wherein: The processor includes a digital beamformer coupled to the two or more digital receive chains, the digital beamformer configured to generate a spatial response indicative of an angular position of the object based on the extracted radar beat signal.

8. The apparatus according to claim 1, wherein: The multiplexing circuit includes a frequency division multiplexing circuit configured to perform frequency division multiplexing to generate the composite radar beat signal.

9. The apparatus according to claim 8, wherein: The frequency division multiplexing circuit is configured to: shifting the frequency of the radar beat signal by different amounts to generate a frequency-shifted radar beat signal; and The composite radar beat signal is generated based on the frequency-shifted radar beat signal.

10. The apparatus according to claim 9, wherein: The frequency division multiplexing circuit includes an analog frequency division multiplexing circuit, and the analog frequency division multiplexing circuit includes: two or more frequency synthesizers, respectively arranged in the two or more receiving chains, the two or more frequency synthesizers being configured to generate corresponding analog reference signals having different frequencies; two or more analog mixers, respectively arranged in the two or more receiving chains and respectively coupled to the two or more frequency synthesizers, the two or more analog mixers being configured to respectively generate the frequency-shifted radar beat signals using the analog reference signals; and A combiner circuit is coupled to the two or more analog mixers and is configured to generate the composite radar beat signal based on the frequency-shifted radar beat signal.

11. The apparatus according to claim 9, wherein: The frequency division multiplexing circuit includes a digital frequency division multiplexing circuit, and the digital frequency division multiplexing circuit includes: two or more analog-to-digital converters, respectively arranged in the two or more receiving chains, each of the two or more analog-to-digital converters being configured to generate a digital radar beat signal based on a corresponding radar beat signal; two or more digital signal generators, respectively arranged in the two or more receiving chains and configured to generate corresponding digital reference signals having different frequencies; two or more digital mixer circuits, respectively arranged in the two or more receiving chains, respectively coupled to the two or more analog-to-digital converters, and are respectively coupled to the two or more digital signal generators; each of the two or more digital mixer circuits is configured to generate a frequency-shifted radar beat signal using a corresponding digital reference signal; and A summing circuit is coupled to the two or more digital mixer circuits and is configured to generate the composite radar beat signal based on the frequency-shifted radar beat signal.

12. The apparatus according to claim 11, wherein: The multiplexing circuit includes two or more bandpass filters, the two or more bandpass filters are respectively arranged in the two or more receiving chains, the two or more bandpass filters are respectively coupled to the two or more analog-to-digital converters, each of the two or more bandpass filters is configured to generate a filtered radar beat signal based on a corresponding radar beat signal; as well as Each of the two or more analog-to-digital converters is configured to generate a digital radar beat signal based on a corresponding filtered radar beat signal.

13. The apparatus according to claim 1, wherein: The multiplexing circuit includes a code division multiplexing circuit configured to perform code division multiplexing to generate the composite radar beat signal.

14. The apparatus according to claim 13, wherein: The code division multiplexing circuit includes: two or more analog-to-digital converters, respectively arranged in the two or more receiving chains, each of the two or more analog-to-digital converters being configured to generate a digital radar beat signal based on a corresponding radar beat signal; two or more code generators, respectively arranged in the two or more receiving chains and configured to generate corresponding orthogonal code sequences; two or more digital mixer circuits, respectively arranged in the two or more receiving chains, respectively coupled to the two or more analog-to-digital converters, and are respectively coupled to the two or more code generators; each of the two or more digital mixer circuits is configured to generate an encoded radar beat signal by modulating a phase of a corresponding digital radar beat signal based on a corresponding orthogonal code sequence; and A summing circuit is coupled to the two or more digital mixer circuits and is configured to generate the composite radar beat signal based on the encoded radar beat signal.

15. The apparatus according to claim 1, wherein: The multiplexing circuit includes a time division multiplexing circuit configured to perform time division multiplexing to generate the composite radar beat signal.

16. The apparatus according to claim 15, wherein: The time division multiplexing circuit includes a digital time division multiplexing circuit, and the digital time division multiplexing circuit includes: two or more analog-to-digital converters, respectively arranged in the two or more receiving chains, each of the two or more analog-to-digital converters being configured to generate a digital radar beat signal based on a corresponding radar beat signal; and A switching circuit is coupled to the two or more analog-to-digital converters and is configured to interleave different time periods of the digital radar beat signals to generate the composite radar beat signal.

17. The apparatus according to claim 15, wherein: The time division multiplexing circuit includes a digital packaging circuit, and the digital packaging circuit includes: two or more analog-to-digital converters, respectively arranged in the two or more receiving chains, each of the two or more analog-to-digital converters being configured to generate a digital radar beat signal based on a corresponding radar beat signal; and The bit packing circuit is configured to connect the same time periods of the digital radar beat signals together to generate the composite radar beat signal.

18. The apparatus of claim 1 , further comprising the antenna array, wherein: The antenna array includes a transmit antenna element and two or more receive antenna elements; The two or more receive antenna elements are respectively coupled to the two or more receive chains; The radio frequency integrated circuit includes a transmit chain coupled to the transmit antenna element; as well as The two or more receive antenna elements and the two or more receive chains are collectively configured to receive the two or more radar receive signals during a portion of a time when the transmit chains and the transmit antenna elements collectively transmit the radar transmit signal.

19. An apparatus comprising: A sending component, used for sending radar signals; a receiving component for receiving two or more radar reception signals, wherein the two or more radar reception signals represent portions of the radar transmission signal reflected by an object; a down-conversion component for generating two or more radar beat signals by down-converting the two or more radar receive signals using the radar transmit signal; a multiplexing component for generating a composite radar beat signal by multiplexing the two or more radar beat signals together; a demultiplexing component, configured to extract the two or more radar beat signals from the composite radar beat signal; as well as An interface component is configured to propagate the composite radar beat signal from the multiplexing component to the demultiplexing component, the interface component being coupled to the multiplexing component and configured to be coupled to a processor, the interface component including at least one communication path, the number of the radar beat signals being greater than the number of paths in the at least one communication path.

20. The apparatus according to claim 19, further comprising: A digital beamforming component is configured to generate a spatial response indicative of an angular position of the object based on the two or more radar beat signals extracted by the demultiplexing component.

21. The apparatus according to claim 20, wherein the multiplexing component comprises at least one of the following: an analog frequency division multiplexing component for performing frequency division multiplexing in an analog domain to generate the composite radar beat signal; a digital frequency division multiplexing component for performing frequency division multiplexing in a digital domain to generate the composite radar beat signal; a code division multiplexing component for performing code division multiplexing in the digital domain to generate the composite radar beat signal; a digital time division multiplexing component for performing time division multiplexing in the digital domain to generate the composite radar beat signal; or A digital packing component is configured to perform bit packing in the digital domain to generate the composite radar beat signal.

22. A method for multiplexing radar beat signals to facilitate propagation across interface circuitry, the method comprising: Send radar transmission signal; receiving two or more radar receive signals, the two or more radar receive signals representing portions of the radar transmit signal reflected by an object; down-converting the two or more radar receive signals using the radar transmit signal to generate two or more radar beat signals; multiplexing the two or more radar beat signals together to generate a composite radar beat signal; as well as The composite radar beat signal is propagated across the interface circuitry to a demultiplexing circuit, the interface circuitry including at least one communication path, the number of radar beat signals being greater than the number of paths in the at least one communication path.

23. The method of claim 22, wherein: The interface circuitry includes resource-constrained interface circuitry having a bandwidth that is less than a bandwidth of any of the two or more radar receive signals.

24. The method of claim 22, wherein: The propagation of the composite radar beat signal across the interface circuitry includes propagating the composite radar beat signal across the interface circuitry from a radio frequency integrated circuit to a processor.

25. The method of claim 22, further comprising: demultiplexing the composite radar beat signal using the demultiplexing circuit to extract the two or more radar beat signals; performing digital beamforming to generate a spatial response representative of an angle to the object based on the two or more radar beat signals; as well as The angle to the object is determined based on the spatial response.

26. The method according to claim 25, further comprising: adjusting a transmit parameter based on the angle to produce an adjusted transmit parameter; as well as An uplink signal is transmitted using the adjusted transmission parameters.

27. An apparatus configured to implement at least a portion of a wireless transceiver, the apparatus comprising: A radio frequency integrated circuit configured to be coupled to an antenna array, the radio frequency integrated circuit comprising: the transmit chain, including the upconversion mixer; two or more receive chains, each of the two or more receive chains comprising a downconversion mixer having an input coupled to an output of the upconversion mixer; and a multiplexing circuit coupled to outputs of the two or more down-conversion mixers; and Demultiplexing circuit, wherein the multiplexing circuit and the demultiplexing circuit are configured to be coupled together via interface circuitry, the interface circuitry comprising at least one communication path, wherein the number of the two or more receive chains is greater than the number of paths in the at least one communication path, and wherein the interface circuitry is configured to transmit the composite radar beat signal from the multiplexing circuit to the demultiplexing circuit.

28. The apparatus according to claim 27, further comprising: The antenna array, wherein the antenna array comprises: a transmit antenna element coupled to the transmit chain; and Two or more receive antenna elements, respectively coupled to the two or more receive chains, wherein: The up-conversion mixer is configured to generate a radar transmit signal; The transmit antenna element and the transmit chain are collectively configured to transmit the radar transmit signal; The two or more receive antenna elements and the two or more receive chains are collectively configured to receive two or more radar receive signals, the two or more radar receive signals representing portions of the radar transmit signal reflected by an object; The two or more down-conversion mixers are configured to down-convert the two or more radar receive signals using the radar transmit signal to generate two or more radar beat signals; and The multiplexing circuit is configured to multiplex the two or more radar beat signals together to generate a composite radar beat signal.

29. The apparatus of claim 28, wherein the wireless transceiver comprises: a processor including two or more digital receive chains; a demultiplexing circuit having two or more outputs coupled to respective ones of the two or more digital receive chains; as well as Interface circuitry is coupled between the multiplexing circuit and the demultiplexing circuit.

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