Task processing method, computing coprocessor, chip and computer device

By combining the hardware command queue module and the programmable command processing module in the front-end control engine, the problem of poor flexibility of computing coprocessors in the allocation of complex computing tasks is solved, achieving efficient parallel command processing and reducing cost and host CPU load.

CN114637536BActive Publication Date: 2025-11-07SUZHOU DENGLIN TECHNOLOGIES CO LTD
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Patent Information

Application Number
CN202210304928.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-03-25
Publication Date
2025-11-07
Estimated Expiration
2042-03-25

AI Technical Summary

Technical Problem

In complex technology applications such as deep neural networks, computer devices suffer from poor flexibility when using computing coprocessors to handle complex computational tasks.

Method used

The front-end control engine combines a hardware command queue module and a programmable command processing module. The hardware command queue module reads the command submission list from the memory and sends it to the programmable command processing module, which then distributes the commands to the data processing unit, thus achieving flexible command allocation.

Benefits of technology

It improves the flexibility and parallelism of the front-end control engine in processing commands, reduces programming design costs, maintains the efficiency and parallelism of task processing, and reduces the load and power consumption of the host CPU.

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Abstract

The application belongs to the chip technical field, and discloses a task processing method, a computing coprocessor, a chip and a computer device. The method is applied to a front-end control engine in the computing coprocessor. The computing coprocessor further comprises a data processing unit. The front-end control engine comprises a command queue management module, a hardware command queue module, a programmable command processing module and a unit management module. The hardware command queue module receives command submission control information sent by the command queue management module, reads a command submission list from a memory based on the command submission control information, and sends command execution control information contained in the command submission list to the programmable command processing module. The programmable command processing module reads a command execution list from the memory based on the received command execution control information, and distributes the command contained in the command execution list to the data processing unit through the unit management module. In this way, the command can be flexibly and efficiently distributed.
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Description

TECHNICAL FIELD

[0001] The present application relates to the chip technical field, in particular, relates to a task processing method, a computing coprocessor, a chip and a computer device. BACKGROUND

[0002] In the application scene of complex technology such as deep neural network, the computer device usually processes the complex technology computing task with the characteristics of large data, large computing and multiple computing types through the computing coprocessor. The computing coprocessor is developed and applied to assist the central processing unit to complete the processing work which cannot be executed or executed inefficiently. The computing coprocessor includes a front-end control engine and a data processing unit. The front-end control engine distributes each command of the complex technology computing task to each data processing unit in the computing coprocessor based on the task indication of the host processor, and executes the distributed command through the data processing unit.

[0003] However, when distributing the related command of the complex computing task through the front-end control engine, there is usually the problem of poor flexibility. SUMMARY

[0004] The purpose of the embodiments of the present application is to provide a task processing method, a computing coprocessor, a chip and a computer device, so that when the related command of the complex computing task is distributed through the front-end control engine, the command can be flexibly distributed.

[0005] In one aspect, a task processing method is provided, applied to a front-end control engine in a computing coprocessor, the computing coprocessor further comprising at least one data processing unit, the front-end control engine comprising a hardware command queue module and a programmable command processing module, the hardware command queue module being based on fixed function hardware to execute commands, and the programmable command processing module having programmable function, the method comprising:

[0006] The hardware command queue module reads a command submission list from the storage based on the received command submission control information corresponding to the to-be-processed task, and sends the command execution control information contained in the command submission list to the programmable command processing module;

[0007] The programmable command processing module reads a command execution list from the storage based on the received command execution control information, and distributes the command contained in the command execution list to the matched data processing unit in the at least one data processing unit, so that each data processing unit executes the distributed command.

[0008] In the implementation process, the programmable command processing module has the characteristics of high flexibility, the hardware command queue module is combined with the programmable command processing module, the flexibility of the front-end control engine in processing commands is improved, after the hardware command queue module is combined with the programmable command processing module, the hardware command queue module has the characteristics of high parallelism, and the programmable command processing module has the characteristics of programmability, without complex programming design and high microprocessor design cost, the flexibility of the front-end control engine in processing commands is improved, and parallelism and efficiency of task processing are maintained.

[0009] In an aspect, a front-end control engine applied in a computing co-processor is provided, the computing co-processor further includes at least one data processing unit, and the front-end control engine includes a hardware command queue module and a programmable command processing module.

[0010] The hardware command queue module is configured to read a command submission list from a memory based on received command submission control information corresponding to a to-be-processed task, and send command execution control information included in the command submission list to the programmable command processing module.

[0011] The programmable command processing module is configured to read a command execution list from the memory based on received command execution control information, and distribute commands included in the command execution list to a matched data processing unit in the at least one data processing unit, so that each data processing unit executes the distributed command.

[0012] In an aspect, a chip is provided, including a front-end control engine, the chip has at least one data processing unit, and the front-end control engine includes a hardware command queue module and a programmable command processing module.

[0013] The hardware command queue module is configured to read a command submission list from a memory based on received command submission control information corresponding to a to-be-processed task, and send command execution control information included in the command submission list to the programmable command processing module.

[0014] The programmable command processing module is configured to read a command execution list from the memory based on received command execution control information, and distribute commands included in the command execution list to a matched data processing unit in the at least one data processing unit, so that each data processing unit executes the distributed command.

[0015] In an aspect, a computing co-processor is provided, including a front-end control engine and at least one data processing unit, the front-end control engine is configured to distribute commands to the at least one data processing unit according to steps of a method provided in any of various optional implementation manners of task processing described above, and the at least one data processing unit is configured to execute the distributed commands.

[0016] In one aspect, a chip is provided, comprising a compute co-processor and a memory, the memory storing computer-readable instructions that, when executed by the compute co-processor, implement the steps of the method provided in any of the various optional implementations of the task processing described above.

[0017] In one aspect, a computer device is provided, comprising a compute co-processor and a memory, the memory storing computer-readable instructions that, when executed by the compute co-processor, implement the steps of the method provided in any of the various optional implementations of the task processing described above.

[0018] Additional features and advantages of the application will be set forth in the description that follows, and in part will be apparent from the description, or can be learned by practice of the application. The objectives and other advantages of the application will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings. BRIEF DESCRIPTION OF DRAWINGS

[0019] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments of the present application. It should be understood that the following drawings only show some of the embodiments of the present application, and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can also be obtained without creative labor on the basis of these drawings.

[0020] Figure 1 A structural schematic diagram of a compute co-processor provided for the embodiments of the present application is shown in FIG. 1.

[0021] Figure 2 A structural schematic diagram of a front-end control engine provided for the embodiments of the present application is shown in FIG. 2.

[0022] Figure 3 An implementation flowchart of a task processing method 300 provided for the embodiments of the present application is shown in FIG. 3.

[0023] Figure 4 A structural example diagram of a two-level list provided for the embodiments of the present application is shown in FIG. 4.

[0024] Figure 5 A structural example diagram of a three-level list provided for the embodiments of the present application is shown in FIG. 5.

[0025] Figure 6 An implementation flowchart of a task switching method 600 provided for the embodiments of the present application is shown in FIG. 6.

[0026] Figure 7 A structural block diagram of a front-end control engine 700 provided for the embodiments of the present application is shown in FIG. 7. DETAILED DESCRIPTION

[0027] The technical solutions in the embodiments of the present application will be described clearly and completely in combination with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described in the drawings can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed present application, but only represents selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0028] It should be noted that: similar reference numbers and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings.

[0029] First, some terms involved in the embodiments of the present application are explained to facilitate understanding by those skilled in the art.

[0030] Terminal device: can be a mobile terminal, a fixed terminal or a portable terminal, such as a mobile phone, a station, a unit, a device, a multimedia computer, a multimedia tablet, an Internet node, a communicator, a desktop computer, a laptop computer, a notebook computer, a netbook computer, a tablet computer, a personal communication system device, a personal navigation device, a personal digital assistant, an audio / video player, a digital camera / camcorder, a positioning device, a television receiver, a radio broadcast receiver, an electronic book device, a game device, or any combination thereof, including accessories and peripherals of these devices or any combination thereof. It is also foreseeable that the terminal device can support any type of interface for the user (such as wearable devices) and the like.

[0031] Server: can be a standalone physical server, or a server cluster or distributed system composed of multiple physical servers, or a cloud server providing cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, and basic cloud computing services such as big data and artificial intelligence platforms.

[0032] Graphics Processing Unit (GPU): also known as display core, visual processor, display chip, is a kind of microprocessor specially used for image operation in personal computer, workstation, game machine and some mobile devices (such as tablet computer, smart phone, etc.).

[0033] Artificial Intelligence (AI): is to use digital computer or digital computer controlled machine simulation, extension and expansion of human intelligence, perception of environment, acquisition of knowledge and use of knowledge to obtain the best results of theory, method, technology and application system. Artificial intelligence technology is a comprehensive discipline, involving a wide range of fields, both hardware and software level technology.

[0034] In order to better perform more diverse and complex tasks, meet the needs of diverse task scenarios, the embodiment of the application provides a front-end control engine of a coprocessor, and also provides a task processing method, a computing coprocessor, a chip and a computer device, wherein the related commands of the complex computing task can be flexibly distributed through the front-end control engine.

[0035] Referring to Figure 1 As shown in the figure, a structure schematic diagram of a computing coprocessor provided by the embodiment of the application. The computing coprocessor includes a front-end control engine, a command network, one or more data processing units and a memory interface.

[0036] Computing coprocessor: can be simply referred to as coprocessor, which is a processor in a computer device other than a host processor (i.e. host CPU), used to execute the task commands issued by the host CPU.

[0037] For example, the computing coprocessor can be a heterogeneous computing processor, GPU and general-purpose graphics processing unit (GPGPU) and the like.

[0038] Optionally, the computer device can be a server or a terminal device, which is not limited here. The computing coprocessor can have multiple special hardware computing units for processing computing tasks related to complex technologies such as artificial intelligence. The computing coprocessor executing the commands of the host CPU can be in synchronous mode or in asynchronous mode.

[0039] In an application scenario of synchronous operation of a computing coprocessor and a host CPU, the computing coprocessor waits for the host CPU to prepare the input data of a certain data processing task, or the host CPU needs to wait for the operation result of the computing coprocessor.

[0040] Front-end control engine: used for communication with the host CPU, reading and parsing the task indication issued by the host CPU for the to-be-processed task, and distributing each command for executing the to-be-processed task to each data processing unit according to the task indication.

[0041] Data processing unit: connected with the front-end control engine through the command network, used for processing the command distributed by the front-end control engine, and returning the execution result to the front-end control engine.

[0042] Optionally, the data processing unit can be one or multiple. The types of the multiple data processing units can be the same or different. Figure 1 In an embodiment, the data processing unit includes: data processing unit 0, data processing unit 1, …, and data processing unit N. Wherein, N is a natural number.

[0043] Optionally, the data processing unit can be a pure computing unit, such as an acceleration hardware for convolution or matrix multiplication of artificial intelligence operation, a programmable single instruction multiple data (SIMD) processor, a pure data transfer unit, and a data processing unit for specific application (such as a video codec, a picture processor), etc.

[0044] In an application scenario, multiple data processing units need to complete the same computing task synchronously, and the front-end control engine can perform synchronization operations on the execution commands between the multiple data processing units. These synchronization operations can be completed through special waiting commands or atomic operations executed by the front-end control engine.

[0045] Memory interface: used for reading and writing the memory.

[0046] Referring to FIG. 1, which is a structural schematic diagram of a front-end control engine provided by an embodiment of the present application. The structure of the front-end control engine will be specifically described below in combination with Figure 2 Figure 2 The front-end control engine in the above embodiment. Figure 1 As shown in FIG. 1, the front-end control engine can include a host interface module, a hardware command queue module, and a programmable command processing module. Optionally, the front-end control engine can further include a command queue management module and / or a unit management module. Figure 2

[0047] Host interface module: used for realizing the communication between the host CPU and the front-end control engine, and receiving the command list update or task termination command issued by the host CPU.

[0048] Optionally, the host CPU can be in communication connection with the command queue management module through the host interface module, or can be in direct communication connection with the hardware command queue module through the host interface module. The host interface module can be a host interface register.

[0049] Command queue management module: used for scheduling each hardware command queue module, and controlling the computing task switching, etc. The command queue management module can be programmable or non-programmable.​​

[0050] In one embodiment, the command queue management module receives the command list update or task abort issued by the host CPU through the host interface module, and allocates the command submission control information for reading the command submission list to each idle hardware command queue module based on the command issued by the host CPU.

[0051] The command submission control information at least includes the storage address of the command submission list.

[0052] In one embodiment, the host CPU sets the host interface register when the command list is updated. The command queue management module reads the register information (i.e., the command issued by the CPU) in the host interface register, and determines the command list update based on the register information. Based on the register information, the command queue management module reads the command management list from the memory, obtains each command submission control information contained in the command management list, and allocates the command submission control information corresponding to each command submission list to the idle hardware command queue module in turn according to the priority of the command submission list.

[0053] The hardware command queue module is based on fixed-function hardware to execute the command, reads and parses each command execution control information in the command submission list based on the allocated command submission control information, and sends each command execution control information to the programmable command processing module.

[0054] In one embodiment, the hardware command queue module receives the command submission control information sent by the command queue management module.

[0055] In one embodiment, the hardware command queue module reads the register information written by the host CPU in the host interface register, and obtains the command submission control information based on the register information, and sends each command execution control information in the command submission list to the programmable command processing module.

[0056] The front-end control engine includes one or more hardware command queue modules, each of which can be executed in parallel, and each hardware command queue module is connected with one or more independent programmable command processing modules. Since the programmable command processing module has the characteristics of high flexibility, the combination of the hardware command queue module and the programmable command processing module improves the flexibility of the front-end control engine in processing commands, and multiple hardware command queue modules can be allocated in parallel. After combining multiple hardware command queue modules with programmable command processing modules, the combination has the characteristics of high parallelism of hardware command queue modules and the programmability of programmable command processing modules, without the need for complex programming design and high microprocessor design cost, which improves the flexibility of the front-end control engine in processing commands, and maintains the parallelism and efficiency of task processing.

[0057] In an embodiment, each hardware command queue module is connected with an independent programmable command processing module, and sends command execution control information to the connected programmable command processing module.

[0058] In actual application, the programmable command processing modules connected with different hardware command queue modules can be the same or different, which is not limited herein.

[0059] The programmable command processing module has programmable function, is used for receiving the command execution control information sent by the hardware command queue module, reading and analyzing the command execution list based on the command execution control information, and writing the commands in the command execution list into the management registers corresponding to the unit management module, or directly providing the commands in the command execution list to the data processing unit.

[0060] The programmable command processing module can repeatedly execute a segment of commands in the command execution list in a conditional execution manner.

[0061] In an embodiment, the programmable command processing module can be a programmable command processor, which can be a Reduced Instruction Set Computing (RISC) processor.

[0062] In actual application, the programmable command processing module can be set according to the actual application scene, which is not limited herein.

[0063] In this way, by using the conditional execution method of the programmable command processing module, a segment of commands in the command execution list can be repeatedly executed on the computing coprocessor. This eliminates the need for the host CPU to frequently prepare command lists for the computing coprocessor, reducing the communication bandwidth between the front-end control engine and the host CPU. For complex computational tasks such as deep learning networks, the execution of subsequent commands depends on the result of the current command. If the front-end control engine only uses fixed-function hardware to execute commands, it needs to repeatedly return the command execution results to the host CPU. Based on the commands issued by the host CPU in response to the command execution results, it needs to determine whether to execute subsequent commands, resulting in gaps in command execution and consequently reducing computational efficiency. In this embodiment, the programmable command processing module can directly judge the result of the current data processing command, avoiding the waiting time for the host CPU and reducing the load on the host CPU. Furthermore, by using multiple programmable processors that can execute in parallel, the hardware complexity of designing a single high-performance processor can be avoided, as well as the frequent context switching operations caused by implementing multi-threaded operations in software can be avoided. Furthermore, unlike traditional microprocessors that use a bootloader to start, the programmable command processing module can be directly started by the hardware command queue module. Each startup input is a segment of commands to be executed from the command execution list. After the command execution list is completed, it can directly enter a sleep state, saving power consumption.

[0064] Unit Management Module: Used to read the commands written to the management register by each programmable command processing module, and allocate each command in the management register to the matching data processing unit according to the status of each data processing unit.

[0065] In this way, the programmable command processing module interacts with the unit management module by reading and writing management registers, which improves scalability and programmability.

[0066] See Figure 3 The diagram shown is an implementation flowchart of a task processing method 300 provided in this application embodiment. This method can be executed by the front-end control engine of the coprocessor, for example, by... Figure 1 or Figure 2 The front-end control engine is shown in the diagram. The following will combine... Figure 1 The computing coprocessor shown and Figure 2 The front-end control engine shown provides a detailed explanation of the task processing method. The specific implementation flow of this method may include:

[0067] Step 301: The hardware command queue module reads the command submission list from the memory based on the command submission control information corresponding to the received pending task.

[0068] Specifically, when the host CPU determines that there is a task to be processed, the command list is updated, and a command list update instruction is issued to the front-end control engine through the host interface module. Based on the command list update instruction, the front-end control engine selects at least one command submission control information corresponding to the task to be processed in turn according to the allocation rule, and allocates the selected command submission control information to the idle hardware command queue module. Each hardware command queue module performs the following steps: when receiving the command submission control information, the command submission list is read from the memory based on the command submission control information.

[0069] In an embodiment, the software (such as an application program) of the host CPU generates the command list of each level for executing the task to be processed, stores the command list of each level to the memory, and then issues a command list update instruction to the front-end control engine.

[0070] The command list includes at least two lists, and optionally, the command list can include two lists, a 2-level list, i.e., a command submission list, and a 1-level list, i.e., a command execution list. The command list can also include three lists, a 3-level list, i.e., a command management list, a 2-level list, i.e., a command submission list, and a 1-level list, i.e., a command execution list.

[0071] Referring to Figure 4 Fig. 1 shows a structure example diagram of a two-level list. Figure 4 The command submission list and the command execution list are included. Referring to Figure 5 Fig. 2 shows a structure example diagram of a three-level list. Figure 5 The command management list, the command submission list, and the command execution list are included.

[0072] The command execution list includes M1 commands, i.e., command 0, command 1, …, and command M1, which can be read and parsed by the programmable command processing module, and the parsed commands are sent to the data processor unit of the heterogeneous calculator for execution.

[0073] The command submission list includes M2 command execution control information of the command execution list, i.e., command execution list 0, command execution list 1, …, and command execution list M2. The command execution control information in the command submission list can be sent to the programmable command processing module by the hardware command queue module.

[0074] Optionally, the command submission list can be designed as a ring buffer structure, or as a linked list structure.

[0075] The ring buffer structure manages the command submission list through a write pointer and a read pointer. When the software (e.g., a software driver) of the host processor adds a new command execution control information of a command execution list in the command submission list, the host processor updates the write pointer, and when the hardware command queue module reads a command execution control information of a command execution list, the hardware command queue module updates the read pointer.

[0076] If the ring buffer structure is used, the software does not need to frequently allocate memory, thereby reducing the consumed storage resources and simplifying the operation steps. If the linked list structure is used, the last entry of the command submission list points to a new submission list, and the command submission list of the linked list structure usually only needs to be submitted once. After the command execution list is read and written, the read and write pointers do not need to be updated each time. Alternatively, the command submission list can also store hardware command type commands and be executed by the fixed function hardware of the front-end control engine, such as synchronization operations of some command queues or cache maintenance commands of a programmable command processing module.

[0077] The command management list includes command submission control information of M3 command submission lists, i.e., command submission list 0, command submission list 1, command submission list 2, and command submission list M3.

[0078] M1, M2, and M3 are natural numbers.

[0079] In the embodiments of the present application, by introducing the third-level list, i.e., the command management list, the consumed on-chip register (i.e., the host interface register) resources can be reduced. When the number of command submission lists is relatively large, if the information of each command submission list is saved, a large amount of hardware resources will be consumed, and the burden of the host CPU reading and writing the host interface register will be increased. After the information is stored in the storage in the form of the third-level list, the host CPU only needs to indicate the storage address and length of the command management list through the host interface register. More command submission lists can be supported, and good scalability is achieved.

[0080] It should be noted that the length of the list can be adjusted due to different data processing tasks.

[0081] In actual applications, the number, level, and length of the command list can be set according to actual application scenarios, and are not limited herein.

[0082] In the embodiments of the present application, the command list adopts a multi-level structure organization form. The advantage of using the multi-level command structure is that the hardware can execute the commands asynchronously. If there is only one level of command list, the host CPU end software needs to wait for the current list to release the storage resources, which will block multiple command lists prepared by the software, and the hardware command queue module cannot read the next command list in advance, thereby reducing the processor performance.

[0083] The command submission control information can be obtained and distributed in any of the following ways based on the order of the command list:

[0084] In a first way, the command queue management module receives the command management control information issued by the host CPU through the host interface module, reads the command management list from the memory based on the command management control information, and sends the at least one command submission control information contained in the command management list to the idle hardware command queue module in each hardware command queue module.

[0085] The command management control information is used to indicate whether the command list is updated.

[0086] In a second way, the command queue management module receives the at least one command submission control information issued by the host CPU through the host interface module, and sends the at least one command submission control information to the idle hardware command queue module in each hardware command queue module.

[0087] Optionally, the host interface module can be a host interface register and a data communication interface that are readable and writable by the host.

[0088] In an embodiment, the command submission control information can be obtained and distributed in the following steps:

[0089] S3011: When the host CPU determines that the command list is updated, the host interface register is subjected to a set operation for indicating that the command list is updated.

[0090] In an embodiment, the host interface register is provided with a state flag bit indicating whether the command is updated. One bit of the host interface register represents the update state of one command list. If the state flag bit is 1, it indicates that the command list is updated, and if the state flag bit is 0, it indicates that the command is not updated. When the host CPU determines that the command list is updated, a write operation is performed on the host interface register to set the corresponding state flag bit in the host interface register to 1.

[0091] In actual applications, the state flag bit can be set according to the actual application scenario, which is not limited herein.

[0092] Optionally, when the host CPU determines that the command list is updated, control information for obtaining the command list can also be written, so that the front-end control engine can read the corresponding command list indicated from the memory based on the control information of the command list.

[0093] S3012: The front-end control engine reads the register information in the host interface register.

[0094] Specifically, the front-end control engine can periodically read the register information in the host interface register.

[0095] The register information is information written in the host interface register by the host processor. The register information includes a command list update state determined based on the state flag.

[0096] In the embodiment, the front-end control engine and the host CPU interact in a fixed function hardware (for example, the host interface register) manner. Through register reading and writing, the host CPU can directly submit a command to the front-end control engine. Compared with the manner of directly interacting with the host CPU through a programmable command processing module, the manner provided in the embodiment has the advantages of simple software programming, high interaction efficiency, good compatibility with existing computing programming interfaces, and the like. The programming interface of the host CPU to the heterogeneous computing processor is simplified, repeated query of the front-end control engine to the command list in the memory is avoided, and storage bandwidth and memory power consumption are saved.

[0097] Further, after the host CPU determines that the register information in the host interface register is read, the host interface register is set to indicate that the command list is not updated. For example, the host interface register can be cleared.

[0098] S3013: If the command list update state included in the register information indicates that the command list is updated, the front-end control engine obtains at least one command submission control information based on the register information.

[0099] Specifically, when the front-end control engine obtains the command submission control information, any of the following manners can be used:

[0100] Manner 1: Obtain at least one command submission control information based on the register information.

[0101] Optionally, the command submission control information can be one or multiple. Each command submission control information is used to read a command submission list. The command submission list can be a ring buffer structure or a linked list structure.

[0102] If the command submission list is a ring buffer structure, the command submission control information includes a storage address and a read-write pointer of the command submission list. If the command submission list is a linked list structure, the command submission control information includes a storage address and a length of the command submission list.

[0103] In an implementation manner, at least one command submission control information included in the register information is obtained.

[0104] Specifically, the host CPU writes register information containing command submission control information and command list update status in the host interface register. The front-end control engine acquires at least one command submission control information contained in the register information.

[0105] In an embodiment, one bit of the host interface register represents the update status of one command submission list, and a correspondence between the bit position and the command submission control information of the command submission list is preset, and at least one command submission control information is acquired according to the correspondence and the bit position representing the command list update in the host interface register.

[0106] Method 2: reading the command management list from the memory based on the register information, and acquiring at least one command submission control information contained in the command management list.

[0107] In an embodiment, the command management control information contained in the register information is acquired, and the command management list is read from the memory based on the command management control information, and one or more command submission control information is selected from the command management list according to the allocation rule, so as to allocate the selected command submission control information to the corresponding hardware command queue module.

[0108] The command management list saves the command submission control information of each command submission list.

[0109] In an embodiment, one bit of the host interface register represents the update status of one command management list, and a correspondence between the bit position and the command management control information of the command management list is preset, and at least one command management control information is acquired according to the correspondence and the bit position representing the command list update in the host interface register. The command management list is read from the memory based on the command management control information, and one or more command submission control information is selected from the command management list according to the allocation rule, so as to allocate the selected command submission control information to the corresponding hardware command queue module.

[0110] Optionally, the allocation rule can adopt at least one of the following methods:

[0111] Method 1: allocating the command submission control information to the corresponding hardware command queue module according to a polling algorithm.

[0112] Method 2: allocating the command submission control information to the corresponding hardware command queue module according to a greedy algorithm.

[0113] Method 3: allocating each command submission control information to the corresponding hardware command queue module according to the order of the command submission control information.

[0114] Mode 4: According to the priority of the command submission control information, the command submission control information is allocated to the corresponding hardware command queue module.

[0115] Wherein, the polling algorithm is a fair selection algorithm. The greedy algorithm is an algorithm that can prioritize the execution of a list. The list priority can be set according to user indication.

[0116] In practical applications, the allocation rule can be set according to the actual application scenario, which is not limited here.

[0117] S3014: The front-end control engine allocates at least one command submission control information to the idle hardware command queue module in the front-end control engine.

[0118] Specifically, the following steps are executed in a loop until there is no command submission control information to be processed:

[0119] If it is determined that there is an idle hardware command queue module, the allocation rule will be used to select one command submission control information from the command management list and send it to the idle hardware command queue module.

[0120] It should be noted that the execution subject of S3012-S3014 can be the command queue management module in the front-end control engine.

[0121] It should be noted that the commands of the computing task are usually stored in the form of command list in the memory. The commands of the same command submission list can be executed sequentially by the hardware command queue module in the front-end control engine. The commands of different command submission lists can be parallel in multiple hardware command queue modules of the front-end control engine. In order to improve the parallelism of command execution, the commands of each computing task that are independent of each other will often be allocated to different command submission lists, so that the multiple hardware command queue modules of the front-end control engine can be used to process these tasks in parallel. The number of command submission lists is a natural number, which can be greater than the number of actual hardware command execution queues. Therefore, the front-end control engine needs to schedule multiple command submission lists, and send each command submission list to the idle hardware command queue module for execution through the allocation rule.

[0122] Step 302: The hardware command queue module sends the command execution control information contained in the command submission list to the programmable command processing module.

[0123] Specifically, each hardware command queue module respectively executes the following steps for each entry in the command submission list in turn: if it is determined that a to-be-processed entry in the command submission list belongs to control information type, the entry parsing information of the to-be-processed entry belonging to the control information type is sent to the programmable command processing module as command execution control information.

[0124] In an implementation, taking a hardware command queue module as an example, the hardware command queue module sequentially performs the following steps for each entry in the command submission list:

[0125] S3021: Analyze a to-be-processed entry in the command submission list to obtain entry analysis information of the to-be-processed entry.

[0126] S3022: If it is determined, based on the entry analysis information, that the to-be-processed entry belongs to a control information type, send the entry analysis information of the to-be-processed entry to the programmable command processing module as command execution control information.

[0127] The information type can include a control information type and a hardware command type.

[0128] Optionally, when determining the information type of an entry, any of the following methods can be used:

[0129] Method 1: Obtain the information type contained in the entry analysis information.

[0130] Method 2: Obtain the information type set for the entry analysis information.

[0131] Specifically, a correspondence between the entry analysis information and the information type is set in advance, so that the information type of any entry can be obtained according to the correspondence.

[0132] In this way, the command execution control information in the command submission list can be sent to the programmable command processing module to execute the received command execution control information through the programmable command processing module.

[0133] It should be noted that the front-end control engine can also include the hardware command queue module, and each hardware command queue module can be connected with one or more programmable command processing modules, so that the hardware command queue module can send one command execution control information to the corresponding connected programmable command processing module each time.

[0134] S3023: If it is determined that the entry analysis information belongs to a hardware command type, send the entry analysis information to the corresponding fixed-function hardware to enable the fixed-function hardware to execute the entry analysis information.

[0135] In an implementation, the corresponding entry analysis information is allocated to each fixed-function hardware according to the function of the fixed-function hardware.

[0136] Further, if the command submission list is a ring buffer structure, after determining that the entry or the entry analysis information is sent to other modules, a read pointer update instruction is sent to the memory to enable the memory to update the read pointer of the command submission list based on the read pointer update instruction.

[0137] If the command submission list is a linked list structure, after determining that the entry or entry parsing information is sent to other modules, it is determined whether the entry is the last entry in the command submission list. If so, jump to the next command submission list to be executed.

[0138] Step 303: The programmable command processing module reads the command execution list from the memory based on the received command execution control information.

[0139] Step 304: The programmable command processing module assigns the commands contained in the command execution list to the matching data processing unit of at least one data processing unit for execution of the assigned commands by each data processing unit.

[0140] Specifically, the following steps are executed in a loop until it is determined that the command execution list is executed:

[0141] S3041: Decode the current target entry in the command execution list to obtain the decoded command.

[0142] S3042: If it is determined that the decoded command belongs to the management command type, the decoded command is assigned to the matching data processing unit, or the decoded command is assigned to the matching data processing unit through the unit management module.

[0143] Specifically, the command of the management command type is a management command that needs to be processed by the data processing unit.

[0144] Wherein, when the decoded command is assigned to the matching data processing unit through the unit management module, the following steps can be taken:

[0145] Each programmable command processing module stores the decoded command in a management register. The unit management module reads the command in the management register and assigns the read command to the target unit in the at least one data processing unit according to the unit type corresponding to the read command. The target unit here is the matched data processing unit in the at least one data processing unit. The matched target unit can be one or more.

[0146] Wherein, the target unit corresponding to each command in the command execution list can be determined from the at least one data processing unit according to the unit type corresponding to each command, and then the command assignment is performed to assign the read command from the management register to the matched target unit.

[0147] Wherein, the unit type is divided according to the function of the data processing unit. The unit types of different data processing units can be the same or different.

[0148] Optionally, in the process of assigning the command to the target unit in the at least one data processing unit according to the unit type corresponding to the command, the following method can be used:

[0149] If it is determined that there are multiple commands corresponding to the unit type of the target unit, the command priority of each command corresponding to the unit type of the target unit is determined, and each command corresponding to the unit type of the target unit is sent to the idle data processing unit in the target unit in order according to the command priority.

[0150] In actual application, the command priority can be set according to the actual application scenario, for example, the order in which the unit management module reads the command, which is not limited herein.

[0151] In this way, the unit management module of the front-end control engine arbitrates each command obtained, and determines the data processing unit matched with each command according to the arbitration result, and sends each command to the matched and idle data processing unit through the command network according to the command priority and the running state and unit type of the data processing unit.

[0152] In an embodiment, after determining the data processing unit matched with the command, the data processing unit is started.

[0153] Further, the unit management module sends the command execution result to the programmable command processing module corresponding to the executed command after determining that the command is executed. The command execution result can be sent after one command or a group of commands are executed.

[0154] It should be noted that each programmable command processing module writes the command to the management register of the same unit management module. That is, the unit management module can receive the command sent by each programmable command processing module, and since different commands can need to be processed by the same data processing unit, the unit management module needs to arbitrate and assign each command read.

[0155] For example, if the programmable command processing module determines that the decoded command belongs to the operation command type, such as a command for addition, subtraction, multiplication, or logical operation, the decoded command can be sent to the operation module. If it is determined that the decoded command belongs to the memory access command type, such as a command for calculating the memory access address, the memory interface can be called to execute the decoded command. If it is determined that the decoded command belongs to the control command type, the read pointer of the command execution list can be updated and the execution order of the command execution list can be changed based on the judgment of the decoded command.

[0156] In this way, the combination of a plurality of different command types of commands by the programmable command processing module can complete the command management of a complex computing task, and can support flexible processing of a plurality of tasks in a complex scenario.

[0157] After the decoded command is assigned to the matched data processing unit, S3043 can be further performed: receiving the command execution result returned by the data processing unit.

[0158] If it is determined based on the command execution result that the command needs to be sequentially executed, the next entry is updated as the target entry to be executed currently according to the order of the entries in the command execution list.

[0159] If it is determined based on the command execution result that the command needs to be jump executed, the target jump entry in the command execution list is determined based on the command execution result, and the target jump entry is updated as the target entry to be executed currently.

[0160] Through the above two ways, the next entry to be processed can be switched according to the command execution result as the next decoding processing object, that is, the target entry in the step S3041 is updated.

[0161] In the embodiment of the application, if the host CPU needs to calculate the coprocessor to execute a higher priority data processing task, the front-end control engine can pause the currently processed computing task to switch the high priority data processing task.

[0162] Optionally, the task processing method of the embodiment of the application can further include a task switching method, which is described in detail with reference to Figure 6 As shown in FIG. 6, an implementation flowchart of a task switching method 600 provided by the embodiment of the application can include the following steps:

[0163] In step 601, if a task suspension notification sent by the host processor is received, a task suspension command is sent to each hardware command queue module.

[0164] As an implementation manner, when the host CPU determines that the coprocessor needs to execute a higher priority data processing task, a task suspension notification is sent to the front-end control engine by writing a host interface register. After the command queue management module receives the task suspension notification sent by the host CPU by reading the host interface register, a task suspension command is sent to the hardware command queue module.

[0165] In step 602, based on the received task suspension command, each hardware command queue module stops reading the command submission list, stores the current read pointer of the command submission list, and sends a task suspension request to the programmable command processing module.

[0166] Specifically, the hardware command queue module determines that the task abort command is received, stops reading the command submission list, stores the read pointer of the current command submission list (i.e., the command submission list stopped reading), sends an abort task request to the programmable command processing module in an interrupt manner, and waits for the programmable command processing module to be idle.

[0167] Step 603: The programmable command processing module stops reading the command execution list based on the abort task request.

[0168] Specifically, after the programmable command processing module receives the abort task request sent in an interrupt manner, the programmable command processing module starts to perform task switching, i.e., stops reading the command execution list, and stores the read pointer of the current command execution list and the value of the general register to the memory.

[0169] Step 604: The programmable command processing module stores the read pointer of the command execution list stopped reading, and sends an early abort signal to each data processing unit.

[0170] Specifically, the programmable command processing module can also wait for the data processing unit to process the current command.

[0171] In an embodiment, the programmable command processing module can adopt the following steps:

[0172] S6041: The programmable command processing module sends a task abort command to the unit management module and waits for the data processing unit module to complete.

[0173] In the embodiment, the programmable command processing module simplifies the process of hardware task switching in a programmable manner, only needs to save a small amount of regular information such as the read pointer of the command list and the general register, avoids the problem of needing to preserve a large amount of hardware execution state and irregular hardware information, facilitates the storage and debugging of the memory, and also facilitates the reloading of information when continuing the task next time.

[0174] S6042: The unit management module waits for the data processing unit to process the current command or sends an early abort signal to the data processing unit.

[0175] Specifically, when 6042 is executed, any one or combination of the following methods can be adopted:

[0176] Method 1: The unit management module waits for the data processing unit to process the already allocated command.

[0177] Method 2: The unit management module sends an early abort signal to the data processing unit.

[0178] Step 605: The front-end control engine determines that the task is aborted, and returns task abort completion information to the host processor.

[0179] Specifically, the front-end control engine determines that the data processing units stop operating and returns the task suspension completion information to the host processor.

[0180] When the step 605 is executed, the following steps can be used:

[0181] S6051: The unit management module determines that the data processing units stop operating and sends a switching completion signal to the programmable command processing module.

[0182] S6052: The front-end control engine determines that all hardware command queue modules suspend tasks and sends task suspension completion information to the host CPU through the host interface module.

[0183] Optionally, the front-end control engine can send the task suspension completion information to the host CPU through the host interface register in an interrupt manner.

[0184] Step 606: When the host CPU determines that the task suspension completion information is received, the host CPU sends a task switching instruction to the front-end control engine.

[0185] Specifically, the host CPU determines that all tasks are suspended and the command lists are updated, and sends a task switching instruction to the front-end control engine.

[0186] Step 607: The front-end control engine obtains command submission control information based on the task switching instruction, and executes the switched task based on the command submission control information.

[0187] Through the above implementation manner, the host processor and the coprocessor can complete the task switching with less interaction, and can efficiently and flexibly execute various priority computing tasks in a complex scenario, for example, a high-priority task is temporarily received, and the task switching processing is quickly performed.

[0188] Specifically, when the step 607 is executed, the specific steps are described with reference to the steps 301-304, and the high-priority data processing task is executed, which is not described herein.

[0189] Further, the front-end control engine determines that the high-priority data processing task is processed, and can also execute the suspended computing task based on the stored suspension task information. Details are not described herein.

[0190] In the embodiment of the present application, the front-end control engine of the coprocessor interacts with the host CPU by using the host interface register, and the software programming is simple, the interaction efficiency is high, and the compatibility with the existing computing programming interface is good. The programming interface of the heterogeneous computing processor to the host CPU is simplified, repeated query of the command list in the memory by the front-end control engine is avoided, and the storage bandwidth and memory power consumption are saved. Furthermore, considering that the programmability of the hardware command queue module is low, the parallel processing efficiency of the single-threaded microprocessor is low, and the design cost of the multi-threaded or multi-core microprocessor is high and the programming is complex, in the embodiment of the present application, the plurality of hardware command queue modules are combined with the programmable command processing module, and each hardware command queue module is connected with at least one programmable command processing module. In this way, the parallelism of the hardware command queue module and the programmability of the programmable command processing module can be combined, without complex programming design and high microprocessor design cost. On the premise of not increasing the hardware cost, the flexibility of the front-end control engine in processing commands is improved, the parallelism and efficiency of task processing are maintained, and the computing task switching process is simplified. Furthermore, the command list adopts a multi-level structure, so that the hardware command queue module can execute commands asynchronously, without waiting for the current command submission list to release the storage resource, without blocking the plurality of command lists prepared by the host CPU, and the next command submission list can be read in advance, greatly improving the performance of the computing coprocessor. Furthermore, the plurality of hardware command queue modules can execute different computing tasks in parallel, and can read, parse and send commands to the programmable command processing module at the same time.

[0191] Based on the same inventive concept, the embodiment of the present application also provides a front-end control engine. Since the problem solving principle of the above-mentioned front-end control engine is similar to that of the aforementioned task processing method, the implementation of the front-end control engine can be referred to the implementation of the method, and the repeated parts will not be described herein.

[0192] As shown in Figure 7 FIG. 7 is a structural schematic diagram of a front-end control engine 700 provided by an embodiment of the present application. The front-end control engine 700 can be applied to a computing coprocessor, and the computing coprocessor further includes at least one data processing unit. The front-end control engine 700 includes a hardware command queue module 701 and a programmable command processing module 702.

[0193] The hardware command queue module 701 is configured to read a command submission list from the memory based on the received command submission control information corresponding to the to-be-processed task, and send the command execution control information contained in the command submission list to the programmable command processing module 702.

[0194] The programmable command processing module 702 is configured to read a command execution list from the memory based on the received command execution control information, and distribute the commands contained in the command execution list to the matched data processing units in the at least one data processing unit for execution by the data processing units.

[0195] In an embodiment, the front-end control engine 700 further comprises a command queue management module 703, which is configured to receive command management control information sent by a host processor, the host processor and the computing co-processor being located in the same computer device; read a command management list from the memory based on the command management control information, the command management list containing at least one command submission control information corresponding to a command submission list; and send the at least one command submission control information contained in the command management list to the idle hardware command queue modules 701 in the hardware command queue modules 701 respectively.

[0196] In an embodiment, the hardware command queue module 701 is configured to sequentially perform the following steps for each entry in the command submission list respectively:

[0197] If it is determined that one to-be-processed entry in the command submission list belongs to the control information type, the entry analysis information of the to-be-processed entry belonging to the control information type is sent to the programmable command processing module 702 as the command execution control information.

[0198] In an embodiment, the programmable command processing module 702 is configured to cyclically perform the following steps until it is determined that the command execution list is executed completely:

[0199] decoding one target entry currently to be executed in the command execution list to obtain a decoded command;

[0200] If it is determined that the decoded command belongs to the management command type, the decoded command is distributed to the matched data processing unit.

[0201] receiving a command execution result returned by the data processing unit;

[0202] If it is determined based on the command execution result that the commands need to be executed in sequence, the next entry is updated as the target entry currently to be executed according to the entry sequence in the command execution list.

[0203] If it is determined based on the command execution result that the commands need to be executed by jumping, a target jump entry in the command execution list is determined based on the command execution result, and the target jump entry is updated as the target entry currently to be executed.

[0204] In an implementation, the front-end control engine 700 further comprises a unit management module 704, and the programmable command processing modules 702 are at least one, each of which is configured to: store the decoded command into a management register; and the unit management module 704 is configured to: read the command in the management register, and distribute the command to a target unit in the at least one data processing unit according to a unit type corresponding to the command, wherein the unit type is divided according to the functions of the data processing units.

[0205] In an implementation, the target unit is at least one, and the unit management module 704 is configured to: if it is determined that there are multiple commands corresponding to the unit type of the target unit, determine a command priority of each of the commands corresponding to the unit type of the target unit; and send the commands corresponding to the unit type of the target unit to the idle data processing units in the target unit in sequence according to the command priority.

[0206] In an implementation, the hardware command queue modules 701 are multiple, and the front-end control engine 700 is configured to:

[0207] if a task suspension notification sent by the host processor is received, send a task suspension command to each of the hardware command queue modules 701;

[0208] each of the hardware command queue modules 701 is configured to: based on the received task suspension command, stop reading the command submission list, store a read pointer of the current command submission list, and send a task suspension request to the programmable command processing module 702;

[0209] the programmable command processing module 702 is configured to: based on the task suspension request, stop reading the command execution list, store a read pointer of the stopped command execution list, and send an early suspension signal to each of the data processing units;

[0210] the front-end control engine 700 is configured to: after determining that the task is suspended, return task suspension completion information to the host processor, so that the host processor issues a task switching instruction based on the task suspension completion information.

[0211] Based on the same inventive concept, the embodiments of the present application further provide a chip comprising a front-end control engine, the chip having at least one data processing unit, and the front-end control engine comprising: a hardware command queue module and a programmable command processing module;

[0212] the hardware command queue module is configured to: read a command submission list from a memory based on command submission control information corresponding to a received to-be-processed task, and send command execution control information contained in the command submission list to the programmable command processing module;

[0213] The programmable command processing module is configured to read a command execution list from the memory based on the received control information and distribute commands contained in the command execution list to matching data processing units of the at least one data processing unit for execution of the distributed commands by the data processing units.

[0214] Since the principle of the above chip is similar to the aforementioned task processing method, implementation of the chip can refer to implementation of the method, and repeated parts will not be described herein. For other details of the front-end control engine in the chip, refer to the description in other places herein, and will not be described herein.

[0215] The embodiment of the present application further provides a computing coprocessor comprising the aforementioned front-end control engine and at least one data processing unit, the front-end control engine being configured to distribute commands to the at least one data processing unit by using the steps in the above embodiments, and the at least one data processing unit being configured to execute the distributed commands.

[0216] The embodiment of the present application further provides a computer device comprising the aforementioned computing coprocessor and a memory, the memory storing computer readable instructions, which, when executed by the computing coprocessor, perform the steps in the above embodiments. Optionally, the computer device can further comprise a host processor configured to interact with the computing coprocessor. The present application does not limit the specific type of the host processor.

[0217] For other details of the front-end control engine in the computing coprocessor, the computer device and other product embodiments, refer to the related description in the aforementioned embodiments, and will not be described herein.

[0218] For the convenience of description, the above parts are respectively described according to functions as modules (or units). Of course, the functions of the modules (or units) can be implemented in the same or multiple software or hardware in the implementation of the present application.

[0219] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, a hardware product or a computer program product. Therefore, the present application can adopt a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can adopt a computer program product in the form of one or more computer usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer usable program codes.

[0220] Although the preferred embodiments of the present application have been described, those skilled in the art can make additional changes and modifications to the embodiments once they know the basic inventive concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present application.

[0221] Obviously, numerous modifications and variations of the present application are possible in light of the above teachings. It is therefore to be understood that within the scope of the appended claims, the application can be practiced otherwise than as specifically described herein.

Claims

1. A task processing method characterized by, A front-end control engine applied to a compute co-processor, the compute co-processor further comprising at least one data processing unit, the front-end control engine comprising a hardware command queue module and a programmable command processing module, the hardware command queue module being based on fixed-function hardware to execute commands, the programmable command processing module having programmable functions, the method comprising: The hardware command queue module reads a command submission list from a memory based on command submission control information corresponding to a received to-be-processed task, and sends command execution control information contained in the command submission list to the programmable command processing module, and multiple hardware command queue modules are parallelly allocated commands; The programmable command processing module reads a command execution list from a memory based on the received command execution control information, and allocates commands contained in the command execution list to a matched data processing unit in the at least one data processing unit, so that each data processing unit executes the allocated commands, and the programmable command processing module repeatedly executes a segment of commands in the command execution list in a conditional execution manner; The allocation of the commands contained in the command execution list to the matched data processing unit in the at least one data processing unit comprises: The following steps are repeatedly executed until it is determined that the command execution list is executed: Decoding a current to-be-executed target entry in the command execution list to obtain a decoded command; If it is determined that the decoded command belongs to a management command type, the decoded command is allocated to a matched data processing unit; Receiving a command execution result returned by the data processing unit; If it is determined that the commands need to be sequentially executed based on the command execution result, the next entry is updated as the current to-be-executed target entry according to the entry order in the command execution list; If it is determined that the commands need to be jump-executed based on the command execution result, a target jump entry in the command execution list is determined based on the command execution result, and the target jump entry is updated as the current to-be-executed target entry.

2. The method of claim 1, wherein, The front-end control engine further comprises a command queue management module, and the method further comprises: The command queue management module performs the following steps: Receiving command management control information sent by a host processor, the host processor and the compute co-processor being located in the same computer device; If it is determined that there is a command list update based on the command management control information, reading a command management list from a memory based on the command management control information, the command management list containing at least one command submission control information corresponding to a command submission list; Sending the at least one command submission control information contained in the command management list to an idle hardware command queue module in each hardware command queue module, respectively.

3. The method of claim 1, wherein, The sending of the command execution control information contained in the command submission list to the programmable command processing module comprises: For each entry in the command submission list, the following steps are sequentially executed, respectively: If it is determined that one pending entry in the command submission list belongs to the control information type, the pending entry information belonging to the control information type is sent to the programmable command processing module as command execution control information.

4. The method of claim 1, wherein, The front-end control engine further comprises a unit management module, and the programmable command processing module is at least one, and the distribution of the decoded command to the matched data processing unit comprises: Each programmable command processing module stores the decoded command in a management register; The unit management module reads the command in the management register and distributes the command to a target unit in the at least one data processing unit according to the unit type corresponding to the command, wherein the unit type is divided according to the function of the data processing unit.

5. The method of claim 4, wherein, The target unit is at least one, and the distribution of the command to the target unit in the at least one data processing unit comprises: If there are multiple commands corresponding to the unit type of the target unit, the command priority of each command corresponding to the unit type of the target unit is determined; Each command corresponding to the unit type of the target unit is sent to the idle data processing unit in the target unit in order according to the command priority.

6. The method according to any one of claims 1 to 3, wherein The method further comprises: If the task termination notification sent by the host processor is received, a task termination command is sent to each hardware command queue module; Each hardware command queue module stops reading the command submission list based on the received task termination command, stores the read pointer of the current command submission list, and sends a task termination request to the programmable command processing module; The programmable command processing module stops reading the command execution list based on the task termination request, stores the read pointer of the stopped command execution list, and sends an early termination signal to each data processing unit; After determining the task termination, task termination completion information is returned to the host processor, so that the host processor issues a task switching instruction based on the task termination completion information.

7. A chip, characterized by The chip comprises a front-end control engine, at least one data processing unit, a hardware command queue module, and a programmable command processing module; The hardware command queue module reads a command submission list from the memory based on the received command submission control information corresponding to the pending task, and sends command execution control information contained in the command submission list to the programmable command processing module, and multiple hardware command queue modules distribute commands in parallel; The programmable command processing module reads a command execution list from the memory based on the received command execution control information, and distributes the command contained in the command execution list to the matched data processing unit in the at least one data processing unit, so that each data processing unit executes the distributed command, and the programmable command processing module repeatedly executes a segment of command in the command execution list in a conditional execution manner. The assigning the command included in the command execution list to the matched data processing unit in the at least one data processing unit comprises: The following steps are executed in a loop until it is determined that the command execution list is executed completely: Decoding a target entry currently to be executed in the command execution list to obtain a decoded command; If it is determined that the decoded command belongs to the management command type, assigning the decoded command to the matched data processing unit; Receiving a command execution result returned by the data processing unit; If it is determined that the commands need to be executed in sequence based on the command execution result, updating a next entry as a target entry currently to be executed according to the entry sequence in the command execution list; If it is determined that the commands need to be executed by jumping based on the command execution result, determining a target jump entry in the command execution list based on the command execution result, and updating the target jump entry as a target entry currently to be executed.

8. A compute co-processor, comprising: A front-end control engine is configured to assign a command to at least one data processing unit by using the method in any one of claims 1-6, and the at least one data processing unit is configured to execute the assigned command.

9. A computer device, comprising: A computing coprocessor and a memory are included, and the memory stores computer readable instructions which, when executed by the computing coprocessor, perform the method in any one of claims 1-6.

Citation Information

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