Single-photon avalanche diode, formation method, driving method, and laser radar

Abstract

Embodiments of the present invention provide a single-photon avalanche diode, a formation method, a driving method, and a laser radar. When the single-photon avalanche diode provided in these embodiments operates, a voltage is applied to the deep trench isolation structure through the first contact plug, modulating the electric field in the region surrounding the PN junction. This allows more carriers to be concentrated in the PN junction region, which helps reduce the probability of breakdown at the edge of the PN junction. Furthermore, because the deep trench isolation structure is spaced from the first doped region, applying a voltage to the deep trench isolation structure effectively modulates the electric field at the edge of the PN junction. Furthermore, the electric field strength of the PN junction is less susceptible to the voltage applied by the deep trench isolation structure, which helps improve the electrical performance of the single-photon avalanche diode.

Description

Technical Field

[0001] The present invention relates to the field of laser radar, and in particular to a single-photon avalanche diode, a formation method, a driving method, and a laser radar. Background Art

[0002] LiDAR is a radar system that emits laser beams to detect target characteristics such as distance and speed. In autonomous driving, it undertakes important tasks such as curb detection, obstacle recognition, and real-time localization and mapping (SLAM).

[0003] The laser radar includes a photodetector and an imaging lens. The imaging lens focuses light onto the photodetector to form an image, and the photodetector converts the light into an electrical signal. As the size of laser radars becomes smaller, there is a continuous demand to reduce the size of photodetectors. One type of photodetector is a single photon avalanche diode (SPAD), which is a photoelectric device made by utilizing the carrier avalanche multiplication effect of a photodiode in the Geiger mode.

[0004] An important issue that needs to be solved in single-photon avalanche diodes is edge breakdown. Summary of the Invention

[0005] The problem solved by the present invention is to provide a single-photon avalanche diode, a formation method, a driving method and a laser radar, so as to reduce the probability of edge breakdown of the single-photon avalanche diode, improve the electrical performance of the single-photon avalanche diode, and improve the detection effect of the laser radar.

[0006] The technical solution of the present invention provides a single-photon avalanche diode, comprising: a substrate and a diode region located on the substrate, the diode region comprising an epitaxial layer and a first doped region located on top of the epitaxial layer; a deep trench isolation structure, the deep trench isolation structure being adjacent to the diode region and spaced apart from the first doped region; a dielectric layer located on top of the deep trench isolation structure; and a first contact hole plug penetrating the dielectric layer and connected to the top of the deep trench isolation structure.

[0007] Correspondingly, the technical solution of the present invention also provides a method for forming a single-photon avalanche diode, including: providing a substrate; forming a diode region and a deep trench isolation structure adjacent to the diode region on the substrate, wherein the diode region includes an epitaxial layer and a first doped region located on the top of the epitaxial layer; forming a dielectric layer covering the deep trench isolation structure; forming a first contact hole plug that penetrates the dielectric layer and is connected to the top of the deep trench isolation structure.

[0008] Correspondingly, the technical solution of the present invention further provides a driving method for a single-photon avalanche diode, comprising: applying a voltage to the deep trench isolation structure through the first contact hole plug.

[0009] Correspondingly, the technical solution of the present invention also provides a laser radar, including: a transmitting unit, used to provide a transmitting light beam, and the transmitting light beam forms an echo light beam after being reflected by a target object; a receiving unit, used to receive the echo light beam, and the receiving unit includes the aforementioned single-photon avalanche diode.

[0010] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0011] In the single-photon avalanche diode provided by an embodiment of the present invention, a PN junction is formed at the interface between the first doped region in the diode region and the epitaxial layer, the deep trench isolation structure is adjacent to the diode region, a dielectric layer is located on top of the deep trench isolation structure, and the first contact plug penetrates the dielectric layer and is connected to the top of the deep trench isolation structure. When the single-photon avalanche diode of the embodiment of the present invention is in operation, applying a voltage to the deep trench isolation structure through the first contact plug can modulate the electric field in the area surrounding the PN junction, thereby concentrating more carriers in the PN junction area, which is beneficial for reducing the probability of breakdown in the edge area of ​​the PN junction. Moreover, because the deep trench isolation structure is spaced apart from the first doped region, the electric field in the edge area of ​​the PN junction can be effectively modulated when a voltage is applied to the deep trench isolation structure. At the same time, the electric field strength of the PN junction is not easily affected by the voltage of the deep trench isolation structure, which is beneficial for improving the electrical performance of the single-photon avalanche diode.

[0012] In an optional solution, the first doped region and the second doped region form a PN junction, the deep trench isolation structure is adjacent to the diode region, a dielectric layer is located on top of the deep trench isolation structure, and the first contact plug penetrates the dielectric layer and is connected to the top of the deep trench isolation structure. When the single-photon avalanche diode described in this embodiment of the present invention is operating, a voltage is applied to the deep trench isolation structure through the first contact plug, thereby reducing the electric field strength in the area surrounding the PN junction, thereby allowing more carriers to flow to the first doped region and the second doped region of the diode region, further concentrating them in the PN junction region, which is beneficial for reducing the probability of breakdown in the edge region of the PN junction. Furthermore, because the deep trench isolation structure is spaced apart from the first doped region and the second doped region, the electric field strength in the edge region of the PN junction can be effectively reduced when a voltage is applied to the deep trench isolation structure. At the same time, the electric field strength of the PN junction is not easily affected by the voltage of the deep trench isolation structure, which is beneficial for improving the electrical performance of the single-photon avalanche diode.

[0013] An embodiment of the present invention also provides a laser radar, which includes: a transmitting unit for providing a transmitting light beam, which forms an echo light beam after being reflected by a target object; a receiving unit for receiving the echo light beam, which includes the single-photon avalanche diode. The probability of the edge region of the single-photon avalanche diode being broken down is relatively small, so that the electrical performance of the single-photon avalanche diode region is superior. Accordingly, it can reduce the noise output by the receiving unit in the laser radar, improve the detection signal-to-noise ratio, and help improve the detection effect of the laser radar. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a schematic diagram of the structure of a single-photon avalanche diode;

[0015] Figure 2 1 is a schematic structural diagram of an embodiment of a single-photon avalanche diode according to the present invention;

[0016] Figure 3 This is a simulation diagram of the electric field distribution of an embodiment of a single-photon avalanche diode of the present invention;

[0017] Figure 4 This is a simulation diagram of the electric field distribution of a single-photon avalanche diode;

[0018] Figures 5 to 18 1 is a schematic structural diagram of each step in an embodiment of a method for forming a single-photon avalanche diode according to the present invention. DETAILED DESCRIPTION

[0019] As can be seen from the background technology, the current single-photon avalanche diode still has the problem of edge breakdown. The reason why the edge of a single-photon avalanche diode is prone to breakdown is now analyzed based on the structure of a single-photon avalanche diode.

[0020] like Figure 1 The figure shows a schematic diagram of the structure of a single photon avalanche diode.

[0021] The single-photon avalanche diode includes: a substrate 1 and a diode region (not shown in the figure) located on the substrate 1, wherein the diode region includes: an epitaxial layer 2, a first doped region 3 located on the top of the epitaxial layer 2, and a second doped region 4 located on the side of the first doped region 3 away from the top of the epitaxial layer 2, wherein the second doped region 4 is in contact with the first doped region 3; an electrode contact region 8 located on the top of the first doped region 3; an isolation layer 11 located on the top of the diode region; a quenching resistor 6 located on the isolation layer 11; a dielectric layer 7 covering the quenching resistor 6 and the electrode contact region 8 and exposing part or all of the first doped region 3; a first contact plug 9 penetrating the dielectric layer 7 and connected to the quenching resistor 6; a second contact plug 10 penetrating the dielectric layer 7 and the isolation layer 11 and connected to the electrode contact region 8; and an interconnect structure 12 located on the top of the dielectric layer 7 and connected to the first contact plug 9 and the second contact plug 10.

[0022] The single-photon avalanche diode further includes an isolation structure 5 adjacent to the diode region.

[0023] In the single-photon avalanche diode, the conductivity types of the doped ions in the first doping region 3 and the second doping region 4 are different, and the first doping region 3 and the second doping region 4 form a PN junction. Typically, the ion doping concentrations in the first doping region 3 and the second doping region 4 are difficult to be uniform. As a result, when the single-photon avalanche diode is operating, the electric field distribution in each region of the PN junction formed by the first doping region 3 and the second doping region 4 is uneven. In addition, the first doping region 3 and the second doping region 4 are typically formed using a diffusion process or an ion implantation process. The corresponding first doping region 3 and the second doping region 4 are prone to a curvature effect, resulting in the electric field strength at the edge of the diode region being higher than the electric field strength of the PN junction of the diode region. Before the PN junction region of the diode region reaches the level of impact ionization, the edge of the diode region, under the action of the high electric field, has already undergone premature breakdown, generating a noise signal. The single-photon avalanche diode is used in a laser radar. The noise signal intensity generated by the edge breakdown of the corresponding single-photon avalanche diode is lower than the avalanche signal. Even the edge breakdown caused by the carriers generated by the echo pulse may still be judged as noise and filtered out in the subsequent signal processing process, thereby reducing the detection signal-to-noise ratio of the laser radar and resulting in poor detection effect of the laser radar.

[0024] In order to solve the above technical problems, an embodiment of the present invention proposes a single-photon avalanche diode, comprising: a substrate and a diode region located on the substrate, the diode region including an epitaxial layer and a first doped region located on top of the epitaxial layer; a deep trench isolation structure, the deep trench isolation structure being adjacent to the diode region and spaced apart from the first doped region; a dielectric layer located on top of the deep trench isolation structure; and a first contact hole plug penetrating the dielectric layer and connected to the top of the deep trench isolation structure.

[0025] In the single-photon avalanche diode provided by an embodiment of the present invention, a PN junction is formed at the interface between the first doped region in the diode region and the epitaxial layer, the deep trench isolation structure is adjacent to the diode region, a dielectric layer is located on top of the deep trench isolation structure, and the first contact plug penetrates the dielectric layer and is connected to the top of the deep trench isolation structure. When the single-photon avalanche diode of the embodiment of the present invention is in operation, applying a voltage to the deep trench isolation structure through the first contact plug can modulate the electric field in the area surrounding the PN junction, thereby concentrating more carriers in the PN junction area, which is beneficial for reducing the probability of breakdown in the edge area of ​​the PN junction. Moreover, because the deep trench isolation structure is spaced apart from the first doped region, the electric field in the edge area of ​​the PN junction can be effectively modulated when a voltage is applied to the deep trench isolation structure. At the same time, the electric field strength of the PN junction is not easily affected by the voltage of the deep trench isolation structure, which is beneficial for improving the electrical performance of the single-photon avalanche diode.

[0026] Figure 2 It is a schematic structural diagram of an embodiment of a single-photon avalanche diode according to an embodiment of the present invention.

[0027] The schematic structural diagram of the single-photon avalanche diode includes: a substrate 100 and a diode region located on the substrate 100, wherein the diode region includes an epitaxial layer 101 and a first doped region 103 located on top of the epitaxial layer 101; a deep trench isolation (DTI) structure 108 extending from the top surface of the epitaxial layer 101 toward the substrate 100, the deep trench isolation structure 108 being adjacent to the diode region and spaced apart from the first doped region 103; a dielectric layer 110 located on top of the deep trench isolation structure 108; and a first contact plug 115 penetrating the dielectric layer 110 and connected to the top of the deep trench isolation structure 108.

[0028] The first doped region 103 in the diode region forms a PN junction at the interface toward the epitaxial layer 101, and a deep trench isolation structure 108 extends from the top surface of the epitaxial layer 101 toward the substrate 100. The deep trench isolation structure 108 is spaced apart from the first doped region 103. The first contact hole plug 115 passes through the dielectric layer 110 and is connected to the top of the deep trench isolation structure 108. When the single-photon avalanche diode described in the embodiment of the present invention is working, a voltage is applied to the deep trench isolation structure 108 through the first contact hole plug 115, which can modulate the electric field in the surrounding area of ​​the PN junction, thereby concentrating more carriers in the PN junction area, which is beneficial to reducing the probability of breakdown in the edge area of ​​the PN junction. And because the deep trench isolation structure 108 is separated from the first doped region 103, when a voltage is applied to the deep trench isolation structure 108, the electric field in the edge region of the PN junction can be effectively modulated. At the same time, the electric field strength of the PN junction is not easily affected by the voltage of the deep trench isolation structure 108, which is beneficial to improving the electrical performance of the single-photon avalanche diode.

[0029] Specifically, being able to modulate the electric field in the area surrounding the PN junction refers to reducing the electric field intensity in the edge area where the PN junction is formed at the interface between the first doped region 103 and the epitaxial layer 101 .

[0030] In this embodiment, the single photon avalanche diode (SPAD) is a front side illumination single photon avalanche diode (FSI). In other embodiments, the single photon avalanche diode may also be a back side illumination single photon avalanche diode (BSI).

[0031] In this embodiment, the material of the substrate 100 is a silicon substrate 100. In other embodiments, the material of the substrate can also be other materials such as germanium, silicon germanium, silicon carbide, gallium arsenide or indium gallium. The substrate can also be other types of substrates such as a silicon substrate on an insulator or a germanium substrate on an insulator.

[0032] It should be noted that in this embodiment, the substrate 100 is doped with first-type ions. Specifically, the first-type ions are P-type ions, which include one or more of B, Ga, and In. In other embodiments, the first-type ions may also be N-type ions, which include one or more of P, As, and Sb.

[0033] The epitaxial layer 101 in the diode region is used to provide a process space for the first doping region 103 .

[0034] In this embodiment, the epitaxial layer 101 is made of silicon doped with first-type ions, that is, the epitaxial layer 101 is doped with P-type dopant ions. In other embodiments, the epitaxial layer may be made of other materials doped with first-type ions, such as silicon germanium, silicon carbide, gallium arsenide, or indium gallium.

[0035] The single-photon avalanche diode further includes a second doped region 102 located on a side of the first doped region 103 away from the top of the epitaxial layer 101 .

[0036] A deep trench isolation structure 108 extends from the top surface of the epitaxial layer 101 toward the substrate 100. The deep trench isolation structure 108 is separated from the first doped region 103 and the second doped region 102. The first contact hole plug 115 passes through the dielectric layer 110 and is connected to the top of the deep trench isolation structure 108. When the single-photon avalanche diode described in the embodiment of the present invention is working, a voltage is applied to the deep trench isolation structure 108 through the first contact hole plug 115, so that the electric field strength in the surrounding area of ​​the PN junction is reduced, thereby allowing more carriers to flow to the first doped region 103 and the second doped region 102 of the diode region, and more concentrated in the PN junction area, which is beneficial to reducing the probability of breakdown in the edge area of ​​the PN junction. And because the deep trench isolation structure 108 is separated from the first doped region 103 and the second doped region 102, when a voltage is applied to the deep trench isolation structure 108, the electric field strength in the edge area of ​​the PN junction can be effectively reduced. At the same time, the electric field strength of the PN junction is not easily affected by the voltage of the deep trench isolation structure 108, which is beneficial to improving the electrical performance of the single-photon avalanche diode.

[0037] As an example, the deep trench isolation structure 108 extends from the top surface of the epitaxial layer 101 into the substrate 100. The substrate is difficult to transfer carriers, and the epitaxial layers between adjacent diode regions are isolated by the deep trench isolation structure 108, thereby improving the photoelectric isolation effect.

[0038] The first doped region 103 and the second doped region 102 form a PN junction. When the single photon avalanche diode is working, a reverse bias is applied to the PN junction, and the reverse bias is made greater than the breakdown voltage of the PN junction to obtain avalanche multiplication.

[0039] In this embodiment, the first doping region 103 and the second doping region 102 have different conductivity types of doping ions. Specifically, the first doping region 103 is doped with the second type of ions, and the second doping region 102 is doped with the first type of ions. In other words, the first doping region 103 is doped with N-type ions, and the second doping region 102 is doped with P-type ions.

[0040] As an example, in the normal direction of the surface of the substrate 101 , the sizes of the first doping region 103 and the second doping region 102 are both 1 μm to 2 μm.

[0041] As an example, the doping concentration of the second type ions in the first doping region 103 is on the order of E17, and the doping concentration of the first type ions in the second doping region 102 is on the order of E15 to E16.

[0042] It should be noted that the first doping region 103 and the second doping region 102 are both rounded rectangles (eg Figure 7 The rectangular shape is intended to improve the area utilization of the substrate 100 and reduce the gap between adjacent SPAD units; the rounded corners are less likely to form electric field concentration and cause edge breakdown.

[0043] In this embodiment, the surface of the first doped region 103 serves as a photosensitive surface. When the single-photon avalanche diode is working, photons enter the depletion region from the photosensitive surface, and the excited carriers can be conducted to the avalanche region under the action of the electric field to stimulate the avalanche effect.

[0044] The single-photon avalanche diode further includes a shallow trench isolation (STI) structure 104 , which surrounds the inner and outer sides of the deep trench isolation structure 108 , is located on top of the epitaxial layer 101 , and is spaced apart from the first doped region 103 .

[0045] The shallow trench isolation structure 104 is used to avoid mutual interference between adjacent single photon avalanche diodes when forming the first doping region 103 and the second doping region 102 .

[0046] In this embodiment, the shallow trench isolation structure 104 is made of an insulating material. Specifically, the material of the shallow trench isolation structure 104 includes silicon oxide. In other embodiments, the material of the shallow trench isolation structure can be silicon oxynitride, silicon nitride, or other materials.

[0047] The shallow trench isolation structure 104 should not be too thick, as if it is too thick, it will reduce the formation efficiency of the shallow trench isolation structure 104. As an example, the depth of the shallow trench isolation structure 104 is less than 1 μm.

[0048] The diode region further includes a guard ring 106 surrounding a side of the first doped region 103 and spaced apart from the shallow trench isolation structure 104 .

[0049] Specifically, the guard ring 106 is doped with second-type ions, and the doping concentration of the second-type ions in the guard ring 106 is less than or equal to the doping concentration of the second-type ions in the first doping layer 103. For example, the doping concentration of the guard ring 106 is one order of magnitude lower than that of the first doping region 103. When the single-photon avalanche diode is operating, the guard ring 106 is used to prevent electric field concentration from occurring around the PN junction, thereby reducing the probability of edge breakdown around the PN junction.

[0050] It should be noted that the distance L between the guard ring 106 and the shallow trench isolation structure 104 should not be too large or too small. If the distance is too small, when the single-photon avalanche diode is working, the electric field in the area surrounding the PN junction is strong, which increases the probability of breakdown in the area surrounding the PN junction. If the distance is too large, the integration of the single-photon avalanche diode will not be high, which is not suitable for meeting the development needs of miniaturization of single-photon avalanche diode devices; and the photosensitive surface area of ​​the single-photon avalanche diode will be reduced, which will reduce the photon detection efficiency of the single-photon avalanche diode. In this embodiment, the distance L between the guard ring 106 and the shallow trench isolation structure 104 is between 1μm and 3μm.

[0051] The single-photon avalanche diode further includes an electrode layer (not shown) located on a surface of the substrate 100 facing away from the first doped region 103 .

[0052] The electrode layer serves as the anode of the single-photon avalanche diode and is used for connecting to a low potential.

[0053] In this embodiment, the material of the electrode layer is a conductive material. Specifically, the material of the electrode layer includes aluminum.

[0054] The deep trench isolation structure 108 is used to perform optical and electrical isolation between adjacent diode regions, thereby reducing optical and electrical crosstalk between the diode regions.

[0055] The deep trench isolation structure 108 is a stacked structure or a single film layer structure. In this embodiment, the deep trench isolation structure 108 is a stacked structure. Specifically, the deep trench isolation structure 108 includes an insulating layer (not shown) and a polysilicon layer (not shown) filled within the insulating layer. In other embodiments, the material of the deep trench isolation structure can also be a single silicon oxide.

[0056] To ensure a better isolation effect, the deep trench isolation structure 108 extends into the substrate 100. As an example, the deep trench isolation structure 108 extends more than 0.5 μm into the substrate 100.

[0057] It should be noted that the cross-sectional width D of the deep trench isolation structure 108 on the surface of the substrate 100 should not be too large or too small. If the cross-sectional width D is too large, the area of ​​the substrate 100 surface occupied by the deep trench isolation structure 108 is large. Correspondingly, the area of ​​the chip formed subsequently is large, resulting in a low integration of the single-photon avalanche diode, which is not conducive to meeting the requirements of device miniaturization. If the cross-sectional width D is too small, it is difficult to obtain a deep trench isolation structure of sufficient depth. When the single-photon avalanche diode is working, the deep trench isolation structure 108 has a poor effect on the photoelectric isolation of the diode regions on both sides thereof, and optical crosstalk and electrical crosstalk problems are prone to occur between adjacent diode regions. In this embodiment, the cross-sectional width D of the deep trench isolation structure 108 at the end face of the epitaxial layer 101 away from the substrate 100 is in the range of 0.5μm to 1μm.

[0058] In this embodiment, the deep trench isolation structure 108 is spaced apart from the first doping region 103 and the second doping region 102 in the diode region.

[0059] The single-photon avalanche diode further includes an isolation structure 112 located on top of the epitaxial layer 101 , the first doped region 103 , and the deep trench isolation structure 108 .

[0060] The isolation structure 112 is used to electrically isolate the first doped region 103 , the epitaxial layer 101 , and the deep trench isolation structure 108 from other film layers.

[0061] In this embodiment, the isolation structure 112 is a single-layer structure. The single-layer structure of the isolation structure 112 is conducive to simplifying the formation process of the isolation structure 112. Specifically, the material of the isolation structure 112 includes silicon oxide. In other embodiments, the isolation structure can also be a stacked structure.

[0062] In this embodiment, the isolation structure 112 includes a first oxide layer 1121 located on the surface of the diode region and a second oxide layer 1122 located on the surface of the deep trench isolation structure 108 . The thickness of the first oxide layer 1121 is smaller than that of the second oxide layer 1122 .

[0063] The thickness of the first oxide layer 1121 is smaller than that of the second oxide layer 1122. When the single-photon avalanche diode is operating, the transmittance of the first oxide layer 1121 is greater than the transmittance of the second oxide layer 1122. When the single-photon avalanche diode is operating, photons can easily pass through the first oxide layer 1121 and enter the depletion region from the photosensitive surface. The excited carriers can be conducted to the avalanche region under the action of the electric field to trigger the avalanche effect.

[0064] The dielectric layer 110 provides a process space for the first contact plug 115 .

[0065] The dielectric layer 110 is made of an insulating material, including one or both of silicon oxide and silicon nitride. In this embodiment, the dielectric layer 110 is made of silicon oxide. In other embodiments, the dielectric layer 110 may also be made of silicon nitride or silicon oxynitride.

[0066] The first contact plug 115 penetrates the dielectric layer 110 and connects to the top of the deep trench isolation structure 108. When the single-photon avalanche diode of the embodiment of the present invention is in operation, a voltage is applied to the deep trench isolation structure 108 through the first contact plug 115, thereby reducing the electric field strength in the area surrounding the PN junction, thereby allowing more carriers to flow to the PN junction in the diode region and be more concentrated in the PN junction area, which is beneficial to reducing the probability of breakdown in the edge area of ​​the PN junction. Moreover, because the deep trench isolation structure 108 is separated from the PN junction, the electric field strength in the edge area of ​​the PN junction can be effectively reduced when a voltage is applied to the deep trench isolation structure 108. At the same time, the electric field strength of the PN junction is not easily affected by the voltage of the deep trench isolation structure 108, which is beneficial to improving the electrical performance of the single-photon avalanche diode. The PN junction refers to the PN junction formed by the first doped region 103 and the epitaxial layer 101 and the PN junction formed by the first doped region 103 and the second doped region 102.

[0067] In this embodiment, the material of the first contact hole plug 115 includes one or more of tungsten, aluminum, copper, a tungsten compound, an aluminum compound, and a copper compound.

[0068] In this embodiment, the first contact plug 115 also penetrates the isolation structure 112 and is connected to the top of the deep trench isolation structure 108 .

[0069] The diode region further includes an electrode contact region 201 (cathode), which is located on top of the first doping region 103 .

[0070] The electrode contact region 201 is used to connect to a bias source.

[0071] The electrode contact region 201 is doped with second-type ions, and the doping concentration of the second-type ions in the electrode contact region 201 is greater than the doping concentration of the second-type ions in the first doping region 103 , so as to reduce the contact resistance between the electrode contact region 201 and the second contact hole plug.

[0072] Correspondingly, the dielectric layer 110 also covers the electrode contact region 201. The dielectric layer 110 and the isolation structure 112 are used to electrically isolate the top of the electrode contact region 201 from other film layers.

[0073] Specifically, the isolation structure 112 is located on the electrode contact region 201 .

[0074] It should be noted that the single-photon avalanche diode further includes a second contact plug 121 , which penetrates the dielectric layer 110 and is connected to the electrode contact region 201 .

[0075] The second contact plug 121 is used to connect the electrode contact region 201 to a bias source.

[0076] As an example, the single-photon avalanche diode further includes a quenching resistor 114 located between the second oxide layer 1122 and the dielectric layer 110 .

[0077] When a single-photon avalanche diode (SPAD) experiences an avalanche, the avalanche current flows through a quenching resistor, reducing the bias voltage across the PN junction and quenching the avalanche. This quenching method is known as passive quenching. Those skilled in the art will appreciate that SPADs can also employ other quenching methods, such as active quenching. The specific components and circuit structures are not described in detail here.

[0078] In this embodiment, the material of the quenching resistor 114 includes polysilicon. In other embodiments, the material of the quenching resistor may also include one or more of silicon, germanium, and nickel.

[0079] It should be noted that the dielectric layer 110 covers the quenching resistor 114. The dielectric layer 110 is used to electrically isolate the quenching resistor 114 from other film layers.

[0080] It should be noted that the single-photon avalanche diode further includes: a third contact plug 122 penetrating the dielectric layer 110 and connected to the quenching resistor 114 .

[0081] The third contact plug 122 is used to connect the quenching resistor 114 to the back-end metal.

[0082] The single-photon avalanche diode further includes a first interconnect structure 123 located on top of the dielectric layer 110 and connected to the first contact plug 115 . The first interconnect structure 123 is suitable for coupling to a voltage source.

[0083] The first interconnect structure 123 is used to connect a voltage source to the first contact plug 115. When the single-photon avalanche diode is operating, a voltage is applied to the deep trench isolation structure 108 via the first interconnect structure 123 and the first contact plug 115, thereby reducing the electric field strength in the area surrounding the PN junction. This allows more carriers to flow toward the first doped region 103 and the second doped region 102 of the diode region, further concentrating them in the PN junction area, thereby reducing the probability of breakdown at the edge of the PN junction. The PN junctions mentioned in this paragraph refer to the PN junctions formed by the first doped region 103 and the epitaxial layer 101, as well as the PN junctions formed by the first doped region 103 and the second doped region 102.

[0084] In this embodiment, the material of the first interconnect structure 123 includes one or more of tungsten, aluminum, copper, a tungsten compound, an aluminum compound, and a copper compound.

[0085] In this embodiment, the coupling is a direct connection or an indirect connection.

[0086] In this embodiment, the voltage source includes one or both of a loading circuit and a power supply.

[0087] The single-photon avalanche diode further includes a second interconnect structure 124 located on the dielectric layer 110 and connected to the second contact plug 121 . The second interconnect structure 124 is also coupled to a bias source.

[0088] The second interconnect structure 124 is connected to the second contact plug 121 . The second interconnect structure 124 is coupled to a bias source. Accordingly, the electrode contact region 201 is coupled to the bias source.

[0089] It should be noted that the second interconnect structure 124 is also connected to the third contact hole plug 122 .

[0090] The second interconnect structure 124 is connected to the third contact plug 122 . The second interconnect structure 124 is coupled to a bias source. Accordingly, the quenching resistor 114 is coupled to the bias source.

[0091] In this embodiment, the coupling is a direct connection or an indirect connection.

[0092] It should be noted that the second interconnection structure 124 is disconnected from the first interconnection structure 123. Therefore, when the single-photon avalanche diode is working, the voltage of the first contact plug 108 is different from that of the second contact plug 121 and the third contact plug 122.

[0093] like Figure 3 , which is a simulation diagram of the electric field distribution of an embodiment of a single photon avalanche diode of the present invention.

[0094] As an example, when the single-photon avalanche diode is working, a voltage of 20V is applied to the deep trench isolation structure 108, and the electric field strength between the PN junction and the shallow trench isolation structure 104 is reduced to about 3E6 ( Figure 3 In the middle circle area), the electric field strength between the PN junction and the deep trench isolation structure 108 is only about 2E6, thereby significantly reducing the probability of PN junction edge breakdown.

[0095] As an example, Figure 4 This is a simulation diagram of the electric field distribution of a single-photon avalanche diode. No first contact plug is formed on the top of the deep trench isolation structure. When the single-photon avalanche diode is working, the electric field strength between the PN junction and the shallow trench isolation structure and the deep trench isolation structure reaches about 5e6 ( Figure 4 circled), with a high probability of edge breakdown.

[0096] By comparison, it can be seen that applying voltage to the top of the deep trench isolation structure 108 can significantly reduce the probability of PN junction edge breakdown.

[0097] After a voltage is applied to the deep trench isolation structure 108, the electric field strength at the bottom surface of the deep trench isolation structure 108 increases ( Figure 3 Because the second oxide layer 1122 on the surface of the deep trench isolation structure 108 has a strong voltage resistance, the deep trench isolation structure 108 and the substrate 100 are not easily conductive, so the electrical performance of the single-photon avalanche diode is better.

[0098] It should be noted that the higher the voltage applied to the top of the deep trench isolation structure 108, the better the effect of reducing the electric field strength at the edge of the PN junction. However, the voltage applied to the deep trench isolation structure 108 should be lower than the avalanche voltage of the single-photon avalanche diode. The preferred range is 10V to 30V.

[0099] Figures 5 to 18 1 is a schematic structural diagram corresponding to each step in an embodiment of a method for forming a single-photon avalanche diode according to the present invention.

[0100] refer to Figure 5 , providing a substrate 100.

[0101] The substrate 100 provides a process platform for the subsequent formation of a single photon avalanche diode (SPAD). In this embodiment, the SPAD is a front-side illumination (FSI) SPAD. In other embodiments, the SPAD can also be used to form a back-side illumination (BSI) SPAD.

[0102] In this embodiment, the material of the substrate 100 is a silicon substrate 100. In other embodiments, the material of the substrate can also be other materials such as germanium, silicon germanium, silicon carbide, gallium arsenide or indium gallium. The substrate can also be other types of substrates such as a silicon substrate on an insulator or a germanium substrate on an insulator.

[0103] It should be noted that in this embodiment, the substrate 100 is doped with first-type ions. Specifically, the first-type ions are P-type ions, which include one or more of B, Ga, and In. In other embodiments, the first-type ions may also be N-type ions, which include one or more of P, As, and Sb.

[0104] refer to Figure 6 and Figure 7 , Figure 6 Based on Figure 5 Schematic diagram, Figure 7 for Figure 6 A diode region and a deep trench isolation structure 108 adjacent to the diode region are formed on the substrate 100 . The diode region includes an epitaxial layer 101 and a first doped region 103 located on top of the epitaxial layer 101 .

[0105] Specifically, the steps of forming the diode region include:

[0106] like Figure 6 As shown, an epitaxial layer 101 is formed on the substrate 100 .

[0107] The epitaxial layer 101 in the diode region is used to provide a process space for the first doping region 103 .

[0108] Specifically, the step of forming the epitaxial layer 101 includes: forming an initial epitaxial layer on the substrate 100 , and in the process of forming the initial epitaxial layer, doping the initial epitaxial layer with first-type ions to form the epitaxial layer 101 .

[0109] In this embodiment, the epitaxial layer 101 is made of silicon doped with first-type ions. In other embodiments, the epitaxial layer may be made of other materials such as silicon germanium, silicon carbide, gallium arsenide, or indium gallium doped with first-type ions.

[0110] In this embodiment, an epitaxy (Epi) process is used to form the initial epitaxial layer. Specifically, the epitaxy process can be a selective epitaxial growth process (SEG). The epitaxial process has the advantages of simple process, fast growth, low cost, no need for ultra-high vacuum, and ease of industrial mass production. The thin film obtained by the selective epitaxial growth method has high purity and few defects, which is conducive to improving the formation quality of the initial epitaxial layer, and correspondingly makes the formation quality of the epitaxial layer 101 better, which is conducive to improving the electrical performance of the subsequently formed single-photon avalanche diode. Moreover, the initial epitaxial layer is epitaxially formed on the substrate 100, and the corresponding epitaxial layer 101 and the substrate 100 have strong adhesion, which is conducive to enhancing the stability of the single-photon avalanche diode structure.

[0111] It should be noted that, in this embodiment, the method of doping the initial epitaxial layer with the first type ions may further include: an in-situ doping process (In Suit Doping) or a solid source doping process (Solid Source doped).

[0112] In other embodiments, the step of forming the epitaxial layer may further include: forming an initial epitaxial layer on the substrate using an epitaxial process; after forming the initial epitaxial layer, doping ions in the initial epitaxial layer using an ion implantation process or a diffusion process.

[0113] In this embodiment, the epitaxial layer 101 has a functional region, and the diode region is located in the functional region.

[0114] Continue to refer Figure 6 It should be noted that, in the step of forming the diode region on the substrate 100 , the second doping region 102 is formed on the side of the first doping region 101 away from the top of the epitaxial layer 101 .

[0115] In this embodiment, the second doped region 102 is formed using an ion implantation process. Ion implantation is characterized by simple operation and low process cost. During the step of forming the second doped region 102 using the ion implantation process, the top of the second doped region 102 is positioned a certain distance from the surface of the epitaxial layer 101 away from the substrate 100, thereby reserving process space for the subsequent formation of the first doped region 103 between the second doped region 102 and the surface of the epitaxial layer 101 away from the substrate 100.

[0116] Specifically, in the process of forming the second doping region 102 by adopting the ion implantation process, the implanted ions are first-type ions, and the first-type ions include P-type ions.

[0117] Continue to refer Figure 6A first doped region 101 is formed between the second doped region 102 and a surface of the epitaxial layer 101 away from the substrate 100. The first doped region 101 and the second doped region 102 form a PN junction.

[0118] The first doped region 103 and the second doped region 102 form a PN junction. When the single photon avalanche diode is working, a reverse bias is applied to the PN junction, and the reverse bias is made greater than the breakdown voltage of the PN junction to obtain avalanche multiplication.

[0119] Specifically, the first doping region 103 and the second doping region 102 have different conductivity types of doping ions. In this embodiment, the first doping region 103 is doped with the second type of ions, and the second doping region 102 is doped with the first type of ions. In other words, the first doping region 103 is doped with N-type ions, and the second doping region 102 is doped with P-type ions.

[0120] It should be noted that a PN junction is also formed at the interface between the first doped region 103 and the epitaxial layer 101 .

[0121] In this embodiment, the first doping region 101 is formed by an ion implantation process, which has the advantages of simple operation and low process cost.

[0122] Specifically, in the process of forming the first doped region 103 by adopting the ion implantation process, the implanted ions are second-type ions, and the second-type ions include N-type ions.

[0123] In this embodiment, the method for forming a single-photon avalanche diode is used to form a front-shield single-photon avalanche diode, and the surface of the corresponding first doped region 103 serves as a photosensitive surface. When the single-photon avalanche diode is working, photons enter the depletion region from the photosensitive surface, and the excited carriers can be conducted to the avalanche region under the action of the electric field to excite the avalanche effect.

[0124] It should be noted that the first doping region 103 and the second doping region 102 are both rounded rectangles (eg Figure 7 The rectangular shape is intended to improve the area utilization of the substrate 100 and reduce the gap between adjacent SPAD units; the rounded corners are less likely to form electric field concentration and cause edge breakdown.

[0125] Continue to refer Figure 6 After forming the first doping region 103 , an electrode contact region 201 is formed on the top of the first doping region 103 .

[0126] The diode region further includes an electrode contact region 201 (cathode), which is located on top of the first doping region 103 .

[0127] The electrode contact region 201 is used to connect to a second contact hole plug formed subsequently.

[0128] The electrode contact region 201 is doped with second-type ions, and the doping concentration of the second-type ions in the electrode contact region 201 is greater than the doping concentration of the second-type ions in the first doping region 103 , so as to reduce the contact resistance between the electrode contact region 201 and the second contact hole plug.

[0129] In this embodiment, an ion implantation process is used to form the electrode contact region 201 on the top of the first doping region 103 .

[0130] The method for forming the single-photon avalanche diode further includes: after providing the substrate 100 , before forming the diode region, forming a shallow trench isolation (STI) structure 104 on top of the epitaxial layer 101 .

[0131] In a subsequent process, a deep trench isolation (DTI) structure is formed that penetrates the shallow trench isolation structure 104 and extends toward the substrate 100. The shallow trench isolation structure 104 is used to reduce stress and electric field concentration at corners of the deep trench isolation structure, thereby reducing the probability of edge breakdown.

[0132] In this embodiment, the deep trench isolation structure 108 extends from the top surface of the epitaxial layer 101 into the substrate 100. The substrate is difficult to transfer carriers, and the epitaxial layers between adjacent diode regions are isolated by the deep trench isolation structure 108, thereby improving the photoelectric isolation effect.

[0133] In this embodiment, the shallow trench isolation structure 104 is made of an insulating material. Specifically, the shallow trench isolation structure 104 includes silicon oxide. In other embodiments, the shallow trench isolation structure may be made of silicon oxynitride, silicon nitride, or other materials.

[0134] It should be noted that the shallow trench isolation structure 104 is formed using a process related to the shallow trench isolation structure. As long as the shallow trench isolation structure 104 can reduce stress and electric field concentration at the corners of the deep trench isolation structure, it is not advisable to make the shallow trench isolation structure 104 too thick. If the shallow trench isolation structure 104 is too thick, the formation efficiency of the shallow trench isolation structure 104 will be reduced. As an example, the depth of the shallow trench isolation structure 104 is less than 1 μm.

[0135] It should be noted that the shallow trench isolation structure 104 surrounds the functional region in the epitaxial layer 101, that is, the diode region to be formed later. Therefore, during the step of forming the first doped region 103, the first doped region 103 is spaced apart from the shallow trench isolation structure 104, which can reduce stress and electric field concentration at the edge of the PN junction, making the PN junction edge less susceptible to breakdown. Here, the PN junction refers to the PN junction formed by the first doped region 103 and the second doped region 102, as well as the PN junction formed by the first doped region 103 and the epitaxial layer 101.

[0136] Continue to refer Figure 6 The method for forming the single-photon avalanche diode further includes: after forming the diode region, forming a guard ring 106 surrounding the side of the first doped region 103, and the guard ring 106 is spaced apart from the shallow trench isolation structure 104.

[0137] When the single-photon avalanche diode is operating, the guard ring 106 is used to prevent electric field concentration from occurring around the PN junction, thereby reducing the probability of edge breakdown around the PN junction. Here, the PN junction refers to the PN junction formed by the first doped region 103 and the second doped region 102, and the PN junction formed by the first doped region 103 and the epitaxial layer 101.

[0138] In this embodiment, the guard ring 106 is doped with second-type ions, and the doping concentration of the second-type ions in the guard ring 106 is less than or equal to the doping concentration of the second-type ions in the first doping layer 103 . For example, the doping concentration of the guard ring 106 is one order of magnitude lower than that of the first doping region 103 .

[0139] In this embodiment, the guard ring 106 is formed by an ion implantation process.

[0140] It should be noted that the distance L between the guard ring 106 and the shallow trench isolation structure 104 should not be too large or too small. If the distance is too small, the electric field in the area surrounding the PN junction is strong during operation of the single-photon avalanche diode, increasing the probability of breakdown in the area surrounding the PN junction. If the distance is too large, the integration of the single-photon avalanche diode is low, which is not suitable for meeting the development needs of miniaturization of single-photon avalanche diode devices. In this embodiment, the distance L between the guard ring 106 and the shallow trench isolation structure 104 is between 1 μm and 3 μm.

[0141] refer to Figure 8 and Figure 9 , forming a deep trench isolation structure 108 (such as Figure 9 As shown), the deep trench isolation structure 108 is spaced apart from the first doped region 103 in the diode region.

[0142] The deep trench isolation structure 108 is used to optically isolate adjacent diode regions, reducing optical and electrical crosstalk between diode regions. In a subsequent process, a first contact plug is formed that is connected to the top of the deep trench isolation structure 108. When the single-photon avalanche diode is operating, a voltage is applied to the deep trench isolation structure 108 through the first contact plug 115, thereby reducing the electric field strength in the area surrounding the PN junction. This allows more carriers to flow to the PN junction of the diode region, concentrating them more closely in the PN junction region, which helps reduce the probability of breakdown at the edge of the PN junction. Furthermore, because the deep trench isolation structure 108 is spaced from the first doped region 103, the electric field strength at the edge of the PN junction can be effectively reduced when a voltage is applied to the deep trench isolation structure 108. At the same time, the electric field strength of the PN junction is not easily affected by the voltage of the deep trench isolation structure 108, which helps improve the electrical performance of the single-photon avalanche diode. Here, the PN junction refers to the PN junction formed by the first doping region 103 and the second doping region 102 and the PN junction formed by the first doping region 103 and the epitaxial layer 101 .

[0143] The deep trench isolation structure 108 is a stacked structure or a single film layer structure. In this embodiment, the deep trench isolation structure 108 is a stacked structure. Specifically, the deep trench isolation structure 108 includes an insulating layer (not shown) and a polysilicon layer (not shown) filled within the insulating layer. In other embodiments, the material of the deep trench isolation structure can also be a single silicon oxide.

[0144] To ensure a better isolation effect, the deep trench isolation structure 108 extends into the substrate 100. As an example, the deep trench isolation structure 108 extends more than 0.5 μm into the substrate 100.

[0145] It should be noted that the cross-sectional width D of the deep trench isolation structure 108 on the surface of the substrate 100 should not be too large or too small. If the cross-sectional width D is too large, the area of ​​the substrate 100 surface occupied by the deep trench isolation structure 108 is large. Correspondingly, the area of ​​the chip formed subsequently is large, resulting in a low integration of the single-photon avalanche diode, which is not conducive to meeting the requirements of device miniaturization. If the cross-sectional width D is too small, it is difficult to obtain a deep trench isolation structure of sufficient depth. When the single-photon avalanche diode is working, the deep trench isolation structure 108 has a poor effect on the photoelectric isolation of the diode regions on both sides thereof, and optical crosstalk and electrical crosstalk problems are prone to occur between adjacent diode regions. In this embodiment, the cross-sectional width D of the deep trench isolation structure 108 at the end face of the epitaxial layer 101 away from the substrate 100 is in the range of 0.5μm to 1μm.

[0146] Specifically, the step of forming the deep trench isolation structure 108 includes: forming a deep trench 107 (such as a trench 107 extending from the epitaxial layer 101 to the substrate 100) on the side of the diode region. Figure 8 ); forming an isolation material layer (not shown) on the deep trench 107 and the epitaxial layer 101; removing the isolation material layer exposed outside the deep trench 107, and the remaining isolation material layer located in the deep trench 107 as the deep trench isolation structure 108 (as shown); Figure 9 shown).

[0147] In this embodiment, a dry etching process is used to etch the epitaxial layer 101 to form deep trenches 107. Dry etching processes have anisotropic etching characteristics and good controllability of the etching profile, which helps ensure that the morphology of the deep trenches 107 meets process requirements. Furthermore, by using a dry etching process, the epitaxial layer 101 and the partially formed substrate 100 can be etched in the same etching equipment by changing the etching gas, simplifying the process steps.

[0148] In this embodiment, the isolation material layer is formed using a flowable chemical vapor deposition (FCVD) process. The FCVD process has excellent filling capabilities and is suitable for filling deep trenches 107 with high aspect ratios. This reduces the probability of defects such as voids forming within the isolation material layer, thereby improving the film quality of the deep trench isolation structure 108.

[0149] In this embodiment, a dry etching process or a chemical mechanical planarization (CMP) process is used to remove the isolation material layer exposed outside the deep trench 107 .

[0150] It should be noted that in the step of forming the deep trench isolation structure 108 extending from the top surface of the epitaxial layer 101 to the substrate 100, the deep trench isolation structure 108 penetrates the shallow trench isolation structure 104, and the projection of the deep trench isolation structure 108 on the surface of the substrate 100 is located within the projection of the shallow trench isolation structure 104 on the surface of the substrate 100. Therefore, the shallow trench isolation structure 104 can reduce stress and electric field concentration at the corners of the deep trench isolation structure 108, thereby reducing the probability of edge breakdown.

[0151] It should also be noted that, in this embodiment, the deep trench 107 penetrates deep into the substrate 100 . In other embodiments, the deep trench may be located only in the epitaxial layer, with a gap left between the bottom of the deep trench and the substrate.

[0152] It should be noted that in this embodiment, the first doped region 103 is formed, and after the first doped region 103 is formed, the deep trench isolation structure 108 is formed. In other embodiments, the deep trench isolation structure may be formed first, and after the deep trench isolation structure is formed, the first doped region is formed. The specific steps include: providing a substrate, forming an epitaxial layer on the substrate, the epitaxial layer having a functional region, forming a deep trench isolation structure on the side of the functional region; and after the deep trench isolation structure is formed, forming the first doped region.

[0153] refer to Figure 10 and Figure 11 After forming the deep trench isolation structure 108, an isolation structure 112 (such as Figure 11 shown).

[0154] The isolation structure 112 is used to provide a process basis for subsequently forming a quenching resistor.

[0155] In this embodiment, the isolation structure 112 is a single-layer structure. The single-layer structure of the isolation structure 112 is conducive to simplifying the formation process of the isolation structure 112. Specifically, the material of the isolation structure 112 includes silicon oxide. In other embodiments, the isolation structure can also be a stacked structure.

[0156] Specifically, the steps of forming the isolation structure 112 include: Figure 10 As shown, an oxide material layer 113 is formed on the epitaxial layer 101, the first doped region 103 and the deep trench isolation structure 108; Figure 11 As shown, part or all of the oxide material layer 113 directly above the diode region is etched to form an isolation structure 112. The isolation structure 112 located on the first doping region 103 serves as a first oxide layer 1121, and the isolation structure 112 located on the epitaxial layer 101 and the deep trench isolation structure 108 serves as a second oxide layer 1122. The thickness of the second oxide layer 1122 is greater than the thickness of the first oxide layer 1121.

[0157] In this embodiment, the oxide material layer 113 is formed by a fluid chemical vapor deposition process.

[0158] In this embodiment, a dry etching process is used to etch part or all of the oxide material layer 113 directly above the diode region to form the isolation structure 112. The dry etching process is advantageous in controlling the thickness of the oxide material layer 113 removed directly above the diode region.

[0159] The isolation structure 112 located on the first doped region 103 serves as a first oxide layer 1121. The thickness of the first oxide layer 1121 is less than the thickness of the second oxide layer 1122. The transmittance of the first oxide layer 1121 is greater than the transmittance of the second oxide layer 1122. When the single-photon avalanche diode is working, photons can easily pass through the first oxide layer 1121 from the photosensitive surface into the depletion region, and the excited carriers can be conducted to the avalanche region under the action of the electric field to excite the avalanche effect.

[0160] refer to Figure 12 The method for forming the single-photon avalanche diode further includes: after forming the isolation structure 112 , forming a quenching resistor 114 on the second oxide layer 1122 .

[0161] When a single-photon avalanche diode experiences an avalanche, the avalanche current flows through the quenching resistor, which can reduce the bias voltage across the PN junction and quench the avalanche. The above-mentioned quenching method is called passive quenching. Those skilled in the art will understand that the single-photon avalanche diode can also adopt other quenching methods, such as active quenching. The specific device or circuit structure is not described in detail. The PN junction described here refers to the PN junction formed by the first doped region 103 and the epitaxial layer 101, and the PN junction formed by the first doped region 103 and the second doped region 102.

[0162] The quenching resistor 114 is connected to the back-end interconnection structure through a third contact plug formed subsequently.

[0163] In this embodiment, the material of the quenching resistor 114 includes polysilicon. In other embodiments, the material of the quenching resistor may also include one or more of silicon, germanium, and nickel.

[0164] In this embodiment, the step of forming the quenching resistor 114 includes: forming a resistance material layer on the isolation structure 112 ; etching the resistance material layer, and the remaining resistance material layer serves as the quenching resistor 114 .

[0165] In this embodiment, a chemical vapor deposition (CVD) process is used to form a resistance material layer (not shown in the figure).

[0166] refer to Figure 13 and Figure 14 , forming a dielectric layer 110 (such as Figure 14 shown).

[0167] The dielectric layer 110 is used to provide a process space for subsequently forming a first contact hole plug.

[0168] The dielectric layer 110 is made of an insulating material, including one or both of silicon oxide and silicon nitride. In this embodiment, the dielectric layer 110 is made of silicon oxide. In other embodiments, the dielectric layer may also be made of silicon nitride or silicon oxynitride.

[0169] It should be noted that, in the step of forming the dielectric layer 110 , the dielectric layer 110 also covers the quenching resistor 114 .

[0170] This is done to prepare for the subsequent etching of the dielectric layer 110 to form a third contact hole exposing the quenching resistor 114 .

[0171] It should be noted that, in the step of forming the dielectric layer 110 , the dielectric layer 110 covers the electrode contact area 201 .

[0172] This is done to prepare for the subsequent etching of the dielectric layer 110 to form a second contact hole exposing the electrode contact region 201 .

[0173] Specifically, the step of forming the dielectric layer 110 covering the deep trench isolation structure 108 includes:

[0174] like Figure 13 As shown, a dielectric material layer 109 is formed on the first doped region 103 , the deep trench isolation structure 108 and the epitaxial layer 101 ; and a dielectric mask layer 111 is formed on the dielectric material layer 109 .

[0175] In this embodiment, the dielectric material layer 109 is formed by a flow chemical vapor deposition process.

[0176] The dielectric mask layer 111 serves as an etch mask for the subsequent etching of the dielectric material layer 109 to form a dielectric layer. The dielectric mask layer 111 is made of a material that can function as a mask and is easily removed. Therefore, after the dielectric layer 110 is subsequently formed, the removal of the dielectric mask layer 111 minimizes damage to the already formed dielectric layer 110.

[0177] In this embodiment, the dielectric mask layer 111 includes a filling material layer, an anti-reflective coating layer on the filling material layer, and a dielectric photoresist layer on the anti-reflective coating layer.

[0178] The filling material layer includes an organic material, such as one or more of an ODL (organic dielectric layer) material, a DUO (Deep UV Light Absorbing Oxide) material, and an APF (Advanced Patterning Film) material.

[0179] Materials of the anti-reflective coating include DARC (dielectric anti-reflective coating) materials or BARC (bottom anti-reflective coating) materials.

[0180] The step of forming the dielectric photoresist layer includes: forming a photoresist material layer on the anti-reflective coating layer; and performing an exposure process on the photoresist material layer to form the dielectric photoresist layer.

[0181] like Figure 14 As shown, the dielectric material layer 109 is etched using the dielectric mask layer 111 as a mask to form a dielectric layer 110 , and the dielectric layer 110 exposes a portion or all of the first doped region 103 .

[0182] In this embodiment, the dielectric mask layer 111 is used as a mask to etch the dielectric material layer 109 using a dry etching process to form a dielectric layer 110. The dry etching process has anisotropic etching characteristics and good controllability of the etching profile, which can achieve a fairly accurate pattern conversion, so that the morphology of the dielectric layer 110 meets process requirements. In addition, when etching the dielectric material layer 109 using the dry etching process, the top of the isolation structure can be used as the etching stop position, thereby reducing damage to other film structures.

[0183] The method for forming a single-photon avalanche diode further includes: after forming the dielectric layer 110, removing the dielectric mask layer 111. Removing the dielectric mask layer 111 prepares for subsequent etching of the dielectric layer 110 to form a first contact hole and a second contact hole.

[0184] In this embodiment, an ashing process is used to remove the dielectric mask layer 111 .

[0185] refer to Figures 15 to 17 , forming a first contact plug 115 (such as a first contact plug 115) penetrating the dielectric layer 110 and connected to the top of the deep trench isolation structure 108 Figure 17 shown).

[0186] In the single-photon avalanche diode provided by an embodiment of the present invention, the first contact plug 115 penetrates the dielectric layer 110 and connects to the top of the deep trench isolation structure 108. When the single-photon avalanche diode is in operation, a voltage is applied to the deep trench isolation structure 108 through the first contact plug 115, thereby reducing the electric field strength in the area surrounding the PN junction, thereby concentrating more carriers in the PN junction region, which helps reduce the probability of breakdown in the PN junction edge region. Furthermore, because the deep trench isolation structure 108 is spaced apart from the first doped region 103, the electric field in the PN junction edge region can be effectively modulated when a voltage is applied to the deep trench isolation structure 108. At the same time, the electric field strength of the PN junction is not easily affected by the voltage of the deep trench isolation structure 108, which helps improve the electrical performance of the single-photon avalanche diode.

[0187] Specifically, being able to modulate the electric field in the area surrounding the PN junction refers to reducing the electric field intensity in the edge area where the PN junction is formed at the interface between the first doped region 103 and the epitaxial layer 101 .

[0188] In this embodiment, the material of the first contact hole plug 115 includes one or more of tungsten, aluminum, copper, a tungsten compound, an aluminum compound, and a copper compound.

[0189] In the step of forming the first contact hole plug 115, a second contact hole plug 121 (eg, Figure 17 shown).

[0190] During the step of forming the first contact plug 115 , a third contact plug 122 is further formed to penetrate the dielectric layer 110 and connect to the quenching resistor 114 .

[0191] Specifically, the steps of forming the first contact hole plug 115 include:

[0192] like Figure 15 As shown, a first mask layer 116 is formed to cover the dielectric layer 110 ; the dielectric layer 110 is etched using the first mask layer 116 as a mask to form a first contact hole 117 exposing the deep trench isolation structure 108 .

[0193] The first contact hole 117 is used to prepare for the subsequent formation of a first contact plug that contacts the deep trench isolation structure 108 .

[0194] In this embodiment, the first mask layer 116 serves as an etching mask for etching the dielectric layer 110 to form the first contact hole 117. The first mask layer 116 is made of a material that can function as a mask and is easily removed. Therefore, after the first contact hole 117 is formed, minimal damage to the first contact hole 117 is minimized during the removal of the first mask layer 116.

[0195] In this embodiment, the first mask layer 116 includes a filling material layer, an anti-reflective coating on the filling material layer, and a first photoresist layer on the anti-reflective coating. The first photoresist layer has a first opening (not shown in the figure), and the first opening faces the deep trench isolation structure 108.

[0196] It should be noted that, in the step of forming the first contact hole 117 , the first contact hole 117 plug also penetrates the isolation structure 112 .

[0197] In this embodiment, a dry etching process is used to etch the dielectric layer 110 using the first mask layer 116 as a mask to form a first contact hole 117 exposing the deep trench isolation structure 108. The dry etching process has anisotropic etching characteristics and good controllability of the etching profile, enabling highly accurate pattern conversion, which helps ensure that the morphology of the first contact hole 117 meets process requirements. Furthermore, during the step of forming the first contact hole 117 using the dry etching process, the top of the deep trench isolation structure 108 can be used as the etching stop position, reducing damage to the deep trench isolation structure 108. Furthermore, by changing the etching gas, the dielectric layer 110 and the isolation structure 112 can be etched in the same etching equipment, simplifying the process steps.

[0198] It should be noted that, in the step of forming the first mask layer 116, the first photoresist layer further has a second opening (not shown in the figure) and a third opening (not shown in the figure), the second opening corresponds to the electrode contact area 201, and the third opening corresponds to the quenching resistor 114. Accordingly, in the step of forming the first contact hole 117 using the first mask layer 116 as a mask, the dielectric layer 110 exposed by the third opening is also etched to form a third contact hole 118 (as shown in FIG. 1 ) exposing the quenching resistor 114. Figure 15 Correspondingly, in the step of forming the first contact hole 117 using the first mask layer 116 as a mask, the dielectric layer 110 and the first oxide layer 1121 exposed by the second opening are also etched to form a third contact hole 119 (as shown) exposing the electrode contact area 201. Figure 15 shown).

[0199] The second contact hole 118 is used to provide a process space for subsequently forming a second contact hole plug.

[0200] The third contact hole 119 is used to provide a process space for subsequently forming a third contact hole plug.

[0201] In this embodiment, the first photoresist layer has a first opening, a second opening and a third opening at the same time, and accordingly can form a first contact hole 117, a second contact hole 118 and a third contact hole 119 in the same etching process, which is conducive to simplifying the formation process of the single-photon avalanche diode.

[0202] The method for forming a single-photon avalanche diode further includes: after forming the first contact hole 117, removing the first mask layer 116. Removing the first mask layer 116 prepares for the subsequent formation of a first contact hole plug, a second contact hole plug, and a third contact hole plug.

[0203] In this embodiment, an ashing process is used to remove the first mask layer 116 .

[0204] like Figure 16 As shown, a first metal material layer 120 is formed on the first contact hole 117 and the dielectric layer 110 .

[0205] In this embodiment, the first metal material layer 120 is formed using an electrochemical plating process (ECP). The electrochemical plating process has the advantages of simple operation, fast deposition speed, and low cost. In other embodiments, the first metal material layer can also be formed using metal-organic chemical vapor deposition (MOCVD).

[0206] like Figure 17 As shown, the first metal material layer 120 exposed outside the first contact hole 117 is removed, and the remaining first metal material layer 120 located in the first contact hole 117 serves as the first contact hole plug 115 .

[0207] In this embodiment, a dry etching process is used to remove the first metal material layer 120 exposed outside the first contact hole 117, and the remaining first metal material layer 120 located in the first contact hole 117 serves as the first contact hole plug 115. In other embodiments, a wet etching process may also be used to remove the first metal material layer exposed outside the first contact hole.

[0208] It should be noted that the first metal material layer 120 located in the second contact hole 118 serves as a second contact hole plug 121 , and the first metal material layer 120 located in the third contact hole 119 serves as a third contact hole plug 122 .

[0209] refer to Figure 18 The method for forming the single-photon avalanche diode further includes: after forming the first contact hole plug 115, forming a first interconnection structure 123 connected to the first contact hole plug 115 on the dielectric layer 110, wherein the first interconnection structure 123 is used to couple with a voltage source.

[0210] The first interconnect structure 123 is used to connect a voltage source to the first contact plug 115. When the single-photon avalanche diode is operating, a voltage is applied to the deep trench isolation structure 108 via the first interconnect structure 123 and the first contact plug 115, thereby reducing the electric field strength in the area surrounding the PN junction. This allows more carriers to flow toward the first doped region 103 and the second doped region 102 of the diode region, further concentrating them in the PN junction area, thereby reducing the probability of breakdown at the edge of the PN junction. The PN junctions described herein refer to the PN junctions formed by the first doped region 103 and the epitaxial layer 101, as well as the PN junctions formed by the first doped region 103 and the second doped region 102.

[0211] In this embodiment, the coupling is a direct connection or an indirect connection.

[0212] In this embodiment, the voltage source is an external structure for applying voltage to the deep trench isolation structure 108 through the first interconnect structure 123 and the first contact plug 115. Specifically, the voltage source includes one or both of a loading circuit and a power supply.

[0213] In this embodiment, the material of the first interconnect structure 123 includes one or more of tungsten, aluminum, copper, a tungsten compound, an aluminum compound, and a copper compound.

[0214] Specifically, the step of forming the first interconnect structure 123 in contact with the first contact hole plug 115 includes: forming a second metal material layer (not shown in the figure) on the dielectric layer 110 and the first doped region 103; forming a second mask layer (not shown in the figure) on the second metal material layer, the second mask layer covering the first contact hole plug 115; etching the second metal material layer using the second mask layer as a mask to form the first interconnect structure 123 connected to the first contact hole plug 115.

[0215] In this embodiment, the second metal material layer is formed using an electrochemical plating process (ECP). The electrochemical plating process has the advantages of simple operation, fast deposition speed, and low cost. In other embodiments, the second metal material layer can also be formed using metal-organic chemical vapor deposition (MOCVD).

[0216] In this embodiment, the second mask layer is located directly above the first contact hole plug 115 , so that in the step of etching the second metal material layer using the second mask layer as a mask, the second metal material layer directly above the first contact hole plug 115 can be retained.

[0217] In this embodiment, the second metal material layer is etched using the second mask layer as a mask to form a first interconnect structure 123 connected to the first contact plug 115. The dry etching process has anisotropic etching characteristics and good controllability of the etching profile, which can achieve a fairly accurate pattern conversion, helping to ensure that the morphology of the first interconnect structure 123 meets process requirements and also helps to improve the removal efficiency of the second metal material layer.

[0218] It should be noted that, in the step of forming the first interconnect structure 123 , a second interconnect structure 124 connected to the second contact plug 121 is further formed on the dielectric layer 110 , and the second interconnect structure 124 is used to couple to a bias source.

[0219] The second interconnect structure 124 is connected to both the second contact plug 121 and the third contact plug 122 , and accordingly the quenching resistor 114 and the power contact region 201 are connected to the bias source through the second interconnect structure 124 .

[0220] Accordingly, in this embodiment, the second mask layer also covers the second contact plug 121 and the third contact plug 122. Thus, during the step of etching the second metal material layer using the second mask layer as a mask, the second metal material layer directly above the second contact plug 121 and the third contact plug 122 can be retained as the second interconnect structure 124.

[0221] It should be noted that the second interconnection structure 124 is disconnected from the first interconnection structure 123. Therefore, when the single-photon avalanche diode is working, the voltage of the first contact plug 108 is different from that of the second contact plug 121 and the third contact plug 122.

[0222] It should be noted that the steps of forming the single-photon avalanche diode further include: forming an electrode layer (anode) on a surface of the substrate 100 facing away from the epitaxial layer 101 after forming the first doped region 103 and the second doped region 102 and before forming the first interconnect structure 123. The electrode layer serves as the anode of the single-photon avalanche diode and is used to connect to a low potential.

[0223] In this embodiment, the material of the electrode layer is a conductive material. Specifically, the material of the electrode layer includes aluminum.

[0224] Correspondingly, an embodiment of the present invention also provides a driving method for a single-photon avalanche diode.

[0225] The driving method of the single-photon avalanche diode proposed in the present invention includes: applying a voltage to the deep trench isolation structure 108 through the aforementioned first contact plug 115 .

[0226] A deep trench isolation structure 108 extends from the top surface of the epitaxial layer to the substrate. The deep trench isolation structure 108 is separated from the first doped region 103 and the second doped region 102. A first contact plug 115 penetrates the dielectric layer 110 and connects to the top of the deep trench isolation structure 108. When the single-photon avalanche diode is operating, a voltage is applied to the deep trench isolation structure 108 through the first contact plug 115, thereby reducing the electric field strength in the area surrounding the PN junction. This allows more carriers to flow to the first doped region 103 and the second doped region 102 in the diode region, further concentrating them in the PN junction area. This helps reduce the probability of breakdown in the edge area of ​​the PN junction and improves the electrical performance of the single-photon avalanche diode. The PN junction refers to the PN junction formed by the first doped region 103 and the epitaxial layer 101, as well as the PN junction formed by the first doped region 103 and the second doped region 102.

[0227] The single-photon avalanche diode provided above further includes: a first interconnect structure 123 located on top of the dielectric layer 110 and connected to the first contact plug 115 , wherein the first interconnect structure 123 is suitable for coupling to a voltage source.

[0228] Specifically, in the step of applying voltage to the deep trench isolation structure 108 through the first contact plug 115 , the voltage applied to the deep trench isolation structure 108 is provided by a voltage source and transmitted to the deep trench isolation structure 108 through the first interconnect structure 123 and the first contact plug 115 .

[0229] In this embodiment, the voltage applied to the deep trench isolation structure 108 is smaller than the avalanche voltage of the single photon avalanche diode.

[0230] It should be noted that in the step of applying voltage to the deep trench isolation structure 108, the voltage applied to the deep trench isolation structure 108 should not be too large or too small. If the applied voltage is too large, the voltage applied to the deep trench isolation structure 108 is greater than the breakdown voltage, so that breakdown may occur at the deep trench isolation structure 108, resulting in poor electrical performance of the single-photon avalanche diode. If the applied voltage is too small, the reduction in the electric field strength at the edge of the PN junction is not large enough, and the electric field strength at the edge of the PN junction is still high. There are still many carriers flowing to the edge area of ​​the PN junction, and the edge area of ​​the PN junction is easily broken down, resulting in poor electrical performance of the single-photon avalanche diode. In this embodiment, the voltage applied to the deep trench isolation structure 108 through the first contact hole plug 115 ranges from 10V to 30V.

[0231] Correspondingly, the present invention also provides a laser radar, which includes: a transmitting unit for providing a transmitting light beam, which forms an echo light beam after being reflected by a target object; a receiving unit for receiving the echo light beam, which includes the single photon avalanche diode.

[0232] When the laser radar is working, a voltage is applied to the deep trench isolation structure through the first contact hole plug, so that the electric field strength in the surrounding area of ​​the PN junction is reduced, and more carriers flow to the first doping region and the second doping region. The probability of the edge area of ​​the single-photon avalanche diode being broken down is relatively small, so that the electrical performance of the single-photon avalanche diode area is superior. Accordingly, it can reduce the noise output by the receiving unit in the laser radar, improve the detection signal-to-noise ratio, and help improve the detection effect of the laser radar.

[0233] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art may make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be based on the scope defined by the claims. Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art may make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be based on the scope defined by the claims.

Claims

1. A single photon avalanche diode, characterized in that: include: A substrate and a diode region located on the substrate, wherein the diode region includes an epitaxial layer and a first doped region located on top of the epitaxial layer; a deep trench isolation structure, wherein the deep trench isolation structure is adjacent to the diode region and spaced apart from the first doped region; a dielectric layer located on top of the deep trench isolation structure; A first contact hole plug, penetrating the dielectric layer and connected to the top of the deep trench isolation structure; The shallow trench isolation structure surrounds the inner side and the outer side of the deep trench isolation structure and is located on the top of the epitaxial layer and spaced apart from the first doped region.

2. The single photon avalanche diode according to claim 1, wherein The single-photon avalanche diode further includes: a second doped region located on a side of the first doped region away from the top of the epitaxial layer.

3. The single photon avalanche diode according to claim 2, wherein: The single-photon avalanche diode further includes a first interconnect structure located on top of the dielectric layer and connected to the first contact plug, wherein the first interconnect structure is suitable for coupling to a voltage source.

4. The single photon avalanche diode according to claim 3, wherein: The single-photon avalanche diode further includes: an electrode contact region located on top of the first doped region; The dielectric layer also covers the electrode contact area; The single-photon avalanche diode further includes a second contact hole plug penetrating through the dielectric layer and connected to the electrode contact region.

5. The single photon avalanche diode according to claim 4, wherein: The single-photon avalanche diode further includes a second interconnect structure located on the dielectric layer and connected to the second contact plug. The second interconnect structure is also coupled to a bias source.

6. The single photon avalanche diode according to claim 1 or 2, characterized in that: The single photon avalanche diode further includes: an isolation structure located on top of the epitaxial layer, the first doped region, and the deep trench isolation structure; The first contact hole plug also passes through the isolation structure.

7. The single photon avalanche diode according to claim 6, wherein: The isolation structure includes: a first oxide layer located on the surface of the diode region and a second oxide layer located on the surface of the deep trench isolation structure, and the thickness of the first oxide layer is smaller than the thickness of the second oxide layer.

8. The single photon avalanche diode according to any one of claims 1 to 3, characterized in that: The material of the dielectric layer includes one or both of silicon oxide and silicon nitride.

9. The single photon avalanche diode according to claim 1, wherein: The single-photon avalanche diode further includes a guard ring surrounding a side of the first doped region and spaced apart from the shallow trench isolation structure.

10. The single photon avalanche diode according to claim 2 or 3, characterized in that: The epitaxial layer is doped with P-type dopant ions; The first doping region is doped with N-type dopant ions; The second doping region is doped with P-type ions.

11. The single photon avalanche diode according to any one of claims 1 to 3, characterized in that: The single-photon avalanche diode further includes an electrode layer located on a surface of the substrate facing away from the first doping region.

12. A method for forming a single-photon avalanche diode, characterized in that: include: providing a substrate; forming a diode region and a deep trench isolation structure adjacent to the diode region on the substrate, wherein the diode region includes an epitaxial layer and a first doped region located on top of the epitaxial layer; forming a dielectric layer covering the deep trench isolation structure; forming a first contact hole plug penetrating the dielectric layer and connected to the top of the deep trench isolation structure; The steps of forming the single-photon avalanche diode include: after providing a substrate, before forming the diode region, forming a shallow trench isolation structure on the top of the epitaxial layer; In the step of forming the first doped region, the first doped region is spaced apart from the shallow trench isolation structure; In the step of forming the deep trench isolation structure, the deep trench isolation structure penetrates the shallow trench isolation structure, and the projection of the deep trench isolation structure on the substrate surface is located within the projection of the shallow trench isolation structure on the substrate surface.

13. The method for forming a single photon avalanche diode according to claim 12, wherein: The step of forming a diode region and a deep trench isolation structure adjacent to the diode region on the substrate comprises: forming a first doping region and then forming the deep trench isolation structure; Alternatively, after forming the deep trench isolation structure, the first doped region is formed.

14. The method for forming a single photon avalanche diode according to claim 12, wherein: In the step of forming a diode region on the substrate, a second doping region is formed on a side of the first doping region away from the top of the epitaxial layer.

15. The method for forming a single photon avalanche diode according to claim 13, wherein: The method for forming a single-photon avalanche diode further includes: after forming the first contact hole plug, forming a first interconnection structure connected to the first contact hole plug on the dielectric layer, wherein the first interconnection structure is used to couple to a voltage source.

16. The method for forming a single photon avalanche diode according to any one of claims 12 to 15, wherein: The step of forming the first contact hole plug includes: forming a first mask layer covering the dielectric layer; etching the dielectric layer using the first mask layer as a mask to form a first contact hole exposing the deep trench isolation structure; After forming the first contact hole, removing the first mask layer; forming a first metal material layer on the first contact hole and the dielectric layer; The first metal material layer exposed outside the first contact hole is removed, and the remaining first metal material layer located in the first contact hole serves as the first contact hole plug.

17. The method for forming a single-photon avalanche diode according to claim 16, wherein: A dry etching process is used to remove the first metal material layer exposed outside the first contact hole.

18. The method for forming a single photon avalanche diode according to claim 15, wherein: The step of forming a first interconnect structure in contact with the first contact hole plug includes: forming a second metal material layer on the dielectric layer and the first doped region; forming a second mask layer on the second metal material layer, wherein the second mask layer covers the first contact hole plug; The second metal material layer is etched using the second mask layer as a mask to form a first interconnection structure connected to the first contact hole plug.

19. The method for forming a single photon avalanche diode according to claim 15, wherein: In the step of forming the diode region, an electrode contact region is formed on top of the first doped region; In the step of forming the dielectric layer, the dielectric layer covers the electrode contact area; In the step of forming the first contact hole plug, a second contact hole plug is also formed which penetrates the dielectric layer and connects to the electrode contact area.

20. The method for forming a single photon avalanche diode according to claim 19, wherein: In the step of forming the first interconnect structure, a second interconnect structure connected to the second contact hole plug is further formed on the dielectric layer, and the second interconnect structure is used to couple to a bias source.

21. The method for forming a single photon avalanche diode according to any one of claims 12 to 15, wherein: The method for forming the single-photon avalanche diode further includes: after forming the deep trench isolation structure and before forming the dielectric layer, forming an isolation structure covering the epitaxial layer, the first doped region and the deep trench isolation structure; In the step of forming the first contact hole plug, the first contact hole plug also penetrates the isolation structure.

22. The method for forming a single photon avalanche diode according to claim 21, wherein: The steps of forming the isolation structure include: forming an oxide material layer on the epitaxial layer, the first doped region, and the deep trench isolation structure; Etch part or all of the oxide material layer directly above the diode region to form an isolation structure, wherein the isolation structure located on the first doped region serves as a first oxide layer, and the isolation structure located on the epitaxial layer and the deep trench isolation structure serves as a second oxide layer, and the thickness of the second oxide layer is greater than the thickness of the first oxide layer.

23. The method for forming a single photon avalanche diode according to claim 14, wherein: In the step of forming the diode region: The step of forming the epitaxial layer includes doping with P-type ions; The step of forming the first doping region includes doping with N-type ions; The step of forming the second doping region includes doping P-type ions.

24. The method for forming a single photon avalanche diode according to claim 12, wherein: The method for forming the single-photon avalanche diode further includes: after forming the diode region, forming a guard ring surrounding a side portion of the first doped region, wherein the guard ring is spaced apart from the shallow trench isolation structure.

25. The method for forming a single photon avalanche diode according to any one of claims 12 to 15, wherein: The method for forming a single-photon avalanche diode further includes forming an electrode layer on a surface of the substrate facing away from the epitaxial layer.

26. A driving method of a single photon avalanche diode according to any one of claims 1 to 11, characterized in that: include: A voltage is applied to the deep trench isolation structure through the first contact plug.

27. The driving method of a single photon avalanche diode according to claim 26, wherein: A voltage applied to the deep trench isolation structure through the first contact plug is smaller than an avalanche voltage of the single-photon avalanche diode.

28. A laser radar, characterized in that: include: A transmitting unit, configured to provide a transmitting light beam, wherein the transmitting light beam is reflected by a target object to form an echo light beam; A receiving unit, configured to receive an echo light beam, wherein the receiving unit comprises the single photon avalanche diode according to any one of claims 1 to 11.

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