A multi-phase DC-DC converter

Abstract

A multi-phase DC-DC converter, comprising an error amplifier, a control unit, at least two converters and a loop unit, characterized in that: the control unit includes an OPA amplifier, a first field effect transistor and a second field effect transistor; the non-inverting input terminal of the OPA amplifier receives an error amplified voltage V EA , the inverting input terminal receives a reference voltage V ref1 , the output terminal is respectively connected to the drain and gate of the first field effect transistor and the gate of the second field effect transistor and feeds back an output current I1 to the first field effect transistor; the source electrodes of the first field effect transistor and the second field effect transistor are respectively connected to a power supply voltage, the drain of the second field effect transistor is connected to one of the at least two converters, and provides a mirror input current I2 to one of the at least two converters. Based on the technical solution in the present invention, it is possible to enable the converter to achieve smooth switching during the switching process between the light load and heavy load operating modes.

Description

Technical Field

[0001] The present invention relates to integrated circuits, and more particularly, to a multi-phase DC-DC converter. Background Art

[0002] At present, in integrated circuits that require voltage converters, a multi-phase DC-DC converter can be used to reduce output ripples, that is, a voltage converter with multiple DC-DC converters can be used to work alternately. Furthermore, when the load in the system is small, the multiple DC-DC converters can be selected, some of the converters can be turned off, and other converters can be turned on to improve the working efficiency of the multiple DC-DC converters.

[0003] However, in the prior art, a multi-phase DC-DC converter capable of switching between light-load and heavy-load operating modes of a system may experience a jump in output voltage during the switching process, thereby affecting the overall performance of the system.

[0004] Therefore, there is an urgent need for an improved multi-phase DC-DC converter. Summary of the invention

[0005] In order to solve the deficiencies in the prior art, the object of the present invention is to provide a multi-phase DC-DC converter, which can provide a control unit so that the converter can achieve smooth switching during the switching process between light load and heavy load working modes.

[0006] The present invention adopts the following technical solution. A multi-phase DC-DC converter includes an error amplifier, a control unit, at least two converters and a loop unit, the control unit includes an OPA amplifier, a first field effect transistor and a second field effect transistor; the non-phase input terminal of the OPA amplifier receives an error amplification voltage V EA , the negative input terminal receives the reference voltage V ref1 The output end is respectively connected to the drain and gate of the first field effect transistor and the gate of the second field effect transistor and feeds back the output current I1 to the first field effect transistor; the source of the first field effect transistor and the second field effect transistor are respectively connected to the power supply voltage, the drain of the second field effect transistor is connected to one of the at least two converters and provides a mirror input current I2 to one of the at least two converters.

[0007] Preferably, the multi-phase DC-DC converter comprises two converters, namely a main converter and an auxiliary converter; and the auxiliary converter controls the working state based on the mirror input current I2 output by the control unit.

[0008] Preferably, at least one of the two converters includes a comparator, a logic unit, a PMOS tube, an NMOS tube, a current sensing unit, a DC current source, a ramp current source, a resistor and an inductor; the comparator positive input terminal receives the error amplified voltage V from the error amplifier EA , the negative phase input end is connected to the output end of the current sensing unit, the output end of the DC current source, the output end of the ramp current source and one end of the resistor, and is used to simultaneously receive the induced current, the DC current and the ramp current; the input end of the logic unit is connected to the output end of the comparator, receives the output of the comparator and the system clock signal, and the output end is respectively connected to the gates of the PMOS tube and the NMOS tube, and provides a turn-on voltage for the PMOS tube and the NMOS tube; the input end of the current sensing unit is respectively connected to the source and drain of the PMOS tube, and the output end outputs the induced current and is connected to one end of the resistor and the negative phase input end of the comparator; one end of the DC current source and the ramp current source is connected to the power supply voltage, and one end is connected to one end of the resistor; the other end of the resistor is grounded; one end of the inductor is respectively connected to the drain of the PMOS tube and the drain of the NMOS tube, and the other end serves as the output end of the converter.

[0009] Preferably, the output terminals of at least two converters are connected to output the output voltage V of the multi-phase DC-DC converter. out .

[0010] Preferably, the loop unit includes a capacitor, a first voltage-dividing resistor and a second voltage-dividing resistor; one end of the capacitor is connected to the output end of the converter, and the other end is grounded; one end of the first voltage-dividing resistor is connected to the output end of the converter, and the other end is connected to the second voltage-dividing resistor and the positive input end of the error amplifier; one end of the second voltage-dividing resistor is connected to the first voltage-dividing resistor and the positive input end of the error amplifier, and the other end is grounded.

[0011] Preferably, the multi-phase DC-DC converter output voltage V out Powers the system load circuit and generates a load current I based on the system load load .

[0012] Preferably, when the system switches from heavy load to light load, as the load current I load decreases, the mirror input current I2 at the negative input terminal of the comparator in the auxiliary converter increases, and the negative input terminal voltage V SUM2 Increase; when the negative input voltage V SUM2 Increases to a value higher than the error amplifier voltage V EA , the inductor output current I in the auxiliary converter L2 Reduced to 0 amps to control the auxiliary converter to operate in a closed state.

[0013] Preferably, when the system switches from light load to heavy load, as the load current I loadincreases, the mirror input current I2 at the negative input terminal of the comparator in the auxiliary converter decreases, and the negative input terminal voltage V SUM2 Decrease; when the negative input voltage V SUM2 The oscillation is reduced to below the error amplifier voltage V EA , the inductor output current I in the auxiliary converter L2 Increases to control the working state of the auxiliary converter to be turned on.

[0014] Preferably, the error amplification voltage V EA As the load current I load The increase or decrease of the error amplification voltage V EA Greater than the reference voltage V at the negative input of the OPA in the control unit ref1 When the error amplifier voltage V EA With load current I load The first linear relationship is shown; when the error amplification voltage V EA Less than the reference voltage V at the negative input of the OPA in the control unit ref1 When the error amplifier voltage V EA With load current I load A second linear relationship.

[0015] The beneficial effect of the present invention lies in that, compared with the prior art, a multi-phase DC-DC converter in the present invention includes a control unit, which can enable the error amplification voltage and the converter output voltage to overcome overshoot and achieve smooth conversion during the process of switching the working mode of the multi-phase DC-DC converter. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a circuit diagram of a DC-DC converter in the prior art of the present invention;

[0017] Figure 2 A schematic diagram of the relationship between the load current and the error amplification voltage of the DC-DC converter in the prior art of the present invention;

[0018] Figure 3 A circuit diagram of a multi-phase DC-DC converter of the present invention;

[0019] Figure 4 A schematic diagram of the change of various parameters of a multi-phase DC-DC converter of the present invention over time;

[0020] Figure 5 The figure is a schematic diagram showing the relationship between a load current and an error amplification voltage of a multi-phase DC-DC converter of the present invention. DETAILED DESCRIPTION

[0021] The present application is further described below in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present invention, and cannot be used to limit the protection scope of the present application.

[0022] Figure 1 FIG. 1 is a circuit diagram of a DC-DC converter in the prior art of the present invention. Figure 1 As shown, the DC-DC converter in the prior art includes a main converter, an auxiliary converter, a comparator, an error amplifier and a loop unit. The DC-DC converter can be a two-phase BUCK type DC-DC converter, that is, a step-down DC-DC converter, and the DC-DC converter can also be a multi-phase DC-DC converter.

[0023] The non-inverting input of the error amplifier is connected to a feedback voltage V proportional to the output voltage. fb , the negative input terminal is connected to the reference voltage V ref , the output error amplified voltage V EA and connected to the first comparator in the main converter.

[0024] The main converter includes a first comparator COMP1, a logic unit LOGIC1, a field effect transistor Mp0 and a field effect transistor Mn0, a current sensing unit CurrentSense1, a DC current source I DC1 , ramp current source I Slope1 , resistor R sum1 、Inductance L 1 The positive input terminal of the first comparator COMP1 is connected to the error amplification voltage V EA , the negative input terminal and the resistor R sum1 The output end of the first comparator COMP1 is connected to the output end of the current sensing unit CurrentSense1, and the output end of the first comparator COMP1 is connected to the logic unit LOGIC1. The logic unit receives the output signal from the output end of the first comparator COMP1 and the clock signal CLK1, and outputs them to the gates of the field effect transistor Mp0 and the field effect transistor Mn0 at the same time. The source of the field effect transistor Mp0 is connected to the power supply voltage V DD and one end of the current sensing unit CurrentSense1, the drain of the field effect tube is connected to the other end of the current sensing unit CurrentSense1, the drain of the field effect tube Mn0 and the inductor L 1 The source of the field effect transistor Mn0 is grounded. The current sensing unit CurrentSense1 outputs the sensed current I Sense1 And fed back to the negative input terminal of the first comparator COMP1. At the same time, the negative input terminal of the first comparator COMP1 is also connected to the DC current source I DC1 and ramp current source I Slope1 of output current.

[0025] The non-inverting input terminal of the third comparator COMP3 is connected to the reference voltage V ref1 , the negative input terminal receives the error amplified voltage V EA , the output terminal output SD2 is used as the reference of the control switch of the auxiliary converter.

[0026] The auxiliary converter, similar to the main converter, includes a second comparator COMP2, a logic unit LOGIC2, a field effect transistor Mp1 and a field effect transistor Mn1, a current sensing unit CurrentSense2, a DC current source I DC2 , ramp current source I Slope2 , resistor R sum2 、Inductance L 2 The connection mode of each component in the auxiliary converter is similar to that of each component in the main converter. The difference is that in the auxiliary converter, the logic unit LOGIC2 receives SD2 output from the third comparator COMP3 as a control signal to control the working state of the auxiliary converter.

[0027] The loop unit includes capacitor C out , the first output resistor R1, the second output resistor R2. Among them, the capacitor C out One end is connected to the other end of the inductor output of the main converter and the auxiliary converter respectively, and is used to receive the output voltage V of the main converter and the auxiliary converter. out , the other end of the capacitor is grounded. At the same time, the first resistor and the second resistor are connected in series, and the first resistor end is connected to the output voltage V out The output voltage between the series circuit of the first resistor and the second resistor is connected to the non-inverting input terminal of the error amplifier as a feedback voltage.

[0028] according to Figure 1 From the connection relationship between the various components shown in FIG, it can be seen that when the error amplifier outputs the error amplification voltage V EA When the error voltage V is reduced, only one DC-DC can be kept and the other DC-DC can be turned off. That is, the main converter can be kept in working state and the auxiliary converter can be turned off. EA and reference voltage V ref1 For comparison. If V EA <V ref1 When , it can be determined that the system circuit is working in the overload mode, and the SD2 output by the comparator COMP3 is a high voltage. At this time, the high voltage can instruct the logic unit LOGIC to turn off the auxiliary converter. EA ≥V ref1When the system circuit is working in light load mode, the SD2 output by the comparator COMP3 is low voltage. At this time, the logic unit LOGIC and the auxiliary converter are in normal working state. When the auxiliary converter and the main converter are in working state at the same time, since the two have the same structure, the parameters can be considered to be set the same, and they can provide half of the load current respectively.

[0029] It should be noted that when the load current I load When the output current of the main converter is insufficient to serve as the load current I load Power the load in the circuit. Therefore, the output voltage V out The output voltage V EA It must be increased to enable the main converter to provide a sufficiently large load current.

[0030] Figure 2 FIG. 1 is a schematic diagram showing the relationship between the load current and the error amplification voltage of the DC-DC converter in the prior art of the present invention. Figure 2 As shown, when the load current I load When the load current I load The change is fed back to the error amplifier output voltage V EA Changes linearly. And the load current I load Increase, the output voltage V EA Increase; load current I load Decrease, the output voltage V EA However, when the load current I load When it is less than a fixed value, the system will enter light load mode and the auxiliary converter will be turned off. At this time, the output voltage V EA jumps to a voltage higher than the reference voltage V ref1 The voltage value can make the DC-DC converter output a sufficiently large load current I load However, due to the system modulation error amplification voltage V EA It takes a certain amount of time, which results in the output voltage V of the DC-DC converter being out A downward overshoot will occur, jumping to a smaller voltage value.

[0031] Similarly, when the system switches from light load to heavy load, the error amplification voltage V EA It needs to jump to a smaller value so that the output voltage V out overshoot upward and generate a reasonable load current.

[0032] In summary, when the DC-DC converter in the prior art is used to switch between the light load and heavy load working modes, the error amplification voltage V EA It is not smooth enough, which affects the accuracy of the output load current and output voltage.

[0033] Figure 3 FIG. 1 is a circuit diagram of a multi-phase DC-DC converter of the present invention. Figure 3 As shown, the multi-phase DC-DC converter in the present invention can be a two-phase BUCK type DC-DC converter, that is, a two-phase voltage drop DC-DC converter.

[0034] Preferably, a multi-phase DC-DC converter in the present invention comprises an error amplifier, a control unit, at least two converters and a loop unit.

[0035] The control unit includes an OPA amplifier, a first field effect transistor Mp2 and a second field effect transistor Mp3; the positive input terminal of the OPA amplifier receives an error amplification voltage V EA , the negative input terminal receives the reference voltage V ref1 The OPA output terminal is connected to the drain and gate of the first field effect transistor Mp2 and the gate of the second field effect transistor Mp3 respectively, and the output current I1 is fed back to the first field effect transistor Mp2; the source of the first field effect transistor Mp2 and the source of the second field effect transistor Mp3 are connected to the power supply voltage V DD The drain of the second field effect transistor Mp3 is connected to one of the at least two converters and provides a mirror input current I2 for one of the at least two converters.

[0036] Specifically, Figure 3 As shown in FIG. 1 , since the first field effect transistor Mp2 and the second field effect transistor Mp3 are in a mirror connection relationship, the feedback output current I1 and the mirror input current I2 are equal, and I1=I2=g m *(V ref1 -V EA ). Among them, g m The transconductance of an OPA is the amplification factor of the OPA.

[0037] Preferably, the multi-phase DC-DC converter includes two converters, namely a main converter and an auxiliary converter; and the auxiliary converter controls the working state based on the mirror input current I2 output by the control unit. The mirror input current I2 will increase with the error amplification voltage V input to the positive input terminal of the OPA. EA changes, thereby controlling the auxiliary converter to be in working or stopping state.

[0038] Preferably, at least one of the two converters includes a comparator COMP, a logic unit LOGIC, a PMOS tube, an NMOS tube, a current sensing unit CurrentSense, a DC current source, a ramp current source, a resistor R SUM and inductor L. The non-inverting input terminal of the comparator COMP receives the error amplified voltage V from the error amplifier EA , the negative phase input terminal and the output terminal of the current sensing unit CurrentSense, the DC current source I DC The output terminal, ramp current source I SLOPE The output terminal and the resistor R SUM is connected to one end of the circuit to simultaneously receive the induced current I Sense , DC current I DC and ramp current I SLOPE .

[0039] The input end of the logic unit LOGIC is connected to the output end of the comparator COMP, receives the output of the comparator COMP and the system clock signal CLK, and the output end is respectively connected to the gates of the PMOS tube and the NMOS tube to provide a conduction voltage for the PMOS tube and the NMOS tube.

[0040] The input end of the current sensing unit CurrentSense is connected to the source and drain of the PMOS tube respectively, and the output end outputs the sensing current I SENSE And with the resistor R SUM One end is connected to the negative input terminal of the comparator COMP; one end of the DC current source and the ramp current source is connected to the power supply voltage V DD , one end is connected to the resistor R SUM One end of the resistor R SUM The other end of the inductor L is grounded; one end of the inductor L is connected to the drain of the PMOS tube and the drain of the NMOS tube respectively, and the other end serves as the output end of the converter.

[0041] According to the connection method of each component in the main converter and the auxiliary converter, after the converter receives the error amplification voltage, it can generate an induced current, which is fed back to the negative input terminal of the comparator to stabilize the output voltage of the converter.

[0042] Preferably, the output terminals of at least two converters are connected to output the output voltage V of the multi-phase DC-DC converter. out .like Figure 3 As shown, the output voltages of the main converter and the auxiliary converter are connected in parallel to provide the overall output voltage V of the multi-phase DC-DC converter. out .

[0043] Preferably, the loop unit includes a capacitor, a first voltage-dividing resistor and a second voltage-dividing resistor; one end of the capacitor is connected to the output end of the converter, and the other end is grounded; one end of the first voltage-dividing resistor is connected to the output end of the converter, and the other end is connected to the second voltage-dividing resistor and the positive input end of the error amplifier; one end of the second voltage-dividing resistor is connected to the first voltage-dividing resistor and the positive input end of the error amplifier, and the other end is grounded.

[0044] Preferably, the multi-phase DC-DC converter output voltage V out Powers the system load circuit and generates a load current I based on the system load load .

[0045] Preferably, when the system switches from heavy load to light load, as the load current I load decreases, VEA decreases, I1 increases, I2 also increases, and the negative input voltage V SUM2 Increase; when the negative input voltage V SUM2 Increase to the error amplifier voltage V EA , the inductor output current I in the auxiliary converter L2 As low as 0 amps to control the auxiliary converter to operate in the off state.

[0046] Preferably, when the system switches from light load to heavy load, as the load current I load Increases, VEA increases, I1 decreases, and I2 also decreases. The negative input voltage V SUM2 Decrease; when the negative input voltage V SUM2 Reduce to below the error amplifier voltage V EA , the inductor output current I in the auxiliary converter L2 Increases to control the working state of the auxiliary converter to be turned on.

[0047] In one embodiment of the present invention, a two-phase BUCK DC-DC is used as an example for explanation. load When the error amplifier voltage V EA Will also decrease, when the error amplifier voltage V EA Less than the reference voltage V at the negative input of the OPA in the control unit ref1 When the gate voltage of the PMOS tube Mp2 also drops, the PMOS tube and the NMOS tube are turned on, and a source-drain current flows through the PMOS tube Mp2. At this time, the mirror input current I2 flows from the control unit into the auxiliary converter. At this time, the input voltage of the negative input terminal of the auxiliary converter is V SUM2 =(I DC2 +I SLOPE2 +I SENSE2 +I 2 )*R SUM2 .

[0048] According to the above formula, the input voltage of the negative input terminal of the auxiliary converter is V SUM2 As the mirror input current I2 and the sense current I SENSE2 When the error amplifier voltage V EA As the converter output current I L2 At this time, the current flowing through the PMOS tube Mp1 decreases, causing the inductive current I SENSE2 At the same time, when the error amplifier voltage V EA When the induction current I decreases gradually, the mirror input current I2 of the control unit will gradually increase, and the parameters of each component can be set so that the increase of I2 is greater than the induction current I SENSE2 At this time, the overall input current at the negative phase input terminal of the auxiliary converter still increases, thus causing the input voltage V SUM2 Increase.

[0049] Figure 4 FIG. 1 is a schematic diagram showing the change of various parameters of a multi-phase DC-DC converter over time according to the present invention. Figure 4 As shown, as the input voltage V SUM2 The increase and error amplification voltage V EA As the on-time Ton of the PMOS tube of the auxiliary converter decreases, the on-current of the auxiliary converter also decreases. When the input voltage V SUM2 Increase to be greater than or equal to the error amplifier voltage V EA When the auxiliary converter is turned off, the PMOS tube of the auxiliary converter is turned off, the on-current of the auxiliary converter is reduced to 0 ampere, and the auxiliary converter stops working completely.

[0050] Since the load current I load When the output current of the auxiliary converter is gradually reduced to 0 ampere, it affects the error amplifier voltage V EA The error amplifier voltage V EA There will be no sudden increase when the auxiliary converter is shut down, but a gradual decrease when the auxiliary converter is shut down.

[0051] Similarly, when the system switches from light load to heavy load operation mode, the error amplification voltage V EA The system load current I load It increases gradually with the increase of the auxiliary converter and does not change suddenly when the auxiliary converter switches to the working state.

[0052] Preferably, the error amplification voltage VEA As the load current I load The increase or decrease of the error amplification voltage V EA Greater than the reference voltage V at the negative input terminal of the OPA in the control unit ref1 When the error amplifier voltage V EA With the load current I load The first linear relationship is shown; when the error amplification voltage V EA Less than the reference voltage V at the negative input of the OPA in the control unit ref1 When the error amplifier voltage V EA With load current I load A second linear relationship.

[0053] Figure 5 FIG. 1 is a schematic diagram showing the relationship between the load current and the error amplification voltage of a multi-phase DC-DC converter of the present invention. Figure 5 As shown, the error amplifier voltage V EA As the load current I load The increase or decrease of the error amplifier voltage V EA The reference voltage V ref1 When the error amplifier voltage V EA With load current I load The linear ratio between the error amplifier voltage V EA Greater than the reference voltage V ref1 When the error amplifier voltage V EA Less than the reference voltage V ref1 , its slope only represents the performance of the main converter.

[0054] The beneficial effect of the present invention lies in that, compared with the prior art, a multi-phase DC-DC converter in the present invention includes a control unit, which can enable the error amplification voltage and the converter output voltage to overcome overshoot and achieve smooth conversion during the process of switching the working mode of the multi-phase DC-DC converter.

[0055] The applicant of the present invention has made a detailed explanation and description of the implementation examples of the present invention in conjunction with the drawings in the specification. However, those skilled in the art should understand that the above implementation examples are only preferred implementation schemes of the present invention, and the detailed description is only to help readers better understand the spirit of the present invention, but not to limit the scope of protection of the present invention. On the contrary, any improvements or modifications based on the inventive spirit of the present invention should fall within the scope of protection of the present invention.

Claims

1. A multi-phase DC-DC converter, comprising an error amplifier, a control unit, at least two converters and a loop unit, Features: The control unit includes an OPA amplifier, a first field effect transistor and a second field effect transistor; The OPA amplifier non-inverting input terminal receives the error amplified voltage V EA , the negative input terminal receives the reference voltage V ref1 , the output end is respectively connected to the drain and gate of the first field effect transistor and the gate of the second field effect transistor and feeds back the output current I1 to the first field effect transistor; The sources of the first field effect transistor and the second field effect transistor are respectively connected to the power supply voltage, the drain of the second field effect transistor is connected to one of the at least two converters, and provides a mirror input current I2 for one of the at least two converters to control its working state.

2. A multi-phase DC-DC converter according to claim 1, Features: The multi-phase DC-DC converter includes two converters, namely a main converter and an auxiliary converter; and The auxiliary converter controls an operating state based on the mirror input current I2 output by the control unit.

3. A multi-phase DC-DC converter according to claim 2, Features: One of the at least two converters includes a comparator, a logic unit, a PMOS tube, an NMOS tube, a current sensing unit, a direct current source, a ramp current source, a resistor and an inductor; The comparator positive input terminal receives the error amplified voltage V from the error amplifier EA , a negative phase input terminal is connected to the output terminal of the current sensing unit, the output terminal of the DC current source, the output terminal of the ramp current source and one end of the resistor, and is used to simultaneously receive the induced current, the DC current and the ramp current; The input end of the logic unit is connected to the output end of the comparator to receive the output of the comparator and the system clock signal, and the output end is respectively connected to the gates of the PMOS tube and the NMOS tube to provide a conduction voltage for the PMOS tube and the NMOS tube; The input end of the current sensing unit is connected to the source and drain of the PMOS tube respectively, and the output end outputs the sensing current and is connected to one end of the resistor and the negative input end of the comparator; One end of the DC current source and the ramp current source is connected to the power supply voltage, and the other end is connected to one end of the resistor; The other end of the resistor is grounded; One end of the inductor is connected to the drain of the PMOS tube and the drain of the NMOS tube respectively, and the other end serves as the output end of the converter.

4. A multi-phase DC-DC converter according to claim 3, Features: The output terminals of the at least two converters are connected to output the output voltage V of the multi-phase DC-DC converter. out .

5. A multi-phase DC-DC converter according to claim 4, Features: The loop unit includes a capacitor, a first voltage-dividing resistor and a second voltage-dividing resistor; One end of the capacitor is connected to the output end of the converter, and the other end is grounded; One end of the first voltage-dividing resistor is connected to the output end of the converter, and the other end is connected to the second voltage-dividing resistor and the non-inverting input end of the error amplifier; One end of the second voltage-dividing resistor is connected to the first voltage-dividing resistor and the non-inverting input end of the error amplifier, and the other end is grounded.

6. A multi-phase DC-DC converter according to claim 5, Features: The multi-phase DC-DC converter output voltage V out Powering the system load circuit and generating a load current I based on the system load load .

7. A multi-phase DC-DC converter according to claim 6, Features: When the system switches from heavy load to light load, as the load current I load decreases, the mirror input current I2 at the negative input terminal of the comparator in the auxiliary converter increases, and the negative input terminal voltage V SUM2 Increase; When the negative input voltage V SUM2 Increases to a value higher than the error amplifier voltage V EA , the inductor output current I in the auxiliary converter L2 Reduced to 0 amperes to control the auxiliary converter to operate in a closed state.

8. A multi-phase DC-DC converter according to claim 6, Features: When the system changes from light load to heavy load, as the load current I load increases, the mirror input current I2 at the negative input terminal of the comparator in the auxiliary converter decreases, and the negative input terminal voltage V SUM2 reduce; When the negative input voltage V SUM2 The oscillation is reduced to below the error amplifier voltage V EA , the inductor output current I in the auxiliary converter L2 Increases to control the working state of the auxiliary converter to be turned on.

9. A multi-phase DC-DC converter according to any one of claims 7 or 8, Features: The error amplified voltage V EA As the load current I load an increase or decrease in When the error amplifier voltage V EA Greater than the reference voltage V at the negative input terminal of the OPA in the control unit ref1 When the error amplification voltage V EA With the load current I load The first linear relationship is present; When the error amplifier voltage V EA is less than the reference voltage V at the negative input terminal of the OPA in the control unit ref1 When the error amplification voltage V EA With the load current I load A second linear relationship.

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