A well ion implantation method for suppressing WPE

Abstract

The present invention provides a well ion implantation method for suppressing WPE, comprising the following steps: providing a semiconductor substrate; coating a photoresist layer on the semiconductor substrate; photolithographing the photoresist layer to form a mask with an implantation window, and making standing wave ripples formed on the sidewalls of the implantation window by using the standing wave effect during the photolithography process; performing ion implantation through the implantation window to form a well region in the semiconductor substrate. In the present invention, the standing wave effect of the photoresist is utilized during the photolithography process to make standing wave ripples formed on the sidewalls of the implantation window. The sidewalls with standing wave ripples can effectively enhance the random scattering ability of ions, thereby effectively suppressing the well proximity effect, improving the doping uniformity of the well region, and being of great significance to the development of advanced CMOS processes.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit technology, and particularly to a well ion implantation method for suppressing WPE. Background Art

[0002] In the well ion implantation process of semiconductor devices, it is usually necessary to use photoresist as a mask to implant ions into the required regions. During ion implantation, ions will scatter on the photoresist, and the scattered ions at the edge of the photoresist enter the semiconductor surface, which will affect the doping concentration in the edge region. The Well Edge - Proximity Effect (WPE) refers to that when a transistor is located near the edge of the well mask photoresist, due to the scattering of doping ions on the photoresist and entering the edge of the well region, the doping dose in the nearby region increases, resulting in the change of the threshold voltage (Vt) of the transistor and other transistor characteristics with the position and shape of the adjacent well. The closer the device is to the well boundary region, the higher the threshold voltage (Vt) of the device. When the distance from the device channel to the well region edge is less than 3μm, the change of the device threshold voltage (Vt) is more sensitive.

[0003] With the development of integrated circuits, the critical dimensions of semiconductor devices are getting smaller and smaller. After the critical dimensions of semiconductor devices are less than 90nm, the problems caused by the well proximity effect become more and more serious as the critical dimensions of semiconductor devices continue to shrink. Especially for small - size semiconductor devices, the influence of the well proximity effect is getting greater and greater. Therefore, how to effectively suppress the well proximity effect has become an urgent technical problem in this field. Summary of the Invention

[0004] In view of the above - mentioned prior art, the purpose of the present invention is to provide a well ion implantation method for suppressing WPE to solve various problems in the prior art.

[0005] To achieve the above - mentioned purpose and other related purposes, the present invention provides a well ion implantation method for suppressing WPE, including the following steps:

[0006] Provide a semiconductor substrate;

[0007] Coat a photoresist layer on the semiconductor substrate;

[0008] Lithograph the photoresist layer to form a mask with an implantation window, and utilize the standing - wave effect during the lithography process to form standing - wave ripples on the sidewall of the implantation window;

[0009] Perform ion implantation through the implantation window to form a well region in the semiconductor substrate.

[0010] Optionally, before performing the ion implantation, a shallow trench isolation (STI) structure is formed in the semiconductor substrate.

[0011] Optionally, the thickness of the photoresist layer is less than 1 μm.

[0012] Optionally, the thickness of the photoresist layer is 300 - 650 nm.

[0013] Optionally, during the photolithography process, monochromatic light exposure is used.

[0014] Optionally, during the photolithography process, post-baking and / or hard-baking of the photoresist layer is not performed.

[0015] Optionally, before coating the photoresist layer, a sacrificial layer is first formed on the semiconductor substrate, and the photoresist layer is coated on the surface of the sacrificial layer.

[0016] Optionally, before coating the photoresist layer, a bottom anti-reflective coating (BARC) is first formed on the semiconductor substrate; the BARC is etched to form a first window at a position corresponding to the implantation window; then the photoresist layer is coated on the BARC having the first window; the size of the first window is larger than the size of the implantation window, so that the subsequently formed implantation window is nested within the first window.

[0017] Further optionally, the thickness of the BARC is 100 - 250 nm.

[0018] Further optionally, before forming the BARC, a sacrificial layer is formed on the semiconductor substrate; the BARC is formed on the sacrificial layer.

[0019] As described above, the well ion implantation method for suppressing WPE of the present invention has the following beneficial effects:

[0020] The well ion implantation method for suppressing WPE of the present invention utilizes the standing-wave effect of the photoresist (PR) during the photolithography process to form standing-wave ripples on the sidewalls of the implantation window. The sidewalls with standing-wave ripples can effectively enhance the random scattering ability of ions, thereby reducing WPE and improving the doping uniformity. And forming a bottom anti-reflective coating (BARC) in the non-implantation window region can reduce the influence of the standing-wave effect on the photoresist in this region, reduce the defects of the photoresist in the non-implantation window region, and form standing-wave ripples only on the sidewalls of the implantation window. This method can be used to reduce WPE and is of great significance for the development of advanced CMOS processes. Brief Description of the Drawings

[0021] Figure 1 It shows a schematic diagram of a well ion implantation method for suppressing WPE provided by an embodiment of the present invention.

[0022] Figures 2a - 2d It shows a schematic diagram of the preparation process of a well ion implantation method for suppressing WPE provided by Embodiment 1 of the present invention; wherein, Figure 2a It shows a schematic diagram of a provided semiconductor substrate, Figure 2b It shows a schematic diagram of coating a photoresist layer, Figure 2c It shows a schematic diagram of forming a mask, Figure 2d It shows a schematic diagram of performing ion implantation.

[0023] Figure 3 It shows a scanning electron micrograph of a photoresist having standing wave ripples on its sidewalls provided by an embodiment of the present invention.

[0024] Figures 4a - 4b It shows a schematic diagram of the preparation process of a well ion implantation method for suppressing WPE provided by Embodiment 2 of the present invention; wherein, Figure 4a It shows a schematic diagram of forming a sacrificial layer on a semiconductor substrate, Figure 4b It shows a schematic diagram of performing ion implantation.

[0025] Figures 5a - 5d It shows a schematic diagram of the preparation process of a well ion implantation method for suppressing WPE provided by Embodiment 1 of the present invention; wherein, Figure 5a It shows a schematic diagram of forming a bottom anti-reflection layer, Figure 5b It shows a schematic diagram of etching the bottom anti-reflection layer, Figure 5c It shows a schematic diagram of coating the photoresist layer, Figure 5d It shows a schematic diagram of performing ion implantation.

[0026] Description of Component Labels

[0027] 100 Semiconductor substrate

[0028] 101 Shallow trench isolation structure

[0029] 102 Sacrificial layer

[0030] 200 Bottom anti-reflection layer

[0031] 201 First window

[0032] 300 Photoresist layer

[0033] 400 Mask

[0034] 401 Implantation window

[0035] Steps S1 to S4 Detailed implementation manners

[0036] The following uses specific specific examples to illustrate the implementation manners of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that, without conflict, the following embodiments and the features in the embodiments can be combined with each other.

[0037] It should be noted that the diagrams provided in the following embodiments only schematically illustrate the basic concept of the present invention. Therefore, only the components related to the present invention are shown in the diagrams, rather than being drawn according to the number, shape, and size of the components in actual implementation. The type, quantity, and ratio of each component in actual implementation can be arbitrarily changed, and the component layout type may also be more complex.

[0038] In order to suppress the well proximity effect and improve the doping uniformity of the well region, this embodiment will provide a well ion implantation method for suppressing WPE. By using the standing wave effect in the lithography process, standing wave ripples are formed on the sidewalls of the implantation window. The sidewalls with standing wave ripples can effectively enhance the random scattering ability of ions, thereby reducing WPE.

[0039] Please refer to Figure 1 , a well ion implantation method for suppressing WPE provided in this embodiment includes the following steps:

[0040] S1 Provide a semiconductor substrate;

[0041] S2 Coat a photoresist layer on the semiconductor substrate;

[0042] S3 Lithograph the photoresist layer to form a mask with an implantation window, and use the standing wave effect during the lithography process to form standing wave ripples on the sidewalls of the implantation window;

[0043] S4 Perform ion implantation through the implantation window to form a well region in the semiconductor substrate.

[0044] The standing wave effect refers to the phenomenon that when exposing photoresist, light passes through the photoresist and irradiates on the substrate. Due to the refractive index mismatch between the photoresist and the substrate material, light is reflected at the interface between the photoresist and the substrate. These reflected lights interfere with the incident light, resulting in non-uniform distribution of light intensity along the depth direction of the photoresist and forming standing waves. The standing wave distribution of light intensity makes the concentration of photo active compound (PAC) in the photoresist also show a standing wave distribution, thus causing certain undulating ripples on the edge profile of the photoresist after development, that is, streaks are formed on the sidewalls of the photoresist due to overexposure and underexposure. Since the standing wave effect destroys the perpendicularity of the sidewalls of the photoresist pattern and also leads to instability in the measurement of the photoresist line width, it is generally considered that the standing wave effect will reduce the resolution of photoresist imaging. Therefore, various measures are taken during the lithography process to avoid the standing wave effect.

[0045] However, the present invention ingeniously utilizes the standing wave effect and deliberately induces the standing wave effect during the lithography process to form standing wave ripples on the sidewalls of the injection window. The inventors have found through research that when the sidewall roughness increases significantly, the ions implanted on the sidewalls will randomly scatter in multiple angles and directions. The sidewalls with standing wave ripples can effectively enhance the random scattering ability of the ions, greatly reducing the number of ions scattered into the well region, thereby reducing WPE and improving the doping uniformity of the well region. Among them, the standing wave effect can be induced by means such as reducing the thickness of the photoresist layer, using monochromatic light exposure, and not performing post-exposure baking (PEB) and / or hard baking (HB) on the photoresist.

[0046] The following further details the well ion implantation method for suppressing WPE provided by the present invention in combination with specific examples and drawings.

[0047] Example 1

[0048] Please refer to Figures 2a - 2d , the specific steps of the well ion implantation provided in Example 1 are as follows:

[0049] First, as Figure 2a shown, a semiconductor substrate 100 is provided. The semiconductor substrate 100 can be any suitable semiconductor material, for example, a silicon substrate can be used. As an alternative implementation, before ion implantation, a shallow trench isolation structure 101 can be formed in the semiconductor substrate 100 first. The shallow trench isolation structure 101 can be used to separate multiple device regions in the semiconductor substrate 100, and the injection window can be set above the device region to form a well region in the device region.

[0050] Then, as Figure 2bAs shown, a photoresist layer 300 is coated on the semiconductor substrate 100. As an alternative implementation, the photoresist layer 300 can be directly coated on the surface of the semiconductor substrate 100.

[0051] Again, Figure 2c As shown, the photoresist layer 300 is lithographed to form a mask 400 having an implantation window 401, and standing wave ripples are formed on the sidewalls of the implantation window 401 by using the standing wave effect during the lithography process. Specifically, in order to successfully trigger the standing wave effect, the thickness of the photoresist can be controlled within 1 μm, that is, the thickness of the photoresist layer 300 can be less than 1 μm. As a preferred implementation, the thickness of the photoresist layer can be 300 - 650 nm. During the lithography process, monochromatic light can be used for exposure. After development, post-baking and / or hard-baking are not performed on the photoresist layer 300. Figure 3 A scanning electron micrograph of a photoresist having standing wave ripples on the sidewalls due to the standing wave effect is shown. The specific contour dimensions of the standing wave ripples formed on the sidewalls of the photoresist will vary depending on the specific process parameters during the lithography process. For example, factors such as the wavelength of the exposure light, the exposure dose, and the thickness of the photoresist will all affect the formed standing wave. It should be noted that the present invention does not have particularly strict limitations on the specific contour dimensions of the formed standing wave ripples, as long as standing wave ripples can be formed on the sidewalls of the implantation window 401 to enhance the random scattering ability of the implanted ions.

[0052] Finally, as Figure 2d shown, ion implantation is performed through the implantation window 401 to form a well region in the semiconductor substrate 100. Since standing wave ripples are formed on the sidewalls of the implantation window 401, during ion implantation, the ions implanted on the sidewalls are scattered at multiple angles and in multiple directions, reducing the number of these ions falling into the well region, thereby reducing the WPE.

[0053] Embodiment 2

[0054] Please refer to Figures 4a - 4b , Embodiment 2 adopts substantially the same implementation steps as Embodiment 1, the difference being that: before coating the photoresist layer 300, as Figure 4a shown, a sacrificial layer 101 is first formed on the semiconductor substrate 100, and the photoresist layer 300 is coated on the surface of the sacrificial layer 102. Then the photoresist layer 300 is lithographed to form an implantation window 401 having standing wave ripples on the sidewalls. During ion implantation, as Figure 4b shown, this additional sacrificial layer 102 can protect the semiconductor substrate 100 from being damaged by the bombardment of high-energy ions.

[0055] Specifically, a thermal oxidation method can be used to form an oxide layer on the surface of the semiconductor substrate 100 as the sacrificial layer 102.

[0056] Example 3

[0057] Please refer to Figures 5a - 5d , Example 3 and Example 1 adopt basically the same implementation steps, the difference is that: before coating the photoresist layer 300, as Figure 5a shown, first form a bottom anti-reflection layer 200 on the semiconductor substrate 100; then as Figure 5b shown, etch the bottom anti-reflection layer 200 to form a first window 201 at the position corresponding to the implantation window 401; then as Figure 5c shown, coat the photoresist layer 300 on the bottom anti-reflection layer 200 having the first window 201, wherein the photoresist will fill into the first window 201; then photolithograph the photoresist layer 300 to form an implantation window 401 with standing wave ripples on the sidewalls, and finally as Figure 5d shown, perform ion implantation. Wherein, the size of the first window 201 is larger than the size of the implantation window 401, so that the subsequently formed implantation window 401 is nested within the first window 201.

[0058] In order to suppress WPE, it is only necessary to form standing waves on the sidewalls on both sides of the implantation window, and the remaining positions can avoid the photoresist defect problem caused by the standing wave effect through the lower BARC layer. During specific implementation, the etching width of the BARC should be greater than the width required for well region implantation, so as to leave a distance for the standing wave edge of the PR. Then the window width for PR lithography and development is the width required for the actual device. At this time, the extra distance of the PR compared to the BARC will form the sidewall of the standing wave due to the lack of BARC protection during lithography. Forming a bottom anti-reflection layer in the non-implantation window area can reduce the influence of the standing wave effect on the photoresist in this area, reduce the defects of the photoresist in the non-implantation window area, and only form standing wave ripples on the sidewalls of the implantation window.

[0059] Specifically, the thickness of the bottom anti-reflection layer can be 100 - 250 nm.

[0060] In addition, as an optional implementation manner, before forming the bottom anti-reflection layer 200, a sacrificial layer 102 is first formed on the semiconductor substrate 100; the bottom anti-reflection layer 200 is formed on the sacrificial layer 102, so as to protect the semiconductor substrate 100 during ion implantation.

[0061] In summary, for the well ion implantation method for suppressing WPE of the present invention, the standing wave effect of the photoresist is utilized during the lithography process to form standing wave ripples on the sidewalls of the implantation window. The sidewalls with standing wave ripples can effectively enhance the random scattering ability of ions, thereby reducing WPE and further improving the doping uniformity. Forming a bottom anti-reflection layer in the non-implantation window area can reduce the influence of the standing wave effect on the photoresist in this area, reduce the defects of the photoresist in the non-implantation window area, and form standing wave ripples only on the sidewalls of the implantation window. This method can be used to reduce WPE and is of great significance for the development of advanced CMOS processes.

[0062] Therefore, the present invention effectively overcomes various disadvantages in the prior art and has high industrial utilization value.

[0063] The above embodiments merely illustrate the principles and effects of the present invention and are not intended to limit the present invention. Any person familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes completed by those with ordinary knowledge in the technical field without departing from the spirit and technical idea disclosed by the present invention should still be covered by the claims of the present invention.

Claims

1. A well ion implantation method for suppressing WPE, characterized in that, The method includes the following steps: Provide a semiconductor substrate; Coat a photoresist layer on the semiconductor substrate; Lithograph the photoresist layer to form a mask with an implantation window, and utilize the standing wave effect during the lithography process to form standing wave ripples on the sidewalls of the implantation window, so as to effectively enhance the random scattering ability of ions, thereby suppressing the well proximity effect; Perform ion implantation through the implantation window to form a well region in the semiconductor substrate.

2. The well ion implantation method for suppressing WPE according to claim 1, characterized in that: Before performing the ion implantation, a shallow trench isolation structure is formed in the semiconductor substrate.

3. The well ion implantation method for suppressing WPE according to claim 1, wherein: The thickness of the photoresist layer is less than 1 μm.

4. The well ion implantation method for suppressing WPE according to claim 1, characterized in that: The thickness of the photoresist layer is 300 - 650 nm.

5. The well ion implantation method for suppressing WPE according to claim 1, wherein: During the lithography process, monochromatic light exposure is adopted.

6. The well ion implantation method for suppressing WPE according to claim 1, wherein: During the lithography process, post-baking and / or hard-baking of the photoresist layer are not performed.

7. The well ion implantation method for suppressing WPE according to claim 1, characterized in that: Before coating the photoresist layer, a sacrificial layer is first formed on the semiconductor substrate, and the photoresist layer is coated on the surface of the sacrificial layer.

8. The well ion implantation method for suppressing WPE according to claim 1, characterized in that: Before coating the photoresist layer, a bottom anti-reflection layer is first formed on the semiconductor substrate; the bottom anti-reflection layer is etched to form a first window at a position corresponding to the implantation window; then the photoresist layer is coated on the bottom anti-reflection layer having the first window; the size of the first window is larger than the size of the implantation window, so that the subsequently formed implantation window is nested within the first window.

9. The well ion implantation method for suppressing WPE according to claim 8, wherein: The thickness of the bottom anti-reflection layer is 100 - 250 nm.

10. The well ion implantation method for suppressing WPE according to claim 8, wherein: Before forming the bottom anti-reflection layer, a sacrificial layer is formed on the semiconductor substrate; the bottom anti-reflection layer is formed on the sacrificial layer.

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