An epitaxial structure of a semiconductor device and a method for manufacturing the same, and a semiconductor device

Abstract

The application discloses an epitaxial structure of a semiconductor device, a preparation method of the epitaxial structure and the semiconductor device. The epitaxial structure comprises a substrate and a semiconductor layer on one side of the substrate. The semiconductor layer comprises at least a buffer layer and a barrier layer which are stacked on the one side of the substrate. The band gap of the barrier layer is larger than that of the buffer layer. Ions are implanted in at least the buffer layer and the barrier layer. The implantation concentration of the ions in the barrier layer is smaller than that in the buffer layer. The semiconductor device using the epitaxial structure can reduce the leakage current and ensure the electron mobility.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to an epitaxial structure of a semiconductor device and its fabrication method, and a semiconductor device. Background Technology

[0002] Gallium nitride (GaN) semiconductor material has become a research hotspot in the semiconductor field due to its large bandgap, high electron saturation drift velocity, high breakdown field strength, and good thermal conductivity. For example, it is used to fabricate GaN high electron mobility transistor (GaN HEMT) devices.

[0003] Because gallium nitride crystals typically contain N-type impurities, the buffer layer has low resistivity, making it difficult to effectively control leakage current in semiconductor devices. To address this issue, existing technologies primarily employ two methods: one is to neutralize the N-type impurities by doping them during epitaxial growth, but this method suffers from drain hysteresis, leading to degraded device performance. The second method involves ion implantation into the buffer layer to create a high-resistivity region. This method can alleviate the drain hysteresis effect, but insufficient ion concentration leads to decreased resistivity, while high ion concentration reduces electron mobility in the two-dimensional electron gas, thus affecting device performance.

[0004] Therefore, how to achieve low leakage current in semiconductor devices while avoiding a decrease in electron mobility is an urgent problem to be solved. Summary of the Invention

[0005] This invention provides an epitaxial structure for a semiconductor device and a method for fabricating the same, as well as the semiconductor device itself. The semiconductor device using this epitaxial structure can reduce leakage current while maintaining electron mobility.

[0006] In a first aspect, embodiments of the present invention provide an epitaxial structure for a semiconductor device, comprising:

[0007] Substrate;

[0008] A semiconductor layer located on one side of a substrate; the semiconductor layer includes at least a buffer layer and a barrier layer stacked on one side of the substrate; the band gap of the barrier layer is greater than the band gap of the buffer layer, and ions are implanted in at least the buffer layer and the barrier layer, wherein the implantation concentration of ions in the barrier layer is less than the implantation concentration of ions in the buffer layer.

[0009] Optionally, the ion implantation concentration C1 in the buffer layer satisfies 1×10⁻⁶. 17 cm -3 ≤C1≤5×10 18 cm -3 The resistivity ρ1 of the buffer layer satisfies 10. 5 Ω·cm≤ρ1≤10 10Ω·cm.

[0010] Optionally, the ion implantation concentration C2 in the barrier layer satisfies 1×10 15 cm -3 ≤C2≤5×10 16 cm -3 The resistivity ρ2 of the barrier layer satisfies 10 5 Ω·cm≤ρ2≤10 10 Ω·cm.

[0011] Optionally, the semiconductor layer may further include a nucleation layer located between the substrate and the buffer layer;

[0012] Ions are implanted into the nucleation layer; the implantation concentration C3 of the ions in the nucleation layer satisfies 1×10⁻⁶. 17 cm -3 ≤C3≤5×10 18 cm -3 The resistivity ρ3 of the nucleation layer satisfies 10 5 Ω·cm≤ρ1≤10 10 Ω·cm.

[0013] Optionally, the ions include at least one selected from boron ions, arsenic ions, helium ions, beryllium ions, magnesium ions, argon ions, aluminum ions, phosphorus ions, nitrogen ions, oxygen ions, carbon ions, and iron ions.

[0014] Secondly, embodiments of the present invention also provide a method for fabricating an epitaxial structure of a semiconductor device, used to fabricate the epitaxial structure provided in the preceding aspect, the fabrication method comprising:

[0015] Provide substrate;

[0016] A semiconductor layer is prepared on one side of a substrate; the semiconductor layer includes at least a buffer layer and a barrier layer stacked on one side of the substrate; the band gap of the barrier layer is greater than the band gap of the buffer layer, and ions are implanted in at least the buffer layer and the barrier layer, with the concentration of ions in the barrier layer being less than the concentration of ions in the buffer layer.

[0017] Optionally, a semiconductor layer is fabricated on one side of the substrate, including:

[0018] A buffer layer and a barrier layer are sequentially fabricated on one side of the substrate;

[0019] Ions are injected into the barrier layer and buffer layer on the side of the barrier layer away from the substrate.

[0020] Optionally, a semiconductor layer is fabricated on one side of the substrate, including:

[0021] A buffer layer is prepared on one side of the substrate, and ions are implanted into the buffer layer;

[0022] A barrier layer is prepared on the side of the buffer layer away from the substrate, and ions are implanted into the barrier layer.

[0023] Optionally, the semiconductor layer may also include a nucleation layer;

[0024] Fabricating a semiconductor layer on one side of the substrate includes:

[0025] A core layer, a buffer layer, and a barrier layer are sequentially fabricated on one side of the substrate.

[0026] Ions are implanted into the barrier layer, buffer layer, and nucleation layer on the side of the barrier layer away from the substrate.

[0027] Thirdly, embodiments of the present invention also provide a semiconductor device, including the epitaxial structure provided in the first aspect;

[0028] The semiconductor device also includes a heterojunction structure located on the side of the barrier layer away from the substrate, and a gate, source, and drain located on the side of the heterojunction structure away from the substrate, with the gate located between the source and drain.

[0029] The epitaxial structure of the semiconductor device provided in this embodiment of the invention has a barrier layer with a larger bandgap than the buffer layer. Therefore, the barrier layer can have a resistivity comparable to that of the buffer layer even when the ion implantation concentration is low. Thus, when this epitaxial structure is applied to the semiconductor device, the resistivity of the semiconductor device can be increased because both the barrier layer and the buffer layer have high resistivity. At the same time, when this epitaxial structure is applied to the semiconductor device, the barrier layer can be used to isolate the two-dimensional electron gas from the buffer layer. Since the ion concentration in the barrier layer is low, the electron mobility can be guaranteed, thereby enabling the semiconductor device to have both low leakage current and high electron mobility. Attached Figure Description

[0030] Figure 1 This is a schematic diagram of the epitaxial structure of a semiconductor device provided in an embodiment of the present invention;

[0031] Figure 2 This is a schematic diagram of the epitaxial structure of another semiconductor device provided in an embodiment of the present invention;

[0032] Figure 3 This is a schematic diagram of the structure of a semiconductor device provided in an embodiment of the present invention;

[0033] Figure 4 This is a schematic flowchart of a method for fabricating an epitaxial structure of a semiconductor device according to an embodiment of the present invention;

[0034] Figure 5 This is a schematic flowchart of another method for fabricating the epitaxial structure of a semiconductor device provided in an embodiment of the present invention;

[0035] Figure 6 This is a schematic flowchart of another method for fabricating the epitaxial structure of a semiconductor device provided in an embodiment of the present invention;

[0036] Figure 7 This is a schematic flowchart of another method for fabricating the epitaxial structure of a semiconductor device provided in an embodiment of the present invention. Detailed Implementation

[0037] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, and not all of the structures.

[0038] Figure 1 This is a schematic diagram of the epitaxial structure of a semiconductor device provided in an embodiment of the present invention. See also... Figure 1 The epitaxial structure 10 of the semiconductor device includes a substrate 1 and a semiconductor layer 2 located on one side of the substrate 1. The semiconductor layer 2 includes at least a buffer layer 22 and a barrier layer 23 stacked on one side of the substrate 1; the band gap of the barrier layer 23 is greater than the band gap of the buffer layer 22, and ions are implanted in at least the buffer layer 22 and the barrier layer 23, wherein the ion implantation concentration in the barrier layer 23 is less than the ion implantation concentration in the buffer layer 22.

[0039] The epitaxial structure 10 provided in this embodiment of the invention is used to fabricate semiconductor devices. Specifically, a heterojunction structure is formed on this epitaxial structure 10 through secondary growth, and a gate, source, and drain are formed on the side of the heterojunction structure away from the substrate to complete the fabrication of the semiconductor device. For example, Figure 3 This is a schematic diagram of the structure of a semiconductor device provided in an embodiment of the present invention. See also... Figure 3 The heterojunction structure 24 typically includes a channel layer 241 and a barrier layer 242. The barrier layer 242 is located on the side of the channel layer 241 away from the substrate 1. A two-dimensional electron gas 2DEG is formed on the side of the channel layer 241 close to the barrier layer 242, and the channel layer 241 provides a channel for the movement of the two-dimensional electron gas 2DEG. The buffer layer 22 serves to isolate the barrier layer 242 and the substrate 1, while also improving the crystal quality. The buffer layer 22 is typically thick and has low resistivity, making it prone to leakage.

[0040] As described above, to address the leakage current issue in semiconductor devices caused by the low resistivity of the buffer layer 22, ions can be implanted into the buffer layer 22 to increase its resistivity and reduce leakage current. Furthermore, leakage current is also typically present in the channel layer 241. Since ions cannot be implanted into the channel layer 241, its thickness is usually reduced to decrease leakage current. This results in the buffer layer 22 being closer to the two-dimensional electron gas. Implanting a high concentration of ions into the buffer layer 22 would reduce electron mobility in the two-dimensional electron gas, affecting the performance of the semiconductor device.

[0041] In order to reduce leakage current in semiconductor devices while ensuring electron mobility in two-dimensional electron gas, the epitaxial structure 10 provided in this embodiment of the invention adds a barrier layer 23 with a larger bandgap on the buffer layer 22. For example, the thickness of the barrier layer can be 10nm to 50nm.

[0042] Specifically, because the barrier layer 23 has a larger bandgap, it requires only a lower concentration (dose) of ions to achieve sufficiently high resistivity during ion implantation compared to the buffer layer 22. Thus, when this epitaxial structure is applied to a semiconductor device, the high resistivity of both the barrier layer 23 and the buffer layer 22 reduces leakage current. Furthermore, the barrier layer 23 isolates the two-dimensional electron gas from the buffer layer 22, and the lower ion concentration in the barrier layer 23 ensures electron mobility within the two-dimensional electron gas.

[0043] Furthermore, since the ions injected into the buffer layer 22 are usually in a free state, by setting the barrier layer 23 to isolate the two-dimensional electron gas from the buffer layer 22, it is also possible to prevent the ions in the buffer layer 22 from entering the channel layer 241.

[0044] Furthermore, in this embodiment, since the ion concentration in the barrier layer 23 is low, it has little effect on the mobility of the two-dimensional electron gas. Therefore, when using the epitaxial structure provided in this embodiment to fabricate a semiconductor device, the thickness of the channel layer 241 can be further reduced to reduce the leakage current of the channel layer 241.

[0045] Optionally, the substrate 1 may be made of one or more of gallium nitride, aluminum gallium nitride, indium gallium nitride, aluminum indium gallium nitride, indium phosphide, gallium arsenide, silicon carbide, diamond, sapphire, germanium, silicon, or any other material capable of growing group III nitrides.

[0046] The epitaxial structure of the semiconductor device provided in this embodiment of the invention has a barrier layer with a larger bandgap than the buffer layer. Therefore, the barrier layer can have a resistivity comparable to that of the buffer layer even when the ion implantation concentration is low. Thus, when this epitaxial structure is applied to the semiconductor device, the resistivity of the semiconductor device can be increased because both the barrier layer and the buffer layer have high resistivity. At the same time, when this epitaxial structure is applied to the semiconductor device, the barrier layer can be used to isolate the two-dimensional electron gas from the buffer layer. Since the ion concentration in the barrier layer is low, the electron mobility can be guaranteed, thereby enabling the semiconductor device to have both high and low leakage current and high electron mobility.

[0047] Based on the above embodiments, the structure of the epitaxial structure of the semiconductor device will be described in further detail below.

[0048] Optionally, the material of the buffer layer 22 includes Al. x Ga (1-x) N or In x Ga (1-x) N, where 0 ≤ x ≤ 0.5; the ion implantation concentration C1 in buffer layer 22 satisfies 1 × 10 17 cm -3 ≤C1≤5×10 18 cm -3 The resistivity ρ1 of buffer layer 22 satisfies 10. 5 Ω·cm≤ρ1≤10 10 Ω·cm.

[0049] Depending on the value of x, the buffer layer 22 may be GaN, AlGaN, or InGaN. The resistivity of the buffer layer 22 is typically low; therefore, a higher ion implantation concentration is required to improve its resistivity.

[0050] Further optionally, the material of the barrier layer 23 includes Al. x Ga (1-x) N, where 0.8 ≤ x ≤ 1; the ion implantation concentration C2 in the barrier layer 23 satisfies 1 × 10 15 cm -3 ≤C2≤5×10 16 cm -3 The resistivity ρ2 of the barrier layer 23 satisfies 10. 5 Ω·cm≤ρ2≤10 10 Ω·cm.

[0051] In this embodiment, by setting the Al content in the barrier layer 23 to be higher than that in the buffer layer 22, the band gap of the barrier layer 23 is made larger than that of the buffer layer 22. This allows the buffer layer 22 to obtain the above-mentioned sufficiently high resistivity with only the aforementioned lower concentration of ion implantation. Thus, when this epitaxial structure is applied to a semiconductor device, the leakage current of the semiconductor device can be reduced while ensuring electron mobility.

[0052] Figure 2 This is a schematic diagram of the epitaxial structure of another semiconductor device provided in an embodiment of the present invention. See also... Figure 2 Optionally, the semiconductor layer 2 further includes a nucleation layer 21, which is located between the substrate 1 and the buffer layer 22; ions are implanted into the nucleation layer 21; the material of the nucleation layer 21 includes Al. x Ga (1-x) N, where 0.5 ≤ x ≤ 1; the ion implantation concentration C3 in nucleation layer 21 satisfies 1 × 10 17 cm -3 ≤C3≤5×10 18 cm -3 The resistivity ρ3 of nucleation layer 21 satisfies 10 5 Ω·cm≤ρ1≤10 10 Ω·cm. By setting the nucleation layer 21, the lattice of the substrate 1 and the buffer layer 22 can be matched, improving the crystal quality, surface morphology and electrical properties of the heterojunction structure 24 above.

[0053] It should be noted that the leakage current of the nucleation layer 21 is typically small; therefore, in other embodiments, ion implantation into the nucleation layer 21 may not be necessary. In this embodiment, by implanting ions into the nucleation layer 21, the leakage current of the semiconductor device can be further reduced. Furthermore, ions can also be implanted into the substrate 1; this embodiment of the invention does not limit this, and those skilled in the art can make their own decisions based on their needs.

[0054] Optionally, the ions include at least one selected from boron ions, arsenic ions, helium ions, beryllium ions, magnesium ions, argon ions, aluminum ions, phosphorus ions, nitrogen ions, oxygen ions, carbon ions, and iron ions.

[0055] By injecting at least one of the above examples into the barrier layer 23, the buffer layer 22 (and the nucleation layer 21 and the substrate 1), the resistivity of the corresponding film layer can be increased, thereby reducing the leakage current of the semiconductor device.

[0056] Alternatively, the types of ions implanted in the barrier layer 23 and the buffer layer 22 are the same. This setting can reduce the difficulty of preparation and improve production efficiency.

[0057] Based on the same inventive concept, this invention also provides a semiconductor device, see [link to relevant documentation]. Figure 3 The semiconductor device 100 includes the epitaxial structure 10 provided in any of the above embodiments, and also includes a heterojunction structure 24 located on the side of the barrier layer 23 away from the substrate 1, and a gate 4, a source 3 and a drain 5 located on the side of the heterojunction structure 24 away from the substrate 1, with the gate 4 located between the source 3 and the drain 5.

[0058] Optionally, the source 3 and drain 5 form an ohmic contact with the heterojunction structure 24, and the gate 4 forms a Schottky contact with the heterojunction structure 24. Optionally, the source 3 and drain 5 can be made of one or more metals such as Ni, Ti, Al, and Au, and the gate 4 can be made of one or more metals such as Ni, Pt, Pb, and Au.

[0059] It should be understood that the embodiments of the present invention improve the reliability of semiconductor devices from the perspective of semiconductor device epitaxial structure design. The semiconductor devices include, but are not limited to: high-power gallium nitride high electron mobility transistors (HEMTs) operating under high voltage and high current conditions; silicon-on-insulator (SOI) transistors; gallium arsenide (GaAs)-based transistors; and metal-oxide-semiconductor field-effect transistors (MOSFETs), metal-insulator-semiconductor field-effect transistors (MISFETs), double heterojunction field-effect transistors (DHFETs), junction field-effect transistors (JFETs), metal-semiconductor field-effect transistors (MESFETs), and metal-insulator-semiconductor heterojunction field-effect transistors (MESFETs). Transistor (MISHFET) or other field-effect transistors.

[0060] Based on the same inventive concept, this invention also provides a method for preparing an epitaxial structure of a semiconductor device, used to prepare the epitaxial structure provided in any of the above embodiments. For parameters such as the material and ion implantation concentration of each film layer in the epitaxial structure, please refer to the above description, and will not be repeated here.

[0061] For example, Figure 4 This is a schematic flowchart illustrating a method for fabricating an epitaxial structure of a semiconductor device according to an embodiment of the present invention. (See attached diagram.) Figure 4 The preparation method includes the following steps:

[0062] S101, Provide substrate.

[0063] S102. A semiconductor layer is prepared on one side of the substrate; the semiconductor layer includes at least a buffer layer and a barrier layer stacked on one side of the substrate; the band gap of the barrier layer is greater than the band gap of the buffer layer, and ions are implanted in at least the buffer layer and the barrier layer, and the concentration of ions in the barrier layer is less than the concentration of ions in the buffer layer.

[0064] For example, ions in the buffer layer and the barrier layer can be implanted simultaneously or not simultaneously. Specifically, ion implantation can be performed after the buffer layer and the barrier layer are prepared; alternatively, ion implantation can be performed after the buffer layer is prepared, followed by ion implantation after the barrier layer is prepared. This embodiment of the invention does not limit the specific method used.

[0065] The fabrication method provided in this invention adds a barrier layer with a larger bandgap to the buffer layer. During ion implantation, a lower concentration of ions is implanted into the barrier layer, which can make the barrier layer have a high resistivity comparable to that of the buffer layer. Thus, when this epitaxial structure is applied to a semiconductor device, the resistivity of the semiconductor device can be increased because both the barrier layer and the buffer layer have high resistivity. At the same time, when this epitaxial structure is applied to a semiconductor device, the barrier layer can be used to isolate the two-dimensional electron gas from the buffer layer. Since the ion concentration in the barrier layer is low, electron mobility can be guaranteed.

[0066] Based on this, the following section provides further illustrative examples of methods for fabricating epitaxial structures of semiconductor devices using ion implantation.

[0067] Figure 5 This is a schematic flowchart of another method for fabricating the epitaxial structure of a semiconductor device provided in an embodiment of the present invention. See also... Figure 5 The preparation method includes the following steps:

[0068] S201, Provide substrate;

[0069] S202. A buffer layer and a barrier layer are sequentially prepared on one side of the substrate.

[0070] S203. Ions are implanted into the barrier layer and buffer layer on the side of the barrier layer away from the substrate.

[0071] The preparation method provided in this embodiment can complete the ion implantation of the barrier layer and the buffer layer in the same process, and the preparation method is simple and efficient.

[0072] Figure 6 This is a schematic flowchart of another method for fabricating the epitaxial structure of a semiconductor device provided in an embodiment of the present invention. See also... Figure 6 The preparation method includes the following steps:

[0073] S301, Provide substrate;

[0074] S302. Prepare a buffer layer on one side of the substrate and implant ions into the buffer layer;

[0075] S303. Prepare a barrier layer on the side of the buffer layer away from the substrate, and implant ions into the barrier layer.

[0076] The preparation method provided in this embodiment of the invention involves ion implantation after the buffer layer (barrier layer) is prepared. This facilitates the control of the concentration and type of implanted ions in each membrane layer, resulting in different ion concentrations and types in each membrane layer.

[0077] It should be noted that, although Figure 5 The preparation method shown completes ion implantation of the barrier layer and buffer layer in the same process. However, it is still possible to achieve different concentrations and types of ions implanted in each film layer, only relatively... Figure 6 The preparation method shown is quite difficult to implement.

[0078] Optionally, the semiconductor layer may further include a nucleation layer, in which ions are implanted. In this case, the following can be used: Figure 7 The epitaxial structure was obtained using the method shown. See also Figure 7 The preparation method includes the following steps:

[0079] S401, Provide substrate;

[0080] S402. A core layer, a buffer layer, and a barrier layer are sequentially fabricated on one side of the substrate.

[0081] S403. Ions are implanted into the barrier layer, buffer layer and nucleation layer on the side of the barrier layer away from the substrate.

[0082] This embodiment illustrates the process of ion implantation of the barrier layer, buffer layer, and nucleation layer within the same process. Other embodiments may also refer to this example. Figure 6 The preparation method shown sequentially completes the ion implantation of the nucleation layer, buffer layer, and barrier layer, but the embodiments of the present invention are not limited in this respect.

[0083] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. An epitaxial structure for a semiconductor device, characterized in that, include: Substrate; A semiconductor layer located on one side of the substrate; the semiconductor layer includes at least a buffer layer and a barrier layer stacked on one side of the substrate; the band gap of the barrier layer is greater than the band gap of the buffer layer, and ions are implanted in at least the buffer layer and the barrier layer, wherein the implantation concentration of the ions in the barrier layer is less than the implantation concentration of the ions in the buffer layer; The thickness of the barrier layer is 10nm to 50nm.

2. The epitaxial structure according to claim 1, characterized in that, The implantation concentration C1 of the ions in the buffer layer satisfies 1×10⁻⁶. 17 cm -3 ≤C1≤5×10 18 cm -3 The resistivity ρ1 of the buffer layer satisfies 10. 5 Ω·cm≤ρ1≤10 10 Ω·cm.

3. The epitaxial structure according to claim 2, characterized in that, The implantation concentration C2 of the ions in the barrier layer satisfies 1×10⁻⁶. 15 cm -3 ≤C2≤5×10 16 cm -3 The resistivity ρ2 of the barrier layer satisfies 10. 5 Ω·cm≤ρ2≤10 10 Ω·cm.

4. The epitaxial structure according to claim 1, characterized in that, The semiconductor layer further includes a nucleation layer, which is located between the substrate and the buffer layer; The nucleation layer is implanted with the ions; the implantation concentration C3 of the ions in the nucleation layer satisfies 1×10⁻⁶. 17 cm -3 ≤C3≤5×10 18 cm -3 The resistivity ρ3 of the nucleation layer satisfies 10. 5 Ω·cm≤ρ1≤10 10 Ω·cm.

5. The epitaxial structure according to claim 1, characterized in that, The ions include at least one selected from boron ions, arsenic ions, helium ions, beryllium ions, magnesium ions, argon ions, aluminum ions, phosphorus ions, nitrogen ions, oxygen ions, carbon ions, and iron ions.

6. A method for fabricating an epitaxial structure of a semiconductor device, used to fabricate the epitaxial structure according to any one of claims 1-5, characterized in that, include: Provide substrate; A semiconductor layer is prepared on one side of the substrate; the semiconductor layer includes at least a buffer layer and a barrier layer stacked on one side of the substrate; the band gap of the barrier layer is greater than the band gap of the buffer layer, and ions are implanted in at least the buffer layer and the barrier layer, wherein the concentration of the ions in the barrier layer is less than the concentration of the ions in the buffer layer.

7. The preparation method according to claim 6, characterized in that, A semiconductor layer is fabricated on one side of the substrate, including: The buffer layer and the barrier layer are sequentially fabricated on one side of the substrate; The ions are injected into the barrier layer and the buffer layer on the side of the barrier layer away from the substrate.

8. The preparation method according to claim 6, characterized in that, A semiconductor layer is fabricated on one side of the substrate, including: The buffer layer is prepared on one side of the substrate, and the ions are implanted into the buffer layer; The barrier layer is prepared on the side of the buffer layer away from the substrate, and the ions are implanted into the barrier layer.

9. The preparation method according to claim 6, characterized in that, The semiconductor layer further includes a nucleation layer; A semiconductor layer is fabricated on one side of the substrate, including: The nucleation layer, the buffer layer, and the barrier layer are sequentially formed on one side of the substrate; The ions are implanted into the barrier layer, the buffer layer, and the nucleation layer on the side of the barrier layer away from the substrate.

10. A semiconductor device, characterized in that, Includes the epitaxial structure as described in any one of claims 1-5; The semiconductor device further includes a heterojunction structure located on the side of the barrier layer away from the substrate, and a gate, a source, and a drain located on the side of the heterojunction structure away from the substrate, wherein the gate is located between the source and the drain.

Images