MEMS system and signal processing circuit

Abstract

The present invention provides a MEMS system and a signal processing circuit. A differential capacitive MEMS sensing module outputs N first voltage signals representing sound signals according to a first common mode voltage, capacitance changes generated by N differential capacitors, and N bias voltages. N signal processing modules are respectively connected to N output ends of the differential capacitive MEMS sensing module, access the N first voltage signals and perform signal processing. The output end of the i-th signal processing module is connected to the i+1-th differential capacitor, which is equivalent to superimposing the output signal of each signal processing module on the input end of the next differential capacitor to achieve signal superposition. The amplitude of the second voltage signal output by the last signal processing module is enhanced by a multi-stage cascade method without introducing other noises. Therefore, the signal-to-noise ratio of the MEMS system can be improved, thereby improving the performance of the MEMS system.

Description

Technical Field

[0001] The present invention relates to the technical field of micro-microphones, and in particular to a MEMS system and a signal processing circuit. Background Art

[0002] Capacitive MEMS microphones are MEMS (Micro-Electro-Mechanical System) devices manufactured using micromachining technology. Due to their small size, high sensitivity, and good compatibility with existing semiconductor technology, capacitive MEMS microphones are increasingly used in mobile terminals such as mobile phones.

[0003] The structure of a capacitive MEMS microphone includes a vibration membrane, a back plate electrode and a supporting wall. The supporting wall encloses a cavity. The back plate electrode is located on the supporting wall and covers the cavity. The vibration membrane is suspended in the cavity and the edge extends into the supporting wall for fixation. When the vibration membrane senses an external excitation signal, the distance between the vibration membrane and the back plate electrode changes, changing the capacitance. The capacitance change is then converted into a voltage signal change through an integrated circuit chip and output.

[0004] However, the performance of traditional capacitive MEMS microphones with a single-layer diaphragm and a single-layer backplate is limited, and it is difficult to meet the increasingly high signal-to-noise ratio (SNR) requirements. In order to produce MEMS microphones with higher signal-to-noise ratios, newer designs are required. Summary of the invention

[0005] The object of the present invention is to provide a MEMS system and a signal processing circuit to improve the signal-to-noise ratio of the existing capacitive MEMS sensor.

[0006] In order to achieve the above object, the present invention provides a MEMS system, comprising:

[0007] A bias voltage generating module, used for generating N bias voltages, where N is greater than or equal to 2;

[0008] A differential capacitive MEMS sensing module includes N MEMS units, each of which includes a differential capacitor. Under the stimulation of an external sound signal, the N differential capacitors generate capacitance changes, the N differential capacitors are respectively connected to N bias voltages, and the first differential capacitor is also connected to a first common mode voltage. The differential capacitive MEMS sensing module outputs N first voltage signals representing the sound signal according to the first common mode voltage, the capacitance changes generated by the N differential capacitors, and the N bias voltages, and the N first voltage signals are output through N output terminals; and,

[0009] N signal processing modules are respectively connected to the N output ends of the differential capacitive MEMS sensor module, receive the N first voltage signals and perform signal processing, the output end of the i-th signal processing module is connected to the i+1-th differential capacitor, and the N-th signal processing module outputs a second voltage signal representing the sound signal, 1≤i≤N-1.

[0010] Optionally, the N output terminals of the differential capacitive MEMS sensor module are all in a high-impedance state.

[0011] Optionally, a first output terminal of the bias voltage generating module is in a DC high impedance state, and the remaining output terminals of the bias voltage generating module are in a high impedance state.

[0012] Optionally, the bias voltage generating module includes:

[0013] a charge pump unit for outputting N basic bias voltages; and,

[0014] N first high-resistance units are respectively connected to the charge pump units, connected to the N basic bias voltages, and convert the N basic bias voltages into N bias voltages.

[0015] Optionally, the signal processing module includes:

[0016] a buffer unit, connected to the corresponding output terminal of the differential capacitive MEMS sensor module, receiving the corresponding first voltage signal and performing impedance conversion on the first voltage signal to obtain a buffer signal; and

[0017] The second high-resistance unit has one end connected to a node between the corresponding output end of the differential capacitive MEMS sensor module and the buffer unit, and the other end connected to a second common mode voltage.

[0018] Optionally, each of the signal processing modules or the Nth signal processing module further includes:

[0019] The gain adjustment unit is connected to the buffer unit, receives the buffer signal and performs gain amplification on the buffer signal.

[0020] Optionally, the gain adjustment unit of the Nth signal processing module is a gain adjustment unit with single-ended input and single-ended / double-ended output.

[0021] Optionally, at least part of the signal processing module further includes:

[0022] An adjusting capacitor, one end of which is connected to the input end of the buffer unit, and the other end of which is connected to the third common mode voltage. Optionally, the method further includes:

[0023] The digital control module is used to output a digital control signal driven by a clock signal and an external first enable signal, wherein the digital control signal is used to realize digital control of the entire MEMS system.

[0024] Optionally, a digital processing module is further included, and the digital processing module includes:

[0025] an analog digital sampling unit, connected to the Nth signal processing module, for sampling the second voltage signal to obtain a digital sampling signal; and

[0026] The digital logic unit is connected to the analog digital sampling unit and is used to perform format conversion on the digital sampling signal to obtain a digital voltage signal.

[0027] Optionally, the digital logic unit further outputs a digital control signal under the drive of an external clock signal and an external second enable signal, and the digital control signal is used to implement digital control of the entire MEMS system.

[0028] Optionally, also include:

[0029] The LDO module is used to receive an external power supply voltage and generate a constant power supply voltage according to the external power supply voltage to supply power to the signal processing module.

[0030] Optionally, the bias voltage generating module and the signal processing module are integrated on the same ASIC chip, and the ASIC chip is connected to the differential capacitive MEMS sensor module by wire bonding.

[0031] Optionally, also include:

[0032] The ESD module is connected to the ASIC chip and is used to perform ESD protection on the ASIC chip and the differential capacitive MEMS sensor module.

[0033] Optionally, the MEMS unit includes a differential capacitive MEMS microphone, a differential capacitive MEMS acoustic transducer or a differential capacitive MEMS microphone.

[0034] Optionally, the present invention further provides a signal processing circuit, comprising:

[0035] a bias voltage generating module, configured to generate N bias voltages, where N is greater than or equal to 2, wherein the bias voltage generating module provides the N bias voltages to the differential capacitive MEMS sensing module, and the differential capacitive MEMS sensing module outputs N first voltage signals through N output terminals; and

[0036] N signal processing modules are respectively connected to the N output ends of the differential capacitive MEMS sensor module, receive the N first voltage signals and perform signal processing, the output end of the i-th signal processing module is connected to the differential capacitance of the i+1-th differential capacitive MEMS sensor module, and the N-th signal processing module outputs a second voltage signal, 1≤i≤N-1.

[0037] In the MEMS system and signal processing circuit provided by the present invention, the differential capacitive MEMS sensing module outputs N first voltage signals representing the sound signal according to the first common mode voltage, the capacitance change generated by N differential capacitors and N bias voltages, and the N signal processing modules are respectively connected to the N output ends of the differential capacitive MEMS sensing module, access the N first voltage signals and perform signal processing, and the output end of the i-th signal processing module is connected to the i+1-th differential capacitor, which is equivalent to superimposing the output signal of each signal processing module on the input end of the next differential capacitor to achieve signal superposition, and enhance the amplitude of the second voltage signal output by the last signal processing module through a multi-stage cascade method without introducing other noises, so that the signal-to-noise ratio of the MEMS system can be improved, thereby improving the performance of the MEMS system. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 A structural block diagram of a MEMS system provided in Embodiment 1 of the present invention;

[0039] Figure 2 A schematic diagram of the structure of a capacitive MEMS microphone provided in Embodiment 1 of the present invention;

[0040] Figure 3 A schematic diagram of the structure of a charge pump unit provided in Embodiment 1 of the present invention;

[0041] Figure 4 A circuit diagram of a first high-resistance unit provided in Embodiment 1 of the present invention;

[0042] Figure 5 A circuit diagram of a quick start circuit provided in accordance with an embodiment of the present invention;

[0043] Figure 6 A structural block diagram of a MEMS system provided in Embodiment 2 of the present invention;

[0044] Figure 7 A structural block diagram of a MEMS system provided in Embodiment 3 of the present invention;

[0045] Figure 8 A structural block diagram of a MEMS system provided in Embodiment 4 of the present invention;

[0046] Fig. 9A structural block diagram of a MEMS system provided in Embodiment 5 of the present invention;

[0047] Fig.10 A structural block diagram of a MEMS system provided in Embodiment 6 of the present invention;

[0048] Fig.11 A structural block diagram of a MEMS system provided in Embodiment 7 of the present invention;

[0049] Wherein, the accompanying drawings are marked as follows:

[0050] 10-bias voltage generation module; 111, 112...11N-first high resistance unit; 12-charge pump unit; 13-pull-in detection unit; 21, 22...2N-MEMS unit; 31, 32...3N-signal processing module; 311, 321...3N1-buffer unit; 312, 322...3N2-gain adjustment unit; 313, 323...3N3-second high resistance unit; 40-clock signal generation module; 50-LDO module; 60-digital control module; 70-ESD module; 801-first unidirectional conduction unit; 802-fast start-up circuit; 90-digital processing module; 91-analog digital sampling unit; 92-digital logic unit;

[0051] 201-substrate; 210, 220-acoustic cavity; 202-supporting wall; 211a, 221a-vibrating membrane; 211b, 221b-first back plate electrode; 211c, 221c-second back plate electrode; 213, 223-acoustic hole; 212a, 222a, 212b, 222b, 212c, 222c-soldering pad;

[0052] Clk-clock signal; CLK'-externally input clock signal; Vcp1, Vcp2...VcpN-bias voltage; Vin1, Vin2...VinN-first voltage signal; Vcp11, Vcp12...Vcp1N-basic bias voltage; Vs-internal signal; Vf11, Vf12...Vf1N-buffer signal; Vout-second voltage signal; Voutm, Voutp-differential signal; Dout-digital voltage signal; GainCtrl-digital control signal; Vcom1-first common mode voltage; Vcom2-second common mode voltage; Vcom3-third common mode voltage; S1-first pumping path; S2-second pumping path; V1-first high resistance node; V2-first low resistance node; Vdd-constant power supply voltage; VDD-external power supply voltage; Din-external first enable signal; Lr-external second enable signal; Gnd-ground terminal; K21, K22...K2N-node; C-adjustment capacitor. DETAILED DESCRIPTION

[0053] The specific implementation of the present invention will be described in more detail below in conjunction with the schematic diagram. The advantages and features of the present invention will become clearer based on the following description. It should be noted that the drawings are all in a very simplified form and are not in exact proportions, and are only used to facilitate and clearly assist in explaining the purpose of the embodiments of the present invention.

[0054] Embodiment 1

[0055] Figure 1 This is a structural block diagram of the MEMS system provided in this embodiment. Figure 1 As shown, the MEMS system includes a bias voltage generating module 10, a differential capacitive MEMS sensing module 20, a signal processing module and a clock signal generating module 40. The clock signal generating module 40 provides a clock signal Clk for the MEMS system, and although the clock signal generating module 40 in this embodiment is an internal clock module, as an optional embodiment, the clock signal generating module 40 may also be an external clock module, and the specific connection method of the clock signal generating module 40 will be described below.

[0056] The bias voltage generating module 10 is used to generate N bias voltages, where N is greater than or equal to 2. In this embodiment, N=2. The bias voltage generating module 10 has two output terminals, each of which outputs a bias voltage, and the two bias voltages are bias voltage Vcp1 and bias voltage Vcp2. Specifically, the first output terminal of the bias voltage generating module 10 is used to output the bias voltage Vcp1, and the second output terminal of the bias voltage generating module 10 is used to output the bias voltage Vcp2.

[0057] The differential capacitive MEMS sensor module 20 includes two MEMS units, and the two MEMS units each include a differential capacitor. Specifically, the two MEMS units are MEMS unit 21 and MEMS unit 22, respectively. The MEMS unit 21 includes a first differential capacitor, and the MEMS unit 22 includes a second differential capacitor. Under the stimulation of an external sound signal, the first differential capacitor and the second differential capacitor both produce the same capacitance change. In this embodiment, the first differential capacitor and the second differential capacitor each include two MEMS capacitors, and the back plates and diaphragms of the MEMS capacitors in the two MEMS capacitor groups have different relative positions in the lateral direction, so that the two MEMS capacitors produce opposite capacitance changes under the stimulation of the sound signal, thereby forming a differential capacitor.

[0058] Furthermore, the MEMS unit 21 and the MEMS unit 22 are respectively connected to the first input terminal and the second input terminal of the bias voltage generating module 10, that is, the first differential capacitor and the second differential capacitor are respectively connected to the bias voltage Vcp1 and the bias voltage Vcp2, the bias voltage Vcp1 provides a static operating voltage for the MEMS unit 21, and the bias voltage Vcp2 provides a static operating voltage for the capacitive MEMS unit 22.

[0059] The MEMS unit 21 is also connected to a first common mode voltage Vcom1. The MEMS unit 21 outputs a first voltage signal Vin1 representing the sound signal according to the first common mode voltage Vcom1, the capacitance change generated by the first differential capacitor, and the bias voltage Vcp1; the MEMS unit 22 outputs a first voltage signal Vin2 representing the sound signal according to the capacitance change generated by the second differential capacitor and the bias voltage Vcp2, which is equivalent to the first voltage signal Vin1 and the first voltage signal Vin2 being output through the two output ends of the differential capacitive MEMS sensor module 20.

[0060] Correspondingly, the signal processing module has two, and the two signal processing modules are respectively a signal processing module 31 and a signal processing module 32. The signal processing module 31 is connected to the output end of the MEMS unit 21, and is used to access the first voltage signal Vin1 and perform signal processing. The signal processing module 32 is connected to the output end of the MEMS unit 22, and is used to access the first voltage signal Vin2 and perform signal processing. The output end of the signal processing module 31 is connected to the MEMS unit 22, which is equivalent to inputting the output signal of the signal processing module 31 to the input end of the MEMS unit 22, realizing signal superposition. The signal processing module 32 outputs a second voltage signal Vout representing the sound signal.

[0061] In this embodiment, the output end of the signal processing module 31 is connected to the MEMS unit 22, so that the output signal of the signal processing module 31 is superimposed on the input end of the second differential capacitor, and the amplitude of the second voltage signal Vout output by the signal processing module 32 is enhanced by a two-stage cascade connection without introducing other noises. Therefore, the signal-to-noise ratio of the MEMS system can be improved, thereby improving the performance of the MEMS system.

[0062] It should be understood that the number of the MEMS units, the signal processing modules and the bias voltage in this embodiment is two, but it is not limited thereto. The number of the MEMS units, the signal processing modules and the bias voltage can actually be N (N≥2).

[0063] Next, this embodiment will be described by taking the case where both the MEMS unit 21 and the MEMS unit 22 are dual-backplate differential capacitive MEMS microphones as an example. However, it should be understood that, as an optional embodiment, the MEMS unit 21 and the MEMS unit 22 in the present invention are not limited to dual-backplate differential capacitive MEMS microphones, but can also be dual-diaphragm differential capacitive MEMS microphones, lateral differential capacitive MEMS microphones, differential capacitive MEMS acoustic transducers or differential capacitive MEMS microphones, etc. As long as they are MEMS sensors that support differential output, they are within the protection scope of the present invention and will not be explained one by one here.

[0064] In this embodiment, the MEMS unit 21 and the MEMS unit 22 have the same structure, are manufactured on the same substrate, and belong to the same device. Figure 2 Schematic diagram of the structure of the differential capacitive MEMS sensor module 20 provided in this embodiment. Figure 2 As shown, the differential capacitive MEMS sensor module 20 includes a substrate 201, a supporting wall 202, a vibrating membrane 211a, a vibrating membrane 221a, a first backplate electrode 211b, a second backplate electrode 211c, a first backplate electrode 221b and a second backplate electrode 221c. The supporting wall 202 is located on the substrate 201 and encloses two cavities, the vibrating membrane 211a, the first backplate electrode 211b and the second backplate electrode 211c are located in one of the cavities, and the first backplate electrode 211b, the vibrating membrane 211a and the second backplate electrode 211c are arranged in sequence from bottom to top; the vibrating membrane 221a, the first backplate electrode 221b and the second backplate electrode 221c are located in the other cavity, and the first backplate electrode 221b, the vibrating membrane 221a and the second backplate electrode 221c are arranged in sequence from bottom to top. The edges of the supporting vibration membrane 211a, the vibration membrane 221a, the first backplate electrode 211b, the second backplate electrode 211c, the first backplate electrode 221b and the second backplate electrode 221c are all extended to the supporting wall 202 for fixation. There is a gap between the vibration membrane 211a and the first backplate electrode 211b and the second backplate electrode 211c to provide a vibration space for the vibration membrane 211a. There is a gap between the vibration membrane 221a and the first backplate electrode 221b and the second backplate electrode 221c to provide a vibration space for the vibration membrane 221a. Figure 2 It can also be seen that the relative positions of the vibration membrane 211a, the first backplate electrode 211b and the second backplate electrode 211c in the lateral direction are the same; the relative positions of the vibration membrane 221a, the first backplate electrode 221b and the second backplate electrode 221c in the lateral direction are the same.

[0065] Furthermore, the substrate 201 has a penetrating acoustic cavity 210 and an acoustic cavity 220, the first backplate electrode 211b and the second backplate electrode 211c each have a plurality of acoustic holes 213, and the first backplate electrode 221b and the second backplate electrode 221c each have a plurality of acoustic holes 223.

[0066] In this embodiment, the vibration membrane 211a, the first back plate electrode 211b and the second back plate electrode 211c constitute two MEMS capacitors. Under the excitation of the sound signal, the two MEMS capacitors produce opposite capacitance changes, thereby constituting the first differential capacitor; similarly, the vibration membrane 221a, the first back plate electrode 221b and the second back plate electrode 221c constitute two MEMS capacitors. Under the excitation of the sound signal, the two MEMS capacitors produce opposite capacitance changes, thereby constituting the second differential capacitor.

[0067] The differential capacitive MEMS sensor module 20 also includes two pad groups, and the two pad groups correspond to the MEMS unit 21 and the MEMS unit 22 respectively. The pad group corresponding to the MEMS unit 21 includes pads 212a, pads 212b and pads 212c, and the pads 212a, pads 212b and pads 212c are electrically connected to the vibration membrane 211a, the first back plate electrode 211b and the second back plate electrode 211c respectively; the pad group corresponding to the MEMS unit 22 includes pads 222a, pads 222b and pads 222c, and the pads 222a, pads 222b and pads 222c are electrically connected to the vibration membrane 221a, the first back plate electrode 221b and the second back plate electrode 221c respectively. In this way, the pads 212a, 222a, 212b, 222b, 212c and 222c serve as the lead-out ends of the vibration membrane 211a, 221a, the first backplate electrode 211b, the first backplate electrode 221b, the second backplate electrode 211c and the second backplate electrode 221c respectively.

[0068] Please continue reading Figure 2 When the differential capacitive MEMS sensor module 20 is excited by a sound signal, the vibration membrane 211a and the vibration membrane 221a vibrate accordingly, and the distance between the vibration membrane 211a and the first backplate electrode 211b and the second backplate electrode 211c will change (one becomes larger and the other becomes smaller), and the distance between the vibration membrane 221a and the first backplate electrode 221b and the second backplate electrode 221c will also change (one becomes larger and the other becomes smaller), and the first differential capacitor and the second differential capacitor will produce the same capacitance change following the sound signal.

[0069] Furthermore, in this embodiment, the bias voltage Vcp1 is applied to the vibration membrane 211a through the pad 212a, and the bias voltage Vcp2 is applied to the vibration membrane 221a through the pad 222a. A large amount of static charge will be stored on the first backplate electrode 211b, the first backplate electrode 221b, the second backplate electrode 211c and the second backplate electrode 221c. In a natural state, since the second backplate electrode 211c and the second backplate electrode 221c are in a high-resistance state, the charge thereon will not be transferred. When the vibration membrane 211a and the vibration membrane 221a vibrate, the first differential capacitance and the second differential capacitance change dynamically, and the voltage on the first backplate electrode 211b and the first backplate electrode 221b will change to maintain the constant amount of charge, thereby converting it into the first voltage signal Vin1 on the pad 212b and the first voltage signal Vin2 on the pad 222b for output.

[0070] It should be understood that the differential capacitor in the present invention is not limited to including two MEMS capacitors, but may also include 4, 6 or 8 MEMS capacitors, etc. As long as the MEMS capacitors can be combined to form a differential capacitor, the implementation method is within the protection scope of the present invention and will not be explained one by one here.

[0071] Based on this, Figure 1 As shown, the bias voltage generating module 10 is used to provide the bias voltage Vcp1 for the MEMS unit 21 and to provide the bias voltage Vcp2 for the MEMS unit 22. In this embodiment, the bias voltage generating module 10 specifically provides the bias voltage for the vibration membranes of the MEMS unit 21 and the MEMS unit 22, but it should not be limited to this.

[0072] In this embodiment, the bias voltage Vcp2 output by the bias voltage generating module 10 is a high-impedance bias voltage that can be superimposed with an AC signal.

[0073] Specifically, the bias voltage generating module 10 includes a charge pump unit 12 and two first high resistance units, the two first high resistance units are respectively a first high resistance unit 111 and a first high resistance unit 112. The input end of the charge pump unit 12 is connected to the output end of the clock signal generating module 40, for receiving the clock signal Clk, and outputting a basic bias voltage Vcp11 and a basic bias voltage Vcp12 under the drive of the clock signal Clk. The first high resistance unit 111 is connected to the charge pump unit 12, for receiving the basic bias voltage Vcp11, and stabilizing the basic bias voltage Vcp11 in a high impedance state output, and the first output end of the bias voltage generating module 10 is in a DC high impedance state; the first high resistance unit 112 is connected to the charge pump unit 12, for receiving the basic bias voltage Vcp12, and stabilizing the basic bias voltage Vcp12 in a high impedance state output, so that the second output end of the bias voltage generating module 10 is in a high impedance state.

[0074] Figure 3 FIG. 1 is a schematic diagram of the charge pump unit 12 provided in this embodiment. Figure 3 As shown, in this embodiment, the charge pump unit 12 includes a multi-stage pumping circuit and two pumping paths, and the two pumping paths are respectively a first pumping path S1 and a second pumping path S2. The multi-stage pumping circuit is used to output an initial bias voltage, and the initial bias voltage is less than the basic bias voltage Vcp11 and the basic bias voltage Vcp12. Then, the input ends of the first pumping path S1 and the second pumping path S2 are both connected to the multi-stage pumping circuit, and the first pumping path S1 and the second pumping path S2 each have one or at least two pumping circuits connected in series, and the initial bias voltage is boosted by the first pumping path S3 to obtain the basic bias voltage Vcp11, and the initial bias voltage is boosted by the second pumping path S2 to obtain the basic bias voltage Vcp12.

[0075] In this embodiment, a filter circuit is further connected between two adjacent pumping circuits to improve the reliability of the system. As an optional embodiment, the filter circuit may be connected between any two adjacent pumping circuits, or may not be connected.

[0076] It should be understood that the initial bias voltage output by the multi-stage pumping circuit can be very close to the basic bias voltage Vcp11 and the basic bias voltage Vcp12, and the first pumping path S3 and the second pumping path S4 respectively generate the basic bias voltage Vcp11 and the basic bias voltage Vcp12 according to the initial bias voltage, and the two basic bias voltages will not affect each other; at the same time, by designing the multi-stage pumping circuit, a voltage margin can be reserved for the first pumping path S1 and the second pumping path S2.

[0077] It should be understood that the multi-stage pumping circuit may actually be composed of one or at least two pumping circuits connected in series.

[0078] Theoretically, the higher the bias voltage Vcp1 and the bias voltage Vcp2 are, the better. However, considering the process withstand voltage, the bias voltage Vcp1 and the bias voltage Vcp2 are usually 4V-15V, but should not be limited thereto.

[0079] Furthermore, the MEMS unit 21 and the MEMS unit 22 may produce an attraction phenomenon (the vibration membrane and the back plate electrode stick together) under the action of an excessively large excitation signal. When the MEMS unit 21 or the MEMS unit 22 produces the attraction phenomenon, a capacitance jump will occur (the differential capacitance at the attraction point suddenly increases), and at the same time, the leakage current of the back plate electrode will increase, causing the first voltage signal Vin1 output by the MEMS unit 21 or the first voltage signal Vin2 output by the MEMS unit 22 to jump, and the jump will last for a period of time, thereby greatly reducing the sensitivity of the system.

[0080] In this embodiment, the MEMS unit 21 and the MEMS unit 22 are usually the same mechanical core, so the first differential capacitor and the second differential capacitor usually produce a pull-in phenomenon at the same time. Based on this, in this embodiment, the bias voltage generation module 10 also includes a pull-in detection unit 13, and the input end of the pull-in detection unit 13 can be connected to a voltage signal representing the sound signal (hereinafter referred to as an internal signal Vs). When the first differential capacitor and the second differential capacitor generate an attraction phenomenon, the internal signal Vs jumps, and the attraction detection unit 13 pulls down the bias voltage Vcp1 and the bias voltage Vcp2 when the internal signal Vs jumps, thereby reducing the voltage values ​​of the bias voltage Vcp1 and the bias voltage Vcp2 (for example, the bias voltage Vcp1 and the bias voltage Vcp2 can be pulled down to the ground Vss, thereby connecting the bias voltage Vcp1 and the bias voltage Vcp2 to the ground Vss), releasing the charge on the back plate electrode, losing the effect of the electric field force, and the vibration membrane will rebound under the action of its own elasticity, releasing the attraction state, thereby quickly restoring the sensitivity of the system.

[0081] Further, the internal signal Vs may be, for example, the first voltage signal Vin1, the first voltage signal Vin2 or the second voltage signal Vout, that is, the pull-in detection unit 13 may be connected to the output end of the charge pump unit 12 and the MEMS unit 21, or to the output end of the charge pump unit 12 and the MEMS unit 22, or to the output end of the charge pump unit 12 and the signal processing module 31, or to the output end of the charge pump unit 12 and the signal processing module 32. Of course, the internal signal Vs may also be a signal generated by a sub-unit inside the signal processing module 31 or the signal processing module 32, which will be described below and is not limited by the present invention.

[0082] Please continue reading Figure 1 In this embodiment, the signal processing module 31 includes a second high resistance unit 313, a buffer unit 311 and a gain adjustment unit 312, and the signal processing module 32 includes a second high resistance unit 323, a buffer unit 321 and a gain adjustment unit 322.

[0083] The output end of the MEMS unit 21 is in a high impedance state, and the output first voltage signal Vin1 has no driving capability. In order to perform signal processing, the input end of the buffer unit 311 is connected to the output end of the MEMS unit 21, and is used to access the first voltage signal Vin1 and perform impedance conversion (converting the high impedance state to the low impedance state) on the first voltage signal Vin1, thereby enhancing the driving capability. The output end of the buffer unit 311 outputs a buffer signal Vf11. One end of the second high-impedance unit 313 is connected to a node K21 between the output end of the MEMS unit 21 and the buffer unit 311, and the other end is used to access a second common mode voltage Vcom2, so as to provide the second common mode voltage Vcom2 to the node K21, and establish a static operating point for the output end of the MEMS unit 21. The input end of the gain adjustment unit 312 is connected to the output end of the buffer unit 311, and is used to access the buffer signal Vf11 and perform gain amplification on the buffer signal Vf11. The output end of the gain adjustment unit 312 is connected between the first high-resistance unit 112 and the input end of the MEMS unit 22 through the impedance transformation unit, so as to superimpose the output signal of the gain adjustment unit 312 on the input end of the MEMS unit 22.

[0084] Similarly, the output end of the MEMS unit 22 is in a high impedance state, and the output first voltage signal Vin2 has no driving capability. In order to perform signal processing, the input end of the buffer unit 321 is connected to the output end of the MEMS unit 22, and is used to access the first voltage signal Vin2 (with the output signal of the gain adjustment unit 312 superimposed) and perform impedance conversion (converting the high impedance state to the low impedance state) on the first voltage signal Vin2, thereby enhancing the driving capability, and the output end of the buffer unit 321 outputs a buffer signal Vf12. One end of the second high-impedance unit 323 is connected to the node K22 between the output end of the MEMS unit 22 and the buffer unit 321, and the other end is used to access the second common mode voltage Vcom2, so as to provide the second common mode voltage Vcom2 to the node K22, and establish a static operating point for the output end of the MEMS unit 22. The input end of the gain adjustment unit 322 is connected to the output end of the buffer unit 321 for receiving the buffer signal Vf12 and performing gain amplification on the buffer signal Vf12. The gain adjustment unit 322 outputs a second voltage signal Vout representing the sound signal.

[0085] In this embodiment, the structures of the first high resistance unit 111, the first high resistance unit 112, the second high resistance unit 313 and the second high resistance unit 323 are the same. It should be understood that the structures of the first high resistance unit 111, the first high resistance unit 112, the second high resistance unit 313 and the second high resistance unit 323 may actually be different. Next, the structures of the first high resistance unit 111, the first high resistance unit 112, the second high resistance unit 313 and the second high resistance unit 323 will be described in detail below by taking the first high resistance unit 111 as an example.

[0086] Figure 4 FIG. 1 is a circuit diagram of the first high resistance unit 111 provided in this embodiment. Figure 4 As shown, the first high-resistance unit 111 includes a first high-resistance node and a first low-resistance node, and one or at least two first unidirectional conductive units 801 are connected in series between the first high-resistance node and the first low-resistance node. Figure 4In the embodiment, each of the first unidirectional conducting units 801 is a diode, the anode and cathode of the diode are connected in sequence, the anode of the first diode is used as the first low-resistance node V1, and the cathode of the last diode is used as the first high-resistance node V2. The first high-resistance circuit 111 is turned on in the direction from the first low-resistance node V1 to the first high-resistance node V2, and is turned off in the direction from the first high-resistance node V2 to the first low-resistance node V1. The first low-resistance node V1 is connected to the charge pump unit 12 for accessing the basic bias voltage Vcp11, and the first high-resistance node V2 is connected to the MEMS unit 21 for providing the bias voltage Vcp1 in a high-resistance state to the MEMS unit 21. The first high-resistance unit 111 can utilize a diode IV characteristic to have a high-resistance characteristic within a certain voltage range, so that the output end of the bias voltage generating module 10 can be stabilized in a high-resistance state to ensure the normal operation of the circuit.

[0087] Figure 5 FIG. 1 is a circuit diagram of a quick start circuit provided in this embodiment. Figure 5 As shown, a fast start-up circuit 802 may also be connected between the first high-resistance node V2 and the first low-resistance node V1. When the voltages of the first low-resistance node V1 and the first high-resistance node V2 are close, the voltage on the first high-resistance node V2 is established very slowly. The fast start-up circuit 802 in this embodiment is equivalent to a switch. When the fast start-up circuit 802 is turned on, the first low-resistance node V1 can quickly charge and discharge the first high-resistance node V2, thereby accelerating the establishment of the voltage on the first high-resistance node V2, realizing a fast start-up of the circuit, and improving the startup speed of the system.

[0088] It should be understood that the first unidirectional conductive unit 801 in this embodiment is not limited to being a diode, but may also be two MOS transistors connected in a diode connection.

[0089] Similarly, the second high-resistance unit 313 may also include a second high-resistance node and a second low-resistance node, one or at least two second unidirectional conduction units connected in series are provided between the second high-resistance node and the second low-resistance node, the second low-resistance node is connected to the first common-mode voltage Vcom1, and the second high-resistance node is connected to the node K21. The second high-resistance unit 313 may utilize a diode IV characteristic to have a high resistance within a certain voltage range to ensure normal operation of the circuit.

[0090] As an optional embodiment, a fast startup circuit may also be connected between the second high-resistance node and the second low-resistance node, so as to accelerate the establishment of the voltage on the second high-resistance node, thereby improving the startup speed of the system.

[0091] It should be understood that the connection mode of the first high resistance unit 112 is similar to that of the first high resistance unit 111 , and the connection mode of the second high resistance unit 323 is similar to that of the second high resistance unit 313 , which will not be described one by one here.

[0092] In this embodiment, the first common mode voltage Vcom1 and the second common mode voltage Vcom2 are both 0V to 1V, but the present invention should not be limited thereto.

[0093] It should be understood that the gain adjustment unit 312 and the gain adjustment unit 322 can both be existing circuits with gain amplification, which will not be described in detail here.

[0094] For further information, please refer to Figure 1 In this embodiment, the gain adjustment unit 322 is a gain adjustment unit with single-ended input and single-ended output, so the buffer signal Vf12 is amplified by the gain adjustment unit 322 and then outputted in a single-ended manner, that is, the second voltage signal Vout is outputted through one output terminal.

[0095] Please continue reading Figure 1 In this embodiment, the MEMS system also includes an LDO module 50, which can receive an external voltage signal VDD and provide a constant power supply voltage Vdd to the buffer unit 311, the buffer unit 321, the gain adjustment unit 312 and / or the gain adjustment unit 322, thereby improving the working performance of the MEMS system.

[0096] Furthermore, in this embodiment, the MEMS system also includes a digital control module 60, the input end of the digital control module 60 is connected to the clock signal generating module 40, for receiving the clock signal Clk, and outputting a digital control signal GainCtrl under the drive of the clock signal Clk and the external first enable signal Din, the digital control signal GainCtrl is used to realize digital control of the entire MEMS system, for example, the digital control signal GainCtrl can be used for dynamic gain adjustment compensation or special test mode control of the gain adjustment unit 312 and the gain adjustment unit 322; at the same time, the digital control signal GainCtrl can also complete the digital communication between the MEMS system and the outside, EFUSE burning control, and digital signal filtering and transcoding output and other functions.

[0097] It should be understood that in this embodiment, the bias voltage generating module 10, the signal processing module 31, the signal processing module 32, the clock signal generating module 40, the LDO module 50 and the digital control module 60 can be integrated on the same ASIC chip, and the ASIC chip and the MEMS unit 21 and the MEMS unit 22 can be electrically connected, for example, by wire bonding, so as to achieve signal interconnection.

[0098] Furthermore, the MEMS system further includes an ESD module 70, which is connected to the ASIC chip and is used to provide ESD protection for the ASIC chip, the MEMS unit 21, and the MEMS unit 22. Specifically, the ESD module 70 is located near the pad of the ASIC chip, and the signal output by the MEMS system (such as the second voltage signal Vout) can be output through the ESD module 70, and the external signal of the MEMS system (such as the external first enable signal Din or the external voltage signal VDD, etc.) can be input into the MEMS system through the ESD module 70, thereby improving the ESD performance of the MEMS system.

[0099] Next, we will combine Figure 2 It is deduced and proved that the signal-to-noise ratio of the MEMS system in this embodiment is higher.

[0100] According to the superposition principle, the second voltage signal Vout satisfies the following formula:

[0101]

[0102] Wherein, ΔC1 and ΔC2 are the capacitance changes of the first differential capacitor and the second differential capacitor respectively under the stimulation of the sound signal; C 01 , C 02 is the static capacitance value of the first differential capacitor and the second differential capacitor; C p1 , C p2 is the parasitic capacitance value of the first differential capacitor and the second differential capacitor, α1 is the ratio of the first voltage signal Vin1 input to the second differential capacitor, and α2 is the gain configured for the MEMS unit 22 .

[0103] First, in order to simplify the calculation, it is assumed that the MEMS unit 21 and the MEMS unit 22 are the same mechanical core, the two bias voltages Vcp1=Vcp2=Vcp, and the static capacitance values ​​C of the first differential capacitor and the second differential capacitor are 01 =C 02 =C0, the parasitic capacitance value C of the first differential capacitor and the second differential capacitor p1 =Cp2 =C p , then the second voltage signal Vout is:

[0104]

[0105] It can be seen that this embodiment can increase the amplitude of the second voltage signal Vout, thereby improving the signal-to-noise ratio of the MEMS system.

[0106] Based on this, this embodiment also provides a signal processing circuit. Figure 1 As shown, the signal processing circuit includes the bias voltage generating module 10 and N (N≥2) signal processing modules. In this embodiment, there are two signal processing modules, namely the signal processing module 31 and the signal processing module 32.

[0107] The bias voltage generating module 10 is used to generate N bias voltages. In this embodiment, the bias voltage generating module 10 has two output terminals, each outputting a bias voltage, and the two bias voltages are bias voltage Vcp1 and bias voltage Vcp2. The bias voltage generating module 10 provides the bias voltage Vcp1 and bias voltage Vcp2 to the differential capacitive MEMS sensor module 20.

[0108] The differential capacitive MEMS sensor module 20 includes two MEMS units, and each of the two MEMS units includes a differential capacitor. Specifically, the two MEMS units are MEMS unit 21 and MEMS unit 22, respectively. The MEMS unit 21 includes a first differential capacitor, and the MEMS unit 22 includes a second differential capacitor. Under the stimulation of an external sound signal, the first differential capacitor and the second differential capacitor both produce the same capacitance change. The first differential capacitor and the second differential capacitor are respectively connected to the bias voltage Vcp1 and the bias voltage Vcp2, and the bias voltage Vcp1 provides a static operating voltage for the MEMS unit 21, and the bias voltage Vcp2 provides a static operating voltage for the capacitive MEMS unit 22.

[0109] The MEMS unit 21 is also connected to a first common mode voltage Vcom1. The MEMS unit 21 outputs a first voltage signal Vin1 representing the sound signal according to the first common mode voltage Vcom1, the capacitance change generated by the first differential capacitor, and the bias voltage Vcp1; the MEMS unit 22 outputs a first voltage signal Vin2 representing the sound signal according to the capacitance change generated by the second differential capacitor and the bias voltage Vcp2, which is equivalent to the first voltage signal Vin1 and the first voltage signal Vin2 being output through the two output ends of the differential capacitive MEMS sensor module 20.

[0110] The signal processing module 31 is connected to the output end of the MEMS unit 21 for receiving the first voltage signal Vin1 and performing signal processing. The signal processing module 32 is connected to the output end of the MEMS unit 22 for receiving the first voltage signal Vin2 and performing signal processing. The output end of the signal processing module 31 is connected to the MEMS unit 22, which is equivalent to inputting the output signal of the signal processing module 31 to the input end of the MEMS unit 22, thereby realizing signal superposition. The signal processing module 32 outputs a second voltage signal Vout representing the sound signal.

[0111] It should be understood that the specific structures of the bias voltage generating module 10, the differential capacitive MEMS sensing module 20 and the signal processing module have been described in detail above and will not be described in detail here.

[0112] Embodiment 2

[0113] Figure 6 This is a structural block diagram of the MEMS system provided in this embodiment. Figure 6 As shown, the difference from the first embodiment is that, in this embodiment, the bias voltage generating module 10 generates N bias voltages, and the MEMS units, signal processing modules and first high resistance units all have N, and N>2. The N MEMS units are all connected to the bias voltage generating module 10, and the differential capacitor of each MEMS unit is connected to one bias voltage. The N MEMS units output N first voltage signals representing the sound signal according to the first common mode signal Vcom1, the capacitance change generated by the N differential capacitors and the N bias voltages, and the N first voltage signals are output through N output terminals. The N signal processing modules are respectively connected to the N MEMS units, connected to the N first voltage signals and perform signal processing, and the output terminal of the i-th (1≤i≤N-1) signal processing module is connected to the input terminal of the i+1-th MEMS unit, so that the output signal of the i-th signal processing module is input to the i+1-th differential capacitor, and the N-th signal processing module outputs the second voltage signal Vout representing the sound signal.

[0114] Specifically, the charge pump unit 12 outputs N basic bias voltages, namely, basic bias voltage Vcp11, basic bias voltage Vcp12, ... basic bias voltage Vcp1N. The basic bias voltage Vcp11, basic bias voltage Vcp12, ... basic bias voltage Vcp1N are connected to the first high resistance unit 111, the first high resistance unit 112, ... the first high resistance unit 11N, and the first high resistance unit 111, the first high resistance unit 112, ... the first high resistance unit 11N provide bias voltage Vcp1, bias voltage Vcp2, ... bias voltage VcpN. The bias voltage Vcp1, bias voltage Vcp2, ... bias voltage VcpN are connected to the MEMS unit 21, MEMS unit 22, ... MEMS unit 2N, respectively.

[0115] Furthermore, the signal processing module 31 includes a second high-resistance unit 313, a buffer unit 311 and a gain adjustment unit 312, the second high-resistance unit 313 provides the second common-mode voltage Vcom2 for the node K21, the buffer unit 311 is connected to the first voltage signal Vin1 and performs impedance conversion to generate the buffer signal Vf11, and the gain adjustment unit 312 amplifies the gain of the buffer signal Vf11 and inputs the output signal to the second differential capacitor. Similarly, the signal processing module 32 includes a second high-resistance unit 323, a buffer unit 321 and a gain adjustment unit 322, the second high-resistance unit 323 provides the second common-mode voltage Vcom2 for the node K22, the buffer unit 321 receives the first voltage signal Vin2 and performs impedance conversion to generate the buffer signal Vf12, the gain adjustment unit 322 performs gain amplification on the buffer signal Vf12 and inputs the output signal to the next differential capacitor... The signal processing module 3N includes a second high-resistance unit 3N3, a buffer unit 3N1 and a gain adjustment unit 3N2, the second high-resistance unit 3N3 provides the second common-mode voltage Vcom2 for the node K2N, the buffer unit 3N1 receives the first voltage signal VinN and performs impedance conversion to generate the buffer signal Vf1N, the gain adjustment unit 3N2 performs gain amplification on the buffer signal Vf1N and outputs the second voltage signal Vout. The amplitude of the second voltage signal Vout is enhanced by N-stage cascading, further improving the signal-to-noise ratio of the MEMS system.

[0116] In this embodiment, N MEMS units can be distributed in an array on the same substrate, belong to the same device, and are prepared at the same time. By forming an array structure with more MEMS units, each MEMS unit receives a bias voltage, and the first voltage signals output by the MEMS units in the array structure are superimposed to enhance the amplitude of the second voltage signal Vout outputted at last.

[0117] Embodiment 3

[0118] Figure 7 This is a structural block diagram of the MEMS system provided in this embodiment. Figure 7 As shown, the difference from the first embodiment and the second embodiment is that in this embodiment, the gain adjustment unit 322 is a gain adjustment unit with single-end input and double-end output, so the two output ends of the gain adjustment unit 322 output differential signals Voutm and Voutp.

[0119] Embodiment 4

[0120] Figure 8 This is a structural block diagram of the MEMS system provided in this embodiment. Figure 8 As shown, the difference from the first embodiment and the second embodiment is that in this embodiment, the MEMS system outputs a digital voltage signal Dout representing the sound signal, and the MEMS system is a digital MEMS system.

[0121] Specifically, the MEMS system also includes a digital processing module 90, and the digital processing module 90 is used to convert the second voltage signal Vout into the digital voltage signal Dout for output. Specifically, the digital processing module 90 includes an analog digital sampling unit 91 and a digital logic unit 92. The input end of the analog digital sampling unit 91 is connected to the output end of the gain adjustment unit 322, and is used to access the second voltage signal Vout and sample the second voltage signal Vout to obtain a digital sampling signal, thereby completing the analog-to-digital conversion. The input end of the digital logic unit 92 is connected to the output end of the analog digital sampling unit 91, and is used to access the digital sampling signal, and perform format conversion on the digital sampling signal under the control of the externally input second enable signal Lr to obtain a digital voltage signal Dout representing the sound signal. In this way, the second voltage signal Vout is converted into a digital voltage signal Dout for output through the analog digital sampling unit 91 and the digital logic unit 92.

[0122] Optionally, the analog digital sampling unit 91 may be a Sigma-Delta, SAR or NoiseShapingSAR structure.

[0123] In this embodiment, the gain adjustment unit 322 is a gain adjustment unit with single-end input and single-end output, so the second voltage signal Vout is output through the single-end of the gain adjustment unit 322. The analog digital sampling unit 91 is a module with double-end input and single-end output, and one input end of the analog digital sampling unit 91 is grounded to ensure the normal operation of the analog digital sampling unit 91.

[0124] Furthermore, another difference from Embodiment 1 and Embodiment 2 is that in this embodiment, the digital control module 60 is omitted, the clock signal required by the digital logic unit 92 can be replaced by an external clock signal CLK', and the digital control signal GainCtrl is directly generated by the digital logic unit 92 to realize digital control of the entire MEMS system.

[0125] Embodiment 5

[0126] Fig. 9 This is a structural block diagram of the MEMS system provided in this embodiment. Fig. 9 As shown, the difference from the fourth embodiment is that in this embodiment, the gain adjustment unit 322 is a gain adjustment unit with single-end input and double-end output, so the two output ends of the gain adjustment unit 322 output differential signals Voutm and Voutp. The analog digital sampling unit 91 is a module with double-end input and single-end output, and the two input ends of the analog digital sampling unit 91 can be connected to the two output ends of the gain adjustment unit 322, so as to complete the analog-to-digital conversion of the differential signals Voutm and Voutp and output the digital voltage signal Dout.

[0127] Embodiment 6

[0128] Fig.10 This is a structural block diagram of the MEMS system provided in this embodiment. Fig.10 As shown, the difference from the second embodiment is that in this embodiment, the first to N-1th signal processing modules include a second high impedance unit and a buffer unit, but do not include a gain adjustment unit. The Nth signal processing module includes a second high impedance unit, a buffer unit and a gain adjustment unit.

[0129] Specifically, the buffer unit of the i-th (1≤i≤N-1) signal processing module is directly connected to the input end of the i+1-th MEMS unit, so that the buffer signal output by the buffer unit of the i-th signal processing module is directly input to the i+1-th differential capacitor, and the N-th signal processing module outputs a second voltage signal Vout representing the sound signal.

[0130] Furthermore, the signal processing module 31 includes a second high-resistance unit 313 and a buffer unit 311, the second high-resistance unit 313 provides the second common-mode voltage Vcom2 for the node K21, the buffer unit 311 receives the first voltage signal Vin1 and performs impedance conversion to generate the buffer signal Vf11, and the buffer signal Vf11 is directly input to the second differential capacitor. Similarly, the signal processing module 32 includes a second high-resistance unit 323 and a buffer unit 321, the second high-resistance unit 323 provides the second common-mode voltage Vcom2 for the node K22, the buffer unit 321 accesses the first voltage signal Vin2 and performs impedance conversion to generate the buffer signal Vf12, and the buffer signal Vf12 is input to the next differential capacitor... The signal processing module 3N includes a second high-resistance unit 3N3, a buffer unit 3N1 and a gain adjustment unit 3N2, the second high-resistance unit 3N3 provides the second common-mode voltage Vcom2 for the node K2N, the buffer unit 3N1 accesses the first voltage signal VinN and performs impedance conversion to generate the buffer signal Vf1N, and the gain adjustment unit 3N2 amplifies the buffer signal Vf1N and outputs the second voltage signal Vout. The amplitude of the second voltage signal Vout is enhanced by N-stage cascading, which further improves the signal-to-noise ratio of the MEMS system.

[0131] Embodiment 7

[0132] Fig.11 This is a structural block diagram of the MEMS system provided in this embodiment. Fig.11 As shown, the difference from the sixth embodiment is that in this embodiment, the signal processing module 31 further includes an adjustment capacitor C, one end of the adjustment capacitor C is connected to the input end of the buffer unit 311, and the other end is connected to the third common mode voltage Vcom3. The adjustment capacitor C is an adjustable capacitor. Since the signal processing module 31 does not have a gain adjustment unit, the gain can also be adjusted by adjusting the adjustment capacitor C.

[0133] The third common mode voltage Vcom3 may be 0V, but is not limited thereto.

[0134] Furthermore, the present invention is not limited to the signal processing module 31 including the adjustment capacitor C. Other signal processing modules may include the adjustment capacitor to adjust the gain of the stage. Furthermore, even if the signal processing module includes a gain adjustment unit, the signal processing module may also include the adjustment capacitor C.

[0135] In summary, in the MEMS system and signal processing circuit provided in the embodiments of the present invention, the differential capacitive MEMS sensing module outputs N first voltage signals representing the sound signal according to the first common-mode voltage, the capacitance change generated by N differential capacitors, and N bias voltages. The N signal processing modules are respectively connected to the N output ends of the differential capacitive MEMS sensing module, access the N first voltage signals and perform signal processing. The output end of the i-th signal processing module is connected to the i+1-th differential capacitor, which is equivalent to superimposing the output signal of each signal processing module on the input end of the next differential capacitor to achieve signal superposition. The amplitude of the second voltage signal output by the last signal processing module is enhanced by a multi-stage cascade method without introducing other noises. Therefore, the signal-to-noise ratio of the MEMS system can be improved, thereby improving the performance of the MEMS system.

[0136] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same or similar parts between the various embodiments can be referred to each other. For the system disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part description.

[0137] It should also be noted that, although the present invention has been disclosed as a preferred embodiment, the above embodiment is not intended to limit the present invention. For any technician familiar with the art, without departing from the scope of the technical solution of the present invention, the technical content disclosed above can be used to make many possible changes and modifications to the technical solution of the present invention, or modified into equivalent embodiments of equivalent changes. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention without departing from the content of the technical solution of the present invention still falls within the scope of protection of the technical solution of the present invention.

[0138] It should also be understood that, unless otherwise specified or indicated, the terms "first", "second", "third", etc. in the specification are merely used to distinguish between the various components, elements, steps, etc. in the specification, and are not used to indicate the logical relationship or sequential relationship between the various components, elements, steps, etc.

[0139] It should also be recognized that the terms described herein are only used to describe specific embodiments and are not intended to limit the scope of the invention. It should be noted that the singular forms "a" and "an" used herein and in the appended claims include plural references unless the context clearly indicates otherwise. For example, a reference to "a step" or "a device" means a reference to one or more steps or devices, and may include secondary steps and secondary devices. All conjunctions used should be understood in the broadest sense. And, the word "or" should be understood to have the definition of a logical "or", rather than a logical "exclusive or", unless the context clearly indicates otherwise. In addition, the implementation of the method and / or device in the embodiments of the present invention may include performing the selected task manually, automatically, or in combination.

Claims

1. A MEMS system, characterized in that: include: A bias voltage generating module, used for generating N bias voltages, where N is greater than or equal to 2; A differential capacitive MEMS sensing module, comprising N differential capacitors, wherein the N differential capacitors generate capacitance changes under the stimulation of an external sound signal, the first ends of the N differential capacitors are respectively connected to the N bias voltages, and the second end of the first differential capacitor is also connected to a first common mode voltage. The differential capacitive MEMS sensing module outputs N first voltage signals representing the sound signal according to the first common mode voltage, the capacitance changes generated by the N differential capacitors, and the N bias voltages, and the N first voltage signals are output through N output ends; as well as, N signal processing modules are respectively connected to the N output ends of the differential capacitive MEMS sensor module, receive the N first voltage signals and perform signal processing, the output end of the i-th signal processing module is connected to the second end of the i+1-th differential capacitor, and the N-th signal processing module outputs a second voltage signal representing the sound signal, 1≤i≤N-1.

2. The MEMS system according to claim 1, wherein: The N output terminals of the differential capacitive MEMS sensor module are all in a high impedance state.

3. The MEMS system according to claim 1, wherein: The first output terminal of the bias voltage generating module is in a DC high impedance state, and the remaining output terminals of the bias voltage generating module are in a high impedance state.

4. The MEMS system according to claim 1, wherein: The bias voltage generating module comprises: a charge pump unit for outputting N basic bias voltages; and, N first high-resistance units are respectively connected to the charge pump units, connected to the N basic bias voltages, and convert the N basic bias voltages into N bias voltages.

5. The MEMS system according to claim 1, wherein: The signal processing module comprises: a buffer unit, connected to the corresponding output terminal of the differential capacitive MEMS sensor module, receiving the corresponding first voltage signal and performing impedance conversion on the first voltage signal to obtain a buffer signal; and The second high-resistance unit has one end connected to a node between the corresponding output end of the differential capacitive MEMS sensor module and the buffer unit, and the other end connected to a second common mode voltage.

6. The MEMS system according to claim 5, characterized in that Each of the signal processing modules or the Nth signal processing module further includes: The gain adjustment unit is connected to the buffer unit, receives the buffer signal and performs gain amplification on the buffer signal.

7. The MEMS system according to claim 6, characterized in that The gain adjustment unit of the Nth signal processing module is a gain adjustment unit with single-ended input and single-ended / double-ended output.

8. The MEMS system according to any one of claims 5 to 7, characterized in that: At least part of the signal processing module also includes: An adjusting capacitor, one end of which is connected to the input end of the buffer unit, and the other end of which is connected to the third common mode voltage.

9. The MEMS system according to claim 1, wherein: Also includes: The digital control module is used to output a digital control signal driven by a clock signal and an external first enable signal, wherein the digital control signal is used to realize digital control of the entire MEMS system.

10. The MEMS system according to claim 1, wherein: Also included is a digital processing module, the digital processing module comprising: an analog digital sampling unit, connected to the Nth signal processing module, for sampling the second voltage signal to obtain a digital sampling signal; and The digital logic unit is connected to the analog digital sampling unit and is used to perform format conversion on the digital sampling signal to obtain a digital voltage signal.

11. The MEMS system according to claim 10, wherein: The digital logic unit also outputs a digital control signal under the drive of an external clock signal and an external second enable signal, and the digital control signal is used to realize digital control of the entire MEMS system.

12. The MEMS system according to claim 1, wherein: Also includes: The LDO module is used to receive an external power supply voltage and generate a constant power supply voltage according to the external power supply voltage to supply power to the signal processing module.

13. The MEMS system according to claim 1, wherein: The bias voltage generating module and the signal processing module are integrated on the same ASIC chip, and the ASIC chip is connected to the differential capacitive MEMS sensor module by wire bonding.

14. The MEMS system according to claim 13, wherein: Also includes: The ESD module is connected to the ASIC chip and is used to perform ESD protection on the ASIC chip and the differential capacitive MEMS sensor module.

15. The MEMS system according to claim 1, wherein: The differential capacitive MEMS sensing module includes a differential capacitive MEMS microphone, a differential capacitive MEMS acoustic transducer or a differential capacitive MEMS microphone.

16. A signal processing circuit, characterized in that: include: A bias voltage generating module, configured to generate N bias voltages, where N is greater than or equal to 2, wherein the bias voltage generating module provides the N bias voltages to the first end of the differential capacitor of the differential capacitive MEMS sensing module, and the differential capacitive MEMS sensing module outputs N first voltage signals through N output ends; as well as, N signal processing modules are respectively connected to the N output ends of the differential capacitive MEMS sensor module, receive the N first voltage signals and perform signal processing, the output end of the i-th signal processing module is connected to the second end of the differential capacitor of the i+1-th differential capacitive MEMS sensor module, and the N-th signal processing module outputs a second voltage signal, 1≤i≤N-1.

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