An area-optimal floorplanning method based on neural network and sequence pair

Abstract

The present invention discloses a method for optimizing the layout planning area based on neural networks and sequence pairs. Aiming at the layout planning problem in integrated circuit electronic design automation, this method first constructs a layout planning database using the optimal solution of layout planning to solve the problem of insufficient data volume for machine learning. At the same time, it converts the layout represented by sequence pairs in layout planning into a classification problem in machine learning. Finally, a neural network model is built through a multi-layer perceptron and trained, and the trained model is used to predict the optimal solution for the layout planning area. This method can quickly and effectively find the optimal layout planning area solution.

Description

Technical Field

[0001] The present invention relates to the field of digital integrated circuit electronic design automation, and particularly relates to an optimal floorplanning area method based on neural network and sequence pair. Background Art

[0002] Motivated by Moore's Law, integrated circuits have entered the era of ultra-large scale. The number of transistors integrated on a single chip has reached tens of billions, and it is impossible for engineers to design circuits manually to meet the requirements of design specifications. In this context, Electronic Design Automation (EDA) technology emerged, which refers to a design method that uses computer-aided design software to complete the functional design, simulation, synthesis, verification, physical design and other processes of ultra-large scale integrated circuit (VLSI) chips. Among them, physical design is the process of converting the circuit information of the netlist into a physical geometric representation, and the final layout GDSII file obtained in this process will be used in the chip production and manufacturing process. Floorplanning is a core step in physical design, aiming to ensure that each module is assigned a shape or a suitable position and each pin connected to the outside is assigned a reasonable position. In addition, floorplanning will affect indicators such as the performance, power consumption, area, and wire length of the chip, and thus affect design goals such as timing and congestion. On the other hand, it affects the progress of the subsequent placement and routing stages. It is very difficult for a poorly floorplanned design to meet the design requirements in the subsequent stages. Therefore, floorplanning is a very important link in the physical design process of integrated circuits.

[0003] With the advent of the 5G and artificial intelligence eras and the demand for computing power, the functions contained in a single chip are increasing, which leads to an increase in the area of a single chip. In physical design, the final area of the chip is determined in the floorplanning stage. Therefore, area has become one of the evaluation indicators of floorplanning. With the continuous reduction of the process node, some new evaluation indicators have emerged, such as routability, timing-driven, etc., but the most important evaluation indicator is area.

[0004] Although floorplanning has been proven to be an NP-hard problem, with years of efforts by researchers, a large number of excellent methods for floorplanning have emerged. Despite the advantages and disadvantages of these methods, they can be roughly divided into four categories according to the different entry points of the methods: partition-based methods (Dunlop A E, Kernighan B W. A procedure for placement of standard cell VLSI circuits[J]. IEEE Transactions on Computer-Aided Design, 1985, 4(1):92-98.), heuristic methods such as simulated annealing (Tang X, Wong D F. FAST-SP: A fast algorithm for block placement based on sequence pair[C] / / Proceedings of the 2001 Asia and South Pacific design automation conference. 2001:521-526.), analytical methods such as force-directed methods (P. Spindler, U. Schlichtmann and F. M. Johannes, "Kraftwerk2—A Fast Force-Directed Quadratic Placement Approach Using an Accurate Net Model," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 27, no. 8, pp. 1398-1411, Aug. 2008, doi:10.1109 / TCAD.2008.925783.), and artificial intelligence-based methods (Mirhoseini A, Goldie A, Yazgan M, et al. A graph placement methodology for fast chip design[J]. Nature, 2021, 594(7862):207-212.), where the artificial intelligence methods are mainly two categories: traditional machine learning and reinforcement learning.

[0005] In the above methods, the first method is the divide-and-conquer idea, that is, the top-level design is divided into many smaller-scale designs until the problem can be solved. This way will lose the quality of the solution and lack a global perspective; the second method is prone to getting stuck in the trouble of local optimal solutions and has the problem of slow convergence speed by finding the optimal solution in the design space; the third method uses a mathematical form to solve the expression formed by the module coordinate constraints. This method can obtain an accurate solution, and its complexity increases with the increase of the problem scale and is limited by the equation expression and the set constraint conditions; the above three methods cannot learn from the experience of the previous iteration. The fourth method uses the advantages of artificial intelligence in joint optimization to improve the quality of the solution, which is a research hotspot in the field of layout planning at present, but it has the problems of a large search space for each step, high hardware requirements when training the model, and opaque training data sets. If the complexity of the search space for each step can be reduced and the problem of training data can be solved, then the artificial intelligence method will bring a new development direction for layout planning. Summary of the Invention

[0006] The object of the present invention is to provide a layout planning area optimization method based on a neural network and a sequence pair, which uses open-source tools to generate a database required for machine learning, cooperates with a sequence pair layout representation method based on a representation method, and builds a neural network model with a relatively small single-step search space, so that it can quickly and effectively find the optimal solution for the layout planning area.

[0007] In order to achieve the above tasks, the present invention adopts the following technical solutions:

[0008] A layout planning area optimization method based on a neural network and a sequence pair, comprising:

[0009] Construct a digital integrated circuit layout planning database with the number of circuit modules being n. The data in this database is used to completely represent a layout planning and consists of four arrays: one array W stores the widths of n modules, one array H stores the heights of n modules, and the other two arrays Splus and Smin represent the optimal area sequence pair;

[0010] Convert the layout represented by the sequence pair in the layout planning into a classification problem in machine learning, including: extracting a set of data [W, H, Splus, Smin] from the digital integrated circuit layout planning database, and storing the sequence pairs Splus and Smin in S 1 and S 2 respectively; calculating the array S 1 and the array S 2The n tag values index constructed from n elements, and at the same time, a positive sequence pair array P and a negative sequence pair array M are created to store the elements whose positions have been determined, and the elements whose positions are not determined are replaced by -1; then, the input feature X: the training data pairs composed of {W, H, P, M} and the tag index are written into a new database, and this database will be used for neural network model training;

[0011] A neural network model is built using a multi-layer perceptron. The whole model from input to output is an unfolding layer, a hidden layer, and an output layer in sequence. The input feature of the model is a four-dimensional element {W, H, P, M}; the training data in the new database is input into the model to obtain a prediction result. The loss amount is calculated according to the gap between the prediction result and the tag, and the model parameters are updated using the backpropagation method, thereby narrowing the gap between the prediction result and the tag. Finally, a model with the optimal generalization is obtained as the trained model;

[0012] Using the trained model for the array S 1 and the array S 2 in the elements for prediction until there are no -1 elements in the S1 and S2 arrays, that is, the position prediction of all elements in the sequence pair is completed. This sequence pair S 1 、S 2 is the optimal solution for the layout planning area of these n modules.

[0013] Furthermore, the digital integrated circuit layout planning database for constructing n circuit modules includes:

[0014] Select the number n of modules and the size range range of the module size according to the actual application scenario;

[0015] According to the number n of the modules and the size range range of the module size, use a random function to randomly generate the specific sizes of each module, and then save the width and height of each module into the width array W and the height array H respectively;

[0016] Use two arrays Splus and Smin with a size of n to represent the positive sequence S 1 、negative sequence S 2 of the n module sequence pairs. The initial values of the arrays Splus and Smin are b 0 ,b 1 ,b 2 ,...,b n-1 , where b i (i = 0, 1,... n - 1) represents the module name; then randomly shuffle the arrays Splus and Smin respectively, and finally use the shuffled arrays Splus and Smin as the initial solutions for the layout planning of n modules;

[0017] Search for the sequence pair with the optimal area using the simulated annealing method, and save the width array W, height array H of each module, and the sequence pairs Splus and Smin with the optimal area of the layout planning into the digital integrated circuit layout planning database.

[0018] Further, the searching for the sequence pair with the optimal area using the simulated annealing method includes:

[0019] The input parameters of the simulated annealing method are the highest temperature T, the lowest temperature t, the cooling factor alpha, the width array W of each module, the height array H of each module, and the sequence pair arrays Splus and Smin; the simulated annealing searches for a solution with a smaller area by perturbing the arrays Splus and Smin. The perturbed sequence pair arrays are Splus_disturb and Smin_disturb, where the perturbation methods are: randomly swapping the positions of two identical elements in the arrays Splus and Smin, randomly swapping two elements in the array Splus, randomly swapping two elements in the array Smin, and randomly shuffling the arrays Splus and Smin.

[0020] After the perturbation is completed, calculate the area of the sequence pair represented by the perturbed arrays Splus_disturb and Smin_disturb. If this area is smaller than the area of the sequence pair represented by the arrays Splus and Smin, then assign the arrays Splus_disturb and Smin_disturb to the arrays Splus and Smin respectively, so as to achieve the purpose of taking the arrays Splus_disturb and Smin_disturb as the optimal solutions; if this area is larger than the area represented by the arrays Splus and Smin, then accept this difference solution with a probability of exp(-delta / T), otherwise discard it; where delta is the difference between the two areas; when the temperature is lower than the lowest temperature t, end the simulated annealing method, and finally take the arrays Splus and Smin as the optimal area sequence pairs of n modules.

[0021] Further, the conversion of the layout represented by the sequence pair in the layout planning into a classification problem in machine learning specifically includes:

[0022] 2.1 Export data from the digital integrated circuit layout planning database, including the array W storing the widths of n modules, the array H storing the heights of n modules, and the optimal area sequence pairs Splus and Smin, and store the sequence pairs Splus and Smin in S 1 and S 2 respectively;

[0023] 2.2 For n modules, the module names are b 0 , b 1 , b 2,...,b n-1 , the selected encoding method is b i = i, then the encoded modules are: 0, 1, 2,..., n - 2, n - 1; subsequently, create a dictionary dicts, where the keys of the dictionary are module names and the values are encoding numbers. This dictionary can map module names to corresponding numbers when creating classification labels, that is, dicts(b i ) = i;

[0024] 2.3 Construct the input feature quadruple {W, H, P, M} of the neural network model, where W is an array of widths of n modules, H is an array of heights of n modules, and P and M are arrays of already determined elements in the positive sequence and negative sequence of the sequence pair respectively. If an element in P and M is not determined, it is replaced by -1;

[0025] Initialize all elements in arrays P and M to -1, set i = 0, and calculate the label: index = n * dicts(S 1 [i]) + dicts(S 2 [i]);

[0026] 2.4 If i is equal to 0, then all elements in arrays P and M are -1; if i is greater than 0, then P[i - 1] = dicts(S 1 [i - 1]), M[i - 1] = dicts(S 2 [i - 1]); combined with arrays W and H, create the input feature X as: {W, H, P, M};

[0027] 2.5 Combine the input feature X and the label index into a data pair, and save the data pair to data; if i < n, then i++, and repeat steps 2.3 and 2.4; in a new round of iteration, recalculate the value of the label index, then determine which elements in arrays P and M need to be assigned according to the value of i to obtain the input feature X. Finally, save the data pair to data for training the neural network model.

[0028] Furthermore, the training process of the neural network model is as follows:

[0029] First, the feature X = {W, H, P, M} is input into the model, and the expansion layer reduces it from four - dimensional to a one - dimensional array; second, the hidden layer and the output layer start to learn the association between the input feature and the output feature; then, use the SoftMax function to select the index number of the neuron with the highest probability on the output layer as the classification result Then, use the cross - entropy loss function to calculate the classification result The gap between the label index is combined with the gap and the backpropagation method to update the model parameters, including the weights and biases of the neurons; finally, a trained model is obtained.

[0030] Further, use the trained model to process the array S 1 and the array S 2 to predict the elements in it, including:

[0031] (1) Obtain the basic features of n modules, then create arrays W and H to store the widths and heights of the n modules respectively, and at the same time create two arrays S1 and S2 with n elements and initial values of -1;

[0032] (2) The i-th time, input {W, H, S1, S2} into the model to get the output result y; calculate the value of S[i], that is, S1[i] = y / n, S2[i] = y % n;

[0033] (3) If i is not equal to n, increment i by 1 and then repeat step (2); otherwise, jump to step (4);

[0034] (4) When there are no more -1 elements in the S1 and S2 arrays, that is, the position prediction of all elements of the sequence pair is completed, and this sequence pair is the solution with the optimal layout planning area for these n modules.

[0035] Compared with the prior art, the present invention has the following technical features:

[0036] 1. The present invention proposes an optimal layout planning area method based on neural networks and sequence pairs for the layout planning field in integrated circuit electronic design automation, and this method can quickly and effectively find the best solution.

[0037] 2. The present invention uses open-source tools to generate the optimal solution of layout planning, and then forms a database to solve the problem of insufficient machine learning data volume; at the same time, it converts the module sequence pair into a numerical label, and the layout planning into a classification problem in machine learning, and verifies the feasibility and effectiveness of the method through experiments. Description of the Drawings

[0038] Figure 1 is the process of generating a data set using open-source tools;

[0039] Figure 2 is an example of a sequence pair representing layout planning;

[0040] Figure 3 is a schematic diagram of converting layout planning into a classification problem in machine learning;

[0041] Figure 4 is a schematic diagram of neural network model training;

[0042] Figure 5 Schematic diagram of the process for predicting the optimal solution of layout planning for new data

[0043] Figure 6 Schematic diagram of the operation result of simulated annealing

[0044] Figure 7 Schematic diagram of the operation result of the method of the present invention

[0045] Figure 8 Overall design flowchart of the method of the present invention Specific implementation manner

[0046] Regarding the problem that the training data set is opaque in the layout planning solved by the artificial intelligence method, which is a common phenomenon in the current industrial and academic circles. This invention patent of the present invention will use open-source tools to generate data sets and achieve the effect of reproducible data sets. In addition, after decades of development, the representation-based method is a layout representation in layout planning, which mainly includes Polish expressions, B*-trees, O*-trees, sequence pairs, etc. The representation of sequence pairs is relatively concise, so it becomes the layout representation form of the present invention.

[0047] Referring to the accompanying drawings, a method for optimizing the area of layout planning based on neural network and sequence pairs of the present invention includes the following steps:

[0048] Step 1, construct a layout planning database for digital integrated circuits with the number of circuit modules being n. Each piece of data in this database is used to completely represent a layout planning and consists of four arrays; one array W stores the widths of n modules, one array H stores the heights of n modules, and the other two arrays Splus and Smin represent the optimal area sequence pairs; this database will be used for the generation of training data, and its process is as Figure 1 shown.

[0049] 1.1 Select the number of modules n and the size range range of module sizes according to the actual application scenario. For example, the number of modules in the Apte circuit in the MCNC Benchmark ranges from 9 pieces, so n can be set to 9, and range can be set from 0 to the maximum value of the width or height of the Apte module, so as to improve the database coverage rate; range only specifies the size range of these n modules finally.

[0050] 1.2 According to the number of modules n and the module size range range parameters input in 1.1, use the random number function randint embedded in python to randomly generate the specific sizes of each module. The values of the specific sizes must be less than or equal to range; save the widths and heights of each module into the width array W and the height array H respectively.

[0051] 1.3 First, introduce how the relationship between two modules is represented in a sequence pair.

[0052] A sequence pair consists of two sequences S 1 (also known as the positive sequence), S 2 (also known as the negative sequence). Suppose there are module a and module b. If <...a,...b,...> in sequence S 1 and <...a,...b,...> in sequence S 2 , then module a is to the left of module b; if <...a,...b,...> in sequence S 1 and <...b,...a,...> in sequence S 2 , then module a is above module b.

[0053] Figure 2 Figure 19 is an example of a layout plan represented by a sequence pair, where S 1 : <acdbe> ，S 2 ： <cdaeb>For this purpose, two arrays Splus and Smin with size n are used to represent the positive sequence S and negative sequence S of n module sequence pairs respectively. 1 The initial values of arrays Splus and Smin are b 2 , b 0 , b 1 , b 2 ,..., b n-1 , where b i (i = 0, 1, …, n - 1) represents the module name. In practical applications, the module name can be the name of a storage block such as mem, or an instance of an IP module such as IO. Then, the shuffle function in the built-in random library of Python is used to randomly shuffle arrays Splus and Smin respectively. Finally, the shuffled arrays Splus and Smin are used as the initial solutions for the layout planning of n modules.

[0054] 1.4 Use the simulated annealing method to search for the sequence pair with the optimal area.

[0055] The input parameters of the simulated annealing method are the highest temperature T, the lowest temperature t, the cooling factor alpha, the width array W of each module in step 1.2, the height array H of each module, and the sequence pair arrays Splus and Smin in step 1.3. Simulated annealing searches for a solution with a smaller area by perturbing arrays Splus and Smin. The perturbed sequence pair arrays are Splus_disturb and Smin_disturb. The perturbation methods are as follows: randomly swap the positions of two identical elements in arrays Splus and Smin (i.e., randomly swap two modules), randomly swap two elements in array Splus (i.e., swap the upper and lower modules), randomly swap two elements in array Smin (i.e., swap the left and right modules), and randomly shuffle arrays Splus and Smin (i.e., reselect a layout plan). After the perturbation is completed, calculate the area of the sequence pair represented by the perturbed arrays Splus_disturb and Smin_disturb. If this area is smaller than the area of the sequence pair represented by arrays Splus and Smin, then assign arrays Splus_disturb and Smin_disturb to arrays Splus and Smin respectively to achieve the purpose of using arrays Splus_disturb and Smin_disturb as the optimal solutions. If this area is larger than the area represented by arrays Splus and Smin, then accept this worse solution with a probability of (exp(-delta / T), where delta is the difference between the two areas), otherwise discard it. Through steps such as cooling the temperature, perturbing the sequence pair, and calculating the area, etc., the simulated annealing method ends until the temperature is lower than the lowest temperature t. Finally, arrays Splus and Smin are used as the sequence pairs with the optimal area for n modules.

[0056] 1.5 Save the width array W, height array H, and the optimal area sequence pairs Splus and Smin of the layout planning area of each module into the digital integrated circuit layout planning database for subsequent machine learning use. The data in this database contains n optimal area sequence pairs of modules. Therefore, the prediction results of the model trained with these optimal area data are theoretically also optimal in area.

[0057] Since a large amount of raw data is required for machine learning to train the model, all steps from step 1.2 to step 1.5 will be repeatedly executed to obtain multiple copies of data. For example, if 10,000 copies of raw data are required, the above steps need to be repeatedly executed 10,000 times. In step 1.5, each set of data is saved to the database. Therefore, when the program execution ends, the database will have 10,000 sets of data.

[0058] Step 2: Convert the layout represented by the sequence pair in the layout planning into a classification problem in machine learning.

[0059] Extract a set of data from the database obtained in step 1. This set of data contains four arrays W, H, Splus, and Smin. Store the sequence pairs Splus and Smin in S 1 and S 2 respectively; calculate the n label values index constructed by the n elements in the array S 1 and the array S 2 . At the same time, create a positive sequence pair array P and a negative sequence pair array M to store the elements whose positions have been determined, and use -1 to replace the elements whose positions have not been determined. Then, the data pair composed of the input feature X: {W, H, P, M} and the label index is written into a new database, which will be used for model training. In this step, a set of data is reconstructed into n copies of data to train the model to have the ability to predict the n elements in the sequence pair. It should be noted that the value range of the label index is: 0 to (n 2 -1), and the label index is an integer. Therefore, this problem is transformed into a machine learning classification problem with the input feature X and the number of output categories n 2 .

[0060] The process of converting the sequence pair into the data required for machine learning is as Figure 3 shown.

[0061] 2.1 Export data from the database constructed in step 1, including the array W storing the widths of n modules, the array H storing the heights of n modules, and the optimal area sequence pairs Splus and Smin. Store the sequence pairs Splus and Smin in S 1 and S 2 respectively;

[0062] 2.2 Encode each module.

[0063] For n modules, the module names are b 0 , b 1 , b 2 ,..., b n-1 . If the selected encoding method is b i = i, then the encoded modules are: 0, 1, 2,..., n - 2, n - 1; Subsequently, create a dictionary dicts, where the keys of the dictionary are the module names and the values are the encoding numbers. This dictionary can map the module names to the corresponding numbers when creating classification labels, that is, dicts(b i ) = i. It should be noted that the sequence pair formed before module encoding and the sequence pair formed after encoding represent the same layout plan.

[0064] 2.3 Create classification labels.

[0065] In this solution, the input features of the neural network model are composed of a quadruple, namely {W, H, P, M}, where W is an array of the widths of n modules, H is an array of the heights of n modules, P is an array of the determined elements in the positive sequence of the sequence pair, and if an element is not determined, it is replaced by -1. M is an array of the determined elements in the negative sequence of the sequence pair, and if an element is not determined, it is replaced by -1. For example, assume the number of modules is 5, W = [4, 4, 6, 8, 8], H = [6, 6, 6, 5, 5], S1 = [b 3 , b 1 , b 2 , b 0 , b 4 , S2 = [b 0 , b 2 , b 1 , b 4 , b 3 . At this time, two elements in the arrays P and M have been determined, so P = [3, 1, -1, -1, -1], M = [0, 2, -1, -1, -1].

[0066] First, initialize the elements in the arrays P and M to -1. -1 represents that the value at this position in the sequence has not been determined. Let i = 0, then use the label generation formula to calculate the label: index = n * dicts(S 1 [i]) + dicts(S 2 [i]). For example: S 1 [i] = b 2 , S 2 [i] = b 1 , n = 5, then index = 5 * 2 + 1 = 11. In this step, S 1 , S 2 The numbers of each element in it are unique, so the obtained index is also unique. Therefore, using the index value as the classification label in the model does not have the problem of ambiguity. Since the value range of the index is: 0 to (n 2 - 1), the scale of the problem at each step becomes n 2 , thereby reducing the complexity of the search space.

[0067] 2.4 Merge arrays into machine learning input features.

[0068] If i is equal to 0, all elements of arrays P and M are -1; predict the values of P[0] and M[0] based on P (all elements are -1 at this time), M (all elements are -1 at this time), W, and H.

[0069] If i is greater than 0, then P[i - 1] = dicts(S 1 [i - 1]), M[i - 1] = dicts(S 2 [i - 1]), which means that the element at position i - 1 in the positive sequence is determined to be dicts(S 1 [i - 1]), and the element at position i - 1 in the negative sequence is determined to be dicts(S 2 [i - 1]). Then, combined with arrays W and H in step 2, create the input feature X as: {W, H, P, M}. When i = 1, at this time P[0] and M[0] have values which are dicts(S1[0]) and dicts(S2[0]) respectively. At this time, the model will predict the values of P[1] and M[1] based on P (P[0] has a value and the others are -1), M (M[0] has a value and the others are -1), W, and H, and so on.

[0070] For example: If i = 0, then {W, H, P, M} = [[4, 4, 6, 8, 8], [6, 6, 6, 5, 5], [-1, -1, -1, -1, -1], [-1, -1, -1, -1, -1]]; if i = 1, then {W, H, P, M} = [[4, 4, 6, 8, 8], [6, 6, 6, 5, 5], [3, -1, -1, -1, -1], [0, -1, -1, -1, -1]]; if i = 2, then {W, H, P, M} = [[4, 4, 6, 8, 8], [6, 6, 6, 5, 5], [3, 1, -1, -1, -1], [0, 2, -1, -1, -1]].

[0071] 2.5 Combine the input feature X and the label index to form a data pair, and save the data pair into data. If i < n, then increment i by 1, and repeat steps 2.3 and 2.4. In a new round of iteration, recalculate the value of the label index, that is, index = n * dicts(S1[i]) + dicts(S2[i]). Then, according to the value of i, determine which elements in arrays P and M need to be assigned values to obtain the input feature X. Finally, save the data pair into data.

[0072] 2.6 When the above loop terminates, n pieces of data are saved in data. These n pieces of data are used to train the model to have the ability to predict n elements in the sequence pair. Finally, save all the data in data into a new database. The next time training is performed, directly read this file, which saves time for machine learning training.

[0073] Step 3: After completing the above two points, the construction of the neural network model can be carried out.

[0074] This solution uses a multi-layer perceptron (MLP) to construct a neural network model. The input feature of the model is a four-dimensional element {W, H, P, M}, and the number of output neurons is n 2 (n is the number of modules), the number of hidden layers is 5 layers, and there is also an unfolding layer. The connection method between each layer is a full connection. The layers that the entire model passes through from input to output are the unfolding layer, the hidden layer, and the output layer in sequence; among them, the unfolding layer unfolds the input four-dimensional element into a one-dimensional array; the sizes of the hidden layers are (4 * n, 128), (128, 256), (256, 512), (512, 256), and (256, 128) respectively, and its role is to fit the relationship between the input feature and the output feature; the size of the output layer is (128, n 2 ), and its role is to constrain the number of classes of the final classification. Other hyperparameters are selected as follows:

[0075] Table 1 Statistical Table of Neural Network Model Parameters

[0076]

[0077] Input the training data in the new database into the model to obtain a prediction result. Calculate the loss amount according to the gap between the prediction result and the label, and use the backpropagation method to update the model parameters, thereby narrowing the gap between the prediction result and the label. Finally, obtain a model with the optimal generalization ability, as Figure 4 shown.

[0078] The training process of the model is as follows: First, the feature X = {W, H, P, M} is input into the model, and the expansion layer reduces it from four dimensions to a one-dimensional array. Second, the hidden layer and the output layer start to learn the association between the input features and the output features. Then, the SoftMax function in the PyTorch library is used to select the index number of the neuron with the highest probability on the output layer as the classification result. Then, the cross-entropy loss function is used to calculate the gap between the classification result and the label index, and the gap and the backpropagation method are combined to update the model parameters, which include the weights and biases of the neurons. Finally, a trained model is obtained for the prediction of sequence pairs.

[0079] For example: When the input feature X = {W, H, P, M} = [[4, 4, 6, 8, 8], [6, 6, 6, 5, 5], [-1, -1, -1, -1, -1], [-1, -1, -1, -1, -1]] and index = 15, to train the model to have the ability to predict P[0] and M[0], if at this time then the training has no loss; if at this time is not equal to 15, then the cross-entropy function is used to calculate the loss. When the input feature X = {W, H, P, M} = [[4, 4, 6, 8, 8], [6, 6, 6, 5, 5], [3, -1, -1, -1, -1], [0, -1, -1, -1, -1]] and index = 7, to train the model to have the ability to predict P[1] and M[1]; when the input feature X = {W, H, P, M} = [[4, 4, 6, 8, 8], [6, 6, 6, 5, 5], [3, 1, -1, -1, -1], [0, 2, -1, -1, -1]] and index = 11, to train the model to have the ability to predict P[2] and M[2]; when the input feature X = {W, H, P, M} = [[4, 4, 6, 8, 8], [6, 6, 6, 5, 5], [3, 1, 2, -1, -1], [0, 2, 1, -1, -1]] and index = 4, to train the model to have the ability to predict P[3] and M[3]; when the input feature X = {W, H, P, M} = [[4, 4, 6, 8, 8], [6, 6, 6, 5, 5], [3, 1, 2, 0, -1], [0, 2, 1, 4, -1]] and index = 23, to train the model to have the ability to predict P[4] and M[4]; Since the same model is used throughout the training process, this model has the ability to predict the complete sequence pair.

[0080] Step 4, use the trained model for the array S 1 and the array S 2 Predict the elements in it until there are no more -1 elements in arrays S1 and S2, that is, complete the position prediction of all elements in the sequence, and this sequence pair S 1 、S 2 is the optimal solution for the layout planning area of these n modules.

[0081] In practical applications, for the optimal solution of the layout planning problem with n modules in terms of area, its processing process is as Figure 5 shown.

[0082] (1) Obtain the basic features (width and height) of the n modules, then create array W and array H to store the widths and heights of the n modules respectively, and at the same time create two arrays S1 and S2 with n elements and initial values of -1.

[0083] (2) Input {W, H, S1, S2} into the model for the i-th time (i is initially 0), and get the output result y. Reverse-derive the value of S[i] according to the label generation formula, that is, S1[i] = y / n, S2[i] = y % n. For example: when i = 0, W = [8, 4, 4, 4, 4], H = [4, 3, 5, 5, 6], S1 = [-1, -1, -1, -1, -1], S2 = [-1, -1, -1, -1, -1]. At this time, it is to predict the values of S1[0] and S2[0]. Assume that the model output result y = 2, then S1[0] = 2 / 5 = 0, S2[0] = 2 % 5 = 2. When i = 1, the features {W, H, S1, S2} input into the model = [[8, 4, 4, 4, 4], [4, 3, 5, 5, 6], [0, -1, -1, -1, -1], [2, -1, -1, -1, -1]], and let the model predict the values of S1[1] and S2[1]. This process is used to construct the n pieces of data mentioned in 2.6 in step 2.

[0084] (3) If i is not equal to n, increment i by one and then repeat step (2); otherwise, jump to step (4).

[0085] (4) At this time, there are no more -1 elements in arrays S1 and S2, that is, complete the position prediction of all elements in the sequence, and this sequence pair is the optimal solution for the layout planning area of these n modules.

[0086] The modeling method used in the present invention changes the time complexity of each step to n 2 , and the running speed becomes faster. Each step selects one from n 2 categories, and there is an order-of-magnitude improvement compared with other methods in terms of complexity.

[0087] In subsequent layout planning and design, for representing the layout using the representation-based method, the O*-tree or Polish expression can be used to replace the sequence pair of this method; for generating datasets using open-source tools, for the heuristic method of simulated annealing, the particle swarm optimization method can be used to achieve the same effect. Therefore, the particle swarm optimization method is also an alternative in this method; for the part of building a neural network, the Convolutional Neural Networks (CNN) or Reinforcement Learning (RL) can be used to replace it. Even though previous researchers have used reinforcement learning to solve layout planning, when combined with the modeling method in this method, the effect will be better than that of previous researchers using reinforcement learning alone.

[0088] This method has been verified on the open-source and industry-authoritative MCNC Benchmark. Apte is a Benchmark in MCNC Benchmark, which contains 9 modules with module sizes ranging from 286 to 3186 microns, and each module is a rectangle. The verification method is as follows:

[0089] Input the matrix composed of the module sizes W, H in the Apte dataset and two arrays P and M with 9 elements and values of -1 into the model to obtain the output value y of the model. Fill the output value into the arrays P and M. The specific method is as follows: Assume i = 0, P[i] = y / 9, M[i] = y % 9, and i++. Then bring {W, H, P, M} into the model to get a new value y, and fill y into P and M in the above way. Repeat the above steps until there are no -1 elements in P and M, that is, i == 9.

[0090] To compare the superiority of this method, the same experiment is carried out using simulated annealing. The input parameters of simulated annealing, such as the highest temperature, the lowest temperature, and the cooling factor, are the same as those in step 1. The final experimental results are as Figure 6 , shown in Figure 7, the area obtained by this method is 4.75x10 7 , and the running time is 2.2s. While the area obtained by simulated annealing is 4.82x10 7 , and the running time is 11.9s. The experiment shows that this method can effectively and quickly find the optimal solution for the layout planning area.

[0091] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the various embodiments of the present application, and should all be included in the protection scope of the present application.< / cdaeb> < / acdbe>

Claims

1. An optimal method for layout planning area based on neural network and sequence pair, characterized in that, it includes: Construct a layout planning database for digital integrated circuits with the number of circuit modules being n. The data in this database is used to completely represent a layout planning and consists of four arrays: One array W stores the widths of n modules, one array H stores the heights of n modules, and the other two arrays Splus and Smin represent the optimal area sequence pair; Convert the layout represented by sequence pairs in the layout planning into a classification problem in machine learning, including: extracting a set of data [W, H, Splus, Smin] from the digital integrated circuit layout planning database, and storing the sequence pairs Splus and Smin in S 1 and S 2 respectively; calculating the n label values index constructed by the n elements in the array S 1 and the array S 2 At the same time, create a positive sequence pair array P and a negative sequence pair array M to store the elements whose positions have been determined, and use -1 to replace the elements whose positions have not been determined; then, the training data pairs composed of the input features X: {W, H, P, M} and the label index are written into a new database, and this database will be used for neural network model training; Build a neural network model using a multi-layer perceptron. The entire model from input to output is the unfolding layer, the hidden layer, and the output layer in sequence. The input feature of the model is a four-dimensional element {W, H, P, M}; Input the training data in the new database into the model to obtain a prediction result, calculate the loss based on the gap between the prediction result and the label, and use the backpropagation method to update the model parameters, thereby narrowing the gap between the prediction result and the label, and finally obtaining a model with the optimal generalization ability as the trained model; Use the trained model to predict the elements in array S 1 and array S 2 until there are no more elements with -1 in arrays S1 and S2, that is, the position prediction of all elements in the sequence is completed. This sequence pair S 1 and S 2 is the optimal solution for the layout planning area of these n modules.

2. The optimal method for layout planning area based on neural network and sequence pair according to claim 1, characterized in that, the construction of the layout planning database for digital integrated circuits with the number of circuit modules being n includes: Select the number of modules n and the size range range of module sizes according to the actual application scenario; According to the number of modules n and the size range range of module sizes, use a random function to randomly generate the specific sizes of each module, and then save the widths and heights of each module into the width array W and the height array H respectively; Use two arrays Splus and Smin of size n to represent the positive sequence S and negative sequence S of n module sequence pairs respectively 1 , and the negative sequence S 2 . The initial values of arrays Splus and Smin are b 0 , b 1 , b 2 ,..., b n-1 , where b i (i = 0, 1, … n - 1) represents the module name; then randomly shuffle arrays Splus and Smin respectively, and finally use the shuffled arrays Splus and Smin as the initial solutions for the layout planning of n modules Use the simulated annealing method to search for the sequence pair with the optimal area, and save the width array W of each module, the height array H, the optimal area sequence pair Splus, and Smin of the layout planning into the layout planning database for digital integrated circuits.

3. The optimal method for layout planning area based on neural network and sequence pair according to claim 2, characterized in that, the use of the simulated annealing method to search for the sequence pair with the optimal area includes: The input parameters of the simulated annealing method are the highest temperature T, the lowest temperature t, the cooling factor alpha, the width array W of each module, the height array H of each module, and the sequence pair arrays Splus and Smin; Simulated annealing searches for a solution with a smaller area by perturbing the arrays Splus and Smin. The perturbed sequence pair arrays are Splus_disturb and Smin_disturb, where the perturbation methods are: randomly swapping the positions of two identical elements in the arrays Splus and Smin, randomly swapping two elements in the array Splus, randomly swapping two elements in the array Smin, and randomly shuffling the arrays Splus and Smin; After the perturbation is completed, calculate the area of the sequence pair represented by the perturbed arrays Splus_disturb and Smin_disturb. If this area is smaller than the area of the sequence pair represented by the arrays Splus and Smin, then assign the arrays Splus_disturb and Smin_disturb to the arrays Splus and Smin respectively, in order to achieve the purpose of taking the arrays Splus_disturb and Smin_disturb as the optimal solutions; if this area is larger than the area of the sequence pair represented by the arrays Splus and Smin, then accept this suboptimal solution with a probability of exp(-delta / T), otherwise discard it; where delta is the difference between the two areas; when the temperature is lower than the lowest temperature t, end the simulated annealing method, and finally take the arrays Splus and Smin as the optimal area sequence pair of n modules.

4. The optimal layout planning area method based on neural network and sequence pair according to claim 1, characterized in that transforming the layout represented by the sequence pair in the layout planning into a classification problem in machine learning specifically includes: 2.1 Export data from the digital integrated circuit layout planning database, including an array W storing the widths of n modules, an array H storing the heights of n modules, and the optimal area sequence pairs Splus and Smin, and store the sequence pairs Splus and Smin in S 1 and S 2 respectively; 2.2 For n modules with module names b 0 , b 1 , b 2 ,..., b n-1 , if the selected encoding method is b i = i, then the encoded modules are: 0, 1, 2,..., n - 2, n - 1; subsequently create a dictionary dicts, where the keys of the dictionary are the module names and the values are the encoding numbers. This dictionary can map the module names to the corresponding numbers when creating classification labels, that is, dicts(b i ) = i; 2.3 Construct the input feature quadruple {W, H, P, M} of the neural network model, where W is the width array of n modules, H is the height array of n modules, and P and M are the arrays of the determined elements of the positive sequence and the negative sequence in the sequence pair respectively. If an element in P and M has not been determined, it is replaced by -1; Initialize all elements in arrays P and M to -1. Let i = 0 and calculate the label: index = n * dicts(S 1 [i]) + dicts(S 2 [i]); 2.4 If i equals 0, all elements of arrays P and M are -1; if i is greater than 0, then P[i - 1] = dicts(S 1 [i - 1]), M[i - 1] = dicts(S 2 [i - 1]); combined with arrays W and H, create the input feature X as: {W, H, P, M}; 2.5 Combine the input feature X and the label index into a data pair, and save the data pair into data; if i < n, then i++, and repeat steps 2.3 and 2.4; in a new round of iteration, recalculate the value of the label index, then judge which elements in the arrays P and M need to be assigned according to the value of i to obtain the input feature X, and finally, save the data pair into data for the training of the neural network model.

5. The optimal layout planning area method based on neural network and sequence pair according to claim 1, characterized in that the training process of the neural network model is: First, the feature X = {W, H, P, M} is input into the model, and the expansion layer reduces it from four dimensions to a one-dimensional array. Secondly, the hidden layer and the output layer start to learn the association between the input features and the output features. Then, the SoftMax function is used to select the index number of the neuron with the highest probability on the output layer as the classification result. Then, the cross-entropy loss function is used to calculate the gap between the classification result and the label index, and the gap and the backpropagation method are combined to update the model parameters, where the parameters include the weights and biases of the neurons. Finally, a trained model is obtained.

6. The optimal layout planning area method based on neural network and sequence pair according to claim 1, characterized in that Use the trained model to predict the elements in array S 1 and array S 2 including: (1) Obtain the basic features of n modules, then create arrays W and H to save the widths and heights of n modules respectively, and at the same time create two arrays S1 and S2 with n elements and an initial value of -1; (2) Input {W, H, S1, S2} into the model for the i-th time to obtain the output result y; calculate the value of S[i], that is, S1[i] = y / n, S2[i] = y % n; (3) If i is not equal to n, increment i by 1 and then repeat step (2); otherwise, jump to step (4); (4) When there are no -1 elements in the S1 and S2 arrays, that is, the position prediction of all elements of the sequence pair is completed, this sequence pair is the optimal solution for the layout planning area of these n modules.

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