Silver mirror, method for preparing silver mirror and LED chip

Abstract

The application provides a silver mirror, a silver mirror preparation method and an LED chip. The silver mirror comprises a stress buffer layer, the stress buffer layer is a periodic structure in which a Ti layer and a Pt layer are sequentially stacked, the stress of the existing silver mirror can be greatly reduced through the structure, the problem of silver mirror falling off is solved, the yield of the light emitting diode chip is improved, and specifically, the stress of the silver mirror can be changed by adjusting the thickness of the Ti layer and the Pt layer.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of LED, in particular to a silver reflector, a silver reflector preparation method and an LED chip. BACKGROUND

[0002] Light emitting diode (LED) is a kind of semiconductor electronic component that can emit light, which attracts more and more researchers due to its small size, high brightness, low energy consumption and other characteristics.

[0003] Light emitting diode chip is widely used in lighting and display fields due to its green environmental protection, energy saving, high efficiency, reliability and other advantages. In recent years, with the support of national policy and good competition of various manufacturers, the process of light emitting diode chip has rapidly progressed, and gradually evolved into positive structure, flip chip structure, vertical structure, etc. Among them, the light emitting diode with flip chip structure and vertical structure needs reflector to reflect the light emitted by the active region of the diode, so as to improve the light emitting efficiency of the diode. However, the traditional silver reflector has large stress, which leads to the risk of falling off of the silver reflector in some areas of the wafer after the silver reflector is prepared on the wafer, and finally causes yield loss of the light emitting diode chip. Therefore, how to solve the problem of falling off of the silver reflector has become an urgent problem to be solved. SUMMARY

[0004] Therefore, the present application aims to provide a silver reflector, a silver reflector preparation method and an LED chip, so as to solve the problem of falling off of the silver reflector in the prior art due to large stress of the silver reflector.

[0005] According to the silver reflector in the embodiment of the present application, the stress buffer layer is a periodic structure in which a Ti layer and a Pt layer are sequentially stacked.

[0006] Preferably, the silver reflector further comprises a reflection layer, a protection layer, a barrier etching layer and an adhesion layer, and the reflection layer, the protection layer, the stress buffer layer, the barrier etching layer and the adhesion layer are sequentially stacked.

[0007] Preferably, the thickness of the Ti layer is 1000 Å to 50000 Å, and the thickness of the Pt layer is 200 Å to 20000 Å.

[0008] Preferably, the thickness of the reflection layer is 500 Å to 3000 Å, the thickness of the protection layer is 100 Å to 2000 Å, the thickness of the barrier etching layer is 100 Å to 20000 Å, and the thickness of the adhesion layer is 50 Å to 200 Å.

[0009] Preferably, the reflective layer is an Ag layer, the protective layer is a Ni layer, the etching-resistant layer is an Au layer, a Pt layer, or a mixed layer in which an Au layer and a Pt layer are alternately stacked, and the adhesion layer is a Ti layer.

[0010] Preferably, the thickness of the Au layer in the etching-resistant layer is 500 Å to 20,000 Å, and the thickness of the Pt layer in the etching-resistant layer is 100 Å to 3,000 Å.

[0011] According to the method for manufacturing the silver mirror in one of the embodiments of the present application, for manufacturing the silver mirror described above, the method comprises:

[0012] When depositing the stress buffer layer, the Ti layer and the Pt layer are alternately stacked.

[0013] Preferably, the method further comprises:

[0014] providing a wafer;

[0015] stacking, on the wafer, a reflective layer, a protective layer, the stress buffer layer, an etching-resistant layer, and an adhesion layer in sequence.

[0016] Preferably, the period of alternately stacking the Ti layer and the Pt layer is 2 to 10.

[0017] According to the LED chip in one of the embodiments of the present application, the LED chip comprises the silver mirror described above.

[0018] Compared with the prior art, by arranging a stress buffer layer in the silver mirror, the stress buffer layer is a periodic superlattice structure in which a Ti layer and a Pt layer are alternately stacked, which can greatly reduce the stress of the existing silver mirror, solve the problem of the silver mirror falling off, and improve the yield of the light-emitting diode chip. Specifically, the stress of the silver mirror can be changed by adjusting the thickness of the Ti layer and the Pt layer. BRIEF DESCRIPTION OF DRAWINGS

[0019] Figure 1 Fig. 1 is a structural schematic diagram of the silver mirror in one of the embodiments of the present application;

[0020] Figure 2 Fig. 2 is a structural schematic diagram of the stress buffer layer in one of the embodiments of the present application;

[0021] Figure 3 Fig. 3 is a flowchart of the method for manufacturing the silver mirror in one of the embodiments of the present application;

[0022] Figure 4 Fig. 4 is a structural schematic diagram of the silver mirror in one of the embodiments of the present application;

[0023] Figure 5 Fig. 5 is a structural schematic diagram of the silver mirror in one of the embodiments of the present application;

[0024] Figure 6 A structure diagram of a flip-chip light emitting diode chip in the embodiment nine of the present application;

[0025] Figure 7 A structure diagram of a flip-chip light emitting diode chip in the embodiment nine of the present application; DETAILED DESCRIPTION

[0026] In order to facilitate the understanding of the present application, the present application will be described in more detail below with reference to the relevant drawings. The drawings show several embodiments of the present application. However, the present application can be realized in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0027] It should be noted that when an element is referred to as being "fixed to" another element, it can be directly on the other element or there can be a middle element. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or there can be a middle element. The terms "vertical", "horizontal", "left", "right", and similar expressions used herein are for illustrative purposes only.

[0028] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. The terminology used in the description of the present application herein only for the purpose of describing specific embodiments and is not intended to limit the present application. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0029] Embodiment one

[0030] Please refer to Figure 1 and Figure 2 , Figure 1 A structure diagram of a silver reflector in the embodiment one of the present application, Figure 2 A structure diagram of a stress buffer layer in the embodiment one of the present application, wherein the silver reflector 11 includes a reflective layer 111, a protective layer 112, a stress buffer layer 113, an etching-resistant layer 114, and an adhesion layer 115 which are sequentially stacked.

[0031] In this embodiment, the stress buffer layer 113 is a periodic superlattice structure formed by alternating layers of Ti layer 1131 and Pt layer 1132. Specifically, Ti layer 1131 is first deposited on the protective layer 2, and then Pt layer 1132 is deposited on Ti layer 1131. Specifically, the stress buffer layer 113 is composed of 2 to 10 alternating layers of Ti layer 1131 and Pt layer 1132, for example, 9 cycles, that is, a total of 9 layers of Ti layer 1131 are deposited.

[0032] As an example, and not a limitation, in some preferred embodiments of this example, the thickness of the Ti layer 1131 is 1000 Å to 50000 Å, for example, 3000 Å, 4000 Å, 5000 Å, etc.; the thickness of the Pt layer 1132 is 200 Å to 20000 Å, for example, 1000 Å, 2000 Å, 3000 Å, etc.; and the thickness of the reflective layer 111 is 500 Å to 3000 Å, for example, 1... The thickness of the protective layer 112 is 100Å to 2000Å, for example, 500Å, 1000Å, 1500Å, etc.; the thickness of the barrier etching layer 114 is 100Å to 20000Å, for example, 200Å, 600Å, 800Å, etc.; the thickness of the adhesion layer 115 is 50Å to 200Å, for example, 60Å, 80Å, 100Å, etc.

[0033] Specifically, the reflective layer 111 is an Ag layer, the protective layer 112 is a Ni layer, the barrier etching layer 114 is one or a mixture of Au and Pt layers, and the adhesion layer 115 is a Ti layer. The thickness of the Au layer in the barrier etching layer 114 is 500 Å to 20000 Å, for example, 600 Å, 2000 Å, 10000 Å, etc.; the thickness of the Pt layer in the barrier etching layer 114 is 100 Å to 3000 Å, for example, 200 Å, 1000 Å, 2000 Å, etc.

[0034] Example 2

[0035] Please see Figure 3 The image shows a method for preparing a silver reflector according to Embodiment 2 of the present invention, used to prepare the silver reflector in Embodiment 1 above. The method specifically includes steps S201 to S206, wherein:

[0036] Step S201: Provide a wafer.

[0037] Step S202: Deposit a reflective layer with a thickness of 500 Å to 3000 Å.

[0038] Specifically, a reflective layer is deposited on the wafer; the reflective layer is an Ag layer.

[0039] Step S203: Deposit a protective layer with a thickness of 100 Å to 2000 Å.

[0040] The protective layer is a Ni layer.

[0041] In step S204, a stress buffer layer is deposited, with a thickness of 1200 Å to 70000 Å.

[0042] Specifically, the Ti layer and the Pt layer are alternately and sequentially stacked on the protective layer to form a superlattice structure of the Ti layer and the Pt layer, wherein the period of the Ti layer and the Pt layer alternately stacked is 2 to 10, the thickness of a single Ti layer in the stress buffer layer is 500 Å to 5000 Å, and the thickness of a single Pt layer is 100 Å to 2000 Å.

[0043] In step S205, a barrier etching layer is deposited, with a thickness of 100 Å to 20000 Å.

[0044] The barrier etching layer is one of an Au layer and a Pt layer or a mixed layer, and it can be understood that the Au layer is deposited on the Pt layer of the stress buffer layer alone, or the Pt layer is deposited on the Pt layer of the stress buffer layer alone, or the Au layer is first deposited on the Pt layer of the stress buffer layer, and then the Pt layer is deposited on the Au layer.

[0045] In step S206, an adhesion layer is deposited, with a thickness of 50 Å to 200 Å.

[0046] The adhesion layer is a Ti layer.

[0047] In summary, the stress buffer layer is a periodic superlattice structure of the Ti layer and the Pt layer alternately and sequentially stacked, which can greatly reduce the stress of the existing silver mirror, solve the problem of the silver mirror falling off, improve the yield of the light emitting diode chip, and specifically, the thickness of the Ti layer and the Pt layer can be adjusted to change the stress of the silver mirror.

[0048] Embodiment three

[0049] The embodiment three of the present application provides a silver mirror, Figure 4This is a schematic diagram of the structure of the silver reflector in Embodiment 3 of the present invention. In this embodiment, a reflective layer 111, a protective layer 112, a stress buffer layer 113, a barrier etching layer 114, and an adhesion layer 115 are sequentially stacked on a wafer. The reflective layer 111 is an Ag layer with a thickness of 1500 Å; the protective layer 112 is a Ni layer with a thickness of 500 Å; the stress buffer layer 113 is composed of three cycles of Ti layers 1131 and Pt layers 1132, wherein each Ti layer 1131 has a thickness of 1500 Å and each Pt layer 1132 has a thickness of 500 Å; the barrier etching layer 114 is composed of a single Au layer 1141 and a single Pt layer 1142, wherein the Au layer 1141 has a thickness of 2000 Å and the Pt layer 1142 has a thickness of 500 Å; the adhesion layer 115 is a Ti layer with a thickness of 50 Å. The stress of the silver reflector 11 is 146 N / m².

[0050] Example 4

[0051] Embodiment 4 of the present invention provides a silver reflector. Figure 5 This is a schematic diagram of the structure of the silver reflector in Embodiment 4 of the present invention. In this embodiment, a reflective layer 111, a protective layer 112, a stress buffer layer 113, a barrier etching layer 114, and an adhesion layer 115 are sequentially stacked on a wafer. The reflective layer 111 is an Ag layer with a thickness of 1500 Å; the protective layer 112 is a Ni layer with a thickness of 500 Å; the stress buffer layer 113 is composed of five cycles of Ti layers 1131 and Pt layers 1132, wherein each Ti layer 1131 has a thickness of 1000 Å and each Pt layer 1132 has a thickness of 500 Å; the barrier etching layer 114 is a Pt layer with a thickness of 1000 Å; and the adhesion layer 115 is a Ti layer with a thickness of 50 Å. The stress of the silver reflector 11 is 120 N / m².

[0052] Example 5

[0053] Embodiment 5 of the present invention provides a silver reflector. In this embodiment, a reflective layer, a protective layer, a stress buffer layer, a barrier etching layer, and an adhesion layer are sequentially stacked on a wafer. The reflective layer is an Ag layer with a thickness of 1500 Å; the protective layer is a Ni layer with a thickness of 500 Å; the stress buffer layer is composed of three cycles of Ti and Pt layers, wherein each Ti layer has a thickness of 2000 Å and each Pt layer has a thickness of 500 Å; the barrier etching layer consists of a single Au layer and a single Pt layer, wherein the Au layer has a thickness of 2000 Å and the Pt layer has a thickness of 500 Å; the adhesion layer is a Ti layer with a thickness of 50 Å. The stress of this silver reflector is 114 N / m².

[0054] Example 6

[0055] The silver mirror provided by the embodiment six of the present application comprises a reflective layer, a protective layer, a stress buffer layer, a barrier etching layer and an adhesion layer which are sequentially stacked on a wafer, wherein the reflective layer is an Ag layer with a thickness of 1500 angstroms; the protective layer is a Ni layer with a thickness of 500 angstroms; the stress buffer layer is stacked by three periods of Ti layer and Pt layer, wherein each Ti layer has a thickness of 2000 angstroms and each Pt layer has a thickness of 200 angstroms; the barrier etching layer is composed of a single Au layer and a single Pt layer, wherein the Au layer has a thickness of 2000 angstroms and the Pt layer has a thickness of 500 angstroms; and the adhesion layer is a Ti layer with a thickness of 50 angstroms. The stress of the silver mirror is 98 N / m2.

[0056] Embodiment seven

[0057] The silver mirror provided by the embodiment seven of the present application comprises a reflective layer, a protective layer, a stress buffer layer, a barrier etching layer and an adhesion layer which are sequentially stacked on a wafer, wherein the reflective layer is an Ag layer with a thickness of 1500 angstroms; the protective layer is a Ni layer with a thickness of 500 angstroms; the stress buffer layer is stacked by three periods of Ti layer and Pt layer, wherein each Ti layer has a thickness of 2000 angstroms and each Pt layer has a thickness of 200 angstroms; the barrier etching layer is an Au layer with a thickness of 3000 angstroms; and the adhesion layer is a Ti layer with a thickness of 50 angstroms. The stress of the silver mirror is 82 N / m2.

[0058] The stress of the silver mirror prepared by each embodiment is shown in Table 1.

[0059] Table 1

[0060]

[0061] As shown in the table, the stress of the silver mirror prepared by the present application is greatly reduced compared with the existing product, i.e., the stress of the silver mirror is reduced from 262 N / m2 in the existing product to 82 N / m2, which can effectively solve the problem of silver mirror falling off. In addition, the stress of the silver mirror can be adjusted by changing the thickness of the Ti layer and the Pt layer in the stress buffer layer.

[0062] Embodiment eight

[0063] The LED chip provided by the embodiment eight of the present application comprises the silver mirror in the above-mentioned embodiment one, and the silver mirror can be prepared by the preparation method of the silver mirror in the above-mentioned embodiment two.

[0064] Embodiment nine

[0065] The LED chip provided by the embodiment nine of the present application comprises the silver mirror in the above-mentioned embodiment one, and the silver mirror can be prepared by the preparation method of the silver mirror in the above-mentioned embodiment two. Figure 6The LED chip is a flip-chip light emitting diode chip, comprising an N-type semiconductor 32, an active light emitting layer 33, a P-type semiconductor layer 34, a silver reflector 11, a first insulating protective layer 35, a conductive metal layer 36, a second insulating protective layer 37 and a pad metal layer 38 deposited on a substrate 31 in sequence, wherein the silver reflector 11 is between the P-type semiconductor layer 34 and the pad metal layer 38, specifically, a reflective layer in the silver reflector 11 is close to the P-type semiconductor layer 34 and is away from the pad metal layer 38.

[0066] Embodiment ten

[0067] Embodiment ten of the present application provides an LED chip, please refer to Figure 7 The LED chip is a flip-chip light emitting diode chip, comprising an N-type semiconductor 32, an active light emitting layer 33, a P-type semiconductor layer 34, a silver reflector 11, a first insulating protective layer 35, a conductive metal layer 36, a second insulating protective layer 37 and a pad metal layer 38 deposited on a substrate 31 in sequence, wherein the silver reflector 11 is between the P-type semiconductor layer 34 and the pad metal layer 38, specifically, a reflective layer in the silver reflector 11 is close to the P-type semiconductor layer 34 and is away from the pad metal layer 38.

[0068] The above-mentioned embodiments only express several embodiments of the present application, and the description is more specific and detailed, but it cannot be understood as the limitation of the patent scope of the present application. It should be pointed out that for ordinary skilled in the art, without departing from the concept of the present application, several modifications and improvements can be made, which belong to the protection scope of the present application. Therefore, the protection scope of the present application patent should be subject to the appended claims.

Claims

1. A silver reflector, characterized in that, The system includes a stress buffer layer, which is a periodic structure consisting of Ti and Pt layers stacked sequentially. The silver mirror also includes a reflective layer, a protective layer, a barrier etching layer, and an adhesion layer. The reflective layer, the protective layer, the stress buffer layer, the barrier etching layer, and the adhesion layer are stacked sequentially. The thickness of a single Ti layer is greater than the thickness of a single Pt layer. The thickness of the Ti layer is 1000 Å to 50000 Å, and the thickness of the Pt layer is 200 Å to 20000 Å. The alternating stacking period of the Ti and Pt layers is 2 to 10. The thickness of a single Ti layer in the stress buffer layer is 500 Å to 5000 Å, and the thickness of a single Pt layer is 100 Å to 2000 Å. The reflective layer is an Ag layer, the protective layer is a Ni layer, the barrier etching layer is an Au layer, a Pt layer, or a mixed layer of Au and Pt layers stacked sequentially, and the adhesion layer is a Ti layer.

2. The silver reflector according to claim 1, characterized in that, The thickness of the reflective layer is 500 Å to 3000 Å, the thickness of the protective layer is 100 Å to 2000 Å, the thickness of the barrier etching layer is 100 Å to 20000 Å, and the thickness of the adhesion layer is 50 Å to 200 Å.

3. The silver reflector according to claim 2, characterized in that, The thickness of the Au layer in the barrier etching layer is 500 Å to 20000 Å, and the thickness of the Pt layer in the barrier etching layer is 100 Å to 3000 Å.

4. A method for preparing a silver reflector, characterized in that, The method for preparing the silver reflector according to any one of claims 1-3 comprises: When depositing the stress buffer layer, Ti and Pt layers are stacked alternately in sequence.

5. The method for preparing a silver reflector according to claim 4, characterized in that, The preparation method further includes: Provide one wafer; A reflective layer, a protective layer, a stress buffer layer, a barrier etching layer, and an adhesion layer are sequentially stacked on the wafer.

6. The method for preparing a silver reflector according to claim 4, characterized in that, The control Ti layer and Pt layer are stacked alternately in a period of 2 to 10 cycles.

7. An LED chip, characterized in that, Includes the silver reflector as described in any one of claims 1-3.

Images