VSC outer loop voltage control method based on active disturbance rejection

Abstract

The present invention provides a VSC outer-loop voltage control method with self-interference rejection, comprising the following steps: S1. constructing a VSC mathematical model of a DC distribution network and standardizing the mathematical model to obtain a VSC outer-loop voltage interference component; S2. compensating the VSC outer-loop voltage interference component; S3. judging whether the compensation processing of the VSC outer-loop voltage meets the set requirements, and if so, inputting the VSC outer-loop voltage control quantity into the inner-loop voltage control module; the present invention can estimate and compensate for all uncertainties and disturbances suffered by the VSC outer-loop voltage control part, thereby solving the problems of large overshoot and poor interference rejection under traditional PI control of the VSC voltage outer loop, thereby better controlling the DC bus voltage and ensuring system robustness.

Description

Technical Field

[0001] The present invention relates to the field of power distribution networks, and in particular to a VSC outer loop voltage control method with auto-interference rejection. Background Art

[0002] With the development of new energy technologies such as photovoltaics, wind power, and batteries, DC (direct current) distribution networks are gaining increasing attention due to their flexibility and convenience in integrating these renewable energy sources. In DC distribution networks, VSCs (voltage source converters) are key components responsible for rectification, making VSC control crucial for the stable operation of DC distribution systems.

[0003] Dual-loop control, consisting of an outer voltage loop and an inner current loop, is a widely used traditional control strategy for VSCs. Both loops utilize a conventional synchronous coordinate system PI controller. For the outer voltage loop, PI control eliminates errors based on error feedback. However, directly eliminating the error between the target and actual behavior can result in excessive initial control force, causing system overshoot. Furthermore, because VSCs are nonlinear hybrid control systems, conventional PI control methods are no longer able to maintain satisfactory controller performance in multi-disturbance, strongly coupled, nonlinear DC distribution systems.

[0004] Therefore, in order to solve the above technical problems, it is urgent to propose a new technical means. Summary of the Invention

[0005] In view of this, the purpose of the present invention is to provide a VSC outer-loop voltage control method with self-interference rejection, which can estimate and compensate for all uncertainties and disturbances to which the VSC outer-loop voltage control part is subject, thereby solving the problems of large overshoot and poor interference rejection under traditional PI control of the VSC voltage outer loop, thereby better controlling the DC bus voltage and ensuring system robustness.

[0006] The present invention provides a VSC outer loop voltage control method with auto-disturbance rejection, comprising the following steps:

[0007] S1. Construct a VSC mathematical model for the DC distribution network and standardize the mathematical model to obtain the VSC outer loop voltage interference component.

[0008] S2. Compensate for the VSC outer loop voltage interference component;

[0009] S3. Determine whether the compensation processing of the VSC outer loop voltage meets the set requirements. If so, input the VSC outer loop voltage control variable into the inner loop voltage control module.

[0010] Furthermore, in step S1, a VSC mathematical model of the DC distribution network is constructed by the following method:

[0011] Construct the dynamic differential equation of the VSC AC side of the DC distribution network:

[0012] Where: V sa 、V sb and V sc is the three-phase voltage of the AC system; V ta 、V tb and V tc is the three-phase voltage on the AC side of the VSC; L s is the sum of the equivalent inductance of the connected transformer and reactor and the transformer leakage inductance; i a 、i b and i c is the three-phase current of the AC system; R s is the equivalent resistance of the connecting transformer;

[0013] By performing dq coordinate transformation on formula (1), the mathematical model of VSC in DC distribution network is obtained:

[0014]

[0015] Where: i d is the component of the AC side current on the d-axis in the dq coordinate system; i q is the component of the AC side current on the q axis in the dq coordinate system; t is time; R s is the equivalent resistance connecting the transformer and the reactor; ω is the angular frequency of the AC system; v d is the control signal of the d-axis of VSC in the dq coordinate system; v q is the control signal of the q axis of VSC in the dq coordinate system; v sd is the component of the AC power supply voltage on the d-axis in the dq coordinate system; v sq is the component of the AC power supply voltage on the q axis in the dq coordinate system; C dc is the VSC DC side capacitance; v dc is the VSC DC side output voltage; i dc is the VSC DC side output current; R L is the DC side parallel load resistance.

[0016] Furthermore, the mathematical model is standardized to obtain the VSC outer loop voltage interference components, which specifically include:

[0017] The VSC outer loop voltage auto-disturbance rejection standard of formula (2) is constructed as follows:

[0018]

[0019] Where: w(t) is the system disturbance including external disturbance and internal disturbance caused by changes in model parameters, x is the state variable; n is the order of the state variable; y is the output, u con is the control quantity, b is the coefficient;

[0020] Extract the first-order disturbance in formula (3) to obtain the VSC anti-disturbance model:

[0021] Where f(t) is the total disturbance of the system.

[0022] Further, step S2 specifically includes:

[0023] Construct an extended state observer for the state variable i d 、i q and v dc For control, the extended state observer model is:

[0024] Where: e is the error signal; z1 is the observed value of x1, and v is the DC side voltage dc ; x1 is the state variable; z2 is the observed value of the sum of the internal and external disturbances of the system; i d is the d-axis component of the AC current in the dq coordinate system; C dc is the VSC DC side capacitance; β1 and β2 are the output error correction gains;

[0025] The following formula is used to calculate the VSC outer loop voltage control quantity i dref To make compensation:

[0026] Where: i dref is the current inner loop given value formed after comprehensive disturbance compensation; i d0 is the proportional control law; z2 is the observed value of the sum of internal and external disturbances of the system; b0 is the known input control gain.

[0027] Furthermore, step S2 specifically includes: determining the proportional control law i by the following formula d0 :

[0028] Where: k p is the scale factor, is the voltage reference value sent to the voltage outer loop; z1 is the observed value of the DC side voltage.

[0029] Furthermore, determining whether the compensation process of the VSC outer loop voltage meets the set requirements specifically includes:

[0030] The VSC voltage outer loop ADRC is equivalent to the PID form, and the transfer function is obtained:

[0031]

[0032] Wherein, Z1(s) is the transfer function form of z1; Z2(s) is the transfer function form of z1; β1 and β2 are output error correction gains; Y(s) is the frequency domain form obtained by Laplace transform of y; U(s) is the frequency domain form obtained by Laplace transform of u; b0 is the known input control gain;

[0033] Determine the tracking error of the VSC outer loop voltage:

[0034]

[0035] Where: e1 is the output tracking error signal; e2 is the tracking error, which is the tracking error between the observed value and the actual value of the sum of the internal and external disturbances of the system;

[0036] When the output and input of the VSC outer loop voltage are both step signals with an amplitude of A, determine whether the steady-state error satisfies the following formula:

[0037] If satisfied, the voltage outer loop output control quantity i dref Meet the requirements; among which: e 1s is the steady-state error of the output tracking error signal; e 2s is the steady-state error of the disturbance tracking error signal.

[0038] The beneficial effects of the present invention are as follows: Through the present invention, all uncertainties and disturbances to which the VSC outer loop voltage control part is subjected can be estimated and compensated, thereby solving the problems of large overshoot and poor anti-interference performance under traditional PI control of the VSC voltage outer loop, thereby better controlling the DC bus voltage and ensuring system robustness. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] The present invention will be further described below in conjunction with the accompanying drawings and embodiments:

[0040] Figure 1 Flowchart of the present invention.

[0041] Figure 2 Figure 2 is the topology and control structure diagram of a two-level VSC.

[0042] Figure 3 This is the DC voltage control effect diagram of the traditional PI controller of the voltage outer loop.

[0043] Figure 4 This is a diagram showing the DC voltage control effect of the voltage outer loop controller proposed in the present invention. DETAILED DESCRIPTION

[0044] The present invention is further described in detail below:

[0045] The present invention provides a VSC outer loop voltage control method with auto-disturbance rejection, comprising the following steps:

[0046] S1. Construct a VSC mathematical model for the DC distribution network and standardize the mathematical model to obtain the VSC outer loop voltage interference component.

[0047] S2. Compensate for the VSC outer loop voltage interference component;

[0048] S3. Determine whether the compensation process of the VSC outer loop voltage meets the set requirements. If so, input the VSC outer loop voltage control amount to the inner loop voltage control module; Figure 2 As shown:

[0049] The control principle of VSC in the rectifier working state is: by measuring the DC side voltage and current to perform constant active power control, constant DC voltage control, droop control, etc., to obtain i dref , while constant reactive power control or constant AC voltage control generates i qref (where i dref is the AC side current component i d Reference value, i qref is the AC side current component i q The DC voltage reference value is then obtained and input into the VSC voltage and current dual-loop PI control system. The dual-loop PI control system is generally completed in a synchronous rotating dq coordinate system; the outer loop control generally provides a current reference value for the inner loop current control to control the system DC side voltage or converter power delivery, etc. The inner loop current control quickly tracks its reference value i dref and i qref , output the AC side current component i in the dq coordinate system d and i q , thereby changing the PWM of the input IGBT by controlling the duty cycle, thereby achieving the purpose of controlling the output voltage of the VSC DC side, and the control quantity input from the outer loop to the inner loop in the present invention is i dref Through the above method, all uncertainties and disturbances of the VSC outer loop voltage control part can be estimated and compensated, solving the problems of large overshoot and poor anti-interference performance under the traditional PI control of the VSC voltage outer loop, thereby better controlling the DC bus voltage and ensuring the robustness of the system.

[0050] In this embodiment, in step S1, a VSC mathematical model of the DC distribution network is constructed by the following method:

[0051] Construct the dynamic differential equation of the VSC AC side of the DC distribution network:

[0052] Where: V sa 、V sb and V sc is the three-phase voltage of the AC system; V ta 、V tb and V tc is the three-phase voltage on the AC side of the VSC; L s is the sum of the equivalent inductance of the connected transformer and reactor and the transformer leakage inductance; i a 、i b and i c is the three-phase current of the AC system; R s is the equivalent resistance of the connecting transformer;

[0053] By performing dq coordinate transformation on formula (1), the mathematical model of VSC in DC distribution network is obtained:

[0054]

[0055] Where: i d is the component of the AC side current on the d-axis in the dq coordinate system; i q is the component of the AC side current on the q axis in the dq coordinate system; t is time; R s is the equivalent resistance connecting the transformer and the reactor; ω is the angular frequency of the AC system; v d is the control signal of the d-axis of VSC in the dq coordinate system; v q is the control signal of the q axis of VSC in the dq coordinate system; v sd is the component of the AC power supply voltage on the d-axis in the dq coordinate system; v sq is the component of the AC power supply voltage on the q axis in the dq coordinate system; C dc is the VSC DC side capacitance; v dc is the VSC DC side output voltage; i dc is the VSC DC side output current; R L is the DC side parallel load resistance.

[0056] In this embodiment, the mathematical model is standardized to obtain the VSC outer loop voltage interference components, which specifically include:

[0057] The VSC outer loop voltage auto-disturbance rejection standard of formula (2) is constructed as follows:

[0058]

[0059] Where: w(t) is the system disturbance including external disturbance and internal disturbance caused by changes in model parameters, x is the state variable; n is the order of the state variable; y is the output, u con is the control quantity, b is the coefficient; where:

[0060] Extract the first-order disturbance in formula (3) to obtain the VSC anti-disturbance model:

[0061] Where f(t) is the total disturbance of the system.

[0062] In this embodiment, step S2 specifically includes:

[0063] Construct an extended state observer for the state variable i d 、i q and v dc For control, the extended state observer model is:

[0064] Where: e is the error signal; z1 is the observed value of x1, and v is the DC side voltage dc ; x1 is the state variable; z2 is the observed value of the sum of the internal and external disturbances of the system; i d is the d-axis component of the AC current in the dq coordinate system; C dc is the VSC DC side capacitance; β1 and β2 are the output error correction gains; through the above model, the state variable i d 、i q and v dc Control adjustment is performed to make the error e as small as possible (theoretically, the error is 0, but in reality there is always an error, so e is as small as possible, that is, close to 0). At this time, the observed values ​​z2 and z1 of the sum of the internal and external disturbances of the system can be accurately determined, and the subsequent i d0 and i dref Provide protection;

[0065] The following formula is used to calculate the VSC outer loop voltage control quantity i dref To make compensation:

[0066] Where: i dref is the current inner loop given value formed after comprehensive disturbance compensation; i d0 is the proportional control law; z2 is the observed value of the sum of the internal and external disturbances of the system; b0 is the known input control gain;

[0067] Wherein: Step S2 specifically includes: determining the proportional control law i by the following formula d0 :

[0068] Where: k p is the scale factor, is the voltage reference value sent to the voltage outer loop; z1 is the observed value of the DC side voltage.

[0069] In this embodiment, determining whether the compensation process for the VSC outer loop voltage meets the set requirements specifically includes:

[0070] The VSC voltage outer loop ADRC is equivalent to the PID form, and the transfer function is obtained:

[0071]

[0072] Wherein, Z1(s) is the transfer function form of z1; Z2(s) is the transfer function form of z1; β1 and β2 are output error correction gains; Y(s) is the frequency domain form obtained by Laplace transform of y; U(s) is the frequency domain form obtained by Laplace transform of u; b0 is the known input control gain;

[0073] Determine the tracking error of the VSC outer loop voltage:

[0074]

[0075] Where: e1 is the output tracking error signal; e2 is the tracking error, which is the tracking error between the observed value and the actual value of the sum of the internal and external disturbances of the system;

[0076] When the output and input of the VSC outer loop voltage are both step signals with an amplitude of A, determine whether the steady-state error satisfies the following formula:

[0077] If satisfied, the voltage outer loop output control quantity i dref Meet the requirements; among which: e 1s is the steady-state error of the output tracking error signal; e 2s is the steady-state error of the disturbance tracking error signal.

[0078] Depend on Figure 3 It can be clearly seen that when the outer loop voltage is controlled by traditional PI, the DC bus voltage tracks the desired DC bus reference voltage of 5kV in steady state, and the voltage fluctuation is large; for the transient characteristics of PI control, a serious overshoot occurs when the DC port load decreases in 4s. Figure 4 It is clearly evident that, when the external loop voltage is controlled using the present invention, the DC bus voltage tracks the desired DC bus reference voltage well in steady state. Regarding transient control characteristics, the present invention demonstrates a faster transient response, effectively reducing bus voltage fluctuations and providing improved anti-interference capabilities. It can be concluded that a system incorporating the present invention's control exhibits enhanced anti-interference capabilities against external disturbances. Under ideal parameter settings, the present invention can minimize their impact, effectively controlling the DC bus voltage and ensuring system robustness.

[0079] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not limiting. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the purpose and scope of the technical solutions of the present invention, which should all be included in the scope of the claims of the present invention.

Claims

1. A VSC outer loop voltage control method with auto-disturbance rejection, characterized by: The following steps are involved: S1. Construct a VSC mathematical model for the DC distribution network and standardize the mathematical model to obtain the VSC outer loop voltage interference component. S2. Compensate for the VSC outer loop voltage interference component; S3. Determine whether the compensation process of the VSC outer loop voltage meets the set requirements. If so, input the VSC outer loop voltage control amount to the inner loop voltage control module; The mathematical model is standardized to obtain the VSC outer loop voltage interference components, including: Constructing a VSC outer loop voltage auto-disturbance rejection standard: Where: w(t) is the system disturbance including external disturbance and internal disturbance caused by changes in model parameters, x is the state variable; n is the order of the state variable; y is the output, u is the control variable, and b is the coefficient; Extract the first-order disturbance in formula (3) to obtain the VSC anti-disturbance model: Where f(t) is the total disturbance of the system; Step S2 specifically includes: Construct an extended state observer for the state variable i d 、i q and v dc For control, the extended state observer model is: Where: e is the error signal; z1 is the observed value of x1, v dc is the VSC DC side output voltage; x1 is the state variable; z2 is the observed value of the sum of the internal and external disturbances of the system; i d is the d-axis component of the AC current in the dq coordinate system; C dc is the VSC DC side capacitance; β1 and β2 are the output error correction gains; The following formula is used to calculate the VSC outer loop voltage control quantity i dref To make compensation: Where: i dref is the current inner loop given value formed after comprehensive disturbance compensation; i d0 is the proportional control law; z2 is the observed value of the sum of the internal and external disturbances of the system; b0 is the known input control gain; Step S2 specifically includes: determining the proportional control law i by the following formula d0 : Where: k p is the scale factor, It is the voltage reference value sent to the voltage outer loop; Determining whether the compensation processing of the VSC outer loop voltage meets the set requirements specifically includes: The VSC voltage outer loop ADRC is equivalent to the PID form, and the transfer function is obtained: Wherein, Z1(s) is the transfer function form of z1; Z2(s) is the transfer function form of z2; β1 and β2 are output error correction gains; Y(s) is the frequency domain form obtained by Laplace transform of y; U(s) is the frequency domain form obtained by Laplace transform of u; b0 is the known input control gain; Determine the tracking error of the VSC outer loop voltage: Where: e1 is the output tracking error signal; e2 is the tracking error, which is the tracking error between the observed value and the actual value of the sum of the internal and external disturbances of the system; When the output and input of the VSC outer loop voltage are both step signals with an amplitude of A, determine whether the steady-state error satisfies the following formula: If satisfied, the voltage outer loop output control quantity i dref Meet the requirements; among which: e 1s is the steady-state error of the output tracking error signal; e 2s is the steady-state error of the disturbance tracking error signal.

2. The VSC outer loop voltage control method with active disturbance rejection according to claim 1, characterized in that: In step S1, a VSC mathematical model of the DC distribution network is constructed by the following method: Construct the dynamic differential equation of the VSC AC side of the DC distribution network: Where: V sa 、V sb and V sc is the three-phase voltage of the AC system; V ta 、V tb and V tc is the three-phase voltage on the AC side of the VSC; L s is the sum of the equivalent inductance of the connected transformer and reactor and the transformer leakage inductance; i a 、i b and i c is the three-phase current of the AC system; R s is the equivalent resistance of the connecting transformer; By performing dq coordinate transformation on formula (1), the mathematical model of VSC in DC distribution network is obtained: Where: i d is the component of the AC side current on the d-axis in the dq coordinate system; i q is the component of the AC side current on the q axis in the dq coordinate system; t is time; R s is the equivalent resistance connecting the transformer and the reactor; ω is the angular frequency of the AC system; v d is the control signal of the d-axis of VSC in the dq coordinate system; v q is the control signal of the q axis of VSC in the dq coordinate system; v sd is the component of the AC power supply voltage on the d-axis in the dq coordinate system; v sq is the component of the AC power supply voltage on the q axis in the dq coordinate system; C dc is the VSC DC side capacitance; v dc is the VSC DC side output voltage; i dc is the VSC DC side output current; R L is the DC side parallel load resistance.

Images