Storage device with minimum write size for data

By partitioning the storage device into dedicated areas for user data and parity data, and by limiting the minimum write size, the problem of low efficiency for small commands is solved, thereby improving programming efficiency and throughput.

CN114730247BActive Publication Date: 2026-01-20SANDISK TECH
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Patent Information

Application Number
CN202080079791.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-04-24
Filing Date
2020-12-11
Publication Date
2026-01-20
Estimated Expiration
2040-12-11

AI Technical Summary

Technical Problem

Existing storage devices are inefficient at processing small commands, leading to increased programming time and reduced overall throughput.

Method used

By dividing the storage device into multiple partitions, each partition including dies dedicated to storing user data and parity data, and limiting the host device to send write commands with a minimum write size, controller resource efficiency is optimized.

Benefits of technology

It improved the programming efficiency of storage devices, increased throughput, and optimized the use of controller resources.

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Abstract

The present disclosure generally relates to methods of operating a storage device. The storage device includes a controller and a storage unit divided into a plurality of zones. The storage unit includes a plurality of dies, where each die includes two planes. One erase block from each plane of a die is selected for zone formation. Each erase block includes a plurality of word lines. A zone includes one or two dies dedicated to storing parity data and a plurality of dies dedicated to storing user data. The zone also includes a space dedicated to controller metadata. The storage device limits a host device to send write commands in a minimum write size to increase programming efficiency. The minimum write size is equal to one word line from one erase block of each plane of each die in the zone dedicated to storing user data minus the space dedicated to metadata.
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Description

[0001] Cross-references to related applications

[0002] This application claims priority to U.S. Application No. 16 / 858,332, filed April 24, 2020, the entire contents of which are incorporated herein by reference. Background Technology Technical Field

[0004] The embodiments disclosed herein relate generally to storage devices, such as solid-state drives (SSDs).

[0005] Description of the Related Art

[0006] Storage devices such as SSDs can be used in computers for applications requiring relatively low latency and high capacity storage. For example, SSDs can exhibit lower latency than hard disk drives (HDDs), especially for random reads and writes. Typically, the SSD controller receives commands to read data from the host device or write data to the storage device. Data is read and written to one or more erase blocks in the storage device. Each erase block in the erase block is associated with a logical block address, allowing the SSD and / or the host device to know the storage location of the data. One or more erase blocks can be grouped together by their respective logical block addresses to form multiple partitions.

[0007] The host device can send write commands of any size to the storage device. Upon receiving a command, the storage device can then write the command to the memory device, regardless of its size. However, writing several small commands to the memory device can take a significant amount of time, thus slowing down programming time and reducing the overall programming efficiency of the storage device.

[0008] Therefore, a new method is needed to operate storage devices that optimizes controller resource efficiency to maximize the throughput of the storage devices. Summary of the Invention

[0009] This disclosure relates throughout to a method of operating a storage device. The storage device includes a controller and storage cells divided into multiple partitions. Each storage cell includes multiple dies, each die comprising two planes. An erase block from each plane of the die is selected for partition formation. Each erase block includes multiple word lines. A partition includes one or more die planes dedicated to storing parity data and multiple dies dedicated to storing user data. The partition also includes space dedicated to controller metadata. The storage device restricts the host device to send write commands with a minimum write size to increase programming efficiency. The minimum write size is equal to one word line from an erase block from each plane of each die in the partition dedicated to storing user data minus the space dedicated to metadata.

[0010] In one embodiment, a storage device includes a non-volatile storage unit, where a capacity of the non-volatile storage unit is divided into a plurality of zones, and where the non-volatile storage unit includes a plurality of dies. Each die of the plurality of dies includes a plurality of erase blocks, and each erase block of the erase blocks includes a plurality of word lines. The storage device also includes a controller coupled to the non-volatile storage unit. The controller is configured to determine a minimum write size for a command to write data received from a host device, where the minimum write size is determined based on a number of erase blocks in a zone dedicated to storing user data, a number of pages per cell of a word line of each erase block, a number of word lines in each erase block, and an amount of space dedicated to storing metadata of the storage device. The controller is further configured to limit the host device to send the command to write data at the minimum write size.

[0011] In another embodiment, a storage device includes a non-volatile storage unit, where a capacity of the non-volatile storage unit is divided into a plurality of zones, and where the non-volatile storage unit includes a plurality of dies, each die of the plurality of dies including a plurality of planes, each plane of the planes including a plurality of erase blocks, and each erase block of the erase blocks including a plurality of word lines. The storage device also includes a controller coupled to the non-volatile storage unit. The controller is configured to calculate a minimum write size for a command to write data received from a host device, where the minimum write size is calculated as a full word line size to write one erase block of each plane of each die within a zone dedicated to storing user data. The controller is further configured to limit the host device to send the command to write data at the minimum write size.

[0012] In another embodiment, a storage device includes a non-volatile storage unit, where a capacity of the non-volatile storage unit is divided into a plurality of zones, and where the non-volatile storage unit includes a plurality of dies, each die of the plurality of dies including a plurality of planes, each plane of the planes including a plurality of erase blocks, and each erase block of the erase blocks including a plurality of word lines. The storage device also includes a controller coupled to the non-volatile storage unit. The controller is configured to calculate a minimum write size for a command to write data received from a host device, where the minimum write size is calculated as a full word line size to write one erase block of each plane of each die within a zone dedicated to storing user data. The controller is further configured to limit the host device to send the command to write data at the minimum write size. BRIEF DESCRIPTION OF DRAWINGS

[0013] So that the manner in which the above recited features of the present disclosure can be understood in detail, a more particular description of the disclosure, briefly summarized above, can be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this disclosure and are therefore not to be considered limiting of its scope, for the disclosure can admit to other equally effective embodiments.

[0014] Figure 1 is a schematic block diagram illustrating a storage system according to one embodiment.

[0015] Figure 2 is a block diagram illustrating a method of operating a storage device to execute a read command or a write command according to one embodiment.

[0016] Figure 3A illustrates a partitioned namespace view utilized in a storage device according to one embodiment.

[0017] Figure 3B illustrates a state diagram of a partitioned namespace of a storage device according to one embodiment for Figure 3A

[0018] Figure 4A illustrates a partition including a plurality of erase blocks selected from a plurality of dies according to one embodiment.

[0019] Figure 4B illustrates an erase block of a partition according to one embodiment for Figure 4A

[0020] To facilitate an understanding of this description, like reference characters are used to identify like elements throughout the disclosure. It should be noted that, in one embodiment, elements disclosed in one embodiment can be advantageously used in other embodiments without specific recitation. DETAILED DESCRIPTION

[0021] In the following, reference is made to embodiments of the present disclosure. However, it should be understood that the present disclosure is not limited to the particularly described embodiments. On the contrary, any combination of the following features and elements, whether related to different embodiments or not, can be utilized to realize and practice the present disclosure. In addition, although embodiments of the present disclosure can achieve advantages over other possible solutions and / or over the prior art, whether or not a particular advantage is achieved by a given embodiment is not limiting of the present disclosure. Thus, the following aspects, features, embodiments and advantages are merely illustrative and are not considered elements or limitations of the appended claims unless explicitly recited therein. Likewise, reference to "the present disclosure" shall not be construed as being a summary of any inventive subject matter disclosed herein and shall not be considered as an element or limitation of the appended claims unless explicitly recited therein.​​

[0022] The present disclosure generally relates to a method of operating a storage device. The storage device includes a controller and a storage unit divided into a plurality of zones. The storage unit includes a plurality of dies, where each die includes two planes. One erase block from each plane of a die is selected for zone formation. Each erase block includes a plurality of word lines. A zone includes one or two dies dedicated to storing parity data and a plurality of dies dedicated to storing user data. The zone also includes a space dedicated to controller metadata. The storage device limits a host device to send write commands in a minimum write size to increase programming efficiency. The minimum write size is equal to one word line from one erase block of each plane of each die in the zone dedicated to storing user data minus the space dedicated to metadata.

[0023] Figure 1 is a schematic block diagram illustrating a storage system 100 in accordance with one or more techniques of the present disclosure, where a storage device 106 can serve as a storage device for a host device 104. For example, the host device 104 can utilize a non-volatile storage 110 (such as a non-volatile memory) included in the storage device 106 to store and retrieve data. For example, the storage unit 110 can be any type of non-volatile memory, such as MRAM, NAND, NOR, or HDD. In the following description, for simplicity and by way of example, the storage unit 110 is referenced as a non-volatile memory (NVM) 110. The host device 104 includes a host DRAM 138. In some examples, the storage system 100 can include multiple storage devices, such as the storage device 106, which can operate as a storage array. For example, the storage system 100 can include multiple storage devices 106 configured as a redundant array of inexpensive / independent disks (RAID) that collectively function as a mass storage device for the host device 104.

[0024] The storage system 100 includes a host device 104 that can store data to and / or retrieve data from one or more storage devices, such as the storage device 106. As shown, the host device 104 can communicate with the storage device 106 via an interface 114. The host device 104 can include any of a variety of devices, including a computer server, a network-attached storage (NAS) unit, a desktop computer, a notebook (i.e., laptop) computer, a tablet computer, a set-top box, a telephone handset such as a so-called “smart” phone, a so-called “smart” pad, a television, a camera, a display device, a digital media player, a video gaming console, a video streaming device, etc. Figure 1

[0025] ​The storage device 106 includes a controller 108, a non-volatile memory 110 (NVM 110), a power supply 111, a volatile memory 112, and an interface 114. The controller 108 includes internal volatile memory 120 or a buffer. In some examples, for the sake of clarity, the storage device 106 can include additional components not shown in FIG. 1. For example, the storage device 106 can include a printed circuit board (PCB) to which the components of the storage device 106 are mechanically attached and which includes conductive traces that electrically interconnect the components of the storage device 106, etc. In some examples, the physical size and connector configuration of the storage device 106 can conform to one or more standard form factors. Some example standard form factors include, but are not limited to, 3.5” data storage devices (e.g., HDDs or SSDs), 2.5” data storage devices, 1.8” data storage devices, peripheral component interconnect (PCI), PCI-extended (PCI-X), PCI Express (PCIe) (e.g., PCIe xl, x4, x8, x16, PCIe Mini card, MiniPCI, etc.). In some examples, the storage device 106 can be directly coupled (e.g., directly soldered) to a motherboard of the host device 104. Figure 1

[0026] The interface 114 of the storage device 106 can include one or both of a data bus for exchanging data with the host device 104 and a control bus for exchanging commands with the host device 104. The interface 114 can operate according to any suitable protocol. For example, the interface 114 can operate according to one or more of the following protocols: Advanced Technology Attachment (ATA) (e.g., Serial ATA (SATA) and Parallel ATA (PATA)), Fibre Channel Protocol (FCP), Small Computer System Interface (SCSI), Serial Attached SCSI (SAS), PCI, PCIe, Non-Volatile Memory express (NVMe), OpenCAPI, GenZ, Cache Coherent Interface Accelerator (CCIX), Computer Express Link (CXL), Open Channel SSD (OCSSD), etc. Electrical connections of the interface 114 (e.g., data bus, control bus, or both) are electrically connected to the controller 108, providing electrical connections between the host device 104 and the controller 108, allowing data to be exchanged between the host device 104 and the controller 108. In some examples, the electrical connections of the interface 114 can also allow the storage device 106 to receive power from the host device 104. For example, as shown in FIG. 1, the power supply 111 can receive power from the host device 104 via the interface 114. Figure 1

[0027] ​​The storage device 106 includes an NVM 110, which can include a plurality of memory devices or media units. The NVM 110 can be configured to store and / or retrieve data. For example, a media unit of the NVM 110 can receive data and a message instructing the media unit to store the data from the controller 108. Similarly, a media unit of the NVM 110 can receive a message instructing the media unit to retrieve data from the controller 108. In some examples, each of the media units can be referred to as a die. In some examples, a single physical chip can include multiple dies (i.e., multiple media units). In some examples, each media unit can be configured to store a relatively large amount of data (e.g., 128 MB, 256 MB, 512 MB, 1 GB, 2 GB, 4 GB, 8 GB, 16 GB, 32 GB, 64 GB, 128 GB, 256 GB, 512 GB, 1 TB, etc.).

[0028] In some examples, each media unit of the NVM 110 can include any type of non-volatile memory device, such as a flash memory device, a phase change memory (PCM) device, a resistive random access memory (ReRAM) device, a magnetoresistive random access memory (MRAM) device, a ferroelectric random access memory (F-RAM), a holographic memory device, and any other type of non-volatile memory device.

[0029] The NVM 110 can include a plurality of flash memory devices or media units. A flash memory device can include a NAND or NOR based flash memory device and can store data based on electric charges contained in a floating gate of a transistor for each flash memory cell. In a NAND flash memory device, the flash memory device can be divided into a plurality of blocks, which can be divided into a plurality of pages. Each block of the plurality of blocks within a particular memory device can include a plurality of NAND cells. Rows of NAND cells can be electrically connected using word lines to define a page of the plurality of pages. Respective cells in each page of the plurality of pages can be electrically connected to a respective bit line. Further, the NAND flash memory device can be a 2D or 3D device and can be a single-level cell (SLC), a multi-level cell (MLC), a triple-level cell (TLC), or a quad-level cell (QLC). The controller 108 can write data to and read data from the NAND flash memory device at a page level and erase data from the NAND flash memory device at a block level.

[0030] The storage device 106 includes a power source 111, which can provide power to one or more components of the storage device 106. When operating in a standard mode, the power source 111 can power the one or more components using power provided by an external device, such as the host device 104. For example, the power source 111 can power the one or more components using power received from the host device 104 via the interface 114. In some examples, the power source 111 can include one or more power storage components configured to power the one or more components when operating in an off mode, such as in the event that power is stopped being received from the external device. In this way, the power source 111 can act as an on-board backup power source. Some examples of the one or more power storage components include, but are not limited to, capacitors, supercapacitors, batteries, and the like. In some examples, the amount of power that can be stored by the one or more power storage components can be a function of the cost and / or size (e.g., area / volume) of the one or more power storage components. In other words, as the amount of power stored by the one or more power storage components increases, the cost and / or size of the one or more power storage components also increases.

[0031] The storage device 106 also includes a volatile memory 112, which can be used by the controller 108 to store information. The volatile memory 112 can include one or more volatile memory devices. In some examples, the controller 108 can use the volatile memory 112 as a cache. For example, the controller 108 can store cached information in the volatile memory 112 until the cached information is written to the non-volatile memory 110. As shown, the volatile memory 112 can consume power received from the power source 111. Examples of the volatile memory 112 include, but are not limited to, random access memory (RAM), dynamic random access memory (DRAM), static RAM (SRAM), and synchronous dynamic RAM (SDRAM (e.g., DDR1, DDR2, DDR3, DDR3L, LPDDR3, DDR4, LPDDR4, DDR5, LPDDR5, etc.). Figure 1

[0032] ​Various types of volatile memory can be used in the context of different access characteristics. For example, DRAM can be arranged for longer burst accesses to achieve improved bandwidth (BW) of the same access bus. Alternatively, DRAM can be used in the context of smaller accesses so that random small accesses can have better latency. The controller includes additional optional SRAM 112 and / or embedded MRAM. Embedded MRAM is another alternative memory that can be used in another embodiment. Similarly, access to MRAM can be optimized for different design purposes, but the amount of embedded MRAM in an SSD controller can be cost sensitive. Thus, how much data and which data goes into premium non-volatile memory and premium volatile memory will be affected by system tradeoffs.

[0033] The storage device 106 includes a controller 108, which can manage one or more operations of the storage device 106. For example, the controller 108 can manage reading data from and / or writing data to the NVM 110 via a toggle mode (TM) bus (not shown). In some embodiments, when the storage device 106 receives a write command from the host device 104, the controller 108 can initiate a data storage command to store data to the NVM 110 and monitor progress of the data storage command. The controller 108 can determine at least one operational characteristic of the storage system 100 and store the at least one operational characteristic to the NVM 110. In some embodiments, when the storage device 106 receives a write command from the host device 104, the controller 108 temporarily stores data associated with the write command in an internal volatile memory 120 before sending the data to the NVM 110.

[0034] Figure 2 is a block diagram illustrating a method of operating a storage device to execute a read command or a write command, according to one embodiment. Figure 2 is a block diagram illustrating a method 200 of operating a storage device to execute a read command or a write command, according to one embodiment. The method 200 can be used with the storage system 100 having a host device 104 and a storage device 106 including a controller 108.

[0035] The method 200 begins at operation 250, where the host device writes a command as an entry into a submission queue. At operation 250, the host device can write one or more commands into a submission queue. The command can be a read command or a write command. The host device can include one or more submission queues.

[0036] In operation 252, the host device writes one or more updated submission queue tail pointers and rings a doorbell or sends an interrupt signal to the storage device to notify or signal the new commands ready for execution. If there is more than one submission queue, the host can write the updated submission queue tail pointers and send a doorbell or interrupt signal for each of the submission queues. In operation 254, in response to receiving the doorbell or interrupt signal, the controller of the storage device fetches the commands from the one or more submission queues, and the controller receives the commands.

[0037] In operation 256, the controller processes the commands and writes or transfers data associated with the commands to the host device memory. The controller can process more than one command at a time. The controller can process the one or more commands in submission order or in order. Processing a write command can include identifying a partition for writing data associated with the command, writing the data to one or more logical block addresses (LBAs) of the partition, and advancing a write pointer of the partition to identify a next available LBA within the partition.

[0038] In operation 258, once the command has been sufficiently processed, the controller writes a completion entry corresponding to the executed command to the completion queue of the host device, and moves or updates the CQ head pointer to point to the newly written completion entry.

[0039] In operation 260, the controller generates and sends an interrupt signal or doorbell to the host device. The interrupt signal indicates that the command has been executed and the data associated with the command is available in the memory device. The interrupt signal further notifies the host device that the completion queue is ready to be read or processed.

[0040] In operation 262, the host device processes the completion entry. In operation 264, the host device writes an updated CQ head pointer to the storage device and rings a doorbell or sends an interrupt signal to the storage device to free the completion entry.

[0041] Figure 3A A zone namespace (ZNS) 302 view utilized in a storage device 300 is shown, in accordance with one embodiment. The storage device 300 can present the ZNS 302 view to a host device. Figure 3B A state diagram 350 of the ZNS 302 of the storage device 300 is shown, in accordance with one embodiment. The storage device 300 can be Figure 1The storage device 300 can have one or more ZNS 302, and each ZNS 302 can have a different size. In addition to the one or more zone namespaces 302, the storage device 300 can include one or more regular namespaces. Further, the ZNS 302 can be zone block commands (ZBC) for SAS and / or zone device ATA command set (ZAC) for SATA. Due to the relationship between possible logical and physical activity, host-side zone activity can be more directly related to media activity in the zoned drive.

[0042] In the storage device 300, the ZNS 302 is an amount of NVM that can be formatted into logical blocks such that the capacity is divided into a plurality of zones 306a-306n (collectively, zones 306). Each of the zones 306 includes a plurality of physical blocks or erase blocks (not shown) of the media units or NVM 304, and each of the erase blocks is associated with a plurality of logical blocks (not shown). When the controller 308 receives a command from, such as, a host device (not shown) or a submission queue of a host device, the controller 308 can read data from and write data to a plurality of logical blocks associated with a plurality of erase blocks (EBs) of the ZNS 302. Each of the logical blocks is associated with a unique LBA or sector.

[0043] In one embodiment, the NVM 304 is a NAND device. The NAND device includes one or more dies. Each of the one or more dies includes one or more planes. Each of the one or more planes includes one or more erase blocks. Each of the one or more erase blocks includes one or more word lines (e.g., 256 word lines). Each of the one or more word lines can be addressed in one or more pages. For example, an MLC NAND die can use an upper page and a lower page to reach two pages (e.g., 16 KiB per page) in each cell of a full word line. Further, each page can be accessed at a granularity equal to or less than a full page. A controller can frequently access NAND with a user data granularity LBA size of 512 bytes.

[0044] When data is written to an erase block, one or more logical blocks within the zone 306 are updated accordingly to track the location of the data within the NVM 304. Data can be written to one zone 306 at a time until the zone 306 becomes full, or to multiple zones 306 such that multiple zones 306 can become partially full. Similarly, when data is written to a particular zone 306, the data can be written one block at a time in order of the NAND locations, page by page or word line by word line, to multiple erase blocks until moving to an adjacent block (i.e., writing to a first erase block until the first erase block becomes full before moving to a second erase block), or can be written multiple blocks at a time in order of the NAND locations, page by page or word line by word line, to partially fill each block in a parallel manner (i.e., writing to a first NAND location or page of each erase block before writing to a second NAND location or page of each erase block). This sequential programming of each NAND location is a typical, non-limiting requirement of many NAND EBs.

[0045] Each of the zones 306 is associated with a zone start logical block address (ZSLBA). The ZSLBA is the first available LBA in the zone 306. For example, the first zone 306a is associated with a ZSLBA, the second zone 306b is associated with a ZbSLBA, the third zone 306c is associated with a ZcSLBA, the fourth zone 306d is associated with a ZdSLBA, and the nth zone 306n (i.e., the last zone) is associated with a ZnSLBA. Each zone 306 is identified by its ZSLBA and is configured to receive sequential writes (i.e., to write data to the NVM 110 in the order in which write commands are received). a SLBA, the second zone 306b is associated with a ZbSLBA, the third zone 306c is associated with a ZcSLBA, the fourth zone 306d is associated with a ZdSLBA, and the nth zone 306n (i.e., the last zone) is associated with a ZnSLBA. Each zone 306 is identified by its ZSLBA and is configured to receive sequential writes (i.e., to write data to the NVM 110 in the order in which write commands are received). c SLBA, the second zone 306b is associated with a ZbSLBA, the third zone 306c is associated with a ZcSLBA, the fourth zone 306d is associated with a ZdSLBA, and the nth zone 306n (i.e., the last zone) is associated with a ZnSLBA. Each zone 306 is identified by its ZSLBA and is configured to receive sequential writes (i.e., to write data to the NVM 110 in the order in which write commands are received). d SLBA, the second zone 306b is associated with a ZbSLBA, the third zone 306c is associated with a ZcSLBA, the fourth zone 306d is associated with a ZdSLBA, and the nth zone 306n (i.e., the last zone) is associated with a ZnSLBA. Each zone 306 is identified by its ZSLBA and is configured to receive sequential writes (i.e., to write data to the NVM 110 in the order in which write commands are received). n SLBA, the second zone 306b is associated with a ZbSLBA, the third zone 306c is associated with a ZcSLBA, the fourth zone 306d is associated with a ZdSLBA, and the nth zone 306n (i.e., the last zone) is associated with a ZnSLBA. Each zone 306 is identified by its ZSLBA and is configured to receive sequential writes (i.e., to write data to the NVM 110 in the order in which write commands are received).

[0046] When data is written to a zone 306, a write pointer 310 is advanced or updated to point to or indicate the next available block in the zone 306 for writing data to, in order to track the next write starting point (i.e., the completion point of a previous write equals the starting point of a subsequent write). Thus, the write pointer 310 indicates where a subsequent write to the zone 306 will start. The subsequent write command is a “zone append” command, where the data associated with the subsequent write command is appended to the zone 306 at the location indicated by the write pointer 310 as the next starting point. An ordered list of LBAs within the zone 306 can be stored for write ordering. Each zone 306 can have its own write pointer 310. Thus, when a write command is received, the zone 306 is identified by its ZSLBA and the write pointer 310 determines the location within the identified zone 306 where the write of data starts.

[0047] Figure 3B is shown for a zone 306a. The zone 306a is associated with a ZSLBA. The zone 306a is configured to receive sequential writes (i.e., to write data to the NVM 110 in the order in which write commands are received). The zone 306a includes a write pointer 310a, a write pointer 310b, a write pointer 310c, a write pointer 310d, and a write pointer 310n. The write pointer 310a indicates the next available block in the zone 306a for writing data to, in order to track the next write starting point. Thus, the write pointer 310a indicates where a subsequent write to the zone 306a will start. The subsequent write command is a “zone append” command, where the data associated with the subsequent write command is appended to the zone 306a at the location indicated by the write pointer 310a as the next starting point. The zone 306a includes an ordered list of LBAs for write ordering. The zone 306a can have its own write pointer 310a. Thus, when a write command is received, the zone 306a is identified by its ZSLBA and the write pointer 310a determines the location within the identified zone 306a where the write of data starts. Figure 3AZNS 302. In the state diagram 350, each zone can be in a different state, such as empty, open, full, or offline. When a zone is empty, the zone contains no data (i.e., none of the erase blocks in the zone currently store data), and the write pointer is at the ZSLBA (i.e., WP = 0). An empty zone will switch to an open and active zone once a write is scheduled to the zone or a zone open command is issued by the host. Zone management (ZM) commands can be used to move a zone between the zone open and zone closed states (both active states). If a zone is active, the zone includes open blocks that can be written to, and a description of the recommended time in the active state can be provided by the ZM or controller to the host. The controller can include the ZM.

[0048] The term "write" includes programming user data on 0 or more word lines in an erase block, partially filled word lines in an erase block, and / or an erase block when user data does not fill all available word lines. The term "write" can also include closing a zone due to internal drive processing needs (open block data retention issues because error bits are accumulating faster on open erase blocks), the storage device 300 closing a zone due to resource limitations (such as too many open zones to track or defect status found), or the host device closing a zone because of issues such as no more data to send to the drive, the computer is shutting down, error handling on the host, limited host resources for tracking, and the like.

[0049] Active zones can be open or closed. Open zones are empty or partially filled zones that are ready to write and have currently allocated resources. Data received from the host device with a write command or zone append command can be programmed to open erase blocks that are not currently filled with previous data. New data pulled in from the host device or valid data being relocated can be written to open zones. Valid data can be moved from one zone (e.g., first zone 302a) to another zone (e.g., third zone 302c) for garbage collection purposes. Closed zones are empty or partially filled zones that are not currently receiving writes continuously from the host. Moving a zone from an open state to a closed state allows the controller 308 to reallocate resources to other tasks. These tasks can include, but are not limited to, other open zones, other regular non-zone areas, or other controller needs.

[0050] In the open and closed partitions, the write pointer points to a location in the partition between the ZSLBA and the end of the last LBA of the partition (i.e., WP>0). The active partition can switch between open and closed states according to a designation by the ZM or at the time a write is scheduled to the partition. In addition, the ZM can reset the active partition to clear or erase the data stored in the partition so that the partition switches back to an empty partition. Once the active partition is full, the partition switches to a full state. A full partition is a partition that is completely filled with data and has no more available sectors or LBAs for writing data (i.e., WP=ZCAP). Read commands for the data stored in a full partition can still be executed.

[0051] The ZM can reset a full partition, scheduling an erase of the data stored in the partition so that the partition switches back to an empty partition. When a full partition is reset, although the partition can be marked as an empty partition available for writes, the data of the partition can not be immediately cleared. However, the reset partition must be erased before switching to an active partition. The partition can be erased at any time between ZM reset and ZM open. An offline partition is a partition that data cannot be written to. An offline partition can be in a full state, an empty state, or in a partially full state without being in an active state.

[0052] Since resetting a partition clears the data stored in the partition or schedules an erase of the data stored in the partition, the need for garbage collection of individual erase blocks is eliminated, improving the overall garbage collection process of the storage device 300. The storage device 300 can mark one or more erase blocks for erasure. When a new partition is to be formed and the storage device 300 anticipates a ZM open, then the one or more erase blocks marked for erasure can be erased. The storage device 300 can also decide and create the physical backing of the partition at the time of erasing the erase block. Thus, once a new partition is opened and an erase block is selected to form the partition, the erase block will be erased. In addition, each time a partition is reset, a new order of the LBAs of the partition 306 and the write pointer 310 can be selected, enabling the partition 306 to tolerate out-of-order received commands. The write pointer 310 can optionally be closed so that commands can be written to any starting LBA as indicated by the command.

[0053] Referring back to Figure 3AWhen the host sends a write command to write data to the partition 306, the controller 308 pulls in the write command and identifies the write command as a write to the newly opened partition 306. The controller 308 selects a set of EBs to store data associated with the write command to the newly opened partition 306, and the newly opened partition 306 switches to the active partition 306. As used herein, the controller 308 initiates, receives, or pulls in a write command includes receiving the write command or a direct memory access (DMA) read of the write command. The write command can be a command to write new data or a command to move valid data to another partition for garbage collection purposes. The controller 308 is configured to DMA read new commands from a submission queue populated by the host device.

[0054] In the empty partition 306 that just switched to the active partition 306, data starts being written to the partition 306 at the ZSLBA because the write pointer 310 indicates the logical block associated with the ZSLBA as the first available logical block. Data can be written to one or more erase blocks that have been allocated for the physical location of the partition 306. After the data associated with the write command is written to the partition 306, the write pointer 310 is updated to point to the next available block in the partition 306 to track the next write start point (i.e., the completion point of the first write). Alternatively, the controller 308 can select the active partition for writing data to. In the active partition, data is written to the logical block indicated by the write pointer 310 as the next available block.

[0055] For example, the controller 308 can receive or pull in a first write command to the third partition 306c. The host identifies which logical block of the partition 306 to write data associated with the first command to in order. The data associated with the first command is then written to the first or next available LBA in the third partition 306c as indicated by the write pointer 310, and the write pointer 310 is advanced or updated to point to the next available LBA available for the host to write to (i.e., WP > 0). If the controller 308 receives or pulls in a second write command to the third partition 306c, the data associated with the second write command is written to the next available LBA of the third partition 306c as identified by the write pointer 310. Once the data associated with the second command is written to the third partition 306c, the write pointer 310 is again advanced or updated to point to the next available LBA available for the host to write to. Resetting the partition 306c moves the write pointer 310 back to the ZSLBA (i.e., WP = 0), and the partition 306c switches to the empty partition. c

[0056] Figure 4A ​A partition 400, comprising a plurality of erase blocks 404 selected from a plurality of dies 402, is shown according to one embodiment. The partition 400 may be... Figure 3A ZNS 302 partition 306. Partition 400 can be... Figure 1 The partition of the storage unit 110 is coupled to the controller 108.

[0057] Storage devices (such as) Figure 1 The storage device 106) is coupled to the storage cell, such as Figure 1 The NVM 110 storage cell includes multiple dies 402. Although 32 dies 402 are shown, any number of dies may be included. Each die 402 consists of a pair of planes 406, and each plane 406 consists of multiple erase blocks 404.

[0058] Partition 400 is formed by selecting erase blocks 404 from each plane 406 of 30 of the 32 dies 402 and assigning or associating logical block addresses corresponding to erase blocks 404 to partition 400. The configuration of erase blocks 404 in partition 400 is an example of one implementation. In another implementation, the selected erase blocks 404 of partition 400 may be non-sequential (i.e., not the same erase blocks in each plane).

[0059] Of the total 32 dies 402, 30 dies 402 can be used for data storage, one parity die 402a can be used for storing parity data (e.g., XOR data, internal error correction code (ECC), external ECC, etc.), and one parity or user data die 402b can be used for storing either user data or parity data. In one embodiment, partition 400 may contain 31 dies 402 for user data and 1 die 402a for parity data. For example, RAID 4 utilizes 1 die for parity data. In another embodiment, partition 400 may contain 30 dies 402 for user data and 2 dies 402a, 402b for parity data. For example, RAID 6 utilizes 2 dies for parity data. Such embodiments are not intended to be limiting or restrictive and are examples of possible configurations of partition 400. Furthermore, other embodiments not listed or described may exist.

[0060] Although referred to as "parity chip" throughout, possible implementations can include parity planes, where only one plane of a chip is associated with parity data. Additionally, parity data for one word line of each erase block (e.g., word line 60 of each erase block of each plane of 30 or 31 chips) storing user data can be stored in a corresponding parity word line (e.g., word line 60) of any erase block, where user data is not stored in the parity word line (e.g., word line 60). In such implementations, the parity word line can be stored in multiple different erase blocks or planes or chips within the partition 400. Furthermore, when programmed to the non-volatile storage unit, a single plane of a chip (rather than two planes of a chip) can be programmed to the non-volatile storage unit. In the description herein, the listed implementations with respect to parity chips apply to parity planes or parity word lines and are not intended to be limiting. Furthermore, while the chip 402a for storing parity data is shown as the last chip 402 within the partition 400, any chip 402 can be used to store parity data.

[0061] Within the partition 400, the parity chip 402a is partitioned for storing parity data for chip failure protection. The parity or user data chip 402b can be partitioned for storing additional parity data or can be used for user data. The parity chip 402a stores p-parity data, which is standard parity data. The parity or user data chip 402b stores q-parity data when used for parity data, which has the same size as the p-parity data. However, the q-parity data is calculated using Gaussian mathematics on the host data stored on a particular word line of each EB. The parity data includes erasure coding that can protect against single chip failure and / or double chip failure. The erasure coding can also provide some amount of protection for plane loss failure.

[0062] In coding theory, an erasure code is a forward error correction (FEC) code under the assumption of bit erasures (rather than bit errors) that converts a message of k symbols into a longer message (codeword) of n symbols, such that the original message can be recovered from a subset of n symbols. Examples of various erasure code classes are tornado codes, fountain (i.e., rateless erasure) codes, parity check, and Reed-Solomon codes. For example, Reed-Solomon codes are a class of error-correcting codes (ECC) in which the code is able to detect and correct multiple symbol errors.

[0063] In one embodiment, the error correction information used by the ECC decoder to correct errors can refer to the redundancy and / or encoding bits generated by the encoder for the error correction code. In various embodiments, the error correction code can be one of various types of error correction codes, such as a block code, a convolutional code, a Bose-Chaudhuri-Hocquenghem (BCH) code, a low-density parity-check (LDPC) code, a Hamming code, a Reed-Solomon code, a Turbo code, etc. In a certain embodiment, the error correction code can be a systematic error correction code, such that each ECC data block or codeword can store the data received by the encoder for the error correction code as well as parity bits or check bits. The ECC can also include an error detection code (EDC), where the EDC can be a marker value, a logical address, a cyclic redundancy code (CRC), or any other ECC check that will follow the ECC decoding. The error detection check detects whether the ECC has corrected a value to an invalid result. The error detection check is necessary because there are instances where ECC is not used but the EDC still detects a failure.

[0064] The zone 400 can have any capacity (ZCAP), such as 256 MiB or 512 MiB. However, a small portion of the zone 400 can not be accessible to write data to, but can still be read, such as the portion of the zone 400 that stores parity data (e.g., parity die 402a and / or parity or user data die 402b). For example, if the total capacity of the zone 400 is 512 MiB, then the ZCAP can be 470 MiB, which is the capacity available to write data to, while 42 MiB is not available for writing data to.

[0065] Figure 4B An example erase block 404 of the zone 400 is shown in accordance with one embodiment. Figure 4A An example erase block 404 of the zone 400 is shown in accordance with one embodiment. Figure 4B is an example of an erase block 404 in TLC memory. As described above, other types of memory cells not listed can be suitable for use in embodiments. The erase block 404 includes a plurality of word lines, such as WL0 460, WL1 470, WL2 480, and WEn 490. The letter “n” represents a value suitable for the last word line within the erase block 404. For example, the erase block 404 can be composed of 256 word lines. However, the erase block 404 can be composed of more than 256 word lines or less than 256 word lines.

[0066] Further, each word line contains a number of pages, where the number corresponds to the type of memory cell. For example, SLC memory has 1 page per word line, MLC memory has 2 pages per word line, TLC memory has 3 pages per word line, and so on. In Figure 4BIn particular embodiments, the erase block 404 is TLC memory, and each word line includes an upper page 472, a middle page 474, and a lower page 476, as shown in WL1 470. In the following description, a TLC memory erase block including 256 word lines will be used as an example; however, such example is for explanation purposes only and is not intended to be limiting.

[0067] The total size of a word line in the TLC memory in the erase block 404, such as WL1 470, is 48 KiB (i.e., 16 KiB * 3 pages). Since there are two planes in a die, there are word lines of the same size (not shown) that exist in parallel to WL1. The combined word line size (hereinafter referred to as "word line") of two erase blocks 404 in the die 402 (one erase block per plane 406) is: 1 die * 2 EB / die * 3 pages / EB * 16 KiB / page = 96 KiB, where a single erase block word line is 48 KiB, which is half the size of a word line. Further, the 96 KiB die word line size and the 48 KiB erase block word line size can be smaller due to space dedicated to storing metadata. Thus, the total combined size of one word line in each plane of a die in the TLC memory is 96 KiB minus space dedicated to storing metadata. The previous values are examples of possible implementations, and the values listed are neither definitive nor limiting.

[0068] According to one embodiment, a super word line or multiple word lines are composed of the die word lines from each die of a zone (i.e., the sum of one word line from each die of a zone storing user data and from one erase block of each plane of a die). Such that a zone includes 256 super word lines. In one embodiment, each plane of a die provides one identical erase block to a zone (i.e., EB1 of each plane). In another embodiment, each plane of a die provides one non-identical erase block to a zone (i.e., different erase blocks of each plane). For example, in a RAID 6 implementation, if a zone includes 30 dies dedicated to storing user data, the super word line would be 96 KiB * 30 dies minus space dedicated to storing metadata. Similarly, in a RAID 4 implementation, if a zone includes 31 dies dedicated to storing user data, the super word line would be 96 KiB * 31 dies minus space dedicated to storing metadata.

[0069] In other words, the superblock writeable data's superblock line capacity (i.e., total capacity minus space lost due to controller metadata) of a zone can be solved by: # dies * 2 (EB / die) * (pages / EB) * superblock line (WL) size - metadata. Although the term "metadata" is used throughout, the metadata can refer to data overhead. Thus, for exemplary purposes, the metadata can be used interchangeably with data overhead. The metadata can be internal tracking information, such as zone logical block addresses stored on a superblock line of a storage device. The zone logical block addresses stored on the superblock line include locations of parity data and / or controller debug information. The superblock line size can be used as a minimum write size for a command to write data received from a host, as described below.

[0070] For example, for TLC memory (i.e., 3 pages per cell), with one die allocated for parity data, the superblock line capacity of user data is solved as follows: 31 dies * 2 (selected EBs / die) * 3 pages / EB * 16 KiB / page - 16 KiB = 2960 KiB. The 16 KiB / page refers to the WL data size per page within a memory cell. The 16 KiB refers to the metadata data size. The values of the WL data size and the metadata data size are merely examples of possible sizes and are not intended to be limiting. Additionally, the metadata of a zone can be associated with a single superblock line in a single EB, multiple superblock lines in a single EB, or multiple superblock lines across multiple EBs. Further, the metadata can be associated with a portion of a single superblock line in a single EB, a portion of multiple superblock lines in a single EB, or a portion of multiple superblock lines across multiple EBs.

[0071] Further, the formula applies to other forms of memory cells, such as SLC, MLC, QLC, and other higher iterations of memory cells. The number of pages / cell refers to the number of pages a particular type of memory cell can contain. If two dies are allocated for parity data within TLC memory, the formula would be solved as follows: 30 dies * 2 EBs / die * 3 pages / EB * 16 KiB / page - 16 KiB = 2864 KiB. In a single die 402, there are two planes 406, and an erase block 404 is selected from each plane 406 for zone formation.

[0072] A controller of a storage device, such as the controller 108 of the storage device 106 of FIG. 1, can calculate and set a minimum write size for a command to write data received from a host to one or more zones. The minimum write size for a command to write data received from a host for TLC memory can be based on a die WL size of 96 KiB minus space dedicated to storing metadata, such that the combined die WL (such as the WL 460) will write up to full capacity at a time. Figure 1 ​

[0073] The volatile memory (such as Figure 1 The volatile memory 112 can have an area dedicated to storing in-flight data, such as parity data and un-written host or user data sent by the host that has a size less than the minimum write size that has not been written to the NVM 110. For example, the volatile memory 112 area dedicated to storing in-flight data can be dedicated to storing write commands that include less than one wordline of data, equal to one wordline of data, or more than one wordline of data. When data is written to the partition by the controller 108, the host can be limited to sending write commands in the minimum write size. Un-written host or user data to the volatile memory 112 area dedicated to storing in-flight data or the internal volatile memory 120 can be aggregated until the minimum write size requirement of the partition is achieved.

[0074] Further, to better optimize the write process and increase programming efficiency, the minimum write size can be selected to fill one wordline in each erase block 404 in the partition 400 (i.e., one die WL in each erase block of the partition is written simultaneously). Thus, the minimum write size can be set to the super wordline size. In the example in Figure 4A In the example in, where 31 dies 402 (or EB pairs) are used for user data and 1 die 402a (or EB pair) is used for parity data, approximately 2960 KiB of data (i.e., 96 KiB * 31 user dies) is needed to fill the combined die wordlines in each available die 402 in the partition 400 to the maximum capacity, excluding space lost to metadata. The minimum write sizes mentioned are not intended to be limiting or restrictive, and other minimum write sizes can exist for other types of memory cells. Further, the minimum write sizes mentioned can be greater or less than the super wordline size described herein, such as two or more die wordlines in each erase block of the partition or half of the die wordlines in each erase block of the partition.

[0075] In one embodiment, the parity data is written to the entirety of the wordlines of a single erase block of the partition. In another embodiment, the parity data is written identically to one wordline of each erase block (i.e., WL0 of each erase block). In another embodiment, the parity data is written non-identically to one wordline of each erase block (i.e., different wordlines on each erase block). In one embodiment, the total number of wordlines dedicated to parity data within the partition is equal to a multiple of one or more erase blocks of the partition.

[0076] In one embodiment, the space lost due to metadata may come from word lines. In another embodiment, the space lost due to metadata may come from erase block 404. In another embodiment, the space lost due to metadata may come from plane 406. In another embodiment, the space lost due to metadata may come from die 402. In another embodiment, the space lost due to metadata may come from partition 400.

[0077] For example, hosts (such as Figure 1 The host 104) storage is to be sent to a storage device (such as Figure 1 The storage device 106 receives 2960 KiB of data from the host 104, and the controller (such as controller 108) determines whether the data will be sufficient to fill one word line (such as WL2 480) of each die 402 across partition 400. If the received data will not fill one word line of all dies 402 across partition 400 to the maximum capacity, controller 108 may queue data write commands until the total aggregate write size of the storage is sufficient to fill each word line of all dies 402 across partition 400 to the maximum capacity.

[0078] In one implementation, the minimum write size is the word line capacity of erase block 404 minus the space lost due to metadata. In another implementation, the minimum write size is the combined die word line size across the two planes 406 of die 402 minus the space lost due to metadata. In yet another implementation, the minimum write size is the superword line size storing user data in partition 400 minus the space lost due to metadata. In yet another implementation, the minimum write size is the size of one or more superword lines storing user data in partition 400 minus the space lost due to metadata.

[0079] If the minimum write size is a planar word line, the buffers can be used for each plane and associated parity plane. For example, for a two word line write, where each word line is on a parallel plane of the die, four buffers are utilized while the data is in the internal volatile memory. When one word line of a plane is written to the non-volatile storage unit (i.e., not a parallel write), two buffers are released (i.e., returned to the pool of available buffers). The released buffers are the word line buffer and the parity buffer associated with the word line. Similarly, if both word lines are written to the non-volatile storage unit (i.e., are a parallel write), all utilized buffers are returned to the pool of available buffers. The parity buffer can be associated with each plane of the die such that the parity buffer will exist until all of the same plane is written to the non-volatile storage unit. When the last utilized plane is written to the non-volatile storage unit, the parity buffer is also written to the non-volatile storage unit, resulting in the unused internal volatile memory.

[0080] The write process to a partition can be optimized by writing word lines across all dies within a partition at the same time. By limiting the host to a minimum write size or allowing the controller to store data until the minimum write size is achieved (such as a size to fill the word lines in each erase block across all dies within a partition to the maximum capacity), overall write performance and program efficiency can be improved.

[0081] In one embodiment, a storage device includes a non-volatile storage unit, where a capacity of the non-volatile storage unit is divided into a plurality of partitions, and where the non-volatile storage unit includes a plurality of dies. Each die of the plurality of dies includes a plurality of erase blocks, and each erase block of the erase blocks includes a plurality of word lines. The storage device also includes a controller coupled to the non-volatile storage unit. The controller is configured to determine a minimum write size for a command to write data received from a host device, where the minimum write size is determined based on a number of erase blocks in a partition dedicated to storing user data, a number of pages per cell of a word line of each erase block, a number of word lines in each erase block, and an amount of space dedicated to storing metadata of the storage device. The controller is further configured to limit the host device to send the command to write data at the minimum write size.

[0082] Each of the plurality of zones includes the same number of erase blocks and has the same writable zone capacity. The minimum write size is determined as two full word lines in each die of the zone minus the amount of space dedicated to storing metadata. Each die of the zone includes two planes, and the minimum write size is determined as one full word line in each plane of each die of the zone minus the amount of space dedicated to storing metadata. A portion of each word line includes the amount of space dedicated to storing metadata. A portion of each erase block includes the amount of space dedicated to storing metadata. Further, at least one die in each zone is dedicated to storing die failure protection data.

[0083] In another embodiment, a storage device includes a non-volatile storage unit, wherein a capacity of the non-volatile storage unit is divided into a plurality of zones, and wherein the non-volatile storage unit includes a plurality of dies, each of the plurality of dies including a plurality of planes, each of the planes including a plurality of erase blocks, and each of the erase blocks including a plurality of word lines. The storage device also includes a controller coupled to the non-volatile storage unit. The controller is configured to calculate a minimum write size for a command to write data received from a host device, wherein the minimum write size is calculated as a size of a full word line to write one erase block of each plane of each die dedicated to storing user data within a zone. The controller is further configured to limit the host device to send commands to write data at the minimum write size.

[0084] The minimum write size is calculated based on a number of pages per cell of the plurality of word lines. A portion of each zone includes a metadata capacity for the storage device to write. The minimum write size is calculated taking into account the metadata capacity. The controller is further configured to receive one or more write commands from the host device that are smaller than the minimum write size, hold the one or more write commands until the one or more write commands aggregate to the minimum write size, and write the one or more write commands to the non-volatile storage unit when the one or more write commands aggregate to the minimum write size. Each zone includes a plurality of user data dies dedicated to storing user data, a first parity die, and a second parity die. The first parity die is dedicated to storing p-parity data and the second parity die is dedicated to storing q-parity data.

[0085] In another embodiment, a storage device includes a non-volatile storage unit, where a capacity of the non-volatile storage unit is divided into a plurality of zones, and where the non-volatile storage unit includes a plurality of dies, each of the plurality of dies including a plurality of planes, each of the planes including a plurality of erase blocks, and each of the erase blocks including a plurality of word lines. The storage device also includes means for receiving a command to write data received from a host device in a minimum write size, where the minimum write size is set by multiplying a number of erase blocks in a zone dedicated to storing user data by a number of pages per cell of the word lines by a word line size, and subtracting an amount of space dedicated to storing metadata of the storage device.

[0086] The minimum write size is set to align with a size of a word line. The storage device also includes means for calculating the minimum write size for the command, and means for limiting the host device to send the command to write data in the minimum write size. One or more zones of the storage device individually include 32 dies, and at least 30 of the 32 dies of each of the one or more zones are dedicated to storing user data. Further, at least one of the 32 dies of each of the one or more zones is dedicated to storing parity data. Additionally, a first of the 32 dies of each of the one or more zones is dedicated to storing p-parity data, and a second of the 32 dies of each of the one or more zones is dedicated to storing q-parity data.

[0087] While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the disclosure can be devised without departing from the basic scope thereof, and the scope of the present disclosure is determined by the claims that follow.

Claims

1. A storage device, the storage device comprising: A non-volatile memory cell, wherein the capacity of the non-volatile memory cell is divided into multiple partitions, wherein the non-volatile memory cell includes multiple dies, each of the multiple dies includes multiple erase blocks, and each of the erase blocks includes multiple word lines, wherein each of the erase blocks has a logical block address, and two or more logical block addresses of two or more erase blocks are associated with each of the multiple partitions; and A controller, coupled to the non-volatile memory cell, wherein the controller is configured to: Determine the minimum write size for a command used to write data received from the host device, wherein the minimum write size is determined based on the number of erase blocks in the partition dedicated to storing user data, the number of pages per unit of the word line in each erase block, the number of word lines in each erase block, and the amount of space dedicated to storing metadata of the storage device. as well as After determining the minimum write size, the host device is restricted to sending the command for writing data at the minimum write size.

2. The storage device of claim 1, wherein each of the plurality of partitions comprises the same number of erase blocks and has the same writable partition capacity.

3. The storage device of claim 1, wherein the minimum write size is determined as two complete word lines written in each die of the partition minus the amount of space dedicated to storing metadata.

4. The storage device of claim 3, wherein each die of the partition comprises two planes, and wherein the minimum write size is determined as a full word line written in each plane of each die of the partition minus the amount of space dedicated to storing metadata.

5. The storage device of claim 1, wherein a portion of each word line includes the amount of space dedicated to storing metadata.

6. The storage device of claim 1, wherein a portion of each erase block includes the amount of space dedicated to storing metadata.

7. The storage device of claim 1, wherein at least one die in each partition is dedicated to storing die failure protection data.

8. A storage device, the storage device comprising: A non-volatile memory cell, wherein the capacity of the non-volatile memory cell is divided into multiple partitions, wherein the non-volatile memory cell includes multiple dies, each of the multiple dies includes multiple erase blocks, and each of the erase blocks includes multiple word lines, wherein each of the erase blocks has a logical block address, and two or more logical block addresses of two or more erase blocks are associated with each of the multiple partitions; and A controller, coupled to the non-volatile memory cell, wherein the controller is configured to: Calculate the minimum write size for a command used to write data received from the host device, wherein the minimum write size is calculated as the full word line size of an erase block for each plane of each die within the partition dedicated to storing user data; as well as After calculating the minimum write size, the host device is restricted to sending the command for writing data at the minimum write size.

9. The storage device of claim 8, wherein the minimum write size is calculated based on the number of pages per unit of the plurality of word lines.

10. The storage device of claim 8, wherein a portion of each partition includes metadata capacity for writing to the storage device.

11. The storage device of claim 10, wherein the minimum write size is calculated taking into account the metadata capacity.

12. The storage device of claim 8, wherein the controller is further configured to: Receive one or more write commands from the host device that are smaller than the minimum write size; The one or more write commands are maintained until they aggregate to the minimum write size; and When the one or more write commands are aggregated to the minimum write size, the one or more write commands are written to the non-volatile storage unit.

13. The storage device of claim 8, wherein each partition includes a plurality of user data dies dedicated to storing user data, a first parity dies, and a second parity dies.

14. The storage device of claim 13, wherein the first parity die is dedicated to storing p-parity data and the second parity die is dedicated to storing q-parity data.

15. A storage device, the storage device comprising: A non-volatile memory cell, wherein the capacity of the non-volatile memory cell is divided into multiple partitions, wherein the non-volatile memory cell includes multiple dies, each of the multiple dies includes multiple planes, each of the planes includes multiple erase blocks, and each of the erase blocks includes multiple word lines, wherein each erase block has a logical block address, and two or more logical block addresses of two or more erase blocks are associated with each of the multiple partitions; A means for receiving a command to write data received from a host device with a minimum write size, wherein the minimum write size is set by multiplying the number of erase blocks in the partition dedicated to storing user data by multiplying the number of pages per unit of the word line by the word line size, and subtracting the amount of space dedicated to storing metadata of the storage device. A means for calculating the minimum write size of a command; as well as A means for restricting the host device from sending the command for writing data at the minimum write size after calculating the minimum write size.

16. The storage device of claim 15, wherein the minimum write size is set to be aligned with the size of the word line.

17. The storage device of claim 15, wherein one or more partitions individually comprise 32 dies, and wherein at least 30 of the 32 dies in each of the one or more partitions are dedicated to storing user data.

18. The storage device of claim 17, wherein at least one die of the 32 dies in each of the one or more partitions is dedicated to storing parity data.

19. The storage device of claim 17, wherein a first die of the 32 dies in each of the one or more partitions is dedicated to storing p-parity data, and a second die of the 32 dies in each of the one or more partitions is dedicated to storing q-parity data.

Citation Information

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