Pressure-controlled interlayer exchange-coupled magnetoresistive memory device and its operation method

Abstract

This invention discloses a magnetoresistive memory device comprising a magnetic tunnel junction, which includes a free layer, a reference layer, an insulating tunnel barrier layer located between the free layer and the reference layer, a vertically spaced magnetically anisotropic (PMA) ferromagnetic layer, and a conductive non-magnetic interlayer exchange coupling layer located between the free layer and the PMA ferromagnetic layer. This magnetoresistive memory device is a hybrid magnetoresistive memory device, programmed through a combination of spin torque transfer effect and voltage-controlled exchange coupling effect.

Description

[0001] Related applications

[0002] This application claims the benefit of priority to U.S. non-provisional patent application No. 16 / 824,814, filed March 20, 2020, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates generally to the field of magnetoresistive memory devices, and more particularly to magnetoresistive memory devices employing voltage-controlled interlayer exchange coupling to facilitate programming, and methods of operating thereof. Background Technology

[0004] Magnetoresistive memory devices can store information about the resistance difference using a first configuration and a second configuration. In the first configuration, the magnetization direction of the free magnetization layer is parallel to the magnetization of the reference magnetization layer, and in the second configuration, the magnetization direction of the free magnetization layer is antiparallel to the magnetization of the reference magnetization layer. Programming a magnetoresistive memory device requires various external power sources to flip the magnetization direction of the free layer; these external power sources can be magnetic or employ spin-transfer mechanisms.

[0005] Spin torque-transfer magnetoresistive random access memory (STT-MRAM) devices require scalability exceeding the current required for operation. The scalability of STT-MRAM devices, based on interface perpendicular magnetic anisotropy (PMA), necessitates significantly enhanced PMA to achieve the thermal stability required for reliable information retention in MRAM devices. Simultaneously, low power consumption during write operations requires efficient magnetization manipulation. The need for both a high energy barrier for retention and a low energy barrier for efficient switching is a key challenge for systems with high PMA.

[0006] Voltage-controlled magnetic anisotropy (VCMA) is a more energy-efficient method for magnetization switching because it is driven by voltage rather than current. However, achieving a sufficiently large VCMA effect to overcome PMA is very challenging. Furthermore, VCMA switching depends on the precise control required by the duration of the voltage pulse.

[0007] Prioritize magnetization switching. Due to the distribution of magnetic properties in different memory cells, this can lead to large write errors. Summary of the Invention

[0008] According to one aspect of this disclosure, a magnetoresistive memory device includes a first electrode, a second electrode, and a first layer stack located between the first electrode and the second electrode. The first layer stack includes a free layer, a reference layer, an insulating layer located between the free layer and the reference layer, a ferromagnetic layer, and a conductive non-magnetic interlayer exchange coupling layer located between the free layer and the ferromagnetic layer.

[0009] According to one aspect of this disclosure, a magnetoresistive memory device includes a magnetically exchange-coupled stack and an insulating spacer layer. The magnetically exchange-coupled stack includes a free layer, a reference layer, and a conductive non-magnetic interlayer exchange-coupled layer located between the free layer and the reference layer. The insulating spacer layer is connected in series with the magnetically exchange-coupled stack between a first electrode and a second electrode. The first electrode and the second electrode are configured to provide a programming voltage across the magnetically exchange-coupled stack and the insulating spacer layer.

[0010] According to another aspect of this disclosure, a method of operating a magnetoresistive memory device is provided. The device includes a magnetically exchange-coupled stack and an insulating spacer layer. The magnetically exchange-coupled stack includes a free layer, a reference layer, and a conductive, non-magnetic interlayer exchange-coupled layer located between the free layer and the reference layer. The insulating spacer layer is connected in series with the magnetically exchange-coupled stack between a first electrode and a second electrode. The method includes applying a first polarity programming voltage across the magnetically exchange-coupled stack and the insulating spacer layer between the first and second electrodes to switch the magnetization of the free layer from a state parallel to the reference layer to a state antiparallel to the reference layer; and applying a second polarity programming voltage opposite to the first polarity voltage across the magnetically exchange-coupled stack and the insulating spacer layer between the first and second electrodes to switch the magnetization of the free layer from a state antiparallel to the reference layer to a state parallel to the reference layer. Attached Figure Description

[0011] Figure 1 This is a schematic diagram of a random access memory device including magnetoresistive memory cells of the present disclosure in an array configuration.

[0012] Figure 2A A first configuration of an exemplary magnetoresistive memory cell according to an embodiment of the present disclosure is shown.

[0013] Figure 2B A second configuration of an exemplary magnetoresistive memory cell according to an embodiment of the present disclosure is shown.

[0014] Figure 3 The diagram schematically illustrates the pressure-sensitive changes in the magnetic anisotropic properties of parallel and antiparallel configurations of free layers in an exemplary magnetoresistive memory cell of this disclosure.

[0015] Figure 4A A third configuration of an exemplary magnetoresistive memory cell according to an embodiment of the present disclosure is shown.

[0016] Figure 4B A fourth configuration of an exemplary magnetoresistive memory cell according to an embodiment of the present disclosure is shown.

[0017] Figure 5AA simulation of the device characteristics of an exemplary magnetoresistive memory cell according to the present disclosure is shown, for the case where the intermetallic exchange coupling layer is two atomic layers thick, the energy difference between the ferromagnetic and antiferromagnetic configurations depending on the change of the electric field applied across the insulating spacer layer.

[0018] Figure 5B A simulation of the device characteristics of an exemplary magnetoresistive memory cell according to the present disclosure is shown, with the energy difference between the ferromagnetic and antiferromagnetic configurations varying with the electric field applied across the insulating spacer, for the case where the intermetallic exchange coupling layer is three atomic layers thick.

[0019] Figure 5C A simulation of the device characteristics of an exemplary magnetoresistive memory cell according to the present disclosure is shown, for the case where the metal interlayer exchange coupling layer is four atomic layers thick, the energy difference between the ferromagnetic and antiferromagnetic configurations depending on the change of the electric field applied across the insulating spacer layer.

[0020] Figure 5D A simulation of the device characteristics of an exemplary magnetoresistive memory cell according to the present disclosure is shown, with the energy difference between the ferromagnetic and antiferromagnetic configurations varying with the electric field applied across the insulating spacer, for a metal interlayer exchange coupling layer that is five atomic layers thick.

[0021] Figure 6 This demonstrates the dependence of interlayer exchange coupling on the lattice constant of magnesium oxide in the insulating spacer layer.

[0022] Figure 7A This is a schematic vertical cross-sectional view of a first configuration of a hybrid magnetoresistive memory cell according to an embodiment of the present disclosure.

[0023] Figure 7B This is a schematic vertical cross-sectional view of a second configuration of a hybrid magnetoresistive memory cell according to an embodiment of the present disclosure.

[0024] Figure 8A This is a schematic vertical cross-sectional view of a third configuration of a hybrid magnetoresistive memory cell according to an embodiment of the present disclosure.

[0025] Figure 8B This is a schematic vertical cross-sectional view of a fourth configuration of a hybrid magnetoresistive memory cell according to an embodiment of the present disclosure. Detailed Implementation

[0026] As discussed above, embodiments of this disclosure relate to magnetoresistive memory devices employing voltage-controlled exchange coupling (VCEC) (which includes voltage-controlled interlayer exchange coupling) to facilitate programming of its various aspects, as described below. VCEC MRAM devices use less energy than corresponding STT-MRAM devices to induce transitions between antiparallel and parallel states in free layers, and provide deterministic switching and higher accuracy than corresponding VCMA MRAM devices.

[0027] A VCEC MRAM device includes a stack comprising a conductive, non-magnetic interlayer exchange coupling layer located between a free layer and a reference layer, and an optional electrically insulating spacer layer that serves as a resistor connected in series with the stack. The VCEC MRAM device is programmed by applying a voltage to the stack without applying (i.e., without) an external magnetic field. Therefore, external magnets are preferably not used in VCEC MRAM devices.

[0028] Because of the presence of a non-magnetic conductive interlayer exchange coupling layer, the state of a VCEC MRAM device can be sensed (i.e., readout / determination) using the giant magnetoresistance (GMR) effect. In contrast, the state of an STT-MRAM device is sensed (i.e., readout / determination) by the tunneling magnetoresistance (TMR) effect due to the presence of an electrically insulating tunneling barrier between the free layer and the reference layer. Similarly, VCMAMRAM devices include an insulating barrier layer between the free layer and the reference layer. In contrast, VCEC MRAM devices preferably lack an insulating tunneling barrier layer between the free layer and the reference layer in the stack to facilitate exchange coupling between ferromagnetic layers.

[0029] According to one aspect of this disclosure, voltage-controlled switching coupling (VCEC) is employed to reduce the energy barrier required for transitioning between two magnetoresistive states. The inventors recognize that the VCEC effect can be at least an order of magnitude larger than the VCMA effect. Furthermore, compared to VCMA MRAM devices that operate essentially as toggle switches, the polarity of the VCEC effect can be reversed by switching the voltage polarity, thereby providing deterministic switching of free layers in a magnetoresistive memory cell.

[0030] The accompanying drawings are not to scale. Where a single instance of an element is shown, multiple instances of the element may be repeated unless explicitly described or otherwise clearly indicated that no repetition of an element exists. Identical reference numerals refer to identical or similar elements. Unless otherwise expressly stated, elements with the same reference numerals are presumed to have the same material composition. Serial numbers such as “first,” “second,” and “third” are used only to identify similar elements and may be used differently throughout the specification and claims of this disclosure.

[0031] As used herein, a first element positioned "on" a second element may be positioned on the outer side of the surface of the second element or on the inner side of the surface of the second element. As used herein, if there is physical contact between the surfaces of the first element and the surfaces of the second element, the first element is positioned "directly" on the second element. As used herein, a "process" structure or a "transient" structure refers to a structure that is subsequently modified. The term "at least one" element refers to all possibilities, including the possibility of a single element and the possibility of multiple elements.

[0032] As used herein, a “layer” refers to a portion of material comprising a region having thickness. A layer may extend over the entirety of an underlying or overlying structure, or may have a range smaller than that of the underlying or overlying structure. Additionally, a layer may be a region of uniform or non-uniform continuous structure whose thickness is less than that of the continuous structure. For example, a layer may be positioned between the top and bottom surfaces of a continuous structure or between any pair of horizontal planes at the top and bottom surfaces of a continuous structure. A layer may extend horizontally, vertically, and / or along a tapered surface. A substrate may be a layer, and may include one or more layers, and / or may have one or more layers on, above, and / or below it.

[0033] As used in this article, “layer stack” refers to the stacking of layers. As used in this article, “line” or “line structure” refers to a layer with a primary direction of extension, that is, the direction in which the layer extends the most.

[0034] See Figure 1 A schematic diagram of a magnetoresistive memory device 500 comprising a plurality of magnetoresistive memory cells 180 according to an embodiment of the present disclosure is shown. In one embodiment, the magnetoresistive memory device 500 may be configured as a magnetoresistive random access memory (MRAM) device comprising a two-dimensional array or a three-dimensional array of the magnetoresistive memory cells 180 according to an embodiment of the present disclosure. As used herein, a “random access memory device” means a memory device containing memory cells that allow random access, i.e., access to any selected memory cell upon a command to read the contents of a selected memory cell.

[0035] The magnetoresistive memory device 500 may include a memory array region 550 containing an array of corresponding magnetoresistive memory cells 180 located at the intersections of respective word lines 30 and bit lines 90. The magnetoresistive memory device 500 may also include a combination of a row decoder 560 connected to the word line 30, programming and sensing circuitry 570 (which may include programming transistors, sense amplifiers, and other bit line control circuitry) connected to the bit line 90, a column decoder 580 connected to the bit line 90 via the programming and sensing circuitry 570, and a data buffer 590 connected to the programming and sensing circuitry 570. Multiple instances of the magnetoresistive memory cells 180 are provided to form an array configuration of the magnetoresistive memory device 500. Thus, each magnetoresistive memory cell 180 may be a two-terminal device including a corresponding first electrode and a corresponding second electrode. It should be noted that the location and interconnection of components are schematic, and components may be arranged in different configurations. Furthermore, the magnetoresistive memory cells 180 may be manufactured as discrete devices, i.e., single isolated devices.

[0036] Figure 2A and Figure 2B A first configuration and a second configuration of an exemplary magnetoresistive memory cell 180 according to embodiments of the present disclosure are shown. The magnetoresistive memory cell 180 may include a series connection of a magnetically exchange-coupled stack 140 and an optional first insulating spacer layer 110, which acts as a resistor during programming and read operations. As used herein, a “magnetically exchange-coupled stack” includes a stack comprising a first ferromagnetic layer (e.g., a reference layer), a magnetically exchange-coupled layer, and a second ferromagnetic layer (e.g., a free layer). The stack is configured such that the magnetically exchange-coupled layer provides magnetically exchange-coupled coupling between the first and second ferromagnetic layers.

[0037] The magnetically exchange-coupled stack 140 may include a first reference layer 132 having a fixed magnetization direction, a free layer 136 having a simple magnetization axis parallel or antiparallel to the fixed magnetization direction, and a conductive, nonmagnetic interlayer exchange-coupled layer 150 located between the first reference layer 132 and the free layer 136. Preferably, the coupling layer comprises a metallic material, such as a pure metal or a metal alloy, to provide the metallic interlayer exchange-coupled layer 150. According to one aspect of this disclosure, the metallic interlayer exchange-coupled layer 150 provides variable magnetic exchange coupling, the magnitude and polarity of which depend on the magnitude and polarity of a voltage bias between the first reference layer 132 and the free layer 136. A first insulating spacer layer 110 comprises an electrically insulating material connected in series with the magnetically exchange-coupled stack. As used herein, "electrically insulating material" refers to a material with a conductivity less than 1.0 × 10⁻⁶. -5 The material is S / m. The first insulating spacer layer 110 acts as a resistor by reducing the conductivity of the magnetoresistive memory cell 180, thereby limiting the current flow and power consumption of the magnetoresistive memory cell 180 during operation.

[0038] The magnetoresistive memory cell 180 may include a first nonmagnetic electrode layer 102 and a second nonmagnetic electrode layer 170. A magnetically exchange-coupled stack 140 and a first insulating spacer layer 110 are connected in series between the first nonmagnetic electrode layer 102 and the second nonmagnetic electrode layer 170.

[0039] The first insulating spacer layer 110 may comprise any tunneling barrier material, such as an electrical insulating material, for example, magnesium oxide. Other suitable resistor materials may also be used instead of or supplement magnesium oxide, such as insulating materials, for example, silicon oxide or aluminum oxide. The thickness of the first insulating spacer layer 110 may be from 0.7 nm to 1.3 nm, such as about 1 nm. In one embodiment, the first insulating spacer layer 110 preferably comprises a magnesium oxide layer, and / or is substantially composed of a magnesium oxide layer.

[0040] The first reference layer 132 may include an Fe layer, a Co layer, a Ni layer, a Co / Ni multilayer structure, or a Co / Pt multilayer structure. The first reference layer 132 may also include a thin nonmagnetic layer composed of tantalum with a thickness of 0.2 nm to 0.5 nm and a thin CoFeB layer (with a thickness in the range of 0.5 nm to 3 nm). In one embodiment, the first reference layer 132 may include and / or consist of a first iron layer, the thickness of which is in the range of two iron atom layers (i.e., a monolayer) to five iron atom layers, such as three to four iron atom layers. For example, the thickness of the first reference layer 132 may be in the range of 2 nm to 7 nm, such as 3 nm to 6 nm.

[0041] The free layer 136 may comprise a ferromagnetic alloy (such as CoFeB) comprising at least one of Fe, Co, and / or Ni, the composition of which provides positive uniaxial magnetic anisotropy. Alternatively, the free layer 136 may comprise a magnetic Hessler alloy, such as an alloy that does not include Fe, Co, or Ni. In one embodiment, the free layer 136 may comprise and / or consist substantially of a second iron layer, the thickness of which is in the range of two to forty iron atomic layers, such as three to fifteen iron atomic layers. For example, the thickness of the free layer 136 may be 2 nm to 30 nm, such as 3 nm to 12 nm.

[0042] The configuration of the first reference layer 132 and the free layer 136 having corresponding positive uniaxial magnetic anisotropy provides a bistable magnetization state for the free layer 136. The bistable magnetization states include a parallel state in which the magnetization (e.g., magnetization direction) of the free layer 136 is parallel to the fixed vertical magnetization (e.g., magnetization direction) of the first reference layer 132, and an antiparallel state in which the magnetization (e.g., magnetization direction) of the free layer 136 is antiparallel to the fixed vertical magnetization (e.g., magnetization direction) of the first reference layer 132.

[0043] The interlayer exchange coupling layer 150 includes a conductive nonmagnetic material that can provide voltage-dependent exchange coupling between the first reference layer 132 and the free layer 136, such that when a voltage is applied between the electrode layers (102, 170) (e.g., when a voltage is applied between the first reference layer 132 and the free layer 136), the energy levels of the parallel and antiparallel states of the free layer 136 are shifted in opposite directions.

[0044] Suitable materials for the metal interlayer exchange coupling layer 150 include non-magnetically conductive materials, such as metallic materials (e.g., elemental metals and metal alloys), including but not limited to Au, Cu, Cr, and / or Al, and their alloys. In one embodiment, the metal interlayer exchange coupling layer 150 may be substantially composed of a metallic element selected from Au, Cu, Cr, and Al. In one embodiment, the thickness of the interlayer exchange coupling layer 150 may range from one atomic layer (i.e., monolayer) of the metallic element to fifteen atomic layers of the metallic element, such as from two atomic layers to four atomic layers. For example, the thickness of the interlayer exchange coupling layer 150 may be from 0.1 nm to 7 nm, such as from 0.3 nm to 5 nm.

[0045] In one embodiment, the first reference layer 132 may be provided as a component of a first synthetic antiferromagnetic structure (SAF structure) 120. The first SAF structure 120 may include the first reference layer 132, a fixed ferromagnetic layer 112 having magnetization antiparallel to the fixed vertical magnetization, and a first antiferromagnetic coupling layer 114 located between the first reference layer 132 and the first fixed ferromagnetic layer 112, the first fixed ferromagnetic layer facing a first side of the first reference layer 132 and opposite a second side of the first reference layer 132 facing the interlayer exchange coupling layer 150. The thickness of the first antiferromagnetic coupling layer 114 causes antiferromagnetic coupling between the first reference layer 132 and the fixed ferromagnetic layer 112. In other words, the first antiferromagnetic coupling layer 114 may be locked in an antiferromagnetic alignment between the magnetization of the first reference layer 132 and the magnetization of the fixed ferromagnetic layer 112 to lock the magnetization of the first reference layer 132 and the fixed ferromagnetic layer 112 in place. In one embodiment, the antiferromagnetic coupling layer may include ruthenium and its thickness may be in the range of 0.3 nm to 1 nm. Generally, the first SAF structure 120 includes a first reference layer 132, the magnetization of a first fixed ferromagnetic layer 112 is antiparallel to the fixed magnetization direction of the first reference layer 132, and a first antiferromagnetic coupling layer 114 is located between the first reference layer 132 and the first fixed ferromagnetic layer 112 and provides antiferromagnetic coupling between the first reference layer and the first fixed ferromagnetic layer.

[0046] In one embodiment, the non-magnetic electrode layer is located directly on the surface of the first insulating spacer layer 110, which may be... Figure 2AThe first non-magnetic electrode layer 102 shown or Figure 2B The second nonmagnetic electrode layer 170 is shown. The first nonmagnetic electrode layer 102 may be located on the side of the first SAF structure 120, and the second nonmagnetic electrode layer 170 may be located on the side of the free layer 136.

[0047] In one embodiment, a non-magnetic electrode layer (such as a second non-magnetic electrode layer 170) may be located directly on the free layer 136, such as... Figure 2A As shown. In one embodiment, the first fixed ferromagnetic layer 112 may contact the first insulating spacer layer 110, such as... Figure 2A As shown. In one embodiment, the magnetoresistive memory cell 180 may include a nonmagnetic electrode layer (such as the first nonmagnetic electrode layer 102) in contact with the first fixed ferromagnetic layer 112, such as... Figure 2B As shown.

[0048] Due to RKKY type interactions, interlayer exchange coupling (IEC) exhibits

[0049] Based on the oscillatory behavior of the thickness of the nonmagnetic interlayer exchange coupling layer 150, the thickness of the nonmagnetic interlayer exchange coupling layer 150 can be selected individually or in combination with in-plane strain to achieve negligible IEC without applied voltage, while maintaining limited pressure-sensitive interlayer exchange coupling.

[0050] See Figure 3 The VCEC-based MRAM cell 180 operates as follows. When no voltage is applied between the electrode layers (102, 170), the IEC is zero or very small (i.e., close to zero). Magnetic anisotropy can be perpendicular or in-plane because interlayer exchange coupling is not determined by spin-orbit coupling. The voltage applied between the electrode layers (102, 170) results in a finite IEC bias of the barrier. Therefore, a sufficiently large applied voltage causes a magnetization switch in the free layer 136. This control over magnetization is deterministic because the switching of voltage polarity reverses the sign of the IEC. Write information can be read by measuring the resistance of the MRAM cell 180. This resistance depends on the relative orientation of the free layer 136 and the first reference layer 132 magnetized by the GMR effect. Because the GMR effect is lower than the TMR effect, the read signal of the VCEC-based memory device is lower than that of the VCMA-based memory device. However, it is also possible to read information via the TMR effect in VCEC-based memory devices by adding another resistor (e.g., a barrier) layer and a reference layer, resulting in a double-barrier magnetic tunneling junction (MTJ), as will be seen in [reference]. Figure 4A and Figure 4B As stated above.

[0051] Therefore, VCEC-based memory devices (e.g., MRAM cell 180) are programmed by applying a positive or negative voltage to the device without an external magnetic field using voltage-dependent interlayer exchange coupling, and read by applying a voltage using GMR or TMR effects, depending on the device architecture. For example, as Figure 3 As shown, applying a positive voltage switches the free layer 136 to a parallel state (P) with the first reference layer 132, while applying a negative voltage switches the free layer to an antiparallel state (AP) with the first reference layer. Therefore, the applied voltage biases the energy barrier between the parallel and antiparallel configurations. Reversing the voltage polarity deterministically switches the free layer 136 between the parallel and antiparallel states. The IEC between the free layer 136 and the first reference layer 132 is zero or close to zero when no voltage is applied, while having a sufficiently large pressure-sensitive portion to overcome the magnetic anisotropy of the free layer 136.

[0052] Optionally, each MRAM cell 180 may include a dedicated steering device, such as an access transistor or diode of the corresponding stack 140 configured to activate when an appropriate voltage is applied to the steering device. The steering device may be electrically connected between the stack 140 and a corresponding word line 30 or bit line 90 of the corresponding MRAM cell 180. For example, the steering device may be connected between the word line 30 or bit line 90 and a corresponding electrode (102, 170) of the MRAM cell 180. In one embodiment, the word line 30 provides a signal to the first electrode 102, and the bit line 90 provides a signal directly or via the steering device to the second electrode 170 of the MRAM cell 180.

[0053] In one implementation, the polarity of the voltage applied to word line 30 may vary depending on the polarity of the magnetization state to be programmed in free layer 136. For example, a voltage of a first polarity may be applied to word line 30 (relative to bit line 90) during a transition from an antiparallel state to a parallel state, and a voltage of a second polarity (opposite to the first polarity) may be applied to word line 30 during a transition from a parallel state to an antiparallel state. Furthermore, variations of the circuitry for activating stack 140 are contemplated herein.

[0054] The programming and sensing circuit 570 may include a programming circuit configured to apply a programming voltage pulse selected from positive and negative voltage pulses across the magnetically exchange-coupled stack 140 and the first insulating spacer layer 110 connected in series in the magnetoresistive memory cell 180. The magnitude of the programming voltage pulse may be selected to cause a transition to a different magnetic state of the free layer 136 in the selected magnetoresistive memory cell 180. For example, the magnitude of the programming voltage pulse may be selected to cause... Figure 3The energy level of the intermediate state between the parallel and antiparallel states shown is lower than the energy level of the initial magnetic state of free layer 136 (which can be either parallel or antiparallel) and higher than the energy level of the final magnetic state of the free layer (i.e., the target magnetic state opposite to the initial state). The absolute value of the programming voltage pulse can be in the range of 1V to 10V, such as 1.5V to 5.0V, although smaller and larger absolute values ​​of the programming voltage pulse can also be used. The duration of the programming voltage pulse can be in the range of 1ns to 30ns (such as 2ns to 10ns), although shorter and longer programming voltage durations can also be used.

[0055] The magnetic coupling through the intermetallic exchange coupling layer 150 is voltage-controlled, and is therefore referred to herein as voltage-controlled exchange coupling (VCEC). The direction of the energy level shift of the parallel state of the magnetization of the free layer 136 caused by VCEC is opposite to the direction of the energy level shift of the antiparallel state of the magnetization of the free layer 136 caused by VCEC. The magnitude of the energy level shift of the parallel state of the magnetization of the free layer 136 caused by VCEC can be the same as or substantially the same as the energy level shift of the antiparallel state of the magnetization of the free layer 136 caused by VCEC. The direction of the energy level shift of the magnetic state of the magnetization of the free layer 136 caused by VCEC is determined by the sign of the exchange coupling provided by the intermetallic exchange coupling layer 150 and the polarity of the applied external bias voltage.

[0056] According to one aspect of this disclosure, the applied voltage biases an energy barrier between parallel and antiparallel states of magnetization of the free layer 136. The reverse voltage polarity deterministically switches between the parallel and antiparallel states. In one embodiment, the magnetoresistive memory cell 180 may be designed such that the interlayer exchange coupling between the free layer 136 and the first reference layer 132 is zero or substantially zero in the absence of an external bias voltage across the first nonmagnetic electrode layer 102 and the second nonmagnetic electrode layer 170. Furthermore, the magnetoresistive memory cell 180 may be designed such that the interlayer exchange coupling between the free layer 136 and the first reference layer 132 is sufficiently large to overcome the magnetic anisotropy of the free layer 136, wherein an external bias voltage is applied across the first nonmagnetic electrode layer 102 and the second nonmagnetic electrode layer 170 during operation of the magnetoresistive memory device 500. The relative orientation of the magnetization between the free layer 136 and the first reference layer 132 may be controlled using the VCEC effect.

[0057] Programming and sensing circuitry 570 may include sensing circuitry configured to apply a sensing voltage pulse across a selected magnetoresistive memory cell 180. The magnitude of the sensing voltage pulse is selected to prevent a change in the magnetic state of the free layer in the selected magnetoresistive memory cell instance. The absolute magnitude of the sensing voltage pulse may be in the range of 0.1V to 4V, such as 0.3V to 1.5V, although smaller and larger magnitudes of the sensing voltage pulse may also be used. The duration of the sensing voltage pulse may be in the range of 5ns to 300ns, such as 10ns to 50ns, although shorter and longer programming voltage durations may also be used.

[0058] In one embodiment, the information stored in each magnetoresistive memory cell 180 can be sensed by the giant magnetoresistive (GMR) effect, which depends on the relative orientation of the magnetization of the free layer 136 and the magnetization of the first reference layer 132 providing differential conductance through the magnetoresistive memory cell 180.

[0059] See Figure 4A and Figure 4B Additional structures can be employed to stabilize the preferred magnetization direction of the free layer 136 along the vertical direction. For example, a second synthetic antiferromagnetic (SAF) structure can be used to reduce the magnetic anisotropy energy of the parallel and antiparallel states of the magnetization of the free layer 136 relative to the fixed magnetization direction that is not parallel or antiparallel to the first reference layer 132. In this case, the information stored in each magnetoresistive memory cell 180 can be sensed via the tunneling magnetoresistive (TMR) effect.

[0060] Figure 4A and Figure 4B A third and a fourth configuration of the magnetoresistive memory cell 180 of this disclosure are shown, respectively. Through the insertion of a second insulating spacer layer 155 between the magnetically exchange-coupled stack 140 and the second non-magnetic electrode layer 170, and the series connection of the second synthetic antiferromagnetic (SAF) structure 160, it is possible to... Figure 2A The first configuration of the magnetoresistive memory cell 180 shown is derived. Figure 4A The third configuration of the magnetoresistive memory cell 180. The second insulating spacer layer 155 is accessible to the free layer 136.

[0061] exist Figure 4AIn the magnetoresistive memory cell 180, the second synthetic antiferromagnetic structure includes an additional reference layer (referred to herein as the second reference layer 166), an additional fixed ferromagnetic layer (referred to herein as the second fixed ferromagnetic layer 162), and an additional antiferromagnetic coupling layer (referred to herein as the second antiferromagnetic coupling layer 164). The magnetization of the additional fixed ferromagnetic layer is antiparallel to the magnetization direction of the additional reference layer. The additional antiferromagnetic coupling layer is located between the additional reference layer and the additional fixed ferromagnetic layer, and provides antiferromagnetic coupling between the additional reference layer and the additional fixed ferromagnetic layer. A second insulating spacer layer 155 may be located between the second reference layer 166 and the free layer 136.

[0062] By providing the aforementioned additional synthetic antiferromagnetic (SAF) structure (referred to herein as the second SAF structure 160) and an interlayer exchange coupling layer 150 between the first insulating spacer layer 110 and the free layer 136, Figure 4B The fourth configuration of the magnetoresistive memory cell 180 can be obtained from Figure 2B The second configuration of the magnetoresistive memory cell 180 shown is derived. In this configuration, the magnetically exchange-coupled stack 140 includes a free layer 136, a second reference layer 166, and an interlayer exchange-coupled layer 150 located between the free layer 136 and the second reference layer 166. A second insulating spacer layer 155 is disposed between the free layer 136 and the first reference layer 132.

[0063] The second insulating spacer layer 155 may comprise any tunneling barrier material, such as an electrical insulating material, for example, magnesium oxide. The thickness of the second insulating spacer layer 155 may be from 0.7 nm to 1.3 nm, such as about 1 nm. In one embodiment, the second insulating spacer layer 155 comprises a magnesium oxide layer, and / or is substantially composed of a magnesium oxide layer.

[0064] In one embodiment, the second nonmagnetic electrode layer 170 may be in contact with the second synthetic antiferromagnetic structure 160, such as Figure 4A As shown. In one embodiment, the first insulating spacer layer 110 may be located on the second synthetic antiferromagnetic structure 160, and the second nonmagnetic electrode layer 170 may be located on the first insulating spacer layer 110, as shown. Figure 4B As shown. In one embodiment, the magnetoresistive memory cell 180 may include a nonmagnetic electrode layer (such as the first nonmagnetic electrode layer 102) in contact with the first fixed ferromagnetic layer 112, such as... Figure 4B As shown.

[0065] Figure 4A and Figure 4B The programming of the magnetoresistive memory cell 180 can be combined with... Figure 2A and Figure 2B The programming of the magnetoresistive memory cell 180 is performed in the same manner. Optionally, the magnitude of the programming voltage pulse can be increased to compensate. Figure 4A and Figure 4B The voltage drop across the second insulating spacer layer 155 in the magnetoresistive memory cell 180.

[0066] Figure 4A and Figure 4B The sensing of the magnetic state of the magnetoresistive memory cell 180 can be compared with... Figure 2A and Figure 2B The sensing of the magnetic state of the magnetoresistive memory cell 180 is performed in the same manner, except that tunneling magnetoresistive measurement can be used instead of giant magnetoresistive measurement. The sensing voltage can be adjusted accordingly.

[0067] Figures 5A to 5D Simulation results are shown for the variation of the energy difference between ferromagnetic and antiferromagnetic configurations for various materials and thicknesses of the intermetallic exchange coupling layer 150, depending on the electric field applied across the first insulating spacer layer 110. Figure 5A This corresponds to the case where the inter-metal exchange coupling layer 150 is two atomic layers thick; Figure 5B This corresponds to the case where the inter-metal exchange coupling layer 150 is three atomic layers thick; Figure 5C This corresponds to the case where the inter-metal exchange coupling layer 150 is four atomic layers thick; and Figure 5D This corresponds to the case where the intermetallic exchange coupling layer 150 is five atomic layers thick. In each figure, the free layer 136 and the first reference layer 132 each comprise three monolayer-thick iron layers. The resulting cells containing the Al, Cu, and Au intermetallic exchange coupling layers 150 are labeled in each figure.

[0068] Pressure-controlled exchange coupling (VCEC) energy (also known as pressure-controlled interlayer exchange coupling energy) is the difference between the energy used for parallel alignment between the first reference layer 132 and the free layer 136 and the energy used for antiparallel alignment between the first reference layer 132 and the free layer 136 (expressed as ΔE(E) - ΔE(0), where ΔE = E). AP -E P The voltage-controlled switching coupling energy depends linearly on the external bias voltage applied across the first insulating spacer 110. Changing the polarity of the external bias voltage applied across the first insulating spacer 110 changes the sign of the voltage-controlled switching coupling energy.

[0069] An external electrical bias voltage is applied between the first nonmagnetic electrode layer 102 and the second nonmagnetic electrode layer 170, the majority of which (such as 99%) is applied across the first insulating spacer layer 110 in the first and second configurations, or across the first insulating spacer layer and the second insulating spacer layer (110, 155) in the third and fourth configurations.

[0070] Table 1 shows the VCEC scaling factor between voltage-controlled exchange coupling and the electric field strength across the first insulating spacer 110.

[0071] The table is prepared based on the material and thickness of the inter-metal exchange coupling layer 150. In other words, the VCEC coefficient is calculated as the total energy difference between the parallel and antiparallel orientations of the free and reference layers for different values ​​of the applied electric field, and exhibits a linear dependence on voltage. Changing the voltage polarity reverses the sign of the exchange coupling, and the IEC depends on the thickness of the inter-metal exchange coupling layer 150.

[0072] Table 1 below shows the VCEC scaling factor, in pJ / Vm, between the voltage-controlled exchange coupling and the electric field strength across the first insulating spacer layer 110 for various materials and thicknesses of the intermetallic exchange coupling layer 150 in the magnetoresistive memory cell 180 of this disclosure. In the simulation, the free layer 136 comprises three Fe monolayers, the first reference layer 132 comprises three Fe monolayers, and the first insulating spacer layer 110 comprises MgO.

[0073] Table 1

[0074] Number of single layers gold copper aluminum chromium 1 2.0 0.7 -9.0 -1.2 2 -3.1 3.8 -12.0 -0.8 3 -4.0 -3.7 3.3 -4.2 4 -0.35 3.6 3.2 1.1 5 0.85 0.1 2.0 -1.0

[0075] According to one aspect of this disclosure, the zero-voltage exchange coupling energy depends on the strain in the first insulating spacer layer 110, and, if present, on the strain in the second insulating spacer layer 155. Figure 6 The interlayer exchange coupling calculated for a system with four Al monolayers is shown to depend on the lattice constant of magnesium oxide in the first insulating spacer layer 110.

[0076] Interlayer exchange coupling in the absence of an external bias voltage is strongly dependent on the in-plane lattice constant (a0) of the first insulating spacer layer 110, which can be controlled by strain. When the first insulating spacer layer 110 is made of MgO, the interlayer exchange coupling in the absence of an external bias voltage is ferromagnetic for the equilibrium lattice constant of MgO (a0 = 2.866 Å). For larger and smaller lattice constants a0, the interlayer exchange coupling becomes antiferromagnetic. According to one aspect of this disclosure, the lattice constants of the first insulating spacer layer 110 and / or the second insulating spacer layer 155 (if present) can be tunable to provide zero interlayer exchange coupling in the absence of an electrical bias voltage applied across the first nonmagnetic electrode layer 102 and the second nonmagnetic electrode layer 170. The value of a0 can be tunable to approximately 2.85 Å to achieve an IEC value of approximately zero.

[0077] In contrast, for lattice constants smaller than the equilibrium lattice constant, the VCEC coefficient depends only weakly on the lattice constants of the first and / or second insulating spacer layers (110, 155). With MgO as the insulating spacer, for a large lattice constant of approximately 3.0 Å, the VCEC can be large and have an inverted sign without an applied external voltage. This is shown in Table 2 below, which provides VCEC scaling factors in pJ / Vm for different a0 values ​​of MRAM cells comprising an MgO insulating spacer layer, three monolayer-thick iron first reference layers, four monolayer-thick aluminum interlayer coupling layers, and three monolayer-thick iron free layers.

[0078] Table 2: Dependence of VCEC coefficients on the lattice parameter a0 of MgO for systems with four Al monolayers.

[0079] <![CDATA[a0 (in angstroms)]]> VCEC coefficient (in pJ / Vm) 2.8 2.1 2.83 2.4 2.85 2.8 2.866 3.2 3 -3.5

[0080] Various embodiments of this disclosure can be employed to provide a magnetoresistive memory device 500 capable of operating with low operating current. Switching of the magnetic state of the free layer 136 can be performed deterministically based on the polarity of the applied programming pulse, independent of the duration of the programming voltage pulse. The magnetoresistive memory device 500 can operate with low power and high reliability using voltage-controlled switching coupling provided by the intermetallic switching coupling layer 150.

[0081] According to embodiments of this disclosure, a magnetoresistive memory device (500, 180) includes a magnetically exchange-coupled stack 140 and an insulating spacer layer 110. The magnetically exchange-coupled stack includes a free layer 136, a reference layer 132, and a conductive, non-magnetic interlayer exchange-coupled layer 150 located between the free layer 136 and the reference layer 132. The insulating spacer layer is connected in series with the magnetically exchange-coupled stack 140 between a first electrode 102 and a second electrode 170. The first and second electrodes are configured to provide a programming voltage across the magnetically exchange-coupled stack 140 and the insulating spacer layer 110.

[0082] In one embodiment, the conductive nonmagnetic interlayer exchange coupling layer 150 includes a metallic interlayer exchange coupling layer. The metallic interlayer exchange coupling layer 150 provides voltage-dependent exchange coupling between the reference layer 132 and the free layer 136, such that when corresponding first and second polarity voltages are applied between the first and second electrodes (102, 170), the energy levels of the parallel and antiparallel states of the free layer 136 are shifted in opposite directions.

[0083] In another embodiment, the device (500, 180) lacks an external magnet, such that the magnetization state of the free layer 136 is configured to be programmed by the giant magnetoresistance (GMR) effect in response to the application of a programming voltage in the absence of an external magnetic field.

[0084] In one embodiment, the device 500 further includes a programming circuit 570 configured to apply a programming voltage selected from positive and negative voltage pulses between the first electrode 102 and the second electrode 170 across the magnetically exchange-coupled stack 140 and the insulating spacer layer 110, to cause the free layer 136 to transition to different magnetization states.

[0085] In one embodiment, the device 500 further includes a sensing circuit 570 configured to apply a sensing voltage pulse between the first electrode 102 and the second electrode 170, wherein the magnitude of the sensing voltage pulse is selected to prevent a change in the magnetization state of the free layer 136.

[0086] In one embodiment, the interlayer exchange coupling layer 150 is substantially composed of a metallic element selected from Au, Cu, Cr, and Al, and the thickness of the interlayer exchange coupling layer 150 ranges from one atomic layer of a metallic element to five atomic layers. In another embodiment, any other suitable conductive nonmagnetic material that can provide exchange coupling may be used instead of or supplement Au, Cu, Cr, or Al.

[0087] In one embodiment, the insulating spacer layer 110 includes a magnesium oxide layer, the reference layer 132 includes a first iron layer with a thickness ranging from two to forty iron atom layers, and the free layer 136 includes a second iron layer with a thickness ranging from two to forty iron atom layers.

[0088] In another embodiment, the device (500, 180) further includes a first synthetic antiferromagnetic structure 120, which includes a reference layer 132, a fixed ferromagnetic layer 112 having a magnetization direction opposite to that of the reference layer 132, and an antiferromagnetic coupling layer 114 located between the reference layer 132 and the fixed ferromagnetic layer 112.

[0089] In another embodiment, the device (500, 180) further includes a second synthetic antiferromagnetic structure 160 and an additional insulating spacer layer 155. The second synthetic antiferromagnetic structure includes an additional reference layer 166, an additional fixed ferromagnetic layer 162, and an additional antiferromagnetic coupling layer 164. The magnetization of the additional fixed ferromagnetic layer is antiparallel to the magnetization direction of the additional reference layer 166. The additional antiferromagnetic coupling layer is located between the additional reference layer 166 and the additional fixed ferromagnetic layer 162. The additional insulating spacer layer is located between the first electrode 102 and the second electrode 170.

[0090] In one embodiment, the method of operating the device (500, 180) includes applying a first polarity programming voltage between the first electrode 102 and the second electrode 170 across the magnetically exchange-coupled stack 140 and the insulating spacer layer 110 to switch the magnetization of the free layer 136 from a state parallel to the reference layer 132 to a state antiparallel to the reference layer 132, and applying a second polarity programming voltage opposite to the first polarity voltage between the first electrode 102 and the second electrode 170 across the magnetically exchange-coupled stack 140 and the insulating spacer layer 110 to switch the magnetization of the free layer 136 from an antiparallel state to a parallel state to the reference layer 132.

[0091] In one embodiment, the magnetization of the free layer 136 is switched in response to the application of a first polarity programming voltage and a second polarity programming voltage in the absence of an external magnetic field. In one embodiment, the first polarity voltage comprises a negative voltage pulse, and the second polarity voltage comprises a positive voltage pulse. In one embodiment, the magnetization of the free layer is switched via the giant magnetoresistance (GMR) effect.

[0092] In one embodiment, the method further includes applying a sensing voltage pulse between the first electrode 102 and the second electrode 170 to read the magnetization of the free layer 136 by means of the giant magnetoresistance (GMR) effect or by means of the tunneling magnetoresistance (TMR) effect without changing the magnetization state of the free layer 136.

[0093] According to one aspect of this disclosure, a hybrid magnetoresistive memory cell is provided that can be used as a magnetoresistive memory cell 180. The hybrid magnetoresistive memory cell can utilize both effects in a manner that allows the spin-transfer torque (STT) effect and the voltage-controlled exchange coupling (VCEC) effect to reinforce each other during programming and reduce the programming voltage.

[0094] refer to Figure 7A , Figure 7B , Figure 8A Figure 8C illustrates four configurations of a hybrid magnetoresistive memory cell. Each hybrid magnetoresistive memory cell includes a stack comprising, from one side to the other, a first non-magnetic electrode layer 102, a reference layer 132, an electrically insulating tunnel barrier layer 134, a free layer 136, a non-magnetic interlayer exchange coupling layer 150, a vertical magnetic anisotropy (PMA) ferromagnetic layer 280, and a second non-magnetic electrode layer 170. In one embodiment, the first non-magnetic electrode layer 102 may be connected to a word line 30, and the second non-magnetic electrode layer 170 may be connected to a bit line 90. Alternatively, the first non-magnetic electrode layer 102 may be connected to a bit line 90, and the second non-magnetic electrode layer 170 may be connected to a word line 30.

[0095] The first non-magnetic electrode layer 102 and the second non-magnetic electrode layer 170 may be substantially composed of at least one non-magnetic metallic material, such as aluminum, copper, tungsten, tantalum, alloys thereof, etc. The first and second non-magnetic electrode layers (102, 170) may have the shape of discrete plates located in the stack and contacting the corresponding word line 30 or bit line 90. Alternatively, the first non-magnetic electrode layer 102 and the second non-magnetic electrode layer 170 may include portions of the corresponding word line 30 or bit line 90.

[0096] Figure 7B The second configuration of the hybrid magnetoresistive memory cell shown is... Figure 7B The difference in the first configuration of the hybrid magnetoresistive memory cell shown is the presence of the synthetic antiferromagnetic structure (SAF structure) 120.

[0097] Specifically, the SAF structure 120 includes a reference layer 132 having a fixed vertical magnetization direction (which may be upward or downward), a fixed ferromagnetic layer 112 having magnetization antiparallel to the fixed vertical magnetization direction of the reference layer 132, and an antiferromagnetic coupling layer 114 located between the reference layer 132 and the fixed ferromagnetic layer 112, providing antiferromagnetic coupling between the reference layer 132 and the fixed ferromagnetic layer 112. The thickness of the first antiferromagnetic coupling layer 114 causes antiferromagnetic coupling between the reference layer 132 and the fixed ferromagnetic layer 112.

[0098] The fixed ferromagnetic layer 112 may include an Fe layer, a Co layer, a Ni layer, a CoFeB layer, a CoFe layer, a Co / Ni multilayer structure, or a Co / Pt multilayer structure. The reference layer 132 may have a thickness of 2 nm to 7 nm, such as 3 nm to 6 nm.

[0099] The antiferromagnetic coupling layer 114 may comprise a multilayer stack of antiferromagnetic coupling materials, such as ruthenium, iridium, iridium-manganese alloy, or cobalt and platinum layers, and may have a thickness in the range of 0.5 nm to 2 nm. The thickness of the antiferromagnetic coupling layer 114 may be optimized to maximize the antiferromagnetic coupling between the reference layer 132 and the free layer 136.

[0100] Reference layer 132 includes a material capable of providing a high rate of spin-transfer torque to free layer 136 when tunneling current flows through tunnel barrier layer 134. Reference layer 132 may include an Fe layer, a Co layer, a Ni layer, a Co / Ni multilayer structure, or a Co / Pt multilayer structure. Reference layer 132 may also additionally include a thin non-magnetic layer of tantalum with a thickness of 0.2 nm to 0.5 nm and a thin CoFeB layer (with a thickness in the range of 0.5 nm to 3 nm). In one embodiment, reference layer 132 may include and / or consist of a first iron layer with a thickness in the range of two iron atom layers (i.e., a monolayer) to five iron atom layers, such as three to four iron atom layers. For example, the thickness of reference layer 132 may be in the range of 2 nm to 7 nm, such as 3 nm to 6 nm.

[0101] The tunnel barrier layer 134 may comprise any tunneling barrier material, such as an electrically insulating material, for example, magnesium oxide. The thickness of the tunnel barrier layer 134 may be 1.2 nm or less, such as 0.7 nm to 1.2 nm, such as about 0.8 nm to 1 nm.

[0102] The free layer 136 may comprise Fe, Co, Ni, or a ferromagnetic alloy comprising at least one of Fe, Co, and Ni (such as CoFeB or CoFe) or a multilayer stack (such as (Co / Pt)). n (where n is an integer greater than 1). The composition and thickness of the free layer 136 can be selected such that the free layer 136 has positive uniaxial magnetic anisotropy, that is, has a preferred magnetization direction along the vertical direction. For example, the thickness of the free layer 136 can be from 2 nm to 30 nm, such as from 3 nm to 12 nm.

[0103] The magnetization direction of the free layer 136 can be flipped to become parallel to or antiparallel to the magnetization direction of the reference layer 132, depending on the electrical bias voltage applied across the first non-magnetic electrode layer 102 and the second non-magnetic electrode layer 170.

[0104] The nonmagnetic interlayer exchange coupling layer 150 comprises a nonmagnetically conductive material, such as a metallic material (e.g., elemental metals and metal alloys). In both the first and second configurations, the nonmagnetic interlayer exchange coupling layer 150 may contain a metallic material that provides a positive exchange coupling coefficient (i.e., a voltage-controlled exchange coupling (VCEC) scaling factor). For example, the nonmagnetic interlayer exchange coupling layer 150 may comprise Au, Cu, Cr, and / or Al and alloys thereof, and the thickness of the nonmagnetic interlayer exchange coupling layer 150 may be selected such that the exchange coupling coefficient of the nonmagnetic interlayer exchange coupling layer 150 is positive.

[0105] In one embodiment, the intermetallic exchange coupling layer 150 may be substantially composed of a metal element selected from Au, Cu, Cr, Ru, and Al, as described in previous embodiments. In one embodiment, the thickness of the intermetallic exchange coupling layer 150 may range from one atomic layer (i.e., monolayer) of the metal element to fifteen layers of the metal element, such as from two atomic layers to four atomic layers. For example, the thickness of the intermetallic exchange coupling layer 150 may be from 0.1 nm to 7 nm, such as from 0.3 nm to 5 nm.

[0106] The PMA ferromagnetic layer 280 comprises a material that provides high perpendicular magnetic anisotropy (e.g., higher than that of the reference layer 132). Therefore, the magnetization direction of the PMA ferromagnetic layer 280 is vertical, i.e., perpendicular to the interface between the contact layers within the hybrid magnetoresistive memory cell. The ferromagnetic material of the PMA ferromagnetic layer 280 does not require the generation of any spin-polarized current. Therefore, any hard magnetic material that provides high perpendicular magnetic anisotropy can be used in the PMA ferromagnetic layer 280.

[0107] In one embodiment, the PMA ferromagnetic layer 280 comprises a material selected from FePt alloys, FePd alloys, CoPt alloys, Pt / Co multilayer stacks, Co / Ag multilayer stacks, Co / Cu multilayer stacks, Co / Ni multilayer stacks, (Pt / Co / Pt) / Pd multilayer stacks, (Pt / Co / Pt) / Ag multilayer stacks, (Pt / Co / Pt) / Cu multilayer stacks, (Pt / Co / Pt) / Ni multilayer stacks, and Co / (Pt / Pd) multilayer stacks. In an exemplary example, the PMA ferromagnetic layer 280 may comprise an L10 alloy disclosed in Journal of Applied Physics 111, 07A708 (2012), such as FePt, FePd, or CoPt. The FePt alloy, FePd alloy, and CoPt alloy may each have a 6.6 × 10⁻⁶ Ω·cm² content. 7 erg / cm 3 1.8×10 7 erg / cm 3 and 4.9×10 7 erg / cm 3The magnetic anisotropy constant. In another exemplary example, the PMA ferromagnetic layer 280 may comprise a Pt / Co multilayer, a Co / Ag multilayer, a Co / Cu multilayer, or a Co / Ni multilayer, or may comprise a (Pt / Co / Pt) / Pd multilayer, a (Pt / Co / Pt) / Ag multilayer, a (Pt / Co / Pt) / Cu multilayer, or a (Pt / Co / Pt) / Ni multilayer disclosed in IEEE Transaction on Magnetics 31,3337 (1995). In yet another exemplary example, the PMA ferromagnetic layer 280 may comprise a Co / (Pt / Pd) multilayer or a Co / (Pd / Pt) multilayer disclosed in Journal of Applied Physics 77,3995 (1995).

[0108] A stack of layers including a reference layer 132, a tunnel barrier layer 134, and a free layer 136 constitutes a magnetic tunnel junction (MTJ) 140. A stack of layers including a tunnel barrier layer 134, a free layer 136, a non-magnetic interlayer exchange coupling layer 150, and a PMA ferromagnetic layer 280 constitutes a magnetically exchange-coupled stack 240.

[0109] exist Figure 7A and Figure 7B In one embodiment, the fixed magnetization direction of the reference layer 132 is parallel to the fixed magnetization direction of the PMA ferromagnetic layer 280, and the material of the magnetically exchange-coupled stack 240 is selected such that the exchange coupling coefficient (i.e., the voltage-controlled exchange coupling (VCEC) scaling factor) across the nonmagnetic tunneling barrier 134 is positive.

[0110] In this configuration, the negative voltage applied between the first non-magnetic electrode layer 102 and the second non-magnetic electrode layer 170 causes the magnetization of the free layer 136 to become antiparallel to the fixed magnetization of the reference layer 132. In other words, the negative voltage applied to the first non-magnetic electrode layer 102 relative to the second non-magnetic electrode layer 170, at least partially through the spin-transfer torque effect, causes the antiparallel alignment of the magnetization between the free layer 136 and the reference layer 132 to become energy-advantageous relative to the parallel alignment of the magnetization between the free layer 136 and the reference layer 132.

[0111] Furthermore, the negative voltage applied to the first non-magnetic electrode layer 102 relative to the second non-magnetic electrode layer 170 induces a voltage-controlled exchange coupling (VCEC) effect. Under this VCEC effect, due to the positive VCEC coefficient, the antiparallel alignment between the magnetization of the free layer 136 and the fixed magnetization of the PMA ferromagnetic layer 280 becomes energy-favorable compared to the parallel alignment between the magnetization of the free layer 136 and the fixed magnetization of the PMA ferromagnetic layer 280. Therefore, the positive sign of the exchange coupling coefficient and the parallel alignment of the fixed magnetization directions of the PMA ferromagnetic layer 280 and the reference layer 132 are selected such that the conditions favoring the antiparallel alignment between the reference layer 132 and the free layer 136 through the spin-transfer torque (STT) effect (e.g., the negative voltage applied between the first non-magnetic electrode layer 102 and the second non-magnetic electrode layer 170) also induce conditions favoring the antiparallel alignment between the PMA ferromagnetic layer 280 and the free layer 136 through the voltage-controlled exchange coupling (VCEC) effect. Since the magnetization direction of the PMA ferromagnetic layer 280 is parallel to the magnetization direction of the reference layer 132, the favorable antiparallel alignment of energy between the reference layer 132 and the free layer 136 also causes a favorable antiparallel alignment of energy between the PMA ferromagnetic layer 280 and the free layer 136. Therefore, the VCEC effect contributes to the STT effect and reduces the amount of negative voltage required to switch the magnetization direction of the free layer 136 to be antiparallel to the magnetization direction of the reference layer 132, and keeps the device in a high resistivity state.

[0112] In contrast, the positive voltage applied between the first non-magnetic electrode layer 102 and the second non-magnetic electrode layer 170 induces a spin-transfer torque effect, which causes the magnetization of the free layer 136 to become parallel to the fixed magnetization of the reference layer 132. In other words, the parallel alignment of the magnetizations between the free layer 136 and the reference layer 132 caused by the positive voltage applied to the first non-magnetic electrode layer 102 relative to the second non-magnetic electrode layer 170, through the spin-transfer torque effect, becomes energy-advantageous compared to the anti-parallel alignment of the magnetizations between the free layer 136 and the reference layer 132.

[0113] Furthermore, the positive voltage applied between the first non-magnetic electrode layer 102 and the second non-magnetic electrode layer 170 induces a voltage-controlled exchange coupling (VCEC) effect. Under this VCEC effect, due to the positive VCEC coefficient, the parallel alignment between the magnetization of the free layer 136 and the fixed magnetization of the PMA ferromagnetic layer 280 becomes energy-advantageous compared to the anti-parallel alignment between the magnetization of the free layer 136 and the fixed magnetization of the PMA ferromagnetic layer 280. Just as in the case of a negative voltage applied to the first non-magnetic electrode layer 102, the alignment of the sign of the exchange coupling and the magnetization directions of the PMA ferromagnetic layer 280 and the fixed magnetization of the reference layer 132 is selected such that conditions favorable for parallel alignment between the reference layer 132 and the free layer 136 through spin-transfer torque effect (e.g., a positive voltage applied between the first non-magnetic electrode layer 102 and the second non-magnetic electrode layer 170) also induce conditions favorable for parallel alignment between the PMA ferromagnetic layer 280 and the free layer 136 through the voltage-controlled exchange coupling effect. Therefore, the VCEC effect contributes to the STT effect and reduces the amount of positive voltage required to switch the magnetization direction of the free layer 136 to be parallel to the magnetization direction of the reference layer 132, and puts the device in a low resistivity state.

[0114] In other words, the spin-transfer torque effect and voltage-controlled exchange coupling effect are constructively added to amplify the reduction in energy of the antiparallel alignment between the magnetization of the free layer 136, the magnetization of the reference layer 132, and the PMA ferromagnetic layer 280 when a negative voltage is applied, and to amplify the reduction in energy of the parallel alignment of the magnetization of the free layer 136 relative to the magnetization directions of the reference layer 132 and the PMA ferromagnetic layer 280 when a positive voltage is applied. This constructive addition of the spin-transfer torque effect and voltage-controlled exchange coupling effect is due to the parallel alignment of the magnetization directions between the reference layer 132 and the PMA ferromagnetic layer 280 and the choice of the material and thickness of the stack 240, resulting in a positive exchange coupling coefficient.

[0115] exist Figure 8A and Figure 8B In one embodiment, the fixed magnetization direction of the reference layer 132 is antiparallel to the fixed magnetization direction of the PMA ferromagnetic layer 280, and the material of the magnetically exchange-coupled stack 240 is selected such that the exchange coupling coefficient across the nonmagnetic tunneling barrier 134 (i.e., the voltage-controlled exchange coupling (VCEC) scaling factor) is negative.

[0116] In this configuration, the negative voltage applied between the first non-magnetic electrode layer 102 and the second non-magnetic electrode layer 170 causes the magnetization of the free layer 136 to become antiparallel to the fixed magnetization of the reference layer 132. In other words, the negative voltage applied to the first non-magnetic electrode layer 102 relative to the second non-magnetic electrode layer 170, at least partially through the spin-transfer torque effect, causes the antiparallel alignment of the magnetization between the free layer 136 and the reference layer 132 to become energy-advantageous relative to the parallel alignment of the magnetization between the free layer 136 and the reference layer 132.

[0117] Furthermore, the negative voltage applied to the first non-magnetic electrode layer 102 relative to the second non-magnetic electrode layer 170 induces a voltage-controlled exchange coupling (VCEC) effect. Under this VCEC effect, due to the negative VCEC coefficient, the parallel alignment between the magnetization of the free layer 136 and the fixed magnetization of the PMA ferromagnetic layer 280 becomes energy-favorable compared to the anti-parallel alignment between the magnetization of the free layer 136 and the fixed magnetization of the PMA ferromagnetic layer 280. Therefore, the negative sign of the exchange coupling coefficient and the anti-parallel alignment of the fixed magnetization directions of the PMA ferromagnetic layer 280 and the reference layer 132 are chosen such that the conditions favoring the anti-parallel alignment between the reference layer 132 and the free layer 136 through the spin-transfer torque (STT) effect (e.g., the negative voltage applied between the first non-magnetic electrode layer 102 and the second non-magnetic electrode layer 170) also induce conditions favoring the parallel alignment between the PMA ferromagnetic layer 280 and the free layer 136 through the voltage-controlled exchange coupling (VCEC) effect. Since the magnetization direction of the PMA ferromagnetic layer 280 is antiparallel to the magnetization direction of the reference layer 132, the favorable antiparallel alignment of energy between the reference layer 132 and the free layer 136 also causes a favorable parallel alignment of energy between the PMA ferromagnetic layer 280 and the free layer 136. Therefore, the VCEC effect contributes to the STT effect and reduces the amount of negative voltage required to switch the magnetization direction of the free layer 136 to be antiparallel to the magnetization direction of the reference layer 132, and keeps the device in a high resistivity state.

[0118] In contrast, the positive voltage applied between the first non-magnetic electrode layer 102 and the second non-magnetic electrode layer 170 induces a spin-transfer torque effect, which causes the magnetization of the free layer 136 to become parallel to the fixed magnetization of the reference layer 132. In other words, the parallel alignment of the magnetizations between the free layer 136 and the reference layer 132 caused by the positive voltage applied to the first non-magnetic electrode layer 102 relative to the second non-magnetic electrode layer 170, through the spin-transfer torque effect, becomes energy-advantageous compared to the anti-parallel alignment of the magnetizations between the free layer 136 and the reference layer 132.

[0119] Furthermore, the positive voltage applied between the first non-magnetic electrode layer 102 and the second non-magnetic electrode layer 170 induces a voltage-controlled exchange coupling (VCEC) effect. Under this VCEC effect, due to the negative VCEC coefficient, the antiparallel alignment between the magnetization of the free layer 136 and the fixed magnetization of the PMA ferromagnetic layer 280 becomes energy-favorable compared to the parallel alignment between the magnetization of the free layer 136 and the fixed magnetization of the PMA ferromagnetic layer 280. Just as in the case of a negative voltage applied to the first non-magnetic electrode layer 102, the sign of the exchange coupling and the alignment of the magnetization direction of the PMA ferromagnetic layer 280 and the fixed magnetization of the reference layer 132 are selected such that conditions favoring the parallel alignment between the reference layer 132 and the free layer 136 through spin-transfer torque effects (e.g., a positive voltage applied between the first non-magnetic electrode layer 102 and the second non-magnetic electrode layer 170) also induce conditions favoring the antiparallel alignment between the PMA ferromagnetic layer 280 and the free layer 136 through the voltage-controlled exchange coupling effect. Therefore, the VCEC effect contributes to the STT effect and reduces the amount of positive voltage required to switch the magnetization direction of the free layer 136 to be parallel to the magnetization direction of the reference layer 132, and puts the device in a low resistivity state.

[0120] In other words, the spin-transfer torque effect and voltage-controlled exchange coupling effect are constructively increased to amplify the reduction in energy of the antiparallel alignment between the magnetization of the free layer 136 and the magnetization of the reference layer 132 when a negative voltage is applied, and the reduction in energy of the parallel alignment of the magnetization direction of the free layer 136 relative to the magnetization direction of the reference layer 132 when a positive voltage is applied. This constructive increase in the spin-transfer torque effect and voltage-controlled exchange coupling effect is due to the antiparallel alignment of the magnetization directions between the reference layer 132 and the PMA ferromagnetic layer 280 and the choice of the material and thickness of the stack 240, resulting in a negative exchange coupling coefficient.

[0121] If the magnetization directions of the reference layer 132 and the PMA ferromagnetic layer 280 are not aligned as desired compared to the VCEC coefficient of the stack 240, the magnetization directions of the reference layer 132 and the PMA ferromagnetic layer 280 can be aligned as desired by applying an external magnetic field during the fabrication of the hybrid magnetoresistive memory cell. However, no external magnetic field is applied during the use (i.e., writing and reading) of the complete hybrid magnetoresistive memory cell.

[0122] If the VCEC coefficient of the stack 240 is positive and the magnetization directions of the reference layer 132 and the PMA ferromagnetic layer 280 are antiparallel, then in any first direction perpendicular to the interface between the reference layer 132 and the tunnel barrier layer 134 (e.g., relative to...), Figure 7AAn external magnetic field is applied to the cell shown (either upwards or downwards). The external magnetic field has a magnitude sufficient to switch the magnetization directions of both the reference layer 132 and the PMA ferromagnetic layer 280, such that these directions are parallel to a first direction. After the external magnetic field is applied, the first magnetization direction of the reference layer 132 is parallel to the first magnetization direction of the PMA ferromagnetic layer 280. Therefore, after fabrication, the VCEC coefficient of the stack 240 is positive as needed, and the magnetization directions of the reference layer 132 and the PMA ferromagnetic layer 280 are parallel.

[0123] Alternatively, if the VCEC coefficient of the stack 240 is negative and the magnetization directions of the reference layer 132 and the PMA ferromagnetic layer 280 are parallel, then in any first direction perpendicular to the interface between the reference layer 132 and the tunnel barrier layer 134 (e.g., relative to...), Figure 8A A first external magnetic field is applied to the cell shown (upward or downward). The first external magnetic field has a first magnitude sufficient to switch the magnetization directions of both the reference layer 132 and the PMA ferromagnetic layer 280, such that these directions are parallel to the first direction. A second external magnetic field is then applied in a second direction opposite to the first direction. The second external magnetic field has a second magnitude lower than the first magnitude. The second magnitude is sufficient to switch only the magnetization direction of the reference layer 132, but insufficient to switch the magnetization direction of the PMA ferromagnetic layer 280. After the second external magnetic field is applied, the second magnetization direction of the reference layer 132 is antiparallel to the first magnetization direction of the PMA ferromagnetic layer 280. Therefore, after manufacturing, the VCEC coefficient of the stack 240 is negative as needed, and the magnetization directions of the reference layer 132 and the PMA ferromagnetic layer 280 are antiparallel.

[0124] The resistive state of the hybrid magnetoresistive memory cell of the present disclosure can be measured (i.e., read) by passing a read current through the magnetic tunnel junction 140. The tunneling resistance is low if the magnetization directions of the free layer 136 and the reference layer 132 are parallel. The tunneling resistance is high if the magnetization directions of the free layer 136 and the reference layer 132 are antiparallel. Therefore, the hybrid magnetoresistive memory cell is programmed (i.e., written) by a combination of the STT and VCEC effects, which reduces the switching voltage value, and read by the STT effect (i.e., by passing a tunneling current through the tunnel barrier 134 of the magnetic tunnel junction 140).

[0125] Various embodiments of this disclosure can be used to provide hybrid magnetoresistive tunneling devices. Spin-transfer torque effect and voltage-controlled exchange coupling effect constructively increase to reduce the programming voltage of the hybrid magnetoresistive tunneling device. The ratio of energy offset due to spin-transfer torque effect to energy offset due to voltage-controlled exchange coupling effect can vary continuously and can be in the range of 99:1 to 1:99, such as 9:1 to 1:9 and / or 3:1 to 1:3 and / or 2:1 to 1:2. In some embodiments, the electrically insulating tunnel barrier 134 may be the only electrically insulating layer in the memory cell located between the two electrodes (102, 170). Because the electrically insulating tunnel barrier 134 is relatively thin (e.g., 1.2 nm thick or less), the resistance of the memory cell is reduced, which reduces the magnitude of the tunneling current.

[0126] Referring to all the accompanying drawings and various embodiments of the present disclosure, the magnetoresistive memory device 180 includes a first electrode 102, a second electrode 170, and a first layer stack located between the first electrode and the second electrode. The first layer stack includes a free layer 136, a reference layer 132, insulating layers (134, 155) located between the free layer and the reference layer, ferromagnetic layers (166, 280), and a conductive non-magnetic interlayer exchange coupling layer 150 located between the free layer 136 and the ferromagnetic layers (166, 280).

[0127] exist Figure 7A , Figure 7B , Figure 8A and Figure 8B In the illustrated embodiment, free layer 136 comprises a ferromagnetic free layer, reference layer 132 comprises a ferromagnetic reference layer, insulating layers (134, 155) comprise a tunnel barrier layer 134, and ferromagnetic layers (166, 280) comprise a perpendicular magnetic anisotropy (PMA) ferromagnetic layer 280 having a higher PMA than that of reference layer 132. Tunnel barrier layer 134 preferably has a thickness of 1.2 nm or less, and interlayer exchange coupling layer preferably has a thickness of 0.1 nm to 7 nm.

[0128] exist Figure 7A and Figure 7B In the illustrated embodiment, the reference layer 132 has a magnetization direction parallel to the magnetization direction of the PMA ferromagnetic layer 280, and the voltage-dependent exchange coupling of the second-layer stack 240, which includes the tunnel barrier layer 134, the free layer 136, the interlayer exchange coupling layer 150, and the PMA ferromagnetic layer 280, has a positive exchange coupling coefficient.

[0129] exist Figure 8A and Figure 8BIn the illustrated embodiment, the reference layer 132 has a magnetization direction that is antiparallel to the magnetization direction of the PMA ferromagnetic layer 280, and the voltage-dependent exchange coupling of the second stack 240, which includes the tunnel barrier layer, the free layer, the interlayer exchange coupling layer and the PMA ferromagnetic layer, has a negative exchange coupling coefficient.

[0130] In one embodiment, the conductive non-magnetic interlayer exchange coupling layer 150 is substantially composed of at least one metallic element selected from Au, Cu, Cr, Ru, and Al, the tunnel barrier layer 134 is the only electrically insulating layer located between the first electrode and the second electrode (102, 170), and the tunnel barrier layer 134 is substantially composed of magnesium oxide. The PMA ferromagnetic layer 280 comprises a material selected from FePt alloys, FePd alloys, CoPt alloys, Pt / Co multilayer stacks, Co / Ag multilayer stacks, Co / Cu multilayer stacks, Co / Ni multilayer stacks, (Pt / Co / Pt) / Pd multilayer stacks, (Pt / Co / Pt) / Ag multilayer stacks, (Pt / Co / Pt) / Cu multilayer stacks, (Pt / Co / Pt) / Ni multilayer stacks, and Co / (Pt / Pd) multilayer stacks.

[0131] exist Figure 7B and Figure 8B In the illustrated embodiment, the magnetoresistive memory device 180 further includes a synthetic antiferromagnetic structure 120, which includes a reference layer 132, a fixed ferromagnetic layer 112 having a magnetization antiparallel to the reference magnetization of the reference layer, and an antiferromagnetic coupling layer 114 located between the reference layer and the fixed ferromagnetic layer.

[0132] exist Figure 1 In one embodiment shown, the magnetoresistive random access memory 500 includes a two-dimensional array of an instance of a magnetoresistive memory device 180, word lines 30 electrically connected to a corresponding subset of a first electrode 102 of the two-dimensional array, bit lines 90 electrically connected to a corresponding subset of a second electrode 170 of the two-dimensional array, and programming and sensing circuitry 570 connected to the bit lines 90 and configured to program the magnetoresistive memory device 180 by a combination of spin-transfer torque effect and voltage-controlled exchange coupling effect, and to read the magnetoresistive memory device using the tunneling magnetoresistive (TMR) effect.

[0133] In one embodiment, the method of operating the magnetoresistive memory device 180 includes programming the magnetoresistive memory device 180 by a combination of spin-transfer torque effect and voltage-controlled exchange coupling effect, and reading the magnetoresistive memory device 180 by tunneling magnetoresistive (TMR) effect.

[0134] Programming the magnetoresistive memory device 180 includes, in a first programming step, applying a first polarity programming voltage to the first electrode 102 relative to the second electrode 170 to switch the magnetization of the free layer 136 from a parallel state to an antiparallel state relative to the reference magnetization of the reference layer 132, and in a second programming step, applying a second polarity programming voltage opposite to the first polarity voltage to the first electrode relative to the second electrode to switch the magnetization of the free layer 136 from an antiparallel state to a parallel state relative to the reference magnetization of the reference layer 132. In one embodiment, the first polarity programming voltage includes a negative voltage, and the second polarity programming voltage includes a positive voltage.

[0135] Reading the magnetoresistive memory device involves determining the magnitude of the tunneling current through the stack (e.g., at least through MTJ140) without altering the magnetization direction of the free layer 136. Preferably, no external magnetic field is applied during programming of the magnetoresistive memory device 180, and programming of the magnetoresistive memory device 180 is deterministic.

[0136] In one embodiment where the VCEC coefficient of the stack 240 is positive and the fabricated reference layer 132 has a magnetization direction that is antiparallel to the magnetization direction of the PMA ferromagnetic layer 280, the method of fabricating the magnetoresistive memory device 180 further includes applying an external magnetic field in a first direction perpendicular to the interface between the reference layer 132 and the tunnel barrier layer 134 to switch the magnetization directions of both the reference layer 132 and the PMA ferromagnetic layer 180 to be parallel to the first direction.

[0137] In another embodiment where the VCEC coefficient of the stack 240 is negative and the fabricated reference layer 132 has a magnetization direction parallel to the magnetization direction of the PMA ferromagnetic layer 280, the method of fabricating the magnetoresistive memory device 180 further includes applying a first external magnetic field having a first magnitude in a first direction perpendicular to the interface between the reference layer 132 and the tunnel barrier layer 134 to switch the magnetization directions of both the reference layer 132 and the PMA ferromagnetic layer 280 to be parallel to the first direction, and then applying a second external magnetic field having a second magnitude lower than the first magnitude in a second direction opposite to the first direction to switch only the magnetization direction of the reference layer 132 to be parallel to the second direction, while the magnetization direction of the PMA ferromagnetic layer 280 remains parallel to the first direction.

[0138] While specific preferred embodiments have been mentioned above, it will be understood that this disclosure is not limited thereto. Those skilled in the art will appreciate that various modifications can be made to the disclosed embodiments, and such modifications are intended to fall within the scope of this disclosure. While embodiments employing specific structures and / or configurations are shown in this disclosure, it should be understood that this disclosure can be practiced with any other functionally equivalent compatible structures and / or configurations, provided that such substitutions are not expressly prohibited or otherwise considered impossible by those skilled in the art. All publications, patent applications, and patents cited herein are incorporated herein by reference in their entirety.

Claims

1. A magnetoresistive memory device, comprising: a first electrode; a second electrode; and a first layer stack between the first electrode and the second electrode, the first layer stack comprising: a free layer; a reference layer; an insulating layer between the free layer and the reference layer; a ferromagnetic layer; and a conductive non-magnetic interlayer exchange coupling layer between the free layer and the ferromagnetic layer, wherein: the free layer comprises a ferromagnetic free layer; the reference layer comprises a ferromagnetic reference layer; the insulating layer comprises a tunnel barrier layer; the ferromagnetic layer comprises a perpendicular magnetic anisotropy (PMA) ferromagnetic layer having a perpendicular magnetic anisotropy higher than a perpendicular magnetic anisotropy of the reference layer; the tunnel barrier layer has a thickness of 1.2 nm or less; and the non-magnetic interlayer exchange coupling layer has a thickness of 0.1 nm to 7 nm; the reference layer has a magnetization direction parallel to a magnetization direction of the perpendicular magnetic anisotropy ferromagnetic layer; and a voltage dependent exchange coupling of a second layer stack comprising the tunnel barrier layer, the free layer, the interlayer exchange coupling layer, and the perpendicular magnetic anisotropy ferromagnetic layer has a positive exchange coupling coefficient.

2. A method of fabricating the magnetoresistive memory device of claim 1, wherein the reference layer has the magnetization direction anti-parallel to the magnetization direction of the perpendicular magnetic anisotropy ferromagnetic layer, the method comprising: applying an external magnetic field in a first direction perpendicular to an interface between the reference layer and the tunnel barrier layer to switch the magnetization direction of both the reference layer and the perpendicular magnetic anisotropy ferromagnetic layer to be parallel to the first direction.

3. A magnetoresistive memory device, comprising: a first electrode; a second electrode; and a first layer stack between the first electrode and the second electrode, the first layer stack comprising: a free layer; a reference layer; an insulating layer between the free layer and the reference layer; a ferromagnetic layer; and a conductive non-magnetic interlayer exchange coupling layer between the free layer and the ferromagnetic layer, wherein: the free layer comprises a ferromagnetic free layer; the reference layer comprises a ferromagnetic reference layer; the insulating layer comprises a tunnel barrier layer; and the ferromagnetic layer comprises a perpendicular magnetic anisotropy (PMA) ferromagnetic layer having a perpendicular magnetic anisotropy higher than a perpendicular magnetic anisotropy of the reference layer; the tunnel barrier layer has a thickness of 1.2 nm or less; and the non-magnetic interlayer exchange coupling layer has a thickness of 0.1 nm to 7 nm; and the reference layer has a magnetization direction anti-parallel to a magnetization direction of the perpendicular magnetic anisotropy ferromagnetic layer; and a voltage dependent exchange coupling of a second layer stack comprising the tunnel barrier layer, the free layer, the interlayer exchange coupling layer, and the perpendicular magnetic anisotropy ferromagnetic layer has a negative exchange coupling coefficient.

4. A method of fabricating the magnetoresistive memory device of claim 3, wherein the reference layer has the magnetization direction parallel to the magnetization direction of the perpendicular magnetic anisotropy ferromagnetic layer, the method comprising: applying a first external magnetic field having a first magnitude in a first direction perpendicular to an interface between the reference layer and the tunnel barrier layer to switch the magnetization direction of both the reference layer and the perpendicular magnetic anisotropy ferromagnetic layer to be parallel to the first direction; and then applying a second external magnetic field having a second magnitude lower than the first magnitude in a second direction opposite to the first direction to switch only the magnetization direction of the reference layer to be parallel to the second direction while the magnetization direction of the perpendicular magnetic anisotropy ferromagnetic layer remains parallel to the first direction.

5. A magnetoresistive memory device, comprising: a first electrode; a second electrode; and a first layer stack between the first electrode and the second electrode, the first layer stack comprising: a free layer; a reference layer; an insulating layer between the free layer and the reference layer; a ferromagnetic layer; and a conductive non-magnetic interlayer exchange coupling layer between the free layer and the ferromagnetic layer, wherein: the free layer comprises a ferromagnetic free layer; the reference layer comprises a ferromagnetic reference layer; the insulating layer comprises a tunnel barrier layer; and the ferromagnetic layer comprises a perpendicular magnetic anisotropy (PMA) ferromagnetic layer having a higher perpendicular magnetic anisotropy than the reference layer; the tunnel barrier layer has a thickness of 1.2 nm or less; and the non-magnetic interlayer exchange coupling layer has a thickness of 0.1 nm to 7 nm; and the conductive non-magnetic interlayer exchange coupling layer is composed of at least one metallic element selected from Au, Cu, Cr, Ru, and Al; the tunnel barrier layer is the only electrically insulating layer between the first electrode and the second electrode; and the tunnel barrier layer is composed of magnesium oxide.

6. The magnetoresistive memory device of claim 5, wherein the perpendicular magnetic anisotropy ferromagnetic layer contains a material selected from a FePt alloy, a FePd alloy, a CoPt alloy, a Pt / Co multilayer stack, a Co / Ag multilayer stack, a Co / Cu multilayer stack, a Co / Ni multilayer stack, a (Pt / Co / Pt) / Pd multilayer stack, a (Pt / Co / Pt) / Ag multilayer stack, a (Pt / Co / Pt) / Cu multilayer stack, a (Pt / Co / Pt) / Ni multilayer stack, and a Co / (Pt / Pd) multilayer stack.

7. A magnetoresistive memory device, comprising: a first electrode; a second electrode; and a first layer stack between the first electrode and the second electrode, the first layer stack comprising: a free layer; a reference layer; an insulating layer between the free layer and the reference layer; a ferromagnetic layer; and a conductive non-magnetic interlayer exchange coupling layer between the free layer and the ferromagnetic layer; and a synthetic antiferromagnetic structure including the reference layer, a fixed ferromagnetic layer having a magnetization anti-parallel to a reference magnetization of the reference layer, and an antiferromagnetic coupling layer between the reference layer and the fixed ferromagnetic layer.

8. A magnetoresistive random access memory, comprising: a two-dimensional array of magnetoresistive memory devices, the magnetoresistive memory devices comprising: a first electrode; a second electrode; and a first stack of layers between the first electrode and the second electrode, the first stack of layers comprising: a free layer; a reference layer; an insulating layer between the free layer and the reference layer; a ferromagnetic layer; and a conductive non-magnetic interlayer exchange coupling layer between the free layer and the ferromagnetic layer; wherein: the free layer comprises a ferromagnetic free layer; the reference layer comprises a ferromagnetic reference layer; the insulating layer comprises a tunnel barrier layer; and the ferromagnetic layer comprises a perpendicular magnetic anisotropy (PMA) ferromagnetic layer having a perpendicular magnetic anisotropy higher than a perpendicular magnetic anisotropy of the reference layer; and word lines electrically connecting respective subsets of the first electrodes of the two-dimensional array; bit lines electrically connecting respective subsets of the second electrodes of the two-dimensional array; and programming and sensing circuitry connected to the bit lines and configured to program the magnetoresistive memory devices by a combination of spin-transfer torque effect and voltage-controlled exchange coupling effect, and to read the magnetoresistive memory devices by tunnel magnetoresistance (TMR) effect.

9. A method of operating a magnetoresistive memory device, the magnetoresistive memory device comprising: a first electrode; a second electrode; and a first stack of layers between the first electrode and the second electrode, the first stack of layers comprising: a free layer; a reference layer; an insulating layer between the free layer and the reference layer; a ferromagnetic layer; and a conductive non-magnetic interlayer exchange coupling layer between the free layer and the ferromagnetic layer; and wherein: the free layer comprises a ferromagnetic free layer; the reference layer comprises a ferromagnetic reference layer; the insulating layer comprises a tunnel barrier layer; and the ferromagnetic layer comprises a perpendicular magnetic anisotropy (PMA) ferromagnetic layer having a perpendicular magnetic anisotropy higher than a perpendicular magnetic anisotropy of the reference layer, the method comprising: programming the magnetoresistive memory device by a combination of spin-transfer torque effect and voltage-controlled exchange coupling effect; and reading the magnetoresistive memory device by tunnel magnetoresistance (TMR) effect.

10. The method of claim 9, wherein the programming the magnetoresistive memory device comprises: applying a first polarity programming voltage to the first electrode relative to the second electrode in a first programming step to switch a magnetization of the free layer from a parallel state to an anti-parallel state relative to a reference magnetization of the reference layer; and a second polarity programming voltage opposite the first polarity voltage is applied to the first electrode relative to the second electrode in a second programming step to switch the magnetization of the free layer from the anti-parallel state to the parallel state relative to a reference magnetization of the reference layer.

11. The method of claim 10, wherein the reading the magnetoresistive memory device comprises determining a magnitude of tunneling current through the layer stack without changing a magnetization direction of the free layer.

12. The method of claim 10, wherein: the reference layer has a magnetization direction parallel to a magnetization direction of the perpendicular magnetic anisotropy ferromagnetic layer; a voltage dependent exchange coupling of a second layer stack comprising the tunnel barrier layer, the free layer, the interlayer exchange coupling layer, and the perpendicular magnetic anisotropy ferromagnetic layer has a positive exchange coupling coefficient; the first polarity programming voltage comprises a negative voltage; and the second polarity programming voltage comprises a positive voltage.

13. The method of claim 10, wherein: the reference layer has a magnetization direction anti-parallel to a magnetization direction of the perpendicular magnetic anisotropy ferromagnetic layer; a voltage dependent exchange coupling of a second layer stack comprising the tunnel barrier layer, the free layer, the interlayer exchange coupling layer, and the perpendicular magnetic anisotropy ferromagnetic layer has a negative exchange coupling coefficient; the first polarity programming voltage comprises a negative voltage; and the second polarity programming voltage comprises a positive voltage.

14. The method of claim 10, wherein no external magnetic field is applied during the programming the magnetoresistive memory device.

15. The method of claim 14, wherein the programming the magnetoresistive memory device is deterministic.

16. The method of claim 9, wherein: the conductive non-magnetic interlayer exchange coupling layer is composed of at least one metallic element selected from Au, Cu, Cr, Ru, and Al, having a thickness of 0.1 nm to 7 nm; and the tunnel barrier layer is composed of magnesium oxide, having a thickness of 1.2 nm or less.

17. The method of claim 16, wherein the perpendicular magnetic anisotropy ferromagnetic layer comprises a material selected from a FePt alloy, a FePd alloy, a CoPt alloy, a Pt / Co multilayer stack, a Co / Ag multilayer stack, a Co / Cu multilayer stack, a Co / Ni multilayer stack, a (Pt / Co / Pt) / Pd multilayer stack, a (Pt / Co / Pt) / Ag multilayer stack, a (Pt / Co / Pt) / Cu multilayer stack, a (Pt / Co / Pt) / Ni multilayer stack, and a Co / (Pt / Pd) multilayer stack.

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