Van der Waals gap field effect transistor and its manufacturing method

Abstract

The present invention provides a van der Waals gap field effect transistor, which has a physical adsorption interface with oversaturated oxygen increase. The transistor includes a substrate, on which a semiconductor channel layer is formed. A gate dielectric layer is located above and overlaps with the semiconductor channel layer, and the gate dielectric layer is made by oxidizing hafnium disulfide into hafnium dioxide. The present invention utilizes the oxygen-rich environment of an ozone processor to controllably and fully oxidize two-dimensional materials, realizing a van der Waals gap field effect transistor with a physical adsorption interface with oversaturated oxygen increase. It has simple preparation, excellent performance and strong controllability.

Description

Technical Field

[0001] The invention belongs to the field of microelectronic science and technology, and specifically relates to a van der Waals gap field effect transistor based on supersaturated oxygen to increase the physical adsorption interface and a preparation method thereof. Background Art

[0002] As traditional silicon-based transistors continue to shrink, Moore's Law is facing extreme challenges, and there is an urgent need to explore new geometric structures and new materials to replace them. Two-dimensional materials (such as molybdenum disulfide (MoS2), tungsten disulfide (WS2), etc.) have attracted great attention from the scientific and industrial communities due to their single-atomic layer thickness and unique physical properties. They have great potential for application in the preparation of high-performance transistors, new optoelectronic devices, and electrical logic devices. However, the lack of dangling bonds on the surface of two-dimensional materials, and high-quality gate dielectric deposition is a major challenge in the preparation of two-dimensional material transistors. In order to achieve large-scale industrial applications, how to prepare uniform and high-quality gate dielectric films while ensuring that the materials are not damaged is the key to the transformation of two-dimensional materials from laboratory to engineering applications.

[0003] In recent years, various solutions have been proposed in the prior art, such as creating nucleation sites by pre-depositing metals or inserting organic molecules as buffer layers. These solutions inevitably lead to the introduction of doping and defects, which greatly reduces the impact on the interface state. In addition, the cumbersome process steps are also an important factor that is not conducive to reducing production costs. Summary of the invention

[0004] The technical problem to be solved by the present invention is to overcome the above-mentioned defects of the prior art, explore a high-quality gate dielectric layer preparation process, simplify the uncontrollable doping effects brought by the complex process while avoiding material damage, and maximize the intrinsic performance of the material. This is the starting point and the ultimate goal of the present invention. The present invention proposes a van der Waals gap field effect transistor based on supersaturated oxygen to increase the physical adsorption interface and a preparation method thereof.

[0005] A van der Waals gap field effect transistor having a supersaturated oxygen-enhanced physical adsorption interface comprises a substrate, a semiconductor channel layer is formed on the substrate, a gate dielectric layer is located above and overlaps the semiconductor channel layer, and the gate dielectric layer is made by oxidizing hafnium disulfide into hafnium dioxide.

[0006] Optionally, a physical stack is formed between the semiconductor channel layer and the gate dielectric layer by van der Waals forces; metal electrodes are formed at both ends of the semiconductor channel layer and on the gate dielectric layer; the semiconductor channel layer and the gate dielectric layer cross each other; hafnium disulfide is fully covered in an oxygen-rich environment in an ozone processor, and hafnium disulfide is oxidized to hafnium dioxide, while supersaturated oxygen atoms increase the van der Waals gap between the semiconductor channel layer and the gate dielectric layer.

[0007] A method for fabricating a van der Waals gap field effect transistor, the transistor having a supersaturated oxygen-increased physical adsorption interface, comprising the following steps: S1: forming a semiconductor channel layer on a first substrate to obtain a first sample; S2: forming an easily oxidizable hafnium disulfide thin film on a second substrate to obtain a second sample; S3: physically transferring the hafnium disulfide thin film on the second sample onto the semiconductor channel layer of the first sample to obtain a third sample; S4: placing the third sample in an oxygen-rich environment formed by an ozone processor for full functional coverage, oxidizing the hafnium disulfide thin film into hafnium dioxide, thereby forming a gate dielectric layer; S5: forming exposed electrode regions at both ends of the channel of the semiconductor channel layer and on the gate dielectric layer through photoresist coating and exposure; S6: forming metal electrodes on the electrode regions.

[0008] Optionally, a physical stack is formed between the semiconductor channel layer and the gate dielectric layer by van der Waals forces; metal electrodes are formed at both ends of the semiconductor channel layer and on the gate dielectric layer; the semiconductor channel layer and the gate dielectric layer cross each other; hafnium disulfide is fully covered in an oxygen-rich environment in an ozone processor, and hafnium disulfide is oxidized to hafnium dioxide, while supersaturated oxygen atoms increase the van der Waals gap between the semiconductor channel layer and the gate dielectric layer.

[0009] Generally speaking, compared with the prior art, the above technical solutions conceived by the present invention can achieve the following beneficial effects: By preparing a transistor with a van der Waals gap that increases the physical adsorption interface through supersaturated oxygen, due to the reliability of the interface between the channel and the gate dielectric layer, compared with transistors prepared by traditional deposition methods, the performance of the van der Waals gap transistor prepared by the present invention has been greatly improved. At the same time, the preparation of two-dimensional transistors meets the development trend of the characteristic scale reduction predicted by Moore's Law. The van der Waals gap field-effect transistor based on supersaturated oxygen to increase the physical adsorption interface proposed by the present invention further increases its gap while maintaining van der Waals contact. The lossless interface perfectly guarantees the intrinsic characteristics of the channel material and the gate dielectric layer, which creates prerequisites for high-performance transistors. In addition, the gate dielectric in the present invention is HfO2 transformed from HfS2 in an oxygen-rich environment, avoiding traditional complex dielectric layer deposition technologies, simplifying the process, realizing the preparation of a gate dielectric film under low-temperature conditions, reducing the introduction of doping, and avoiding problems caused by random fluctuations of dopants. In the present invention, the construction of the van der Waals gap is the core of the entire structure. The method of converting HfS2 into a high-k gate dielectric HfO2 by oxidation can be extended to the stacking of various semiconductor materials to obtain a lossless interface, which can not only be applied to transistor devices, but also meet the requirements of high-k gate dielectric deposition and lossless interfaces for new electronic devices, optoelectronic devices, and logic devices. Description of the Drawings

[0010] Figure 1 It is a schematic structural diagram of the transistor in Embodiment 1 of the present invention;

[0011] Figure 2A 、 2B It is a schematic diagram of step S1 in Embodiment 2 of the present invention;

[0012] Figure 3 It is a schematic diagram of step S2 in Embodiment 2 of the present invention;

[0013] Figure 4 It is a schematic diagram of step S3 in Embodiment 2 of the present invention;

[0014] Figure 5 It is a schematic diagram of steps S4 and S5 in Embodiment 2 of the present invention;

[0015] Figure 6 It is an electron microscope image of the transistor in the experimental example of the present invention;

[0016] Figure 7 It is a Raman spectrum diagram of the transistor in the experimental example of the present invention;

[0017] Figure 8 It is a characteristic curve diagram of the transistor in the experimental example of the present invention;

[0018] Figure 9 This is the subthreshold swing graph of the transistor in the experimental example of the present invention. Detailed Implementation Manner

[0019] To make the above objects, features, and advantages of the present invention more obvious and understandable, the following will describe in detail the specific implementation manners of the present invention with reference to the accompanying drawings, so that the above and other objects, features, and advantages of the present invention will be clearer. The same reference numerals in all the drawings indicate the same parts. The drawings are not deliberately drawn to scale, and the focus is on showing the gist of the present invention.

[0020] Example 1

[0021] First, an introduction will be made to the structure of the transistor prepared by increasing the van der Waals gap of the physical adsorption interface with supersaturated oxygen in the present invention. Refer to Figure 1 , which includes a substrate. To facilitate differentiation from other subsequent substrates, this substrate is herein referred to as the first substrate 1. The first substrate 1 can be, for example, a silicon / silicon dioxide substrate or a sapphire substrate. Of course, those skilled in the art can also use other types of substrates, and the present invention does not limit the type of the substrate.

[0022] A semiconductor channel layer 2 is formed on the first substrate 1, and a gate dielectric layer 3 is located above the semiconductor channel layer 2 and overlaps with it. For the convenience of experiment and description, in the present invention, a gate dielectric layer 3 adapted to the channel length is selected to be stacked crosswise with the semiconductor channel layer 2. In Figure 1 , the semiconductor channel layer 2 is in direct contact with the first substrate 1, and the gate dielectric layer 3 just covers the semiconductor channel layer 2 of the required channel length and is perpendicular to it. A physical stack is formed between the semiconductor channel layer 2 and the gate dielectric layer 3 by the action of van der Waals force.

[0023] Metal electrodes 4 are formed at both ends of the semiconductor channel layer 2 and on the gate dielectric layer 3. In Figure 1 , 3 metal electrodes are formed, and these metal electrodes are all in contact with the semiconductor channel layer 2 and the dielectric layer 3. The metal electrodes 4 are respectively located at both ends of the semiconductor channel layer 2 and on the surface of the overlapping gate dielectric layer 3 of the two materials, and the metal electrodes 4 are not conductive to each other, and the intervals are effectively distributed. The electrodes at both ends of the semiconductor channel layer 2 can be the source and drain of the transistor respectively, and the metal electrode located on the gate dielectric layer 3 is defined as the gate of the transistor. Among them, the semiconductor channel layer 2 serves as a carrier transport layer, and top-gate electrostatic control is realized through the gate dielectric layer 3.

[0024] The semiconductor channel layer 2 and the gate dielectric layer 3 are made of different two-dimensional materials. The material used to form the gate dielectric layer 3 is hafnium disulfide (HfS2), which is an easily oxidizable material. The semiconductor channel layer 2 can be made of any effective two-dimensional semiconductor material, such as molybdenum disulfide, tungsten disulfide, etc. After stacking, it is placed in an ozone treatment machine to achieve full coverage of the oxygen-rich environment. The easily oxidizable material hafnium disulfide is oxidized to hafnium dioxide, thus forming the gate dielectric layer through functionalization. At the same time, the oversaturated oxygen atoms increase the van der Waals gap between the channel and the gate dielectric layer, ensuring the integrity of the interface and the intrinsic characteristics of the semiconductor channel material. In this way, the preparation of the transistor is completed through simple steps, solving the problem of difficult deposition of high-quality gate dielectrics for two-dimensional materials and avoiding the high-temperature effects and doping brought by traditional dielectric layer deposition techniques. The process is simple.

[0025] In the transistor prepared by increasing the van der Waals gap of the physical adsorption interface with oversaturated oxygen in the present invention, the first substrate 1 is silicon / silicon dioxide, and the thicknesses of silicon / silicon dioxide are 550 micrometers and 300 nanometers respectively, where the structure is silicon dioxide on the top and silicon on the bottom, and the material is peeled from the upper surface; the thickness of the semiconductor channel layer 2 is 1 - 4 nm, and the width is 1 - 5 μm; the thickness of the gate dielectric layer 3 is 3 - 5 nm. The semiconductor channel layer 2 and the easily oxidizable semiconductor thin film are both obtained by mechanical exfoliation, and the gate dielectric layer 3 is obtained through functionalization in an oxygen-rich environment.

[0026] Furthermore, the metal electrode 4 can consist of two layers. The upper electrode is made of gold (Au) with a thickness of 50 - 70 nm, and the lower electrode is made of chromium (Cr) with a thickness of 10 - 15 nm. The lower electrode is in contact with the semiconductor channel layer 2 and the gate dielectric thin film 3. Specifically, the metal electrode to be used can be determined according to the work function of the semiconductor channel layer 2, as long as there is no obvious Schottky contact formed between the metal electrode used and the semiconductor channel layer 2.

[0027] Example 2

[0028] This example focuses on introducing a preparation method of a transistor prepared by increasing the van der Waals gap of the physical adsorption interface with oversaturated oxygen. The transistor prepared by increasing the van der Waals gap of the physical adsorption interface with oversaturated oxygen has the structure in Example 1. The following will combine Figures 2A to 5 to explain the method in this example in detail, which generally includes the following steps S1 - S6.

[0029] S1: Form the semiconductor channel layer 2 on the first substrate 1.

[0030] Refer to Figure 2A And Figure 2B , where Figure 2B is Figure 2ACross-sectional view along the A-A direction. The first substrate 1 can be a P-type doped silicon / (300 nm) silicon dioxide, and the semiconductor channel layer 2 can be a molybdenum disulfide thin film. For example, P-type doped silicon / (300 nm) silicon dioxide is selected as the required substrate, and a 1-4 nm thick molybdenum disulfide thin film obtained by mechanical exfoliation is prepared on the silicon-based substrate to obtain the first sample.

[0031] Specifically, in this step, the P-type doped silicon / (300 nm) silicon dioxide with a silicon dioxide upper surface is used as the substrate, and is ultrasonically cleaned in acetone, isopropyl alcohol, and absolute ethanol solutions for 5 minutes each to remove organic impurities and solid particles on its surface, and then dried with nitrogen with a purity of 99.99%, and then thoroughly dried of the residual solution on a hot plate at a temperature of 150 degrees Celsius to ensure the high cleanliness of the substrate.

[0032] The method for obtaining the molybdenum disulfide thin film is the mechanical exfoliation method. First, a bulk molybdenum disulfide crystal is adhered to a special tape (for example, scotch tape produced by 3M Company), and the tape is repeatedly folded so that the bulk molybdenum disulfide crystal is torn and thinned during the repeated sticking process of the tape. Then, the tape is pressed on the upper surface of the above-mentioned P-type doped silicon / (300 nm) silicon dioxide substrate, and after standing for a few minutes, the tape is removed to form molybdenum disulfide thin films with different thicknesses and widths on the substrate.

[0033] S2: Form a hafnium disulfide oxide thin film 6 on the second substrate 5.

[0034] As Figure 3 shown, this step is similar to S1. The second substrate 5 can be a P-type doped silicon / (300 nm) silicon dioxide, and the hafnium disulfide oxide thin film 6 is a hafnium disulfide thin film for the semiconductor channel layer 2. For example, P-type doped silicon / (300 nm) silicon dioxide is selected as the required substrate, and a 3-5 nm thick hafnium disulfide thin film obtained by mechanical exfoliation is prepared on the silicon-based substrate to obtain the second sample.

[0035] Specifically, first, the P-type doped silicon / (300 nm) silicon dioxide with a silicon dioxide upper surface is used as the substrate, and is ultrasonically cleaned in acetone, isopropyl alcohol, and absolute ethanol solutions for 5 minutes each to remove organic impurities and solid particles on its surface, and then dried with nitrogen with a purity of 99.99%, and then thoroughly dried of the residual solution on a hot plate at a temperature of 150 degrees Celsius to ensure the high cleanliness of the substrate.

[0036] The method for obtaining hafnium disulfide thin film is the mechanical exfoliation method. First, stick the bulk hafnium disulfide crystal onto a special tape (for example, scotch tape produced by 3M Company), fold the tape back and forth repeatedly, so that the bulk hafnium disulfide crystal is torn and thinned during the repeated sticking process of the tape. Then, press the tape on the upper surface of the above-mentioned P-type doped silicon / (300nm) silicon dioxide substrate. After standing for a few minutes, remove the tape, and hafnium disulfide thin films with different thicknesses and widths can be formed on the substrate.

[0037] S3: Physically transfer the hafnium disulfide thin film 6 on the second substrate 5 onto the first substrate 1 and cross-stack it with the semiconductor channel layer 2.

[0038] In this step, the hafnium disulfide thin film 6 can be peeled off from the second sample by mechanical exfoliation using a physical transfer method. Then, transfer the peeled hafnium disulfide thin film 6 above the semiconductor channel layer 2 of the first sample and present a cross-overlapping form, so as to obtain a third sample.

[0039] Specifically, refer to Figure 2A 、 2B 、 Figure 4 , After preparing the hafnium disulfide thin film 6 by mechanical exfoliation, find materials with appropriate thickness and width under an optical microscope, stick it up using an auxiliary thin film PVA film, and then use a material transfer platform to manually align and transfer it above the molybdenum disulfide channel material (semiconductor channel layer 2) in the above-mentioned first sample and cross it with it. For example, make it present a vertical cross form. During this process, the hafnium disulfide thin film 6 and the semiconductor channel layer 2 are connected by van der Waals forces.

[0040] S4: Place the third sample in an oxygen-rich environment formed by an ozone treatment machine for functional full coverage, so as to oxidize the hafnium disulfide thin film 6 to form a gate dielectric layer 3 and increase the van der Waals gap, thereby obtaining a fourth sample.

[0041] The core of the present invention lies in using the oxygen-rich environment of the ozone treatment machine to oxidize the hafnium disulfide thin film 6, so as to obtain a van der Waals gap field effect transistor based on increasing the physical adsorption interface by supersaturated oxygen, oxidizing the hafnium disulfide thin film 6 into insulating hafnium dioxide to form a gate dielectric layer 3, and different oxidation thicknesses can be obtained by controlling different placement times. In this embodiment, the transferred substrate is placed in an ozone treatment machine to achieve full oxidation and completely form the gate dielectric hafnium dioxide, achieving the effect of increasing the band gap and ensuring the preparation of subsequent devices.

[0042] S5: Form exposed electrode regions 8 at both ends of the channel of the semiconductor channel layer 2 and at the overlapping part of the gate dielectric layer 3 by coating with glue and exposure.

[0043] In this step, electron beam exposure is performed on the surface of the fourth sample. After development, the regions of the molybdenum disulfide channel material and the hafnium dioxide gate dielectric layer 3 where electrodes need to be deposited are exposed, thus obtaining the fifth sample.

[0044] As Figure 5 shown, place the fourth sample on a spin coater to coat the photoresist, thereby coating the photoresist 7 on the surface of the fourth sample. Specifically, adjust the rotation speed to 600 r / min and continue for 6 s, then re-adjust the rotation speed to 4000 r / min and continue for 50 s; then place it on a hot plate at a temperature of 150 °C for heating and curing; this spin coating step is repeated twice, and the hot plate placement times are 2 min and 5 min respectively. In this step, the electron beam exposure positive photoresist process is used, and the photoresist is PMMA of model 495. After the sample with spin coating completed is exposed, develop it for 10 s using the self-prepared developer MIBK:IPA = 1:3, then fix it with IPA solution, rinse it clean, and dry it with the above-mentioned nitrogen gas. The regions of the molybdenum disulfide channel and the gate dielectric layer 3 of the obtained fourth sample where electrodes need to be deposited are exposed. The exposed regions represent the shape of the metal electrodes, and the unexposed regions represent non-exposure, thus forming the exposed electrode regions 8.

[0045] S6: Form the metal electrodes 4 on the electrode regions 8.

[0046] Continue to refer to Figure 5 , evaporate two layers of metal on the surface of the obtained fifth sample, obtain the metal electrode layer in the order of chromium first and gold second, and use acetone to remove the photoresist to obtain a transistor prepared based on the van der Waals gap with an increased physical adsorption interface due to supersaturated oxygen.

[0047] Specifically, use a thermal evaporation coating system to evaporate metal on the fifth sample. In this embodiment, first evaporate 10 nm thick Cr, and then evaporate 50 nm thick Au to ensure good ohmic contact. Then place the deposited sample in an acetone solution to remove the photoresist, and finally rinse it with deionized water and dry it with nitrogen gas to obtain a transistor prepared based on the van der Waals gap with an increased physical adsorption interface due to supersaturated oxygen.

[0048] So far, a transistor prepared based on the van der Waals gap with an increased physical adsorption interface due to supersaturated oxygen is completed.

[0049] Experimental example

[0050] Next, specific experiments are used to further verify the preparation process and method of the transistor prepared based on the van der Waals gap with an increased physical adsorption interface due to supersaturated oxygen proposed by the present invention:

[0051] A method for preparing a van der Waals gap transistor based on an increased physical adsorption interface due to supersaturated oxygen includes the following steps:

[0052] S1. Cleaning of the substrate and preparation of the effective channel material. A P-type doped silicon / (300 nm) silicon dioxide with a silicon dioxide surface is used as the substrate for the experiment. It is placed in acetone, isopropyl alcohol, and absolute ethanol solutions respectively and ultrasonically cleaned for 5 minutes each to remove organic impurities and solid particles on its surface. Then it is dried with nitrogen with a purity of 99.99%, and subsequently thoroughly dried of the residual solution on a hot plate at a temperature of 150 °C to ensure the high cleanliness of the substrate. Next, scotch tape produced by 3M Company is selected. The tape is repeatedly folded in half so that the bulk molybdenum disulfide crystal is torn and thinned during the repeated sticking process of the tape. Then the tape is pressed on the upper surface of the above-mentioned P-type doped silicon / (300 nm) silicon dioxide substrate. After standing for a few minutes, the tape is removed, and molybdenum disulfide thin films with different thicknesses and widths can be formed on the substrate.

[0053] S2. Prepare hafnium disulfide material prone to oxidation in the same method as S1. A P-type doped silicon / (300 nm) silicon dioxide with a silicon dioxide surface is used as the substrate for the experiment. It is placed in acetone, isopropyl alcohol, and absolute ethanol solutions respectively and ultrasonically cleaned for 5 minutes each to remove organic impurities and solid particles on its surface. Then it is dried with nitrogen with a purity of 99.99%, and subsequently thoroughly dried of the residual solution on a hot plate at a temperature of 150 °C to ensure the high cleanliness of the substrate. Next, scotch tape produced by 3M Company is selected. The tape is repeatedly folded in half so that the bulk hafnium disulfide crystal is torn and thinned during the repeated sticking process of the tape. Then the tape is pressed on the upper surface of the above-mentioned P-type doped silicon / (300 nm) silicon dioxide substrate. After standing for a few minutes, the tape is removed, and hafnium disulfide thin films with different thicknesses and widths can be formed on the substrate.

[0054] S3. Physically transfer the prepared thin film of the material prone to oxidation onto the other substrate and cross-stack it with the semiconductor channel material; after finding a material with a suitable thickness and width under an optical microscope, the hafnium disulfide material is picked up using an auxiliary thin film PVA film, and then using a material transfer platform, it is manually aligned and transferred above the molybdenum disulfide channel material and crossed with it to make it present a vertical cross shape, which is convenient for the preparation of electrodes later, and is connected by van der Waals force during this process.

[0055] S4. Use the oxygen-rich environment created by an ozone treatment machine to completely oxidize hafnium disulfide, functionalize it to form a gate dielectric layer of hafnium dioxide and increase the van der Waals gap. Using the oxygen-rich environment of the ozone treatment machine, different oxidation times are controlled to obtain different oxidation thicknesses. The substrate that has completed the transfer is placed in it for 20 minutes of full oxidation to completely form a gate dielectric of hafnium dioxide, achieving the effect of increasing the bandgap and ensuring the preparation of the device in the later stage.

[0056] S5. Window Exposure and Development. Place the ozone-treated sample on a spin coater to coat it with photoresist. After the surface is coated with photoresist, adjust the rotation speed of the spin coater to 600 r / min for 6 s, and then readjust the rotation speed to 4000 r / min for 50 s. Then place it on a hot plate at 150 °C for heating and curing. This spin coating step is repeated twice, and the hot plate placement times are 2 min and 5 min respectively. In this step, the electron beam exposure positive photoresist process is adopted, and the photoresist is PMMA of model 495. After the spin coating of the sample is completed and exposed, develop it with the self-prepared developer MIBK:IPA = 1:3 for 10 s, then fix it with IPA solution, rinse it clean, and dry it with the above-mentioned nitrogen gas. The areas where the molybdenum disulfide channel and the gate dielectric film of the fifth sample need to deposit electrodes are exposed. The exposed areas represent the shape of the metal electrodes, and the unexposed areas represent non-exposure, thus forming exposed electrode areas.

[0057] S6. Electrode Deposition to Complete Device Fabrication. Use a thermal evaporation coating system to evaporate metal on the developed sample. First, evaporate Cr with a thickness of 10 nm, and then evaporate Au with a thickness of 50 nm to ensure good ohmic contact. Then place the deposited sample in an acetone solution to remove the photoresist, and finally rinse it with deionized water and dry it with nitrogen gas to obtain a van der Waals gap transistor based on increasing the physical adsorption interface by supersaturated oxygen.

[0058] Figure 6 It is the cross-sectional electron micrograph of the transistor prepared in this experimental example. It can be seen from this figure that the MoS2 material is clearly layered and the surface is not damaged. The unoxidized HfS2 should have a similar layered structure to MoS2, but after oxidation, it becomes an amorphous gate dielectric film (blurred, without stripes). The interface is combined by van der Waals forces (the black gap between MoS2 and HfO2). Figure 7 It is the Raman spectrum of the transistor. It can be seen from the figure that each material has its own characteristic peak. Among them, HfS2 originally had peaks, but after the device structure was completed, the characteristic peaks of HfS2 disappeared, which indicates that HfS2 has been completely converted into HfO2.

[0059] In addition, the basic electrical properties of the transistor prepared in this experimental example are measured, such as Figure 8 、 9 As shown, through the analysis of the transfer characteristics and output characteristics, it can be obtained that the on / off ratio of the transistor is as high as 10 8 , showing negligible hysteresis characteristics, and the threshold voltage is about -2 V, indicating that the transistor prepared by the present invention can work normally within a small voltage range of less than 3 V; more importantly, from Figure 9The subthreshold swing of 62 mV / dec close to the theoretical limit at room temperature can be extracted, indicating that the fabricated transistors can be applied to various low-power applications. In addition, for future digital logic devices based on two-dimensional material transistors, the high on / off ratio of the transistors undoubtedly has great potential applications. It can be seen from the output characteristics that the transistors have obvious saturation characteristics, and the large output current can provide a strong current drive guarantee for subsequent logic devices.

[0060] Many specific details are set forth in the above description in order to provide a thorough understanding of the present invention. However, the above description is only a preferred embodiment of the present invention, and the present invention can be implemented in many other ways different from those described herein. Therefore, the present invention is not limited by the specific embodiments disclosed above. At the same time, any person skilled in the art can make many possible changes and modifications to the technical solution of the present invention by using the methods and technical contents disclosed above without departing from the scope of the technical solution of the present invention, or modify it into equivalent embodiments with equivalent changes. All simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention still fall within the scope of the protection of the technical solution of the present invention.

Claims

1. A van der Waals gap field effect transistor, the transistor having a supersaturated oxygen-enhanced physical adsorption interface, characterized in that, It includes a substrate, on which a semiconductor channel layer is formed. A gate dielectric layer is located above and overlaps with the semiconductor channel layer, and the gate dielectric layer is made by oxidizing hafnium disulfide into hafnium dioxide; a physical stack is formed between the semiconductor channel layer and the gate dielectric layer by the action of van der Waals force; The hafnium disulfide is fully covered in an oxygen-rich environment in an ozone processor, and the hafnium disulfide is oxidized into hafnium dioxide. At the same time, the supersaturated oxygen atoms increase the van der Waals gap between the semiconductor channel layer and the gate dielectric layer; While maintaining the van der Waals contact, further increasing its gap, the lossless interface perfectly guarantees the intrinsic properties of the channel material and the gate dielectric layer, realizing the preparation of the gate dielectric film under low-temperature conditions.

2. The transistor according to claim 1, wherein, Metal electrodes are formed at both ends of the semiconductor channel layer and on the gate dielectric layer.

3. The transistor according to claim 1, wherein The semiconductor channel layer and the gate dielectric layer cross each other.

4. A method for fabricating a van der Waals gap field effect transistor, the transistor having a supersaturated oxygen to increase the physical adsorption interface, characterized in that, It includes the following steps: S1: A semiconductor channel layer is formed on a first substrate to obtain a first sample; S2: A hafnium disulfide thin film that is easy to oxidize is formed on a second substrate to obtain a second sample; S3: The hafnium disulfide thin film on the second sample is physically transferred onto the semiconductor channel layer of the first sample to obtain a third sample; S4: The third sample is placed in an oxygen-rich environment formed by an ozone processor for functional full coverage, and the hafnium disulfide thin film is oxidized into hafnium dioxide, thereby forming a gate dielectric layer; S5: Through coating and exposure, bare electrode regions are formed at both ends of the channel of the semiconductor channel layer and on the gate dielectric layer; S6: Metal electrodes are formed on the electrode regions; A physical stack is formed between the semiconductor channel layer and the gate dielectric layer by the action of van der Waals force; the hafnium disulfide is fully covered in an oxygen-rich environment in an ozone processor, and the hafnium disulfide is oxidized into hafnium dioxide. At the same time, the supersaturated oxygen atoms increase the van der Waals gap between the semiconductor channel layer and the gate dielectric layer; while maintaining the van der Waals contact, further increasing its gap, the lossless interface perfectly guarantees the intrinsic properties of the channel material and the gate dielectric layer, realizing the preparation of the gate dielectric film under low-temperature conditions.

5. The method for manufacturing a transistor according to claim 4, characterized in that, Metal electrodes are formed at both ends of the semiconductor channel layer and on the gate dielectric layer.

6. The method for manufacturing a transistor according to claim 4, wherein, The semiconductor channel layer and the gate dielectric layer cross each other.

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