Component assembly and embedding for high-density electronic devices

Abstract

A high-density multi-component package is provided that includes a first module interconnect pad and a second module interconnect pad. At least two electronic components are mounted to the first module interconnect pad and the second module interconnect pad and between the first module interconnect pad and the second module interconnect pad, wherein the first electronic component is vertically oriented with respect to the first module interconnect pad. The second electronic component is vertically oriented with respect to the second module interconnect pad.

Description

[0001] Cross-references to related applications

[0002] This invention claims priority to pending U.S. Provisional Application No. 62 / 962,340, filed January 17, 2020, which is incorporated herein by reference. Technical Field

[0003] This invention relates to improved components for electronic parts. More specifically, this invention relates to embedded electronic parts that allow for high-density electronic components, and is particularly suitable for high-power electronic devices implemented using wide-bandgap semiconductor materials such as SiC and GaN. Background Technology

[0004] There is a persistent need for improved component assemblies, particularly for use with high-power electronics, such as those that utilize wide-bandgap semiconductor materials like SiC or GaN instead of silicon. These wide-bandgap semiconductors operate at higher power and higher frequencies to achieve more efficient power conversion, allowing for further miniaturization of circuits. Unfortunately, the heat generated using conventional techniques is difficult to mitigate.

[0005] Multilayer ceramic capacitors (MLCCs) are increasingly used in high-power applications where they are subjected to high AC voltages. The resulting ripple current in the capacitors causes them to heat up. The power consumed (P) is expressed by the equation P = I 2 R is defined as follows, where I is the current and R is the equivalent series resistance (ESR). As the frequency increases, the capacitor causes more AC current, therefore I... 2 The increase in ESR outweighs the decrease in ESR. This becomes an important consideration because wide-bandgap semiconductors operate at higher frequencies than silicon.

[0006] In MLCCs, heat dissipates at the capacitor's surface, either at the ceramic surface or through external terminals. It is generally recognized that self-heating of approximately 20-25°C at the surface is a safe condition for these types of capacitors, but any additional heating can lead to thermal runaway and MLCC failure. The internal metal electrodes are effective thermal conductors, while the ceramic dielectric is typically a very good thermal insulator. Therefore, increasing the number of internal electrodes in contact with the external terminals reduces ESR and self-heating. This is also desirable in terms of increasing capacitance. Capacitance (C) is defined by the following equation: C = ε r ε0An / t; where ε ris the relative permittivity of the dielectric; e0is a constant equal to the permittivity of free space; A is the overlapping area of each internal conductive layer, also referred to as active; n is the number of actives, and t is the separation distance or thickness between the electrodes. Thus, there is a constant desire to increase the number of layers and the overlapping area while reducing the layer separation. However, reducing the effective thickness of the ceramic to increase capacitance in a given MLCC reduces the voltage handling capability of the MLCC. Thus, it has become necessary to package these capacitors in large assemblies that require large circuit board area. Large assemblies are contrary to the continuing demand for miniaturization of electronic devices, thus there is increased interest in embedding MLCCs in the circuit or providing modules with multiple MLCCs that provide high density packaging that can be integrated into a heterogeneous package.

[0007] U.S. Patent No. 8,331,078 teaches MLCCs disposed in a non-ferrous lead frame where the edge surfaces of the capacitor’s base internal electrodes and external terminals are perpendicular to the mounting substrate. This arrangement imparts low ESR and low ESL to the resulting assembly. U.S. Patent No. 9,875,851 teaches an optimized MLCC structure where the internal electrodes are arranged perpendicular to the assembly plane to impart a low ESR of 3-5 mQ in the kHz to MHz frequency range. U.S. Patent No. 9,905,363 teaches a capacitor based on a ceramic dielectric of anti-ferroelectric type arranged on a lead frame and incorporated within a module package.

[0008] More recently, U.S. Patent No. 10,325,895 describes a semiconductor module with circuit elements, such as capacitors and resistors, incorporated between a plurality of metal plates that are bonded to at least one switching element. The two terminal circuit elements are joined in an orientation perpendicular to the length of the module. The circuit elements are oriented vertically between the metal plates of the semiconductor module, with multiple MLCCs used to show the benefit of vertical orientation.

[0009] In these prior art teachings, the circuit elements must be incorporated into the power electronics module as separate components. In the case of leaded capacitors, these are custom components that are inefficient from a cost and productivity perspective. Conventional surface mount assembly techniques are readily available, but the resulting module has a relatively low packaging density.

[0010] Embedding smaller MLCCs is increasingly popular, and some examples are described in U.S. Patent No. 8,720,050.

[0011] Prior art examples of embedded capacitors require via connections to the embedded components. Recently, components have been embedded in polymer printed circuit boards as described in U.S. Patent No. 9,386,702, where vias are used to connect the embedded components.

[0012] In prior art embodiments, MLCCs can be embedded by placing their internal electrodes parallel to the plane of the circuit board. In a subsequent layering process, cavities are formed around the parts, and then circuit interconnections are formed through the vias to their terminals. In current practice, copper vias are formed through the FR4 circuit material to the terminals. U.S. Published Patent Application US2019 / 0215950 describes multi-diameter laser filled holes to address some of the limitations of embedding components in a circuit in this manner. As larger numbers of smaller components are embedded in a circuit, it becomes difficult to register the laser holes for the vias and to form the vias is very time consuming, as is the subsequent copper plating of the vias. This process also requires that the components have compatible terminals, which are typically copper for MLCCs. Copper terminals are prone to oxidation if stored for extended times prior to assembly, and have limited compliancy.

[0013] Despite advances, there remains a lack of suitable component assemblies suitable for high power applications, such as provided by the use of SiC wide bandgap materials. Provided herein are improved component assemblies, particularly high density electronic devices utilizing embedded components, particularly MLCCs. SUMMARY

[0014] The present invention relates to improved component assemblies.

[0015] More particularly, the present invention relates to improved component assemblies particularly suitable for high power applications, such as available with SiC-based and GaN-based wide bandgap semiconductor devices.

[0016] A particular feature of the present invention is the ability to incorporate cooling components.

[0017] As will be appreciated, these and other embodiments are provided in high density multi-component packages including first and second module interconnect pads. At least two electronic components are mounted to the first and second module interconnect pads and between the first and second module interconnect pads, with a first electronic component being vertically oriented with respect to the first module interconnect pad. A second electronic component is vertically oriented with respect to the second module interconnect pad.

[0018] Yet another further embodiment is provided in a high-density multi-component package comprising a first electronic component and a second electronic component. The first electronic component and the second electronic component each comprise a first external terminal and a second external terminal, wherein each first external terminal and each second external terminal comprises an edge surface and a side surface. The package further comprises a wide bandgap semiconductor device comprising a first interconnect pad and a second interconnect pad, wherein the first interconnect pad is electrically connected to the edge surface of the first external terminal and the second interconnect pad is electrically connected to the edge surface of the second electronic component.

[0019] Yet another further embodiment is provided in a method for forming a high-density multi-component package. The method comprises:

[0020] providing a wide bandgap semiconductor device comprising a first interconnect pad and a second interconnect pad;

[0021] providing a substrate;

[0022] providing at least two electronic components; and

[0023] mounting the two electronic components between the substrate and the wide bandgap semiconductor device, wherein the two electronic components are vertically oriented. BRIEF DESCRIPTION OF DRAWINGS

[0024] Figure 1 is a cross-sectional illustration of a package with a standard MLCC representing an electronic component, arranged for inductance cancellation.

[0025] Figure 2 is an electrical schematic of a DC link capacitor.

[0026] Figure 3 is an illustration of an integrated assembled capacitor.

[0027] Figure 4 is an illustration of a high-density capacitor package.

[0028] Figure 5 is an illustration of a high-density package incorporating cooling elements and other components.

[0029] Figure 6 is a schematic exploded view showing a component assembly.

[0030] Figure 7 is a schematic illustration of a closed component package.

[0031] Figure 8 is a schematic illustration of an embedded circuit board showing components connected through multiple layers.

[0032] Figure 9 is an illustration of a stack of capacitors and integrated cooling elements.

[0033] Figure 10 is an illustration of a cooling element with pick-and-place pads.

[0034] Figure 11 shows current flow for demonstrating the invention.

[0035] Figure 12 shows a substrate with recessed areas.

[0036] Figure 13 shows an electrically insulating restraint. DETAILED DESCRIPTION

[0037] The present invention relates to improved component assemblies particularly suitable for high power applications such as those provided by wide bandgap materials such as SiC and GaN. More particularly, the present invention relates to embedded components, particularly MLCCs, which allow for reduced parasitic effects and reduced failure in high power applications.

[0038] It is an object of the present invention to provide a high density package that uses common surface mount assembly techniques to form an array of components, particularly but not limited to MLCCs, for subsequent integration in a power module or laminated circuit board. The electrical and thermal performance of such a high density package can be optimized by the techniques described herein, and multiple components can be readily incorporated within the package. A particular advantage over the prior art is the minimization or elimination of the necessity for through via holes for electrical conduction, thereby simplifying production.

[0039] The present invention will be described with reference to the accompanying drawings, which form an integrated, non-limiting part of the disclosure. Throughout the various drawings, like elements will correspondingly be numbered.

[0040] The present invention provides a module solution and embedded package in which components, preferably including MLCCs, are assembled in the Z direction with internal electrodes perpendicular to the plane of the circuit board or module and the edge surface of the external terminals in direct electrical contact with the metal terminals on the circuit board or module. While this is not the typical direction of surface mount assemblies, this provides several key advantages over the prior art.

[0041] In embodiments of the present invention, heat is removed primarily through the external terminals by direct contact via interconnections. This allows the external terminals to act as both an electrical interface and a heat dissipation interface.

[0042] In embodiments of the present invention, cooling channels and elements can be readily incorporated into the package, allowing for dissipation of heat from the components by passive or active means. Alternatively, thermally conductive materials can be readily incorporated into the package to facilitate dissipation of heat from the package. Cooling channels are particularly suitable for use in the multi-layer ceramic capacitor structures used at high power described in U.S. Patent No. 10,147,544.

[0043] Embedded components (preferably MLCCs) minimize or eliminate the reliance on through-holes to form interconnects with these components, thereby increasing productivity.

[0044] Embedded components (especially MLCCs) allow components to be arranged in a way that reduces electrical series inductance and electrical series resistance and allow the integration of multiple components, such as sensors, resistors and inductors integrated within the package.

[0045] In embodiments of the present invention, electronic components (especially MLCCs) are provided with such... Figure 1 The arrangement shown represents a low equivalent series inductance (ESI). Alternating polarity provides for a reduction in the size of the induction loop. Minimized electrical path length, achieved by reducing the distance between the interconnecting metal and the MLCC, also allows for low ESR. In-substrate packaging allows for even lower ESI, especially when there are multiple rows of MLCCs arranged with opposite polarities.

[0046] exist Figure 1 In this configuration, components 10, such as MLCCs, are alternately mounted to mounting pads 12, wherein adjacent pads on the substrate 14 have opposite polarities. Therefore, charge flows in opposite directions, as indicated by the arrows, for adjacent components, thereby providing inductive cancellation.

[0047] Low inductance is beneficial because in wide-bandgap semiconductor applications (especially SiC-based semiconductors), higher switching current edge rates and higher switching frequencies generate greater voltage ringing that drives inductive loads. A snubber capacitor placed close to the switch package helps reduce this ringing. Integrating the snubber into the substrate further reduces the total loop inductance from the snubber to the switching device, thus maximizing the snubber's benefits. To achieve zero-voltage switching (ZVS), it is desirable to incorporate a snubber capacitor as close to the switch as possible, and for a given circuit, it is also desirable to incorporate a resistor in this component to mitigate the aforementioned ringing.

[0048] An important aspect of this invention is the ability to integrate larger DC link capacitor assemblies with semiconductors. Figure 2 The circuit diagram schematically illustrates the DC link. Larger capacitance DC links can be implemented without requiring long, continuous metal leads, thus reducing problems associated with coefficient of thermal expansion (CTE) mismatches that occur with conventional components.

[0049] exist Figure 2 In the schematic diagram, as those skilled in the art will recognize, 16 shows a pair of switches 18 for a high-voltage DC link 20, which includes an inverter output 22 and a DC link capacitor 24.

[0050] ReferenceFigure 3 Embodiments of the invention are described. In Figure 3 In a particularly preferred embodiment, the module interconnect pads are in direct physical contact with the edge surfaces of the component's external terminals, thereby eliminating the substrate and vias. Direct physical contact is defined herein as having only conductive adhesive contact between the elements in direct physical contact, as would be achieved by a module interconnect pad in direct physical contact with a MLCC terminal by a conductive adhesive such as solder, high temperature conductive adhesive or transient liquid phase sintering (TLPS) conductive adhesive.

[0051] As shown in Figure 3 A particular feature is the ability to form arrays of components, particularly MLCCs without lead frames. Providing stacks of components without lead frames reduces material costs, improves manufacturing efficiency and reduces internal parasitic effects such as electrical resistance.

[0052] In a particularly preferred embodiment, the module interconnect pads are in direct physical contact with the edge surfaces of the component's external terminals, thereby eliminating the substrate and vias. Direct physical contact is defined herein as having only conductive adhesive contact between the elements in direct physical contact, as would be achieved by a module interconnect pad in direct physical contact with a MLCC terminal by a conductive adhesive such as solder, high temperature conductive adhesive or transient liquid phase sintering (TLPS) conductive adhesive.

[0053] TLPS adhesives are a mixture of two or more metals or metal alloys prior to exposure to elevated temperatures, thereby distinguishing the thermal history of the material. TLPS adhesives exhibit a low melting point prior to exposure to elevated temperatures and a higher melting point after exposure to these temperatures. The initial melting point is a result of the low temperature metal or alloy of two low temperature metals. The second melting temperature is the melting temperature of the intermetallic compound formed when the low temperature metal or alloy forms a new alloy with a high temperature melting point metal resulting in an intermetallic compound with a higher melting point. TLPS adhesives form a metallurgical bond between the metal surfaces to be joined. Unlike tin / lead or lead (Pb) free solders, TLPS do not diffuse as they form an intermetallic joint. Due to the high secondary reflow temperature, rework of TLPS systems is very difficult. Transient liquid phase sintering is a term given to describe the resulting metallurgical conditions when two or more TLPS compatible materials are brought into contact with each other and elevated to a temperature sufficient to melt the low temperature metal. To produce a TLPS method or interconnect, at least one of these metals is from the family of metals with a low melting point, such as tin (Sn), indium (In), and the second is from the family of metals with a high melting point, such as copper (Cu) or silver (Ag). When Sn and Cu are mixed, and the temperature is elevated, the Sn and Cu form a Cu / Sn intermetallic compound, the resulting melting point is higher than the melting point of the metal with the low melting point. In the case of In and Ag, when sufficient heat is applied to the In to cause it to melt, it actually diffuses into the Ag, producing a solid solution which in turn has a higher melting point than In itself. TLPS will be used to refer to the method and TLPS compatible materials used to produce a metallurgical bond between two or more TLPS compatible metals in general. TLPS provides an electrical and mechanical interconnect that can be formed at relatively low temperatures (<300°C) and has a secondary remelting temperature of >600°C. These temperatures are determined by the different combinations of TLPS compatible metals. TLPS will be used to refer to the method and materials used to produce a TLPS metallurgical bond or interconnect in general.

[0054] Those skilled in the art will recognize that components, particularly MLCCs, can be incorporated in these packages to perform a variety of functions. For example, by combining multiple capacitors within a package and having these capacitors contact the same pad, a greater DC link capacitance can be achieved. Arrays of preassembled capacitors can be incorporated in this way or by placement of individual components. In Figure 3 the package is connected with a module, but using the same packaging technology, high density capacitor packages as shown in Figure 4 can be produced.

[0055] In Figure 4In the middle, an array of vertically oriented components 51, preferably at least some of which are MLCCs, are sandwiched within a package comprising a base 52 and a top 54, where preferably the base and top provide an enclosure with sides 53. The edge surfaces of the external terminals of adjacent components are electrically connected to a positive connector tab 56, and the opposite edge surfaces of the external terminals of adjacent connectors are electrically connected to a negative connector tab 57, where the positive and negative are arbitrarily assigned for the purposes of discussion. Assuming all components are MLCCs for the purposes of discussion, a large number of capacitive couplings can be envisioned from the illustration, each capacitive coupling having any number of MLCCs, where three separate capacitive couplings are shown without limitation. Alternatively, components other than MLCCs can be used within the enclosure to achieve various electrical functions. Optional insulating screws 58, such as Teflon screws, can be used to add mechanical constraints to the package or to attach the package to a substrate. Flexible terminals can be used to make electrical attachments to the components, and compliant terminals can be used for the connector tabs.

[0056] For the purposes of clarity, an embodiment of the package 60 is shown in Figure 5 schematic without components. In Figure 5 the top 64 of the package, modular interconnect pads 62 are shown to provide contact points integrated with a module, where the placement of the modular interconnect pads is a design choice and is not specifically limited by the figures or otherwise herein. The base 66 also has terminals 68, where the terminals in the base are preferably matched to the locations of the modular interconnect pads as will be realized from the teachings herein. A particular advantage is the ability to incorporate auxiliary circuitry on the surface within the interior, exterior, or any side of the package, thereby increasing the functionality of the package. In a preferred embodiment, the package includes cooling channels 70 that allow a cooling medium to enter and preferably pass through the package for thermal dissipation or thermal moderation from the interior of the package. The cooling medium preferably flows, without limitation, where the flow of the cooling medium can be a convective flow or a forced flow. For the purposes of this invention, forced flow is defined as flow that is augmented, such as by a fan or a pump without limitation to the type of fan or pump. Convective or convective flow is defined as flow that flows due to a thermal gradient, but is not augmented.

[0057] For large arrays of components, particularly MLCCs, thermal dissipation improves the longevity and functionality of the package. In MLCCs, heat is primarily dissipated from the interior electrodes through the external terminals of the capacitor by thermal conduction. While minimizing ESR is important in very high power applications, the MLCCs must be cooled to keep them within their reliable operating temperature range. This arrangement of components, particularly MLCCs, allows cooling channels to be easily incorporated within the package during assembly. These channels can contain passive cooling elements for dissipating heat or be actively cooled. When combined with Figure 3The power module combination shown. It can be desirable to form a combined package that is able to cool both the assembly and the modules.

[0058] The assembly phase of a representative package is shown in Figure 6 . In Figure 6 , the basic assembly is shown schematically in exploded view and the assembly method will be described with respect thereto. The components can be a pre-assembled stack 72 for ease of placement. Alternatively, the individual components 74 can be assembled. In the case of a single component where the length measured from edge surface to edge surface is much greater than the width measured as the maximum dimension perpendicular to the length, it is preferred to use a recessed area 73 within the base to achieve stability as shown schematically in Figure 12 . To facilitate rapid placement, the components can need to be packaged in the z direction (defined as perpendicular to the substrate) so that placement is completed on the terminals. Electrical insulation constraints can be employed as shown in Figure 13 .

[0059] Electrical contacts that extend through the base and the top are not shown in Figure 6 , nor are they incorporated with the cooling channels. As shown in Figure 6 , the base 76 is provided with conductor traces 78 formed thereon according to standard practice. The interconnects 80 are formed by any method known in the art, such as printing or dispensing techniques. This includes methods such as silk screen printing, gravure printing, pad printing and pressure dispensing, spiral dispensing and ink jet printing. The pre-assembled stack 72 or individual components 74 are placed into position according to standard procedures in the art. A sandwich structure is then formed between the two bases or substrates to form the package.

[0060] It is highly preferred that the interconnects formed during the formation of the package do not flow during the process of bonding all the elements of the package together. For this reason, sintered material interconnects, such as transient liquid phase sintering or nano-metallic paste are preferred for use as high temperature conductive adhesives (HTCAs) for the electrical connections to these components. More specifically, copper-containing interconnects are preferred because these interconnects can form a transient phase with tin, the most common component terminal finish.

[0061] The present invention also facilitates the formation of embedded components and especially embedded MLCCs. In the present invention, the requirement for copper vias is removed because the component terminals are easily connected to the circuit using the aforementioned high temperature interconnects. In order to form a closed cavity using the same bonding process, a high temperature insulating adhesive (HTIA) can be employed and is preferred in order to reduce the time required for the HTIA to cure simultaneously.

[0062] An embodiment of an embedded component is shown schematically in Figure 7 . Figure 7The illustrated package of components can be a stand-alone component or part of a circuit with embedded components. Using the present invention, the laser drilling and through copper via connections commonly used for embedded components are avoided and this confers some important advantages with respect to the selection of component terminals to improve reliability as further detailed herein.

[0063] In Figure 7 , the pre-assembled stack 72 or individual components 74 are shown sandwiched between a substrate 76 that includes conductor traces 78 and interconnects 80. Pre-formed vias 82 provide electrical conductivity for subsequent balanced electrical connections to the circuit for surface traces 84. High temperature insulating adhesive 86 is preferably used to secure the packaged structural components to each other, such as the intervening layers 83 that form electrically isolated sections, as will be appreciated by those skilled in the art. A particular advantage is the ability to form a substrate including appropriate traces and vias prior to assembly. This is a significant advantage compared to techniques that form vias after embedding components.

[0064] Electronic components can be connected through a multi-layer circuit board as schematically shown in Figure 8 . In Figure 8 , the circuit boards 88 and 90 are shown as laminated layers that form electrically isolated sections between the substrate 78, where various functions can be provided.

[0065] Sintered material interconnects such as transient liquid phase sintering or nano metal paste, preferably as high temperature conductive adhesive (HTCA) and high temperature insulating adhesive (HTIA) can also be used to form external electrical connections and non-electrical connections, respectively. This can be used to bond the component assembly to a power module.

[0066] The thermal benefits of the present invention packaging have been detailed, but it is also important for components such as MLCCs to maintain their mechanical reliability during temperature and power cycling. In this regard, the coefficient of thermal expansion mismatch within the package is a key consideration. To promote robustness, it is therefore important to maintain compliance within the package. The transient liquid phase and nano metal interconnects selected are not as compliant as traditional solder or conductive adhesive that uses a dispersion of metal in a polymer matrix. To achieve a more compliant joint, it is preferred that the component include compliant flexible terminals. Flexible terminals can be fabricated using metal particles dispersed in a polymer organic material. For stand-alone modules, mechanical fastening can also be applied. In addition, placing the components in the z-direction orientation minimizes the coefficient of thermal expansion in the longer x-y length orientation, as the component length is less than its width, thus reducing the length of the CTE mismatch and the resulting stress during temperature cycling.

[0067] In the case of larger components, it is desirable to form multiple interconnects to minimize the length of the continuous interconnect. Concerns about maintaining interconnect contact through thermal and power cycling can be mitigated by applying a compressive force to the package.

[0068] A particular feature of the present invention is the ability to utilize cooling elements in thermal contact with the components. As shown, cooling element 92 can be in thermal contact with the side surface 50 of the external terminals of the component through thermal interface material 94. As shown, pick and place pad 96 on cooling element 92 provides a further advantage which provides convenience in the manufacturing process. The pick and place pad can be a flat pad feature which provides a method for pick and place of the element. Figure 9 Figure 10

[0069] The thermal interface material (TIM) can be in the form of a solid film / pad, paste or liquid material. The cooling element preferably includes a planar surface for adhesion to the TIM and component and a finned surface area for increased surface area and heat dissipation.

[0070] The cooling element can be overmolded in a plastic housing to simplify assembly. The module can be formed in series or parallel with the MLCC with a PCB or suitable substrate material with the cooling element attached to the substrate with a TIM. The cooling element material can be any material which provides thermal conductivity but is preferably copper or metal injection molded (MIM) material or aluminum.

[0071] In applications where the module can be exposed to vibration, a clip can be used to secure the module to the PCB with the clip having a crush rib or barb to tightly secure the clip in the PCB board hole and provide stability for the MLCC module.

[0072] For the purposes of the present invention, the electronic component is preferably selected from the group consisting of transistors, capacitors and preferably MLCCs, diodes, resistors, varistors, inductors, fuses, integrated circuits, overvoltage discharge devices, sensors, switches, electrostatic discharge suppressors, inverters, rectifiers and filters. Particularly preferred transistors are GaN-based wide bandgap devices and SiC wide bandgap devices. The component is preferably integral with a functional device such as an AC / DC converter, a DC / AC inverter, an EMI / RFI filter, a buffer, a harmonic filter and particularly an AC harmonic filter.

[0073] Under operating conditions, the cooling medium can be a liquid or a gas provided that the cooling medium does not significantly change the composition or function of the component in addition to mitigating the extent of temperature excursions which can change the characteristics. Particularly preferred cooling media are selected from the group consisting of air; inert gases; organic materials, particularly halogenated organic materials and preferably chlorinated or fluorinated organic materials, particularly perhalogenated organic materials; and combinations thereof.

[0074] Thermally conductive potting material can be used to encapsulate the component in order to additionally regulate or distribute the heat transfer within the module. ​​

[0075] Examples

[0076] Commercially available KEMET KONNEKT TM KC-LINK TM The leadless capacitor stack of capacitors were mounted in different orientations and their ripple current self-heating was measured. All examples used the same stack of 4X3640 150nF MLCCs rated at 650Vdc, CKC33C604KWG. A 40 Arms (106 Vrms) of ripple current at 100 kHz was applied from a nominal ambient temperature of 25 °C. In each case, the chip stack was mounted to a narrow FR4 PCB test strip attached above and below with SAC305 solder. Different orientations: Example A) where the inner electrodes are perpendicular to the PCB and the side surfaces of the outer terminals are mounted to the PCB; Example B) where the inner electrodes are perpendicular to the PCB and parallel to the long axis of the narrow PCB and the edge surfaces of the outer terminals are mounted to the PCB, inventive vertical mounting called parallel mounting terminals; Example C) where the inner electrodes are perpendicular to the PCB and perpendicular to the long axis of the narrow PCB and the edge surfaces of the outer terminals are mounted to the PCB, inventive vertical mounting called perpendicular mounting terminals; and Example D) where the inner electrodes are parallel to the PCB and the side surfaces of the outer terminals of the top and bottom capacitors are mounted to the PCB, the opposite standard mounting called standard orientation. Examples B and C are to ensure there is no test bias due to the use of a narrow test strip.

[0077] Once mounted, the heat sink is clamped to the substrate to allow heat dissipation.

[0078] The design of the PCB, the shape / size / cap value of the MLCC stack, and the configuration of the heat sink were kept the same from example to example, with the only difference being the shape of the pads to accommodate the mounting orientation.

[0079] Once mounted and thermally fixed, the different orientations are connected with different current paths in different examples, and as Figure 11 The orientation shown and the current path used in a particular example are indicated by the letter as a function of the design of the circuit board.

[0080] In all examples, the current was increased to 40 Arms, 106 Vrms at 100 kHz. The temperature rise from a nominal 25 °C ambient temperature was monitored via an infrared camera to observe the heating of the different mounted orientation examples and current paths. The maximum surface temperature of the MLCCs in these different examples was recorded under steady state conditions and summarized in Table 1.

[0081] Table 1: Maximum capacitor temperature at 40 Arms, 100 kHz.

[0082] Example Mounting orientation Current path Maximum capacitor temperature at 40 Arms 1 Standard A to B 71℃ 2 Standard A to C 71℃ 3 Low loss A to B 42℃ 4 Low loss A to C 43℃ 5 Terminal-parallel A to C 32℃ 6 Terminal-parallel A to D 34℃ 7 Terminal-perpendicular A to C 31℃ 8 Terminal-perpendicular A to D 32℃

[0083] Comparative Examples 3, 4, which increased to 42-43°C, compared to Inventive Examples 5-7, had significantly less ripple current heating at 31-34°C. Comparative Examples 1, 2 had the highest ripple current, with heating to 71°C. The direction of the applied current had only a small effect on the maximum temperature reached. These series of examples clearly show that the Inventive Examples have significantly lower ripple current heating. This assembly method allows more power / current to be applied to the circuit without overheating the closely proximate capacitors or other components. Integrating MLCCs into modules and circuits in this manner provides an improved structure through which heating can be reduced, and this can be further improved by conduction or convection cooling in these components, where heat is dissipated away from the components. Those skilled in the art will recognize that these effects can be amplified by incorporating more MLCCs into the module or embedding them into the circuit board, and that these results are not limited to any particular case size of the MLCC.

[0084] The application has been described with reference to the preferred embodiments. Additional embodiments and improvements can be realized, which are not specifically stated herein, but are within the scope of the application as more specifically set forth in the appended claims.

Claims

1. A high-density multi-component package comprising: a first module interconnect pad; and a second module interconnect pad; an array of electronic components mounted to and between the first module interconnect pad and the second module interconnect pad, wherein a first of the electronic components is vertically oriented with respect to the first module interconnect pad and a second of the electronic components is vertically oriented with respect to the second module interconnect pad; wherein the first and second electronic components are first adjacent electronic components, wherein the first and second electronic components have opposite polarity; and a positive electrode connector tab electrically connected with an adjacent external terminal having a positive polarity.

2. The high-density multi-component package of claim 1, wherein, At least one of the electronic components includes an internal electrode, wherein the internal electrode is perpendicular to the module interconnect pad.

3. The high-density multi-component package of claim 1, wherein, At least one of the electronic components includes an external terminal, wherein each of the external terminals includes an edge surface and a side surface, wherein one of the edge surfaces is mounted to the first module interconnect pad.

4. The high-density multi-component package of claim 1, further comprising: A wide bandgap semiconductor device, wherein the first and second module interconnect pads are integral with the wide bandgap semiconductor device.

5. The high-density multi-component package of claim 1, wherein, The first electronic component is a first multilayer ceramic capacitor and the second electronic component is a second multilayer ceramic capacitor.

6. The high-density multi-component package of claim 1, wherein, The electronic components are mounted using a transient liquid phase sintering adhesive.

7. The high-density multi-component package of claim 6, wherein, The transient liquid phase sintering adhesive includes copper and tin.

8. The high-density multi-component package of claim 1, further comprising a component terminal, wherein, The component terminals include compliant flexible terminals.

9. The high-density multi-component package of claim 1, further comprising a conductive portion and an electrically insulating portion, the conductive portion being received in a recess of the electrically insulating portion.

10. The high-density multi-component package of claim 9, wherein, At least one of the electronic components is embedded in the electrically insulating portion.

11. The high-density multi-component package of claim 1, wherein, At least one of the electronic components is a multilayer ceramic capacitor.

12. The high-density multi-component package of claim 11, wherein, Adjacent electronic components are multilayer ceramic capacitors having opposite polarity.

13. The high-density multi-component package of claim 1, further comprising at least one cooling component.

14. The high-density multi-component package of claim 13, wherein, The cooling component is between the first and second module interconnect pads.

15. The high-density multi-component package of claim 13, wherein, The cooling component is a cooling channel.

16. The high-density multi-component package of claim 13, wherein, The cooling component includes a thermal conductor.

17. The high-density multi-component package of claim 1, further comprising: At least one electrically insulating restraint arranged to fix the first and second module interconnect pads in fixed positions relative to each other.

18. A high-density multi-component package comprising: an array of electronic components including a first of the electronic components and a second of the electronic components; wherein the first and second electronic components are adjacent and each include a first external terminal and a second external terminal, wherein each of the first and second external terminals includes an edge surface and a side surface; wherein adjacent of the electronic components have opposite polarity; and a positive electrode connector tab electrically connected with an adjacent external terminal having a positive polarity. A wide bandgap semiconductor device comprising a first interconnect pad and a second interconnect pad, wherein the first interconnect pad is electrically connected with the edge surface of the first external terminal and the second interconnect pad is electrically connected with the edge surface of the second electronic component.

19. The high-density multi-component package of claim 18, wherein, The first interconnect pad is directly electrically connected with the edge surface of the first external terminal and the second interconnect pad is directly electrically connected with the edge surface of the second electronic component.

20. The high-density multi-component package of claim 18, wherein, The first electronic component comprises an internal electrode.

21. The high-density multi-component package of claim 20, wherein, The internal electrode is perpendicular to the interconnect pad.

22. The high density multi-component package of claim 18, further comprising a substrate between the wide bandgap semiconductor device and the first electronic component, wherein the substrate comprises an electrically insulating portion and an electrically conductive portion.

23. The high-density multi-component package of claim 22, wherein, The electrically conductive portion is a via through the electrically insulating portion.

24. The high-density multi-component package of claim 23, wherein, The via is a preformed via.

25. The high-density multi-component package of claim 18, wherein, At least one of the first electronic component or the second electronic component is a multilayer ceramic capacitor.

26. The high density multi-component package of claim 18, further comprising a substrate opposite the wide bandgap semiconductor device, wherein the substrate comprises an electrically conductive portion in electrical contact with the edge of the second external terminal of the first electronic component.

27. The high-density multi-component package of claim 18, wherein, The wide bandgap semiconductor device is selected from a SiC-based device and a GaN-based device.

28. The high-density multi-component package of claim 27, further comprising: Silicon-based semiconductor.

29. The high-density multi-component package of claim 18, further comprising: At least one cooling component.

30. The high-density multi-component package of claim 29, wherein, The cooling component is between a first substrate and a second substrate.

31. The high-density multi-component package of claim 29, wherein, The cooling component is a cooling channel.

32. The high-density multi-component package of claim 29, wherein, The cooling component comprises a thermal conductor.

33. A method for forming a high density multi-component package, comprising: providing a wide bandgap semiconductor device comprising a first interconnect pad and a second interconnect pad; providing a substrate; providing an array of electronic components, wherein a first set of adjacent electronic components are opposite polarity and a second set of adjacent electronic components have a connector tab in electrical contact with an adjacent external terminal of co-polarity; and mounting the electronic components between the substrate and the wide bandgap semiconductor device, wherein the electronic components are vertically oriented.

34. The method for forming a high density multi -component package of claim 33, wherein, A first electronic component of the electronic components comprises an internal electrode and an external terminal in electrical contact with at least one internal electrode, wherein the external terminal comprises an edge surface and a side surface.

35. A method for forming a high density multi -component package as recited in claim 34, wherein, The edge surface is electrically connected with the first interconnect pad.

36. A method for forming a high density multi -component package as recited in claim 35, wherein, The edge surface is directly electrically connected with the first interconnect pad.

37. A method for forming a high density multi -component package as recited in claim 34, wherein, The internal electrode is perpendicular to the first interconnect pad.

38. A method for forming a high density multi -component package as recited in claim 33, wherein, A first electronic component of the electronic components and a second electronic component of the electronic components are adjacent electronic components.

39. A method for forming a high density multi -component package in accordance with claim 38 wherein, The first electronic component is a first multilayer ceramic capacitor and the second electronic component is a second multilayer ceramic capacitor.

40. A method for forming a high density multi -component package as recited in claim 33, wherein, The electronic components are mounted using a transient liquid phase sintering adhesive.

41. A method for forming a high density multi -component package as recited in claim 40, wherein, The transient liquid phase sintering adhesive comprises copper and tin.

42. A method for forming a high density multi -component package as recited in claim 33, further comprising: A compliant flexible terminal is formed.

43. A method for forming a high density multi -component package as recited in claim 33, comprising: A first electronic component of the electronic components is inserted into a recess of the substrate.

44. A method for forming a high density multi -component package as recited in claim 33, wherein, At least one electronic component of the electronic components is a multilayer ceramic capacitor.

45. A method for forming a high density multi -component package as recited in claim 44, wherein, Adjacent the electronic components are multilayer ceramic capacitors having opposite polarity.

46. A method for forming a high density multi -component package as recited in claim 33, wherein, The substrate is between the wide bandgap semiconductor device and a first electronic component of the electronic components, wherein the substrate comprises an electrically insulating portion and an electrically conductive portion.

47. A method for forming a high density multi -component package as recited in claim 46, wherein, The first electronic component is embedded in the electrically insulating portion.

48. A method for forming a high density multi -component package as recited in claim 46, wherein, The electrically conductive portion is a via through the electrically insulating portion.

49. A method for forming a high density multi -component package as recited in claim 48, wherein, The via is a preformed via.

50. The method for forming a high density multi-component package of claim 33, further comprising at least one cooling component.

51. A method for forming a high density multi -component package as recited in claim 50, wherein, The cooling component is between the first interconnect pad and the second interconnect pad.

52. A method for forming a high density multi -component package as recited in claim 50, wherein, The cooling component is a cooling channel.

53. A method for forming a high density multi -component package as recited in claim 50, wherein, The cooling component comprises a thermal conductor.

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