A Circuit and Method for Reducing the Input Capacitance of the High-Impedance Channel of a Digital Oscilloscope

Abstract

The present invention belongs to the field of test technology and relates to a circuit and method for reducing the input capacitance of a high-impedance channel of a digital oscilloscope. A circuit for reducing the input capacitance of a high-impedance channel of a digital oscilloscope includes: a first relay, a second relay, and a third relay; a zero-point calibration circuit is connected to the common terminal of the first relay; the normally closed contact of the first relay is connected to the normally open contact of the second relay; the normally open contact of the first relay is connected to the common terminal of the third relay; one end of the common terminal of the second relay is connected to the signal input terminal, and the other end is connected to the normally closed contact of the third relay; one end of the common terminal of the third relay is connected to the normally open contacts of the first relay and the second relay, and the other end is connected to the signal conditioning channel. By changing the position of the relay in the circuit and the control logic of the relay, the present invention reduces the number of relays in the high-impedance channel and effectively reduces the input capacitance of the digital oscilloscope.

Description

Technical Field

[0001] The present invention belongs to the technical field of testing, and relates to a circuit and method for reducing the input capacitance of a high-impedance channel of a digital oscilloscope. Background Art

[0002] The input capacitance of a digital oscilloscope is an important index in the digital oscilloscope verification regulation, which refers to the input capacitance value of the digital oscilloscope in the state of 1MΩ and DC coupling. The index of the input capacitance is related to the bandwidth, frequency response of the digital oscilloscope and the probe matching of the oscilloscope. When measuring signals through tools such as probes and needles, a part of the capacitance to the ground will be introduced, and this part of the capacitance will be superimposed on the original input capacitance of the oscilloscope, affecting the measured signal. If the input capacitance of the oscilloscope is too large, the correct waveform cannot be measured through tools such as probes and needles. Moreover, the input capacitance of the digital oscilloscope will also affect the indexes such as the bandwidth and frequency response of the digital oscilloscope.

[0003] In the design of the high-impedance channel of a digital oscilloscope, the front end of the high-impedance channel includes parts such as zero-offset calibration, impedance transformation, / 10 and / 100 gear switching, etc. Multiple relays need to be cascaded to achieve the switching of different functions. The inside of the relay is an electromagnetic coil to realize the suction of the access point, which will introduce a certain amount of input capacitance, increasing the value of the input capacitance and bringing adverse effects to other indexes of the digital oscilloscope.

[0004] Therefore, in order to reduce the influence of the test tool on the performance of the oscilloscope and obtain a higher bandwidth and better frequency response of the high-impedance channel of the digital oscilloscope, it is necessary to reduce the input capacitance of the digital oscilloscope.

[0005] At present, there is no mature integrated chip in China that can simultaneously realize functions such as zero-offset calibration, impedance transformation, / 10 and / 100 gear switching. In the prior art, multiple relays need to be cascaded to achieve this, and the input capacitance value of the digital oscilloscope will increase during the process of connecting the relays. The current design scheme is as follows Figure 1 shown, and the zero-calibration control flow chart is as Figure 2 shown.

[0006] Taking a certain model of relay as an example, the principle is as Figure 3As shown in the figure. Relay 1 realizes the channel zero calibration of the digital oscilloscope. Relays 2 and 5 together realize the switching between 50Ω and 1MΩ channels. Relays 3 and 4 realize the direct connection of the high-impedance channel, and the gear selection of / 10 and / 100. Relay 1 only functions during the zero calibration of the 50Ω and 1MΩ channels when the digital oscilloscope leaves the factory, and remains in the direct connection state during the subsequent use of the digital oscilloscope. Although the use of Relay 1 realizes the zero calibration of the 50Ω and 1MΩ channels, it increases the input capacitance of the digital oscilloscope. Moreover, Relay 1 is at the first stage of the signal input of the digital oscilloscope, and its performance has a great impact on the channel indicators of the digital oscilloscope, bringing inconvenience to subsequent debugging and use.

[0007] The above existing technical solutions use multiple cascaded relays to implement the high-impedance channel design of the digital oscilloscope, increasing the input capacitance of the digital oscilloscope. This not only is not conducive to the debugging of the channel indicators of the entire digital oscilloscope, but also may obtain distorted waveforms when using the digital oscilloscope for testing, posing potential hazards and bringing inconvenience during the R & D, production, and use processes. Summary of the Invention

[0008] The purpose of the present invention is to redesign the channel of the digital oscilloscope, change the control logic of the relay, reduce the input capacitance of the digital oscilloscope, and provide convenience for the R & D, production, and use of the digital oscilloscope.

[0009] In order to achieve the above purpose, the technical solution adopted by the present invention is: A circuit for reducing the input capacitance of the high-impedance channel of a digital oscilloscope, including: a first relay, a second relay, and a third relay; the zero calibration circuit is connected to the common terminal of the first relay; the normally closed contact of the first relay is connected to the normally open contact of the second relay; the normally open contact of the first relay is connected to the common terminal of the third relay; one end of the common terminal of the second relay is connected to the signal input terminal, and the other end is connected to the normally closed contact of the third relay; one end of the common terminal of the third relay is connected to the normally open contacts of the first and second relays, and the other end is connected to the signal conditioning channel; by switching the states of the three relays, the zero calibration circuit is connected to the 50Ω channel or the 1MΩ channel.

[0010] Further, the state when the zero calibration circuit is connected to the 50Ω channel is: the normally closed contact of the first relay is closed, the normally open contact of the second relay is closed, and the normally closed contact of the third relay is closed.

[0011] Further, the state when the zero calibration circuit is connected to the 1MΩ channel is: the normally open contact of the first relay is closed, the normally closed contact of the second relay is closed, and the normally open contact of the third relay is closed.

[0012] Further, an impedance transformation circuit is connected in series in the calibration circuit of the 1MΩ channel. The impedance transformation circuit includes a fourth relay and a fifth relay. The fourth relay and the fifth relay are normally closed relays, which are respectively used for selecting different gears of high impedance channels or / 100 and or / 10.

[0013] The present invention also provides a method for reducing the input capacitance of the high impedance channel of a digital oscilloscope. This method uses the above circuit and includes the following steps:

[0014] (1) Switch the normally closed contact of the first relay to be closed, the normally open contact of the second relay to be closed, and the normally closed contact of the third relay to be closed. The digital oscilloscope enters the 50Ω channel calibration state and performs zero calibration of the 50Ω channel.

[0015] (2) Switch the normally open contact of the first relay to be closed, the normally closed contact of the second relay to be closed, and the normally open contact of the third relay to be closed. The digital oscilloscope enters the 1MΩ channel calibration state and performs zero calibration of the 1MΩ channel.

[0016] Further, after completing the zero calibration, switch the normally closed contact of the first relay to be closed; the normally closed contact of the second relay to be closed, and the normally closed contact of the third relay to be closed.

[0017] Compared with the prior art, the present invention has the following beneficial effects:

[0018] By adjusting the position and connection relationship of the first relay in the circuit, the common end of the first relay is used as the input end for zero calibration of the digital oscilloscope. The output ends on both sides are respectively used as the input ends for zero calibration of the 50Ω and 1MΩ channels, and no longer serve as the first stage of the digital oscilloscope signal input. The performance of the first relay no longer affects the channel indicators of the digital oscilloscope. Moreover, for the high impedance channel, the first relay will not affect the input capacitance of the digital oscilloscope, effectively reducing the input capacitance of the digital oscilloscope. Description of the Drawings

[0019] Figure 1 It is a simplified block diagram of the existing digital oscilloscope channel;

[0020] Figure 2 It is a control flow chart of the existing zero calibration;

[0021] Figure 3 It is a schematic diagram of the existing zero calibration circuit;

[0022] Figure 4 It is a simplified block diagram of the improved digital oscilloscope channel in the embodiment of the present invention;

[0023] Figure 5Schematic diagram of the improved zero - point calibration circuit in the embodiment of the present invention (default state);

[0024] Figure 6 Schematic diagram of the 50Ω channel calibration state circuit improved in the embodiment of the present invention;

[0025] Figure 7 Schematic diagram of the 11MΩ channel calibration state circuit improved in the embodiment of the present invention;

[0026] Figure 8 Flowchart of the improved zero - point calibration control in the embodiment of the present invention. Detailed implementation manners

[0027] To facilitate the understanding of the present invention, the present invention will be described in more detail below with reference to the drawings and specific embodiments. The preferred embodiments of the present invention are shown in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described in this specification. On the contrary, the purpose of providing these embodiments is to make the understanding of the disclosed content of the present invention more thorough and comprehensive.

[0028] Embodiment 1. The circuit for reducing the input capacitance of the high - impedance channel of a digital oscilloscope provided in this embodiment changes the installation position of the first relay in the original digital oscilloscope channel design scheme. The changed circuit structure is as Figure 5 shown. The circuit contains 5 relays, namely: the first relay 1, the second relay 2, the third relay 3, the fourth relay 4, and the fifth relay 5. Among them, the common terminal of the first relay 1 serves as the input terminal for the zero - point calibration of the digital oscilloscope, and the output terminals on both sides serve as the input terminals for the zero - point calibration of the 50Ω and 1MΩ channels respectively.

[0029] The specific circuit connection relationship is as follows: The zero - point calibration circuit is connected to the common terminal C2 of the first relay 1. The normally - closed contact A of the first relay 1 is connected to the normally - open contact B of the second relay 2; after the normally - open contact B of the first relay 1 and the normally - open contact B of the second relay 2 are connected in parallel, they are connected in series to the normally - closed contacts A of the fourth and fifth relays, and then connected to the common terminal C1 of the third relay 3.

[0030] The common terminal C1 of the second relay 2 is connected to the digital signal input terminal, and the common terminal C2 is connected to the normally - closed contact A of the third relay 3.

[0031] The common terminal C1 of the third relay 3 is connected to the normally - open contacts B of the first and second relays 1 and 2, and the common terminal C2 is connected to the signal conditioning channel.

[0032] As Figure 4 and 5As shown, in the through state, the normally closed contacts A of the second relay 2, the third relay 3, the fourth relay 4, and the fifth relay 5 are closed. In the open state, the normally closed contacts B of the second relay 2 and the third relay 3 are closed. The state of the first relay 1 does not affect the on / off of the circuit and can be in any state.

[0033] Embodiment 2. This embodiment provides a method for reducing the input capacitance of the high-impedance channel of a digital oscilloscope. When calibrating the zero point of the digital oscilloscope, by switching the states of the first relay 1, the second relay 2, and the third relay 3, channel selection can be performed between the 50Ω channel and the 1MΩ channel, and the zero point calibration circuit can be connected to the selected channel, thereby realizing the zero point calibration of this channel. The zero point calibration control process is as Figure 8 shown.

[0034] As Figure 6 shown, when calibrating the 50Ω channel, the second relay 2 is switched to the normally open contact B being closed, the first relay 1 is set to the default state, that is, the normally closed contact A is closed, and the third relay 5 is set to the normally closed contact A being closed. At this time, the digital oscilloscope enters the 50Ω channel calibration state, and the zero point calibration circuit is turned on to complete the zero point calibration of the 50Ω channel.

[0035] As Figure 7 shown, when calibrating the 1MΩ channel, the second relay 2 is switched to the normally closed contact A being closed, the first relay 1 is switched to the normally open contact B being closed, and the third relay 3 is switched to the normally open contact B being closed. The digital oscilloscope enters the 1MΩ channel calibration state, and the zero point calibration circuit is turned on to complete the zero point calibration of the 1MΩ channel.

[0036] After calibration is completed, each relay returns to the default state as Figure 4 shown. When the user uses it, the second relay 2 and the third relay 3 jointly realize the selection between the 50Ω channel and the 1MΩ channel. The fourth relay 4 and the fifth relay 5 respectively realize the selection of different gears of the high-impedance channel or / 100 and or / 10.

Claims

1. A circuit for reducing the input capacitance of a high-impedance channel of a digital oscilloscope, comprising: The first relay, the second relay, and the third relay; characterized in that: the zero calibration circuit is connected to the common terminal of the first relay; the normally closed contact of the first relay is connected to the normally open contact of the second relay; the normally open contact of the first relay is connected to the common terminal of the third relay; one end of the common terminal of the second relay is connected to the signal input terminal, and the other end is connected to the normally closed contact of the third relay; one end of the common terminal of the third relay is connected to the normally open contacts of the first relay and the second relay, and the other end is connected to the signal conditioning channel; by switching the states of the three relays, the zero calibration circuit is connected to the 50Ω channel or the 1MΩ channel.

2. The circuit for reducing the input capacitance of the high-impedance channel of a digital oscilloscope according to claim 1, wherein: The state when the zero calibration circuit is connected to the 50Ω channel is: the normally closed contact of the first relay is closed, the normally open contact of the second relay is closed, and the normally closed contact of the third relay is closed.

3. The circuit for reducing the input capacitance of the high-impedance channel of a digital oscilloscope according to claim 1, characterized in that, The state when the zero calibration circuit is connected to the 1MΩ channel is: the normally open contact of the first relay is closed, the normally closed contact of the second relay is closed, and the normally open contact of the third relay is closed.

4. The circuit for reducing the input capacitance of the high-impedance channel of a digital oscilloscope according to claim 3, characterized in that, An impedance transformation circuit is connected in series in the calibration circuit of the 1MΩ channel, and the impedance transformation circuit includes a fourth relay and a fifth relay; the fourth relay and the fifth relay are normally closed relays, which are respectively used for the selection of different gears of the high-impedance channel or / 100 and or / 10.

5. A method for reducing the input capacitance of a high-impedance channel of a digital oscilloscope, which method uses the circuit according to any one of claims 1-4, characterized in that, It includes the following steps: (1) Switch the normally closed contact of the first relay to be closed, the normally open contact of the second relay to be closed, and the normally closed contact of the third relay to be closed; the digital oscilloscope enters the 50Ω channel calibration state, and performs zero calibration of the 50Ω channel; (2) Switch the normally open contact of the first relay to be closed, the normally closed contact of the second relay to be closed, and the normally open contact of the third relay to be closed; the digital oscilloscope enters the 1MΩ channel calibration state, and performs zero calibration of the 1MΩ channel.

6. The method for reducing the input capacitance of the high-impedance channel of a digital oscilloscope according to claim 5, characterized in that: After completing the zero calibration, switch the normally closed contact of the first relay to be closed; the normally closed contact of the second relay to be closed, and the normally closed contact of the third relay to be closed.

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