A method, device, and medium for generating the FW of a CPLD

By obtaining parameters in Excel documents to generate CPLD code files, the problem of high language threshold in CPLD development is solved, and the effect of simplifying the design process and improving development efficiency is achieved.

CN114780079BActive Publication Date: 2025-06-17INSPUR BUSINESS MACHINE CO LTD
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Patent Information

Application Number
CN202210427517.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-04-22
Publication Date
2025-06-17
Estimated Expiration
2042-04-22

AI Technical Summary

Technical Problem

In the prior art, the language threshold for CPLD development is high, which leads to hardware engineers needing to write complex underlying source code in project development, increasing the workload and error rate.

Method used

Provides a FW generation method of CPLD, which generates a code file by obtaining parameters in a pre-written Excel document, and stores it in programming software to generate FW. This method reduces dependence on Verilog language and simplifies the CPLD design process.

Benefits of technology

It effectively lowers the language threshold for CPLD development, reduces the workload of engineers for writing underlying source code, improves design efficiency, and simplifies the development process of CPLD projects.

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Abstract

The present application discloses a method, device and medium for generating the FW of a CPLD, mainly related to the field of hardware development. The method first obtains a parameter document; wherein, the parameter document is an Excel document pre-written containing the design requirements of the CPLD; then generates a code file according to the parameters in the parameter document; and finally stores the code file in the programming software so that the programming software can generate the FW according to the code file. It can be seen that this method uses an Excel document to collect various parameters of the CPLD design, making the various parameters of the CPLD design visual. In addition, engineers do not need to actually write the underlying source code, effectively eliminating the language threshold for CPLD design and simplifying the CPLD design process.
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Description

Technical Field

[0001] This application relates to the field of hardware development, and particularly to a method, apparatus, and medium for generating the FW of a CPLD. Background Art

[0002] Complex Programmable Logic Device (CPLD) is a commonly used chip for server boards. However, for ordinary hardware engineers, the development work of CPLD in project development has always been a difficult and energy-consuming task.

[0003] Figure 1 As shown in the flowchart of the conventional method for generating the FW of a CPLD, in the development work of CPLD, it is necessary to design the underlying source codes of multiple modules. As a dedicated signal logic design chip, the underlying code controlled by the CPLD needs to be written in Verilog language, which poses a language threshold for hardware engineers. Figure 1 As shown, in the development work of CPLD, it is necessary to design the underlying source codes of multiple modules. As a dedicated signal logic design chip, the underlying code controlled by the CPLD needs to be written in Verilog language, which poses a language threshold for hardware engineers.

[0004] Therefore, how to reduce the language threshold for CPLD development is an urgent problem to be solved by those skilled in the art. Summary of the Invention

[0005] The purpose of this application is to provide a method, apparatus, and medium for generating the FW of a CPLD, which is used to reduce the language threshold for CPLD development.

[0006] To solve the above technical problems, this application provides a method for generating the FW of a CPLD, including:

[0007] Obtaining a parameter document; wherein, the parameter document is a pre-written Excel document containing the design requirements of the CPLD;

[0008] Generating a code file according to the parameters in the parameter document;

[0009] Storing the code file in a programming software so that the programming software can generate the FW according to the code file.

[0010] Preferably, obtaining the parameter document includes:

[0011] Obtaining the address information of the parameter document through a GUI software platform;

[0012] Extracting the parameter document from the storage address corresponding to the address information of the parameter document.

[0013] Preferably, generating a code file according to the parameters in the parameter document includes:

[0014] Generating code statements corresponding to each parameter according to each parameter in the parameter document;

[0015] Summarize and organize the code statements to obtain a code file.

[0016] Preferably, after generating the code file according to the parameters in the parameter document and before storing the code file in the programming software, it further includes:

[0017] Send the code file to the simulation software so that the simulation software can perform simulation tests on the code file.

[0018] Preferably, the parameters in the parameter document include the parameters of various signals participated by the CPLD.

[0019] Preferably, summarizing and organizing the code statements to obtain a code file includes:

[0020] Package the code statements to generate a code file.

[0021] To solve the above technical problems, the present application also provides a generating device for the FW of a CPLD, including:

[0022] An acquisition module, configured to acquire a parameter document; wherein, the parameter document is a pre-written Excel document containing the design requirements of the CPLD;

[0023] A generation module, configured to generate a code file according to the parameters in the parameter document;

[0024] A storage module, configured to store the code file in the programming software so that the programming software can generate FW according to the code file.

[0025] To solve the above technical problems, the present application also provides a generating device for the FW of a CPLD, including:

[0026] A memory, configured to store a computer program;

[0027] A processor, configured to implement the steps of the above method for generating the FW of the CPLD when executing the computer program.

[0028] To solve the above technical problems, the present application also provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the above method for generating the FW of the CPLD are implemented.

[0029] The present application provides a method for generating the FW of a CPLD. The method first obtains a parameter document, where the parameter document is a pre-written Excel document containing the design requirements of the CPLD. Then, code files are generated according to the parameters in the parameter document. Finally, the code files are stored in the programming software so that the programming software can generate the FW according to the code files. It can be seen that this method uses an Excel document to collect various parameters of the CPLD design, making the various parameters of the CPLD design visual. In addition, engineers do not need to actually write the underlying source code, effectively eliminating the language threshold for CPLD design and simplifying the CPLD design process.

[0030] In addition, the FW generation device and medium of the CPLD provided by the present application have the same beneficial effects as the above-mentioned FW generation method of the CPLD. Brief Description of the Drawings

[0031] To more clearly illustrate the embodiments of the present application, the accompanying drawings required for use in the embodiments will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other accompanying drawings can be obtained based on these drawings without creative efforts.

[0032] Figure 1 It is a flowchart of the traditional method for generating the FW of a CPLD;

[0033] Figure 2 It is a flowchart of a method for generating the FW of a CPLD provided by the present application;

[0034] Figure 3 It is a schematic diagram of the interface of a GUI software platform provided by the present application;

[0035] Figure 4 It is a structural diagram of a FW generation device of a CPLD provided by the present application;

[0036] Figure 5 It is a structural diagram of another FW generation device of a CPLD provided by the present application. Detailed Description of the Embodiments

[0037] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, rather than all embodiments. Based on the embodiments of the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the protection scope of the present application.

[0038] CPLD is a commonly used chip on the main board. Currently, in the development work of CPLD, a large amount of underlying source code for multiple functional modules needs to be designed using Verilog language, which involves a large workload and has a language threshold for hardware engineers. In addition, due to the poor readability of CPLD source code, directly rewriting the underlying source code is inefficient and error-prone, which is not conducive to the subsequent migration and maintenance of CPLD projects. To overcome the above disadvantages, the core of this application is to provide a method, device, and medium for generating the FW of CPLD to lower the language threshold for CPLD development.

[0039] For the convenience of understanding, the programming tools used in this application will be introduced below.

[0040] This application uses a programming tool whose kernel is written in Python and has multiple functional modules preset internally, including a Graphical User Interface (GUI) module, a parameter acquisition module, a compilation module, and a code generation module. Among them, the GUI module provides a GUI software platform for collecting the address information of the parameter document filled in by the user. In addition, the GUI module also provides a start button for the programming tool, and the user can start the programming tool by clicking the start button of the programming tool; the parameter acquisition module is used to collect all the parameters in the parameter document and store the collected parameters in an independent register inside the tool; the compilation module is the core implementation module, which is used to identify the parameters in the parameter document from the register and self-write CPLD code statements, that is, Verilog statements, according to the parameters in the parameter document; the code generation module is used to organize and generate a code file from the written code segments and store it in the specified folder of the programming software. It can be seen that this programming tool can compile the parameter document, self-process to generate code statements, and organize and output the CPLD project source code to provide a more friendly way to generate the CPLD code file, effectively avoiding the cumbersome writing of the underlying source code.

[0041] To enable those skilled in the art to better understand the solution of this application, the following will further elaborate on this application in combination with the accompanying drawings and specific implementation manners.

[0042] Figure 2 It is a flowchart of a method for generating the FW of CPLD provided by this application, as Figure 1 shown, and this method includes:

[0043] S1: Obtain a parameter document; where the parameter document is an Excel document pre-written containing the design requirements of CPLD.

[0044] The parameter document is an Excel document with the extension of xls or xlsx, which provides a channel for the programming tool to collect various parameters of the CPLD design requirements filled in by the user. In specific implementation, the user should pre-fill various parameters of the CPLD design requirements in the template of the parameter document, and store the parameter document at a preset location after filling. In this way, the programming tool can obtain the parameter document from the storage location of the parameter document. It should be noted that the preset location for storing the parameter document should be within the effective range searched by the programming tool. Otherwise, the programming tool will not be able to obtain the parameter document. For example, if the storage location of the parameter document and the programming tool are not on the same terminal device, the programming tool cannot query the storage address of the parameter document through the address information of the parameter document, and thus cannot obtain the parameter document.

[0045] S2: Generate a code file according to the parameters in the parameter document.

[0046] The compilation module of the programming tool includes a power supply timing control code generation module, a PERST signal timing control code generation module, an I2C communication code generation module, and a miscellaneous (MISC) signal control code generation module. In specific implementation, after the parameter acquisition module stores the acquired parameters in the register, each module in the compilation module will grab the corresponding parameters from the register for compilation processing. Specifically, taking the MISC signal control code generation module as an example, the MISC signal control code generation module will identify the various parameters in the register, grab the parameters representing the MISC signal from them, generate the MISC signal IO definition according to the grabbed parameters, that is, define the actual physical positions of the MISC signal input and output, and then self-organize to generate the code statements of the MISC signal. The code generation module will summarize and organize the code segments generated by the MISC signal control code generation module to generate a code file corresponding to the MISC signal control code generation module. It can be understood that the compilation module of the programming tool includes but is not limited to the four functional modules of the power supply timing control code generation module, the PERST signal timing control code generation module, the I2C communication code generation module, and the MISC signal control code generation module. In specific implementation, the functional modules in the compilation module can be expanded according to actual applications.

[0047] S3: Store the code file in the programming software so that the programming software can generate FW according to the code file.

[0048] After summarizing and organizing to obtain each code file corresponding to each functional module in the compilation module, each code file is centrally stored in the folder of the specified project of the programming software, so as to facilitate the programming software to obtain the code file and generate a burn file (FileWave, FW) according to the obtained code file. It should be noted that in this embodiment, the programming software refers to Diamond software, which is dedicated to generating FW according to the code file.

[0049] This embodiment provides a method for generating the FW of a CPLD. The method first obtains a parameter document; where the parameter document is an Excel document pre-written containing the design requirements of the CPLD; then generates a code file according to the parameters in the parameter document; and finally stores the code file in the programming software, so as to facilitate the programming software to generate FW according to the code file. It can be seen that this method uses an Excel document to collect various parameters of the CPLD design, making the various parameters of the CPLD design visual. In addition, engineers do not need to actually write the underlying source code, effectively eliminating the language threshold for CPLD design and simplifying the CPLD design process.

[0050] On the basis of the above embodiment, in order to facilitate the programming tool to accurately obtain the parameter document, this embodiment collects the address information of the parameter document input by the user through the GUI software platform, so as to obtain the parameter document according to the address information of the parameter document. This step includes:

[0051] Obtain the address information of the parameter document through the GUI software platform;

[0052] Extract the parameter document from the storage address corresponding to the address information of the parameter document.

[0053] Figure 3 This is a schematic diagram of the interface of the GUI software platform provided by this application, as Figure 3 shown, there is an input field for the address of the parameter document and a start button for the programming tool, namely the "Code Generation" button, on the GUI software platform. In a specific implementation, the user can input the address information of the parameter document into the input field for the address of the parameter document, and start the programming tool by clicking the "Code Generation" button; after the programming tool is started, the parameter collection module will extract the parameter document from the storage address corresponding to the address information of the parameter document obtained by the GUI module, and grab all the parameters in the parameter document and store them in the register inside the programming tool to achieve obtaining the parameter document.

[0054] This embodiment first obtains the address information of the parameter document through the GUI software platform, and then extracts the parameter document from the storage address corresponding to the address information of the parameter document, which can accurately and efficiently obtain the parameter document, so as to facilitate generating a code file according to the parameter document subsequently.

[0055] Based on the above embodiments, to obtain the code file, it is necessary to compile each parameter in the parameter document. This step includes:

[0056] Generate code statements corresponding to each parameter according to each parameter in the parameter document;

[0057] Summarize and organize the code statements to obtain the code file.

[0058] In a specific implementation, the compilation module in the programming tool will identify each parameter in the register. Specifically, each functional module in the compilation module will identify and grab the corresponding parameters from the register. For example, the power supply timing control code generation module will identify and grab each parameter representing the power supply timing signal from all the parameters, while the MISC signal control code generation module will identify and grab each parameter representing the MISC signal from them. Then, each functional module in the compilation module will generate the IO definition of the signal corresponding to each grabbed parameter, and then self-organize to generate the code statements of the corresponding signal. Then, the code generation module will summarize and organize the code statements generated by each functional module in the compilation module according to the preset rules, and the code file can be obtained.

[0059] It should be noted that the preset rules for summarizing and organizing the code statements are specifically to summarize all the code statements generated by each functional module in the compilation module respectively, and integrate all the code statements generated by each functional module in the compilation module into a statement stack, so as to obtain the statement stack corresponding to each functional module that generates code statements in the compilation module; and since a single statement stack cannot run, therefore, it is also necessary to organize the obtained statement stacks to obtain the code file corresponding to each functional module that generates code statements in the compilation module.

[0060] In this embodiment, first, code statements corresponding to each parameter are generated according to each parameter in the parameter document, and then the code statements are summarized and organized to obtain the code file, so as to facilitate generating FW according to the obtained code file later.

[0061] Based on the above embodiments, since simulation is an important part of the CPLD design work and it can provide a simulated trial run for the CPLD code, therefore, to facilitate the user to judge whether the generated code file can achieve the expected function, this embodiment sends the generated code file to the simulation software for testing. This step includes:

[0062] Send the code file to the simulation software so that the simulation software can perform simulation testing on the code file.

[0063] Specifically, after obtaining the code file, the code file can be sent to the simulation software. The simulation software conducts simulation tests on the code file, and determines whether the generated code file can achieve the expected function based on the signal waveform diagram obtained from the simulation. It should be noted that the simulation software can use Modelsim software. Modelsim software is a commonly used code simulation software for CPLD. In specific implementations, other simulation software can also be used. This embodiment does not limit the type of simulation software used.

[0064] In this embodiment, after obtaining the code file, the code file is sent to the simulation software, and the simulation software conducts simulation tests on the code file to facilitate the user to determine whether the generated code file can achieve the expected function.

[0065] On the basis of the above embodiment, to enrich the design content of the CPLD project, in this embodiment, the parameters in the parameter document include the parameters of various signals involving CPLD.

[0066] To ensure the accuracy of the CPLD project design, the compilation module in the programming tool should be able to recognize the parameters of all types of signals in the parameter document. It can be understood that in specific implementations, the design content of the CPLD project can be expanded according to actual needs, that is, the types of signals involving CPLD included in the parameter document can be increased according to actual needs, and the design content of the CPLD project is expanded by adding the parameters of various signals in the parameter document. In addition, since each functional module in the compilation module grabs the parameters of various signals in the parameter document, when expanding the design content of the CPLD project, the functional modules in the compilation module should also be expanded so that the compilation module can recognize the parameters of all types of signals in the parameter document.

[0067] Table 1 is the parameter information table of the power supply timing signal. As shown in Table 1, taking the parameters of the power supply timing signal captured by the power supply timing control code generation module in the compilation module as an example, it includes six types of parameter information: signal category, signal sequence, signal classification, signal definition (Net Name), CPLD chip physical interface (Pin), and signal function description (Function Description). Among them, the signal classification includes two types: input signal (Input) and output signal (Output). It should be noted that for different types of signals, the types of their parameters are generally different. For example, for the parameters of MISC signals, it can also include types of parameters such as input detection type, initial state of the output signal, output activation type, and delay time. Among them, the input detection type depends on whether the received input signal triggers the output signal on the rising edge or the falling edge. The initial state of the output signal refers to the state of the output signal when it has not received the input signal, including two types: high level and low level. The output activation type refers to the change method when the output signal is triggered by the input signal, including two types: pull-up and pull-down. The delay time refers to the interval time between the trigger of the input signal and the action of the output signal.

[0068] Table 1 Parameter Information Table of Power Supply Timing Signal

[0069]

[0070] In this embodiment, the parameters set in the parameter document include the parameters of various signals involving CPLDs. By adding the parameters of various signals in the parameter document, the design content of the CPLD project is enriched.

[0071] Based on the above embodiment, since a single code statement or a stack of statements cannot run, after obtaining all the code statements generated by the compilation module, they still need to be processed. This step includes:

[0072] Pack the code statements to generate a code file.

[0073] In a specific implementation, the code generation module will summarize all the code statements generated by each functional module in the compilation module to obtain a stack of statements corresponding to each functional module that generates code statements in the compilation module, and then process and pack each stack of statements to generate a code file. Specifically, processing each stack of statements is manifested as adding information such as headers, tails, and identifiers to each stack of statements, and after the processing is completed, each processed stack of statements needs to be packed to obtain the code file corresponding to each stack of statements, so that the programming software can recognize and run the code file.

[0074] In this embodiment, after generating the code statements, the code statements are packed to obtain a code file, so that the programming software can recognize and run the code file.

[0075] In the above embodiments, the method for generating the FW of the CPLD is described in detail. The present application also provides corresponding embodiments of the device for generating the FW of the CPLD. It should be noted that the embodiments of the device part of the present application are described from two perspectives, one is from the perspective of functional modules, and the other is from the perspective of hardware.

[0076] Figure 4 The following is a structural diagram of a device for generating the FW of a CPLD provided by the present application. As Figure 4 shown, the device includes:

[0077] An acquisition module 10, configured to acquire a parameter document; wherein, the parameter document is a pre-written Excel document containing the design requirements of the CPLD;

[0078] A generation module 11, configured to generate a code file according to the parameters in the parameter document;

[0079] A storage module 12, configured to store the code file in a programming software, so that the programming software can generate the FW according to the code file.

[0080] Since the embodiments of the device part correspond to the embodiments of the method part, for the embodiments of the device part, please refer to the description of the embodiments of the method part, which will not be elaborated here.

[0081] The device for generating the FW of the CPLD provided in this embodiment acquires a parameter document through an acquisition module; wherein, the parameter document is a pre-written Excel document containing the design requirements of the CPLD; generates a code file according to the parameters in the parameter document through a generation module; and stores the code file in a programming software through a storage module, so that the programming software can generate the FW according to the code file. It can be seen that this device uses an Excel document to collect various parameters of the CPLD design, making the various parameters of the CPLD design visual. In addition, engineers do not need to actually write the underlying source code, effectively eliminating the language threshold for CPLD design and simplifying the CPLD design process.

[0082] Figure 5 The following is a structural diagram of another device for generating the FW of a CPLD provided by the present application. As Figure 5 shown, the device includes:

[0083] A memory 20, configured to store a computer program;

[0084] A processor 21, configured to implement the steps of the method for generating the FW of the CPLD mentioned in the above embodiments when executing the computer program.

[0085] The device for generating the FW of the CPLD provided in this embodiment may include, but is not limited to, a smart phone, a tablet computer, a laptop computer, or a desktop computer, etc.

[0086] Among them, the processor 21 may include one or more processing cores, such as a quad-core processor, an octa-core processor, etc. The processor 21 may be implemented in at least one hardware form of a Digital Signal Processor (DSP), a Field-Programmable Gate Array (FPGA), or a Programmable Logic Array (PLA). The processor 21 may also include a main processor and a coprocessor. The main processor is a processor for processing data in the wake state, also known as the Central Processing Unit (CPU); the coprocessor is a low-power processor for processing data in the standby state. In some embodiments, the processor 21 may be integrated with a Graphics Processing Unit (GPU), and the GPU is responsible for rendering and drawing the content to be displayed on the display screen. In some embodiments, the processor 21 may further include an Artificial Intelligence (AI) processor, and the AI processor is used to process computational operations related to machine learning.

[0087] The memory 20 may include one or more computer-readable storage media, and the computer-readable storage media may be non-transitory. The memory 20 may further include high-speed random access memory and non-volatile memory, such as one or more disk storage devices and flash storage devices. In this embodiment, the memory 20 is at least used to store the following computer program 201. After the computer program is loaded and executed by the processor 21, it can implement the relevant steps of the method for generating the FW of the CPLD disclosed in any of the foregoing embodiments. In addition, the resources stored in the memory 20 may further include an operating system 202 and data 203, etc., and the storage method may be transient storage or permanent storage. Among them, the operating system 202 may include Windows, Unix, Linux, etc. The data 203 may include, but is not limited to, various parameters in the parameter document.

[0088] In some embodiments, the device for generating the FW of the CPLD may further include a display screen 22, an input / output interface 23, a communication interface 24, a power supply 25, and a communication bus 26.

[0089] Those skilled in the art can understand that Figure 5 the structure shown in

[0090] The generating device for the CPLD's FW provided in this embodiment includes a memory and a processor. When the processor executes the program stored in the memory, it can implement the above-mentioned method for generating the CPLD's FW, with the same effect.

[0091] Finally, this application also provides an embodiment corresponding to a computer-readable storage medium. A computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, it implements the steps of the method for generating the CPLD's FW as described in the above method embodiment.

[0092] It can be understood that if the method in the above embodiments is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and executes all or part of the steps of the methods described in various embodiments of this application. The foregoing storage media include: various media such as USB flash drives, mobile hard disks, read-only memories (ROMs), random access memories (RAMs), magnetic disks, or optical discs that can store program codes.

[0093] The computer-readable storage medium provided in this embodiment includes the above-mentioned method for generating the CPLD's FW, with the same effect.

[0094] The above has introduced in detail the method, device, and medium for generating the CPLD's FW provided by this application. The various embodiments in the specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts among the various embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the description of the method part. It should be noted that for those of ordinary skill in the art in this technical field, without departing from the principle of this application, several improvements and modifications can be made to this application, and these improvements and modifications also fall within the protection scope of the claims of this application.

[0095] It should also be noted that in this specification, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or device comprising the said element.

Claims

1. A method for generating the FW of a CPLD, characterized in that, It includes: Obtain a parameter document; wherein, the parameter document is a pre-written Excel document containing the design requirements of the CPLD; Generate a code file according to the parameters in the parameter document; Store the code file into programming software so that the programming software can generate FW according to the code file; The obtaining of the parameter document includes: Obtain the address information of the parameter document through the GUI software platform; Extract the parameter document from the storage address corresponding to the address information of the parameter document; The generating of the code file according to the parameters in the parameter document includes: Generate code statements corresponding to each of the parameters according to the parameters in the parameter document; Summarize and organize the code statements to obtain the code file; The generating of the code statements corresponding to each of the parameters according to the parameters in the parameter document includes: Store each of the parameters in the collected parameter document into a register through a parameter acquisition module; Grab the corresponding parameters from the register through the compilation module of the programming tool for compilation processing to generate the code statements corresponding to each of the parameters; The compilation module of the programming tool includes a power supply timing control code generation module, a PERST signal timing control code generation module, an I2C communication code generation module, and a MISC signal control code generation module; The parameters in the parameter document include the parameters of various signals participated by the CPLD; The summarizing and organizing of the code statements to obtain the code file includes: Summarize and organize the code statements generated by each functional module in the compilation module according to a preset rule; wherein, the preset rule is to summarize all the code statements generated by each functional module in the compilation module respectively, and integrate all the code statements generated by each functional module in the compilation module into a statement stack, so as to obtain a statement stack corresponding to each functional module that generates code statements in the compilation module, and organize the obtained statement stacks to obtain a code file corresponding to each functional module that generates code statements in the compilation module; The organizing of the obtained statement stacks includes: Add a header, a footer, and identifier information to each of the statement stacks, and package each of the organized statement stacks after the organization is completed.

2. The method for generating the FW of a CPLD according to claim 1, characterized in that, After generating the code file according to the parameters in the parameter document and before storing the code file into the programming software, it further includes: Send the code file to simulation software so that the simulation software can perform simulation testing on the code file.

3. The method for generating the FW of a CPLD according to claim 1, characterized in that, The summarizing and organizing of the code statements to obtain the code file includes: Package the code statements to generate the code file.

4. A device for generating the FW of a CPLD, characterized in that, It includes: An obtaining module for obtaining a parameter document; wherein, the parameter document is a pre-written Excel document containing the design requirements of the CPLD; A generating module for generating a code file according to the parameters in the parameter document; A storing module for storing the code file into programming software so that the programming software can generate FW according to the code file; The parameter document acquisition includes: Obtaining the address information of the parameter document through the GUI software platform; Extracting the parameter document from the storage address corresponding to the address information of the parameter document; The generating of the code file according to the parameters in the parameter document includes: Generating code statements corresponding to each of the parameters according to the parameters in the parameter document; Summarizing and organizing the code statements to obtain the code file; The generating of the code statements corresponding to each of the parameters according to the parameters in the parameter document includes: Storing each of the parameters in the acquired parameter document into a register through a parameter acquisition module; Fetching the corresponding parameters from the register through a compilation module of a programming tool for compilation processing to generate code statements corresponding to each of the parameters; The compilation module of the programming tool includes a power supply timing control code generation module, a PERST signal timing control code generation module, an I2C communication code generation module, and a MISC signal control code generation module; The parameters in the parameter document include parameters of various signals participated by the CPLD; The summarizing and organizing the code statements to obtain the code file includes: Summarizing and organizing the code statements generated by each functional module in the compilation module according to a preset rule; wherein, the preset rule is to summarize all the code statements generated by each functional module in the compilation module respectively, and integrate all the code statements generated by each functional module in the compilation module into a statement stack, so as to obtain a statement stack corresponding to each functional module that generates code statements in the compilation module, and organizing the obtained statement stacks to obtain code files corresponding to each functional module that generates code statements in the compilation module; The organizing the obtained statement stacks includes: Adding a header, a footer, and identifier information to the statement stacks, and packing the organized statement stacks after the organizing is completed.

5. An apparatus for generating the FW of a CPLD, characterized in that, Including: A memory for storing a computer program; A processor for implementing the steps of the method for generating the FW of the CPLD according to any one of claims 1 to 3 when executing the computer program.

6. A computer-readable storage medium, characterized in that, A computer program is stored on a computer-readable storage medium, and when the computer program is executed by a processor, the steps of the method for generating the FW of the CPLD according to any one of claims 1 to 3 are implemented.

Citation Information

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