A test probe assembly

Abstract

The present disclosure relates to a hybrid shielded socket with impedance tuning for use in an integrated circuit device test tool. High frequency operation of an integrated circuit test system is greatly expanded by incorporating dedicated high frequency signal components that provide a circuit specific compensation network as part of an intermediate circuit board that enables the connection between the test equipment and the integrated circuit under test.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of and priority to pending U.S. Provisional Application No. 63 / 140,809 (Attorney Docket ES-2101-P), filed on January 23, 2021, which is incorporated herein by this reference in its entirety. Technical Field

[0003] The present invention relates to a system and method for a reliable test tool for packaged integrated circuit (IC) devices. In particular, an improved signal transmission probe structure for an IC device test tool is provided. Background Art

[0004] Test socket solutions for packaged IC devices are subject to deviations and inconsistencies in the connectivity capabilities of the contact points and, therefore, electrical continuity due to lifecycle wear and tear stresses. These unavoidable effects continue to result in ineffective test failures, higher retest rates, longer test tool downtime and result in higher IC device test costs. In particular, as operating frequencies in many consumer electrical appliances increase dramatically from hundreds of megahertz (MHz) to several gigahertz (GHz), various aspects of test socket solutions become even more critical. While most signal connections are tolerant of deterioration in series resistance introduced by wear of the probe assembly, ground connections are much less tolerant of the introduction of series resistance, as ground currents can cause crosstalk between signal connections as well as signal distortion. The latter aspect of the resistive element effect is fairly broad and more or less frequency independent; the skin effect (where the current is not in the bulk of the conductor but in a thin layer at the surface) contributes but can generally be considered a second-order problem for small signals. However, as frequency increases, the reactive effects become very significant and, if not compensated for, will lead to erroneous and misleading results. Test fixtures are designed for characterization and qualification, so they are expected to produce reliable and repeatable results for any device under test (DUT) parameter in a single process. This is different from using the same DUT in a real application, where device external parameters (such as voltage and current) are fixed during the prototyping phase, and the only important variable thereafter is the device itself. So, for example, a device tester can run the device at multiple operating frequencies to select performance levels, which requires the tester to be able to operate over a wide frequency range.

[0005] The contact probes of test tools used to test IC devices are usually made of conductive metals and metal alloys, such as beryllium copper (BeCu), brass and steel alloys. Depending on the specific application, these contact probes can be coated and / or plated with suitable conductive materials such as gold, iridium, nickel, palladium and cobalt to provide low resistance that is not affected by oxidation, especially at higher frequencies where the skin effect dominates the current flow, and then passivated with a suitable insulating layer to avoid shorting the fixture itself.

[0006] However, during repeated testing of IC devices, such as after 100,000 test cycles, these contact probes of the test tool will be constantly subjected to repeated connection and disconnection with the IC device under test. As a result, the contact probes often suffer from contact degradation due to the peeling of the plating conductive layer, metal oxidation, and foreign matter adhesion, resulting in a significant decrease in contact ability. Although signal connections can tolerate the introduction of resistance into the circuit when small currents are involved, high current areas (such as shared ground connections) represent a serious problem. In addition to introducing resistance changes in the current path, these physical changes will also cause changes in the reactive components of the circuit, which will cause changes in the input signal that varies with frequency.

[0007] In addition, after repeated continuous testing of the above IC devices, the penetration ability of the test tool contact probes is also affected by the substantial loss of inherent compliance force generated by the spring or elastic element housed by the corresponding contact probe body or post. The reduced contact pitch size of IC devices (e.g., from 1.27 mm to 0.2 mm or less) exacerbates this problem.

[0008] It is clear that there is a pressing need to improve the high frequency performance of the contact probes of an IC test tool after repeated test cycles. Such improved probe performance enables more reliable testing of ever-shrinking IC devices over longer periods of time without any unnecessary IC test tool downtime associated with failure or substantial degradation of the contact probes. Summary of the invention

[0009] To achieve the above objectives and in accordance with the present invention, a system and method for reliably testing packaged high-speed integrated circuit (IC) devices are provided.

[0010] In one embodiment, a test probe assembly is configured for testing packaged integrated circuit (IC) devices. The test probe assembly includes a plurality of probes or pins, a terminal pad inserter that allows the test probes or pins to be connected to a test device on one side, and a docking assembly that ensures repeatable alignment of the device under test. The plurality of probes are configured to repeatedly maintain reliable electrical contact with corresponding plurality of contacts on the device under test (DUT) when under compliant force. The interposing pads provide mechanical and electrical coupling for the plurality of probes, and further provide terminal points for routing from various test devices, wherein the various test devices are used to send and receive signals from the DUT. The interposing pads also incorporate reactive elements, including segments of transmission lines, to provide appropriate matching or eliminate some or all of those parasitic reactances introduced by the test fixture.

[0011] Note that the various features of the present invention described above can be implemented individually or in combination. These and other features of the present invention will be described in more detail in the following detailed description of the present invention in conjunction with the following drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order that the present invention may be more clearly defined, some embodiments will now be described by way of example with reference to the accompanying drawings, in which:

[0013] Figure 1A and 1B are cross-sectional views showing elements of two alternative embodiments of a high-density test fixture according to the present invention;

[0014] Figure 1C The equivalent circuit of the coaxial segment with simplified approximation is shown;

[0015] Figure 1D shows the effect of changing the materials used for the upper and lower layers of the main test fixture block;

[0016] Figure 2 Shows how the test fixture assembly is coupled to the device under test and the test equipment;

[0017] Figure 3 A simple example of a high-frequency matching network between a test fixture and a high-frequency cable is shown;

[0018] Figure 4 shows the way of connecting two different types of substrates for an intermediate circuit that connects the test fixture to external test equipment; and

[0019] Figure 5 A graphical representation of the transmission loss and return loss of a sample pin is shown. DETAILED DESCRIPTION

[0020] The present invention will now be described in detail with reference to several embodiments shown in the accompanying drawings. In the following description, many specific details are set forth to provide a thorough understanding of embodiments of the present invention. However, it is apparent to those skilled in the art that embodiments may be practiced without some or all of these specific details. In other cases, in order to avoid unnecessarily confusing the present invention, well-known process steps and / or structures are not described in detail. The features and advantages of the embodiments may be better understood with reference to the following drawings and discussion.

[0021] About the following description in conjunction with (one or more) drawings, the aspects, features and advantages of the exemplary embodiments of the present invention will be better understood. It should be clear to those skilled in the art that the embodiments described in the present invention provided here are only exemplary and non-restrictive, and are presented only by way of example. Unless otherwise expressly stated, all features disclosed in this specification can be replaced by alternative features for the same or similar purposes. Therefore, many other embodiments of its modification are expected to fall within the scope of the present invention as defined herein and its equivalents. Therefore, the use of absolute and / or sequential terms, such as "will", "will not", "should", "should not", "must", "must not", "first", "initially", "next", "subsequently", "before", "after", "last" and "finally" does not mean to limit the scope of the present invention, because the embodiments disclosed here are merely exemplary.

[0022] The present invention relates to systems and methods for improved contact probes for reliable test tools for packaged integrated circuit (IC) devices. Probes of the type described in this document typically allow a complex test equipment suite, typically including a power supply, a signal source or generator, a data collection device, and an analysis device, to be connected to an integrated circuit having a large number of connections. The test equipment can be hardwired to any test probe assembly, but modern embodiments of the tester routinely terminate the equipment on a terminal piece or board, into which pads are inserted and then attached to the assembly containing the probe. In this way, one end of the pins making up the probe assembly are coupled to the terminal board, while the other end is ready for connection to the device under test. An important aspect to keep in mind is that automated test equipment is intended to test a large number of devices, so the need to make repeated connections and disconnections with high repeatability and reliability is a fundamental consideration in the design.

[0023] Repeated connections and disconnections can cause wear of the pin assemblies in the probe stations associated therewith, and the result of such wear will result in changes in the quality of the connection to the DUT. Deterioration of the test fixture, whether mechanical or electrical, is problematic because the resulting improper rejection of the tested component can have serious cost implications, especially with modern high-density technology. The connection density is very significant, as we often find interconnect pitches ranging from about 0.020 inches or about 0.8 mm or less down to 0.5 mm. The actual pin layout and distribution of the pin density is of course determined by the individual components to be tested. By constructing the terminal board of the test equipment separately from the probe assembly containing the contact pins, it becomes feasible to effectively replace the probe assembly when the pins begin to wear or are on a planned maintenance schedule, thereby avoiding unplanned production losses in the test equipment; note that the connection between the probe assembly and the insert pad will only change when a new probe assembly is positioned to replace the old worn component. As described above, it is an object of the present invention to provide a mechanism for improving the performance of a test fixture assembly including contact pins and their mounting fixtures.

[0024] To facilitate discussion, Figure 1A and 1B is a cross-sectional view of an alternative embodiment of a test fixture according to the present invention, showing the corresponding arrangement of pins. For example, Figure 1A The fixture assembly 100A is shown at the bottom of the figure with connections for the test equipment cables. The main block 124 is drilled to provide clearance channels 127 for the test pins 150, and matching channels are drilled in the bottom block 114, which can be made of a suitable non-conductive material such as a plastic material. Figure 1B As shown, an optional bottom insulating spacer 112 ensures that the pins 150 remain centered in the channel, and an optional matching spacer 122 is located on the upper portion of the main block 124. As can be seen, the pins are generally positioned for target connection points on the DUT, and when the component is moved into engagement with the test fixture, the pins are placed in contact with the connection points and contact is ensured by positive pressure, typically from springs contained within the pin assembly itself. For a ball grid array (BGA), the upper block 130 has indentations machined into the surface that receive the individual balls 140 of the BGA and allow the pins to penetrate the surface of the balls. The upper block 130 can be made of a suitable non-conductive material, such as a plastic material that allows the pins to be isolated from each other, wherein the non-conductive material is selected for impedance tuning between the DUT and the PCB test circuit.

[0025] It will be observed that the pin 150 is located within a closed metal cylinder formed by drilling a hole in the block 124, similar to Figure 1C The coaxial structure shown as 155, whose length l ("l") forms a radio frequency transmission line, has an equivalent circuit consisting of a series of series inductors L 157 and shunt capacitors C 159, as shown in Figure 1C However, in practice, for very short lengths of this line, this is fairly accurately represented by a pure shunt capacitance C between the signal conductor (pin) and ground in terms of the wavelength λ of the applied signal. s 160. A coaxial segment is defined as having an inner conductor 161 disposed within an outer conductor 162 (sometimes referred to as a shield) having a corresponding radius R a 163 and R b 164. The simple example assumes that the space between the inner and outer conductors is perfectly symmetrical and has the same dielectric constant ε0 as free space. In practice, the gap is usually filled with some insulating material to symmetrically or nearly symmetrically position the inner conductor, which has a dielectric constant greater than that of free space, and has a dielectric constant ε relative to free space. r A transmission line propagates a signal nominally without loss and changes only its propagation velocity, which can be expressed as a phase shift; if the line is exactly one-half wavelength of the frequency used, it introduces a phase shift of 180° or π radians. As a broad generalization, distances below one-tenth wavelength (<λ / 10) are often used as a rule of thumb for deciding when to simplify to treating the line as just a shunt capacitor and neglecting the phase shift. The capacitance of a simple cylinder to this approximation is 2πε r ε0x l / ln(R b / R a ), where l is the length of the coaxial segment in meters and ln represents the natural logarithm. Figure 1A The test fixture, R b Now the inner radius of channel 127, R a is the radius of pin 150. If we ignore the effect of the passivation layer on pin 150 and the interior of channel 127 into which it is inserted, then for a channel diameter of 0.35mm and a pin diameter of 0.3mm, we find that a 10mm length of pin in the channel looks like a 3.6pF (picofarad) capacitance between the connection at the device and ground. For the same channel with a 0.15mm diameter pin, this reduces to a shunt capacitance of 0.66pF.

[0026] In one implementation, the body of the pin is a larger diameter element containing a spring that preloads a moving element that slides into the body, with a length of slightly less than 3 mm and a diameter of about 0.19 mm. It is mounted in a channel that has been passivated to provide electrical insulation, with a gap of about 40 μm between the pin and the channel wall, which is mostly air, so the relative dielectric constant is only slightly greater than 1, a small difference that we can ignore for practical purposes. As a coaxial segment, the characteristic impedance is about 21 Ω and the cut-off frequency (above which the segment is able to propagate waveguide modes) is over 20 THz. We can therefore ignore the risk of multimode propagation, and we note that the element is about one-tenth of the wavelength at 10 GHz, so for frequencies below this value we can treat the segment as a lumped shunt capacitor. Calculations show that this is about 48 pF / m or about 135 fF (femto Farads) or 135x10 -15 Farah.

[0027] In some embodiments, the length of the lower connection pin, which is primarily housed within the lower block 114, can vary between about 0.15 mm and 0.25 mm, depending on the location or recess of the upper connection pin, which is set by the size of the connection mesa or ball (in the case of a DUT with a ball grid array). This is much shorter (<<λ / 10) than the guideline for treating it as a lumped element rather than a coaxial segment. As an air spacing example, in the second embodiment, it is preferable to introduce a dielectric gasket, which means that the shunt capacitance is 21pF / m and the series inductance is 48nH / m; this comes down to nearly 1fF or 1x 10 -15 The shunt capacitance of farads, and the inductance of about 2pH (pico-henry), indicate that the resonant frequency of this component alone is greater than 1THz. Similarly, the upper connection pin is about 0.85mm long when in contact with the connection mesa or ball in the BGA. The coaxial segment formed here is slightly greater than 11Ω, which is also much shorter than our guide length, so it can be considered a lumped element with a shunt capacitance of about 80fF and a series inductance of just under 10pH, resulting in a self-resonant frequency of about 180GHz. It can be seen that for frequencies below 10GHz, the entire pin structure approximates a shunt capacitance effect of about 125fF and a series inductance of about 60pH. This gives us a self-resonant frequency of about 60GHz, well above the expected operating frequency of the expected device under test, which leads us to conclude that the effects of the pin components in the test fixture are primarily capacitive in nature. The effects on the DUT depend on the parasitic elements of that device. As the frequency increases, the device structure exhibits more inductive effects, so the pin structure in the test fixture itself tends to provide some compensation for this.

[0028] In addition to approximating the coaxial structure with the connecting pins located within the conductive channel as a simple lumped capacitor, it is important to understand that once the segment becomes larger than one-tenth of the wavelength at the frequency of interest, it limits the simplification and is more appropriate to treat it as a transmission line problem. Without doing analysis, it is usually easy to solve for the characteristic impedance by using one of the online calculators, which solves for baseline performance based on knowledge of the outer channel, the diameter of the inner conductor (the pin), and the dielectric constant of the fill between the two conductors; the formulas for determining transmission line parameters are published in any antenna textbook that deals with such problems. Assuming that the dielectric is just air in the main part of the segment, the two examples above represent characteristic impedances of approximately 9Ω and 50Ω, respectively. The effects of the solid dielectric at the ends of the pin structure can be ignored for simple examples, but may have to be taken into account in edge cases. Transmission in the coaxial structure below the cutoff is transverse electromagnetic (TEM), where the electric field is located between the inside and outside, and the magnetic field completely surrounds the inner conductor in the space between the inner and outer conductors; the field lines are circular. Since the dimensions of test fixture components such as pins and channels are in the low single-digit millimeter range, waveguide modes can be neglected below a few hundred GHz, but it should be understood that once the cutoff frequency is approached, the propagation effects of different modes with significantly different velocities must be considered.

[0029] Now look more closely Figure 1D A single representative pin in a test fixture assembly of FIG. 1 can be seen where channel 127 is cut into main block 124 and the pin itself 150 is shown positioned but without Figure 1B The upper movable contact pin 153 and its tension spring 152 are movable along the long axis of the pin assembly 150 so that when pressure is applied by the table or ball 140 of the device under test, the pin is sufficiently compliant to allow a tight fit into the test fixture while the spring force ensures good electrical and mechanical contact with the DUT. Typically, an upper layer 130 (for clarity in FIG. 1 ) is provided. Figure 1D168 ) to secure the optional locating washer 122 and may be of the same material as the main block 124. If this upper layer 130 is metal, the effect is to make the depressible pin segment behave like a coaxial segment, but with a significantly different and larger characteristic impedance than the main pin assembly. This abrupt transition is not a desirable aspect, as the strong frequency dependence leads to compromise testing at higher frequencies. A simple representation of the equivalent circuit model of the fixture in this single pin example is shown on the right side of the physical view. The pin structure in the main block is represented as a classic transmission line equivalent 167, consisting of alternating inductive and capacitive elements. For the main block 124, the depressible pin behaves electrically as an inductor 169 with a capacitor 168. The electric field is shown as line 165 (on one side in the figure only for clarity), which provides the capacitive effect. The magnetic field is unaffected in most cases and is concentric around the pin element. The distribution of the electric field means that the inductance 169 of this part of the pin is partially cancelled by the capacitance 168, but this occurs mainly in the lower part of the pin element near the top surface of the main block. By using an insulating material with a dielectric constant significantly higher than that of air for the upper layer 130, the electric field is concentrated 170 and the capacitance is increased, with the benefit that this further increases the capacitance along the pin element. This causes a more gradual transition in impedance further along the pin from where the pin can be depressed into the body of the pin assembly. This more gradual impedance change compensates for the problems caused by the abrupt transition, thereby improving test performance. A similar system is used in the lower portion of the main block (not shown here) which compensates for the typically smaller inductances 172 and 174 at the structure of the pin assembly which is typically connected to one or more intermediate circuit boards for connection to the test equipment. Using a polyimide such as Kapton for the upper layer TM ) provides a good solution that is durable and has an acceptable loss tangent at 20 GHz. Teflon TM is also acceptable, but is somewhat more susceptible to damage despite having a better loss tangent. Depending on the operating impedance characteristics of the DUT at the test frequency, changing the plastic material of this upper layer can cause small changes in the capacitance effect, thereby improving the match.

[0030] The input and output circuits of a typical semiconductor device are usually either at analog signal level or digital signal level. Analog type devices operating at higher radio frequencies are usually deeply characterized, and the input and output impedances are subjected to exhaustive analysis so that the designer can integrate the components into the product in a fairly simple manner. In contrast, digital devices are rarely characterized in this way, so it is not uncommon for a circuit implementation to require unexpected modifications at higher frequencies. When a high-frequency signal propagates along a printed circuit board track, the track itself quickly takes on the characteristics of a transmission line. In simple systems, this can be overcome by keeping the distances involved to a minimum, but as the frequency increases, it becomes very difficult to minimize the effects. Transmission lines introduce the effects of phase shift and dispersion (the characteristic of the change in propagation speed related to frequency), and the end result is that in some places a single frequency is simply delayed, but a signal composed of multiple frequencies suffers distortion. Signals in digital circuits are usually square or rectangular waveforms, and breaking them down into their frequency components shows that in addition to the fundamental frequency, harmonics of that fundamental frequency are usually present in large quantities. So, for example, a square wave can be seen to have odd harmonics of the fundamental frequency in the signal. It should be clear that if these harmonics are offset in time or amplitude then the result will be significant signal distortion; in fact, this effect can be directly observed even at relatively low frequencies. Modern digital systems are built to be synchronous so that the actual state of the input is determined at a particular time by a common clock signal, so that as long as the input has enough time to settle, the distortion problem (where a supposedly square wave is not square at all) is mitigated because the amplitude of the input signal will have settled above or below the digital threshold voltage when read.

[0031] In high-frequency probe systems such as those used to test modern high-speed integrated circuits, simple solutions are often not clear. Because the wavelengths of the test frequencies are relatively short, high-quality grounding is essential to prevent interference caused by the physical distance between current paths being a significant fraction of the wavelength of the applied signal. This requires ground connections that are close to the signal connections and not dependent on other nominal ground points in the test fixture; note that even though dc testing may show the various ground points to be at the same potential, this rarely holds true at the operating frequencies. In fact, at RF it is easy to provide a structure that appears to be an open circuit at the operating frequency while being at ground potential for the purposes of the supply current.

[0032] Once a semiconductor device has been roughly characterized, a test fixture can be constructed for performance or qualification testing by taking into account the effects of the test fixture elements. The presence of connection elements such as test pins introduces parasitic reactance or impedance transformation effects. For example, adding shunt capacitance or series inductance that would not normally be present when the device is used in a circuit because the test fixture itself must compensate for this at some point. The effects of reactance or phase change effects due to the test fixture must be mitigated by the test fixture, otherwise the test fixture must be considered insufficient for use above a certain frequency. It is an object of the invention described herein to extend the usable range of a test fixture by building compensation elements directly into the fixture assembly as close to the DUT as possible. The existing technology for test fixture construction is able to operate adequately at frequencies up to several GHz without too much difficulty and individual problems that are handled directly, but as the connection point spacing becomes smaller and the operating frequencies become higher, more competent solutions must be found.

[0033] Typically, the connection between the contact pins of the test fixture and the associated test equipment is made using wiring from the test equipment connected to an intermediate circuit board. Early equipment often used direct connections to the test pins themselves, but the density of pins is now so high that direct connections are impractical due to the difficulty of repairing failures at the connection points. With high cycle counts, any bending of the wiring has the potential to cause stress at the connection point with the pin and lead to corresponding failures. By using an intermediate circuit board equipped with appropriate terminal connections, most of this stress is completely relieved at the pin connection. The problem of shielding low-level signal paths is also alleviated, as ground paths can be placed on either side of the signal track on the board to reduce susceptibility to interference. If a ground plane is also present on the board, usually on the side opposite to the side carrying the signal, then the shielding performance is significantly improved. The benefit brought about by this solution is that since the characteristics of the circuit board substrate are usually well controlled, it is possible to define the impedance of the track where the signal connection is made, so that it is now possible to create a transmission line transformer that can transform the impedance at the input connection of the equipment to a suitable impedance that will properly terminate the signal source.

[0034] In one implementation of the invention, a microstrip structure is used to create the signal path. Figure 2This is shown; a basic test fixture assembly 100 is shown that holds the contact pins 150, with the device under test 201 positioned so that the contact balls 202 of its contact array match as shown in FIG. 1. Located at the other end of the contact pins 150 is an intermediate circuit board assembly 210, which has contact mesas or points 215 positioned to connect to the pins. These mesas 215 can be planar or convex and have any desired shape or geometry to ensure reliable electrical contact and are preferably non-oxidizing or chemically inert. Ideally, the mesas will match the pin material to exclude thermoelectric effects. As shown, the figure shows the five-layer circuit board as a one-piece structure, purely for the purpose of example and discussion. The upper layer (in this figure) or the first layer has contact mesas that make electrical contact with the pins of the fixture, but it may be advantageous to provide a broad ground plane coplanar with these mesas, arranged to provide the lowest loss ground connection for the ground pins on the test fixture. This can be segmented grounding, so as to, for example, separate the ground current in one part of the DUT from the ground current in another part of the DUT.

[0035] The second layer 225 as shown is a distribution layer for all low speed connections to the DUT. The mesa 215 is coupled to the distribution layer using vias 220, and the distribution layer terminates at a connector block 230 using vias that bring the connection to the lower surface. This connector 230 is shown for discussion purposes and may equally be provided by a flexible printed circuit extension as part of the second conductor layer, so that the connection may be provided in some other convenient form. The third and fifth layers as shown are ground planes, and in this figure, the ground current is provided to the contact mesa above it through vias 240. The fourth layer 250 is a high speed signal layer connected to the contact mesa using vias 255. The figure shows the fifth layer as a ground plane 235 and represents one implementation. Since this is used only as a signal ground plane, it may be omitted in some cases, or may have a coupling structure that allows frequency-dependent adjustments to the operation of the embedded high speed signal transmission lines built on the fourth layer. For example, as part of a test regime, a resonant structure may be used to create a filter characteristic to increase or decrease certain frequencies. Finally, terminations for high speed signals are shown as coaxial connectors 260, which may be as numerous as required for the application being tested; the partial perspective view is schematic.

[0036] although Figure 2A single multilayer board is shown in the illustration, but actual circuits may require a different approach. Of concern is the dielectric constant of the high-frequency signal substrate. Common circuit board materials such as FR4 fiberglass and epoxy structures can be used in the low-GHz frequency range, but their dielectric constant (about 4.4) varies across the board due to their inherent non-uniformity, and their loss tangent is about 2%. This is less important when the circuit tracks are not frequency sensitive, but when tuning elements are used, the dispersion and loss effects can be troublesome. In addition, tuning systems using low-dielectric-constant materials tend to be larger in size. Therefore, a hybrid approach using lower-cost FR4-type materials for power and low-frequency connections and higher-dielectric-constant materials such as alumina, with a dielectric constant of 9.8 and a loss tangent of 0.01%, provides better performance and smaller size for tuning elements. Even greater advantages can be obtained by using polycrystalline or even single-crystalline forms instead of amorphous alumina; examples include sapphire and emerald. Figure 3 An exemplary signal layer is shown, which includes a simple impedance matching circuit of the typical microstrip type. Here, we seek to transform the impedance at the input pins of the device under test to match the operating impedance of the test equipment (such as a signal generator or network analysis tool).

[0037] The circuit substrate 300 is illustrated with two examples of impedance matching networks, 305 and 310, both designed to match a lower impedance to a higher impedance. The back of the circuit substrate is plated with a conductive ground layer, not shown in the figure, because its use in the field of radio frequency engineering is common. Connecting vias 315 are formed or drilled in the substrate material to match the vias formed in the low frequency circuit board to carry the signal from the contact pin to the high frequency substrate 300. Considering the circuit 305, the impedance of the microstrip or stripline element begins as a section of a lower impedance (wider) line and, at an appropriate point, is stepped down to a narrower line 320 that has the impedance required to match the test equipment load requirements at the coaxial connector 330. The outside of this connector is connected to the ground plane on the back of the substrate. It should be recognized that the ground plane can be formed so that the edge of the substrate is also grounded and may continue midway on the upper circuit surface as shown. By way of example only, stub line 325 may be used to create a frequency-dependent reactive component that may be used to compensate for abnormal behavior, such as resonance, during use; the location of such supplemental lines is determined as part of the frequency-dependent matching engineering task.

[0038] Step-matched transformers, i.e. those with discrete impedance steps at defined intervals, are somewhat narrowband in their frequency characteristics, so one design choice is to simply make incremental steps to reach the desired impedance, thereby widening the operating bandwidth. A natural extension of this is to create a tapered conductor 310 that starts at the load impedance value of the component under test and smoothly transitions to the target impedance value of the test equipment cable, which is typically at the coaxial connector 332. Stubs 335 and 340 are shown as examples of more frequency-dependent compensating reactances, and 345 shows an example resonator created by removing conductor material from the ground plane below the line. The structure is typically shaped as a portion of a circle, with the degree of coupling being set by the overlap of that portion with the line above it. Other resonator shapes are possible and are known in the art of RF design. Such structures can be used to remove or enhance specific frequencies depending on their location along the line. In one implementation, a second substrate with only a ground plane is located directly above the microstrip line structure so that the electric field is completely contained within the dielectric, and this has the added benefit of acting as an additional interference shield.

[0039] Figure 4 An implementation of a hybrid structure that connects the test equipment wiring to the intermediate circuit board of the test fixture is shown. The power supply and low-frequency circuits can be implemented on a standard circuit board 400, where the connection table 405 facilitates connection to the test fixture components with connection pins. Conductive vias 407 allow certain pins to be connected to the low-frequency and power layers, which are then coupled to the system to connect to the test equipment; in this figure, this is shown as a connector group 415, to which the cable can be attached. As mentioned above, the connection can also be a flexible printed circuit extension as an extension of the circuit board 400. The high-frequency circuit is coupled from the table using a through hole 409 on the low-frequency circuit board 400, which can be connected to a matching through hole on the high-frequency signal substrate 410, which in turn couples the signal to the coaxial transmission line through an impedance transformation network, or uses a connector 420 or attaches the line directly to the substrate. In one implementation, the interconnection between the through holes is provided by a solder connection. In a second implementation, a pogo pin is used to provide the connection. In a third implementation, an anisotropic conductive film (ACF) 430 is used to connect the substrate to the circuit board, thereby ensuring conductivity of the signal and ground connections. In some implementations, a simple clamping bracket is used to Figure 4 The components provide mechanical stability.

[0040] Final Turn Figure 5 , an example measurement of the effect of an insulating upper layer 130 instead of a conductive layer. Loss Performance S 21represents the output power at port 2 compared to the power at port 1, primarily showing the effect of the dielectric material's loss tangent as frequency increases. The quality of the match is expressed as return loss, and it can be seen that, in this example, for S 11 , the match degrades slightly as the frequency increases, with the reference plane located at the mid-plane connection near the bottom layer 114 of the test fixture. A return loss of 20 dB indicates a reflection coefficient of 0.1, or 10% of the power is reflected; this can be expressed as a 1.22:1 SWR. However, adding a plastic layer in place of the conductive top layer 130 for the DUT connection point shows that for S 22 Improved performance above 8 GHz, with return loss better than 40 dB and reflection coefficient around 1% or 0.01, which is close to the measurement accuracy of the test fixture. This shows that careful selection and positioning of materials used to build the test fixture can bring considerable benefits. Testing to 15 GHz proved reliable and repeatable, and the addition of enhanced matching networks will allow this range to be significantly extended.

[0041] Although the present invention has been described according to several embodiments, there are variations, modifications, permutations, and substitutions of equivalents that fall within the scope of the present invention. For example, many modifications are possible, and the above-mentioned features from various embodiments may be used alone or in combination. Although section headings are provided to help describe the present invention, these headings are merely illustrative and are not intended to limit the scope of the present invention.

[0042] It should also be noted that there are many alternative ways to implement the method and apparatus of the present invention. Therefore, it is intended that the appended claims be interpreted as including all such changes, modifications, permutations and substitute equivalents that fall within the true spirit and scope of the present invention.

Claims

1. A test probe assembly having a test fixture and an insert pad for testing a packaged integrated circuit (IC) device under test (DUT), the test fixture comprising: a main block having a plurality of main probe cavities for accommodating a plurality of compressible probes configured to repeatedly maintain reliable electrical contact with a corresponding plurality of DUT contacts when under a compliant force, each of the probes having a probe barrel contained within its probe holding cavity and oppositely extending upper and lower probe tips, the oppositely extending probe tip of each probe being compressible within the probe barrel, and wherein the main block is made of a conductive material, and wherein the cavity walls include an insulating layer; an upper block having a plurality of upper probe cavities for accommodating upper probe tips of the plurality of probes, and wherein the upper block is made of an insulating material for performing impedance tuning between the DUT and a PCB test circuit; a lower block having a plurality of lower probe cavities for accommodating lower probe tips of the plurality of probes; Wherein, the test fixture is connected to the insertion pad, and the insertion pad has: Mutually insulated power and ground layers; at least one signal layer insulated from the power layer and the ground layer, the at least one signal layer having one or more signal transmission lines; one or more through-holes providing electrical coupling between the plurality of probes and the one or more signal transmission lines, wherein the one or more through-holes are configured to transmit and receive signals from the DUT to at least one terminal point for routing from a test device; and One or more reactive elements coupled to one or more portions of the one or more signal transmission lines to provide matching or cancellation for parasitic reactance introduced by the test probe assembly, and wherein the one or more reactive elements include a resonant structure for creating a filter characteristic to increase or decrease specific frequencies.

2. The test probe assembly of claim 1, wherein: The upper block includes a plurality of tapered recesses for accommodating a plurality of balls of a ball grid array (BGA) of the DUT.

3. The test probe assembly of claim 1, wherein: The lower block is made of non-conductive material and is used for impedance tuning between the DUT and the PCB test circuit.

4. The test probe assembly of claim 1, wherein: The lower block includes a chamfered recess for receiving and centering the plurality of lower ends of each probe barrel of the plurality of compressible probes.

5. The test probe assembly of claim 1, wherein: The plurality of primary probe cavities of the primary block include chamfers for receiving and centering the plurality of upper ends of each probe barrel of the plurality of compressible probes.

6. The test probe assembly of claim 1, wherein: The resonant structure includes a signal transmission line, a stub or a coupled resonator and is formed in a ground plane.

7. The test probe assembly of claim 1, wherein: The interposer pad includes two or more substrate materials having different relative dielectric constants.

8. The test probe assembly of claim 7, wherein: The two or more substrate materials are coupled using an anisotropic conductive film to provide an electrical connection between the DUT and the at least one terminal point.

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