Semiconductor chip testing method, testing system, computer readable storage medium

Abstract

The application relates to the technical field of semiconductor chip testing, and discloses a semiconductor chip testing method, a testing system and a computer readable storage medium. The semiconductor chip testing method is applied to the testing system and comprises the following steps: detecting whether a semiconductor chip is working; if yes, obtaining a storage space of the semiconductor chip; dividing a physical address of the semiconductor chip into multiple blocks according to the storage space; testing the function of each block respectively, obtaining a first number of blocks with normal functions; and obtaining an identifier corresponding to the semiconductor chip based on the first number and the total number of all blocks of the semiconductor chip. The semiconductor chip is divided into blocks according to the storage space and the physical address, each block is tested, and the test result is identified in the form of a proportion, so that the performance of each semiconductor chip can be intuitively obtained, and customers can conveniently select. Users can select products with corresponding performance according to needs, improve user satisfaction, and improve the utilization rate of semiconductor devices.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor chip testing, in particular to a semiconductor chip testing method, a testing system and a computer readable storage medium. BACKGROUND

[0002] At present, the semiconductor chip testing equipment cannot well classify the semiconductor chips when testing the semiconductor chips. Different customers have different needs when purchasing semiconductor chips. Therefore, customers have difficulty in selecting semiconductor chips that meet their needs. Either the performance is not enough or the performance is excessive, which is not conducive to production and cost control. There is an urgent need for a testing method that can reasonably grade semiconductor chips to facilitate customer selection. SUMMARY

[0003] To solve the above problems, the present application provides a semiconductor chip testing method applied to a testing system, comprising: detecting whether the semiconductor chip is working; if so, obtaining the storage space of the semiconductor chip; dividing the physical address of the semiconductor chip into a plurality of blocks according to the storage space; testing the function of each block respectively, obtaining the first number of blocks with normal function; based on the first number and the total number of all blocks of the semiconductor chip, obtaining the identification corresponding to the semiconductor chip.

[0004] Optionally, the ratio of the first number and the total number is calculated, and the ratio is taken as the identification corresponding to the semiconductor chip.

[0005] Optionally, the testing system includes a defective material area, and the step of detecting whether the semiconductor chip is working includes: performing a current short circuit test on the semiconductor chip to obtain current data; determining whether the current data is within a preset current data range; if not, transporting the semiconductor chip to the defective material area.

[0006] Optionally, the testing system includes a test board, and the test board stores a preset program; the step of determining whether the current data is within the preset current data range includes: if so, controlling the test board to power on the semiconductor chip, and determining whether the test board and the semiconductor chip run the preset program; if not, transporting the semiconductor chip to the defective material area.

[0007] Optionally, determining whether the test board and the semiconductor chip run the preset program includes: if so, reading the factory value of the semiconductor chip; if the factory value shows that the semiconductor chip is unqualified, transporting the semiconductor chip to the defective material area.

[0008] Optionally, determining whether the test board and the semiconductor chip run the preset program includes: if so, reading the test equipment ID and the test software board serial number; and binding the test equipment ID and the test software board serial number with the semiconductor chip.

[0009] Optionally, testing the function of each block separately includes: writing test data into the block of the semiconductor chip; reading the data in the block; if the read data is the same as the test data, the block is functioning normally.

[0010] Optionally, when detecting whether the semiconductor chip is working, a timer is started to obtain a timing value; when the timing value exceeds the preset test time, the semiconductor chip is transported to the defective material area, which is set in the test system.

[0011] To address the aforementioned problems, this application provides a testing system capable of executing the aforementioned semiconductor chip testing method. The testing system includes: a main body for carrying semiconductor chips; sensors for positioning semiconductor chips; a robotic arm for transporting semiconductor chips; a feeding area divided into multiple regions, each corresponding to a different identifier, one of which is a defective chip area; and a test board storing preset programs.

[0012] To address the aforementioned problems, this application provides a computer-readable storage medium storing program instructions that, when executed by a processor, implement the aforementioned method.

[0013] The semiconductor chip testing method provided in this application divides the working semiconductor chip into blocks based on its storage space and physical address, tests each block, and displays the test results as a percentage, providing a clear picture of the performance level of each semiconductor chip and facilitating customer selection. By grading the performance of semiconductor chips from high to low through testing, users can select products with corresponding performance levels according to their needs, improving user satisfaction and increasing the utilization rate of semiconductor devices. Attached Figure Description

[0014] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Wherein:

[0015] Figure 1 This is a flowchart illustrating the first embodiment of the semiconductor chip testing method of this application;

[0016] Figure 2 This is a flowchart illustrating the second embodiment of the semiconductor chip testing method of this application;

[0017] Figure 3 This is a flowchart illustrating the third embodiment of the semiconductor chip testing method of this application;

[0018] Figure 4 This is a flowchart illustrating the fourth embodiment of the semiconductor chip testing method of this application. Detailed Implementation

[0019] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application will be described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of this application. Furthermore, it should be noted that, for ease of description, only the parts relevant to this application are shown in the accompanying drawings, not the entire structure. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without inventive effort are within the scope of protection of this application.

[0020] The terms "first," "second," etc., used in this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.

[0021] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0022] Figure 1 This is a schematic diagram of the steps in the first embodiment of the semiconductor chip testing method of this application.

[0023] like Figure 1 As shown, the semiconductor chip testing method provided in this application can be applied to a testing system, which specifically includes a main body, sensors, a robotic arm, a test board, and a material unloading area. The semiconductor chip testing method specifically includes the following steps:

[0024] S1: Detects whether the semiconductor chip is working.

[0025] When testing semiconductor chips, the first priority is to identify those that are not working. Therefore, it's necessary to first test whether the semiconductor chips are functional. Inoperable semiconductor chips are either faulty, have fatal defects, or are completely unusable.

[0026] Optionally, the semiconductor chip in this application can be a bare die, i.e., a die; or it can be a packaged chip, such as a DDR (Double Data Rate) chip.

[0027] S2: If so, then obtain the storage space of the semiconductor chip.

[0028] The storage space of a semiconductor chip is a key parameter determining its performance, and it is determined during chip manufacturing. This storage space is the maximum storage space of the semiconductor chip. Unlike the current storage space of the semiconductor chip, the maximum storage space is determined during manufacturing, but not all of the storage space within the maximum storage space is usable. Specifically, storage space refers to physical storage space, which consists of multiple physical storage units.

[0029] S3: Divide the physical address of the semiconductor chip into multiple blocks according to the storage space.

[0030] A physical address is an encoding of physical memory units, with each physical memory unit corresponding to a unique physical address. The storage space of a semiconductor chip is typically very large, making classification and management difficult. Therefore, it is necessary to divide the physical addresses into multiple blocks for easier classification and management, and also to facilitate subsequent testing.

[0031] Optionally, the test system divides the physical address into 8, 16, 32, 64 or 128 blocks.

[0032] S4: Test the functionality of each block individually and obtain the first number of blocks that function correctly.

[0033] The functionality of each block is tested, and the tests can be varied. Optionally, the tests may include testing the read and write capabilities of the semiconductor chip.

[0034] The number of functional blocks is the first number, which can be obtained by the test system in the software.

[0035] S5: Based on the first quantity and the total number of all blocks of the semiconductor chip, obtain the identifier corresponding to the semiconductor chip.

[0036] Each semiconductor chip is assigned an identifier that corresponds to its performance characteristics, reflecting some of these characteristics. Specifically, this may include read / write performance, storage capacity, and so on.

[0037] Optionally, the semiconductor chip testing method of this application can also be used for wafer testing. The semiconductor chip testing method of this application can be used for each bare die on the wafer. When testing wafers, it is also necessary to adapt some structures of the testing system.

[0038] S6: Transport the semiconductor chip to the storage area corresponding to the label.

[0039] Different labels correspond to different storage areas, thereby classifying the semiconductor chips being tested.

[0040] Semiconductor chips are divided into functional blocks based on their storage space and physical addresses. Each block is tested, and the test results are displayed proportionally, providing a clear picture of the performance level of each chip and facilitating customer selection. By grading the performance of semiconductor chips from high to low through testing, users can choose products with corresponding performance levels, improving user satisfaction and increasing the utilization rate of semiconductor devices.

[0041] Specifically, the identifier can be obtained through the following steps:

[0042] Calculate the ratio of the first quantity to the total quantity, and use the ratio as the identifier corresponding to the semiconductor chip.

[0043] The ratio of the number of functional chips to the total number of chips directly reflects the performance level of a semiconductor chip. Using this ratio as a chip identifier helps customers select the chips they need. This ratio categorizes semiconductor chips into multiple grades, each corresponding to different performance levels. Customers can choose from multiple grades, rather than having only one option, and recognizing that even among functional chips, performance varies. This improves customer satisfaction and increases semiconductor chip utilization. Even for less powerful but still usable chips, there is still demand and a market; the grading system allows customers to segment these chips for purchase, effectively improving overall semiconductor chip utilization.

[0044] Optionally, in another embodiment of this application, the ratio of the number of functional blocks to the total number of blocks can be expressed in the form N / 8, where N is an integer from 0 to 8, and the calculation uses a rounded approximation. 0 / 8 corresponds to defective chips, i.e., semiconductor chips that are completely inoperable. Some of the semiconductor chips in 0 / 8 may be functional, but for reasons such as testing efficiency, these chips can be discarded or proceed to the next round of testing. 1 / 8 to 8 / 8 correspond to chips of various performance levels for customers to choose from.

[0045] When semiconductor chips are unpackaged bare dies, screening criteria can be set directly according to customer needs, and only semiconductor chips that meet the customer's requirements can be packaged. This reduces packaging costs and improves the yield of the packaged finished product. For example, if a customer requires 6 / 8 grade finished chips, the testing system can screen out 7 / 8 grade bare dies. These bare dies are then packaged, and the packaged finished product will most likely become a 6 / 8 grade or higher finished chip, thus meeting the customer's requirements.

[0046] Figure 2 This is a schematic diagram of the steps in the second embodiment of the semiconductor chip testing method of this application.

[0047] like Figure 2 As shown, step S1, detecting whether the semiconductor chip is working, may further include the following steps:

[0048] S11: Perform a current short-circuit test on the semiconductor chip to obtain current data.

[0049] The purpose of performing a current short-circuit test on a semiconductor chip is to detect whether a short circuit exists within the chip. In S11, the power supply directly powers the semiconductor chip through the test board. The test system then detects the current in the semiconductor chip and obtains the current data.

[0050] S12: Determine whether the current data is within the preset current data range.

[0051] After obtaining the current data, the testing system compares the obtained current data with a preset current data range to see if the current data falls within the preset range. The preset current data range can be manually set and stored in the testing system.

[0052] S13: If not, transport the semiconductor chip to the defective area.

[0053] If the current data is outside the preset current data range, it indicates that the current is either too high or too low. When the current data exceeds a certain value, it indicates that the current is too high and there is a short circuit in the circuit. This means that the semiconductor chip will not function properly and should be transported to the defective parts area. This certain value can be the upper limit of the preset current data range.

[0054] In another embodiment of this application, if the current data is less than the lower limit of the preset current range, there may be an open circuit in the semiconductor chip, and therefore it should also be sent to the defective part area.

[0055] Optionally, during testing, current data can be collected either once or multiple times. If multiple current data are collected, statistical calculations can be performed on the collected data, such as calculating the average and variance. The results of these statistical calculations can be used to verify whether the collected current data is stable. If the collected current data is unstable, there may be problems such as poor contact in the semiconductor chip. Therefore, the semiconductor chip can be classified as a defective chip and transported to a defective material area.

[0056] Furthermore, such as Figure 2 As shown, the test board stores a preset program. Step S12, which determines whether the current data is within the preset current data range, includes:

[0057] S14: If yes, then control the test board to power on the semiconductor chip and determine whether the test board and the semiconductor chip are running the preset program.

[0058] If the current data is within the preset current data range, it indicates that the current test result is normal and the semiconductor chip does not have electrical problems such as short circuits. At this time, the test system can control the test board to power on the semiconductor chip. This "powering on" does not simply provide power to the semiconductor chip; rather, it involves supplying power to the semiconductor chip after passing through a corresponding memory chip. This memory chip stores a preset program, and the test board and semiconductor chip can determine whether the preset program can be run through feedback signals from the preset program, or other methods can be used for determination.

[0059] The preset program can include a specific master control program, such as the HiSilicon system. Therefore, this method can also be used to test whether a semiconductor chip is compatible with a specific master control program. If the semiconductor chip is compatible with the specific master control program, there will be a corresponding feedback signal during the test.

[0060] S15: If not, transport the semiconductor chip to the defective area.

[0061] If the test board and semiconductor chip cannot run a specific program, it indicates that the semiconductor chip does not meet the customer's requirements. Therefore, it is also treated as a defective chip and sent to the defective material area.

[0062] The testing system first controls the test board to directly supply power to the semiconductor chip to detect defects such as short circuits. Then, after the test board completes a pre-programmed sequence, it powers on the semiconductor chip to check if its compatibility and other properties meet requirements. This method of first detecting defects such as short circuits and then checking compatibility and other properties can prevent damage to the test board and other circuits due to short circuits during power-on.

[0063] First, semiconductor chips with inherent circuit defects are screened out. Then, chips that cannot run the preset program with the test board are tested. This method can also shorten test time and improve test efficiency. Optionally, in the test pipeline, multiple semiconductor chips are tested sequentially. Since current detection does not require running a program on the semiconductor chip, the test time is also relatively short. Compared to test methods that require running a program on each semiconductor chip, the test time is shorter, thus improving test efficiency.

[0064] If the test board and semiconductor chip fail to run a specific program, it could be because the semiconductor chip is not in the preset position. This misalignment can cause adverse effects, such as poor contact or open circuits. Directly adjusting the position and orientation of the semiconductor chip in the testing system could be time-consuming and resource-intensive; therefore, transporting the semiconductor chip directly to the defective chip area is the most time-efficient approach. While there is a possibility of transferring a functional semiconductor chip, resulting in some waste, this eliminates problems like poor contact caused by inaccurate chip positioning, preventing adverse effects on subsequent tests. It also saves time and improves efficiency throughout the testing process. Overall, the advantages outweigh the disadvantages. Adjusting the position and orientation introduces significant uncertainty to the test and depends on the accuracy of the positioning camera and the movement accuracy of the robotic arm in the testing system. Therefore, directly adjusting the position and orientation during testing is detrimental to the detection of semiconductor chips.

[0065] In one embodiment of this example, a semiconductor chip that cannot run a specific program can also be transported to an additional test area, and then retested after all semiconductor chips have been tested.

[0066] Furthermore, such as Figure 2 As shown, step S14, which involves determining whether the test board and semiconductor chip are running a preset program, includes:

[0067] S16: If so, read the factory settings of the semiconductor chip.

[0068] If the test results show that the test board and semiconductor chip can run the preset program, it indicates that the semiconductor chip meets compatibility requirements, and the next test can be performed.

[0069] Optionally, each semiconductor chip comes with a factory value during production. The specific data of the factory value is set by the manufacturer. The testing equipment can judge some information about the chip during production based on the factory value, and some of this information can be used to determine whether the semiconductor chip is qualified or unqualified. The criteria for qualified and unqualified can be set according to the specific requirements of the customer. Unqualified does not mean the semiconductor chip is a defective chip. It may also be a semiconductor chip whose performance does not meet the customer's requirements but can still work. The information revealed by the factory value can be information that directly reveals whether the semiconductor chip is qualified or unqualified, or other information that can reflect the performance and attributes of the semiconductor chip.

[0070] First measuring the current, then measuring whether the preset software is running, and then measuring the factory value and location information is beneficial for testing, which can improve the testing efficiency and shorten the testing time. Screening out those semiconductor chips with short circuits and incompatible main control programs in the circuit first can reduce the number of semiconductor chips that need to undergo time-consuming tests later, thus shortening the time used in the entire testing process.

[0071] Optionally, the factory value can be written into the semiconductor chip in the form of data. On the premise that the semiconductor chip and the test board can run the preset program, the factory value can be read by the test system.

[0072] If the semiconductor chip is not in the preset position, then transport the semiconductor chip to the defective area.

[0073] S17: If the factory value shows that the semiconductor chip is a defective chip, then transport the semiconductor chip to the defective area.

[0074] Judging that the semiconductor chip is a defective chip through the factory value indicates that certain performances or attributes of the semiconductor do not meet the requirements, so it is also directly transported to the defective area.

[0075] After going through the processing steps from S11 to S17, the semiconductor chips that have not been sent to the defective area are basically semiconductor chips that can work and have no fatal defects. The semiconductor chips eliminated in any link will be sent to the defective area. The semiconductor chips sent to the defective area may be destroyed or may undergo other processing. The semiconductor chips that have passed the tests in steps S11 to S17 can then be subjected to functional tests.

[0076] Specifically, as Figure 2 shown, the semiconductor chip testing method further includes the following steps:

[0077] S18: If so, then read the test equipment ID and the version number of the test software.

[0078] The Test Device ID (Identity Document) and Test Software Board Number are inherent to the test system itself. Each test device corresponds to a unique Test Device ID, and the test software used also corresponds to the Test Software Board Number for the current board. The Test Device ID and Test Software Board Number can be read from the test system.

[0079] S19: Bind the test device ID and test software board number to the semiconductor chip.

[0080] Binding the test equipment ID and test software board number to the semiconductor chip facilitates the traceability of test results. If the test system analyzes abnormal test data for a batch of semiconductor chips, it can accurately identify the test equipment used and the corresponding test software board number, making it easier to pinpoint the problem.

[0081] Optionally, steps S18 and S19 can also be performed before steps S16 and S17. Figure 2 This document only provides one implementation method. After step S19 is completed, step S2 can be executed to enter the functional testing phase.

[0082] Figure 3 This is a flowchart illustrating the third embodiment of the semiconductor chip testing method of this application.

[0083] Specifically, such as Figure 3 As shown, the specific steps for testing the functionality of each block in S4 include:

[0084] S401: Writes test data to a block on the semiconductor chip.

[0085] Test data can be random or pre-set. The size of the test data cannot exceed the maximum physical space of a block; otherwise, the test may fail. Therefore, the size of the test data can be set according to the block size.

[0086] S402: Read data from the block.

[0087] The test system reads the data previously written to the block for later use.

[0088] S403: Determine whether the read data is the same as the test data.

[0089] The read data is compared with the test data.

[0090] S404: If so, the block functions normally.

[0091] If the read data matches the test data, it indicates that the read / write function of this block is normal. Therefore, the number of blocks with normal function is incremented by one. If no data can be read, or if the read data deviates from the written data, it indicates that the function of this block is faulty. The inability to read data suggests that the block may not inherently possess read / write functionality, and discrepancies between the read and written data indicate unstable read / write performance or other faults in this address area.

[0092] Figure 4 This is a flowchart illustrating the fourth embodiment of the semiconductor chip testing method of this application.

[0093] Specifically, such as Figure 4 As shown, the test method also includes the following steps:

[0094] S101: When detecting whether the semiconductor chip is working, start the timer to obtain the timing value.

[0095] Timing begins when testing whether the semiconductor chip is working, recording the total test time and the test time for each test item throughout the entire testing process. The timing values ​​can be either the total test time or the test time for each item.

[0096] S102: When the timing value exceeds the preset test time, the semiconductor chip will be transported to the defective material area.

[0097] If the timing value exceeds the preset test time, it indicates that the semiconductor chip is highly likely to be a defective chip, and therefore it should be transported to the defective chip area. Test time must be limited. During testing, excessively long test times may occur due to equipment malfunctions or failures in other untested items, and the equipment may be unable to identify the fault. Therefore, limiting the test time and directly transporting semiconductor chips exceeding the preset test time to the defective chip area improves testing efficiency, shortens the overall test time, and prevents the testing of other semiconductor chips from being affected by a problem with one semiconductor chip.

[0098] Optionally, steps S101 and S102 are two steps independent of the test procedure.

[0099] In another embodiment of this application, the timing value can be the time from step S2 to S6. During the execution of steps S2 to S6, semiconductor chips with defects such as short circuits and incompatibility have been eliminated. If the timing value exceeds the preset test time at this time, it may be due to faults such as read / write speed problems. Such chips still do not meet the usage requirements and are therefore transported to the defective chip area.

[0100] All the data obtained from the above tests can be uploaded to the database by the testing system. The test data can be used as a backup in the database, or it can be calculated and analyzed, facilitating the debugging and improvement of testing equipment and software by staff.

[0101] This application also provides a testing system capable of performing the aforementioned semiconductor chip testing method. The testing system includes: a main body, sensors, a robotic arm, and a loading area. The main body is used to carry the semiconductor chip. The sensors, such as cameras, are used to position the semiconductor chip and guide the robotic arm to accurately transport it. The robotic arm is used to transport the semiconductor chip. The robotic arm's transport of the semiconductor chip is controlled by the testing system. The loading area is divided into multiple zones, each corresponding to a label on the semiconductor chip used in the aforementioned test. The test board stores a preset program.

[0102] Optionally, the material feeding area can be divided into nine sections, corresponding to nine markings from 0 / 8 to 8 / 8, where 0 / 8 corresponds to the defective material area.

[0103] This application also provides a computer-readable storage medium storing program instructions that, when executed by a processor, can implement the aforementioned semiconductor chip testing method.

[0104] The above description is merely an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A semiconductor chip testing method, characterized in that, Applied to a testing system, the testing system including a defective material area and a test board, the test board storing a preset program, the method includes: Detect whether the semiconductor chip is working; If so, then obtain the storage space of the semiconductor chip; The physical address of the semiconductor chip is divided into multiple blocks according to the storage space; The functionality of each block is tested separately to obtain a first number of blocks that function normally. Based on the first quantity and the total number of all blocks of the semiconductor chip, an identifier corresponding to the semiconductor chip is obtained; the identifier is configured to indicate the performance level of the semiconductor chip. The semiconductor chips are transported to the storage area corresponding to the identification mark to classify the semiconductor chips; wherein different identification marks correspond to different storage areas. The step of detecting whether the semiconductor chip is working includes: performing a current short-circuit test on the semiconductor chip to obtain current data; Determine whether the current data is within the preset current data range; If not, the semiconductor chip is transported to the defective chip area; wherein the defective chip area is used to store semiconductor chips that cannot function properly; If so, the test board is controlled to power on the semiconductor chip, and it is determined whether the test board and the semiconductor chip are running the preset program, so as to determine whether the semiconductor chip is compatible with the specific main control program; If not, the semiconductor chip is transported to the defective area; The method further includes: Semiconductor chips that cannot run the preset program are transported to an additional test area, and the step of detecting whether the semiconductor chips are working is performed after all the semiconductor chips have been tested. The step of determining whether the test board and the semiconductor chip are running the preset program further includes: If so, read the factory settings of the semiconductor chip; If the factory specifications indicate that the semiconductor chip is defective, then the semiconductor chip will be transported to the defective chip area.

2. The method according to claim 1, characterized in that, include: Calculate the ratio of the first quantity to the total quantity, and use the ratio as the identifier corresponding to the semiconductor chip.

3. The method according to claim 1, characterized in that, After determining whether the test board and the semiconductor chip are running the preset program, the method further includes: If so, then read the test device ID and test software board number; The test device ID and test software board number are bound to the semiconductor chip.

4. The method according to claim 1, characterized in that, The process of testing the functionality of each of the blocks includes: The test data is written into the block of the semiconductor chip; Read the data in the block; If the read data is the same as the test data, then the block functions normally.

5. The method according to claim 1, characterized in that, The testing method also includes: When detecting whether the semiconductor chip is working, a timer is started to obtain a timing value; When the timing value exceeds the preset test time, the semiconductor chip is transported to the defective chip area, which is set in the test system.

6. A testing system, characterized in that, The testing system is capable of performing the semiconductor chip testing method as described in any one of claims 1-5; The testing system includes: The main body of the device carries the semiconductor chip; Sensors are used to locate semiconductor chips; A robotic arm transports the semiconductor chip; The material feeding area is divided into multiple zones, each corresponding to a different label, one of which is the defective material zone; A test board, which stores preset programs.

7. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores program instructions that, when executed by a processor, implement the method as described in any one of claims 1-5.

Images