A preparation process for an optoelectronic and radiation ray linear silicon microstrip detector

Abstract

A preparation process of a photoelectric and ray radiation linear silicon microstrip detector. The preparation process of the single-pixel structure of the detector is as follows. Step 1: On a high-resistance N-type lightly doped semiconductor substrate, an N-type heavily doped region is formed by ion implantation. Through trench etching, epitaxial growth, and ion implantation, a three-dimensional P-type heavily doped and its co-doped type outrigger structure are formed. Step 2: Through trench etching, epitaxial growth, and ion implantation, a three-dimensional N-type heavily doped region is formed at the pixel edge of the heavily doped region. The pixel N-type heavily doped region is led out through a metal electrode and a high potential is applied. Among them, the bottom of the semiconductor substrate is the N-type heavily doped region. Step 3: The three-dimensional P-type heavily doped and its co-doped type outrigger structure in the middle of the pixel is led out through a metal electrode and a low potential is applied. The present invention can reduce the drift travel of photo-generated carriers, improve the overall detection efficiency, avoid charge crosstalk between pixels, and accelerate the collection of sub-carriers.

Description

Technical Field

[0001] The present invention relates to the technical field of detectors applied to photon (including X-ray, laser, X-ray free electron laser) or particle detection technology, and particularly to a preparation process of a linear array silicon microstrip detector applied to optoelectronics and radiation rays. Background Art

[0002] Silicon microstrip detectors and silicon pixel detectors are mainly used in fields such as high-energy physics, astrophysics, aerospace, military, and medical technology. In the specific application of silicon microstrip detectors, due to technical limitations, when measuring the position resolution of detected particles, there are the following deficiencies: the depletion (space charge region) direction of the detector is from the upper surface of the chip to the lower surface of the chip, and the depletion width is equal to the chip thickness (generally 300 microns), resulting in a relatively high depletion voltage during the actual operation of the detector. Moreover, in a radiation environment, the depletion voltage increases with the increase of the irradiation intensity, leading to a greater power consumption and being prone to breakdown. Therefore, although the existing silicon microstrip detectors have a high position resolution, they have the disadvantage of being radiation-intolerant. Furthermore, to obtain a higher position resolution for silicon microstrip detectors, the microstrips or pixels need to be made smaller, which increases the probability of breakdown. And in the case where the depletion voltage is already very high, it is more likely to break down. Additionally, making the microstrips or pixels smaller cannot be effectively applied due to process limitations.

[0003] Current silicon microstrip detectors are divided into three-dimensional detectors and two-dimensional detectors. Among them, the depletion direction of the three-dimensional detector is independent of the chip thickness and runs between the electrodes penetrating the chip. By reducing the electrode spacing, the depletion width can be reduced. Therefore, the depletion voltage is extremely low compared to two-dimensional detectors and has more advantages than two-dimensional detectors, and is widely used in high-energy physics experiments, etc. However, in current three-dimensional electrode detectors, there are disadvantages such as a low drift rate of photo-generated carriers and a low carrier collection efficiency. Summary of the Invention

[0004] In order to overcome the drawbacks of the existing three-dimensional silicon microstrip detectors, which are limited by technology and have a low drift rate of photo-generated carriers and a low carrier collection efficiency, the present invention provides a preparation process of an optoelectronic and ray radiation linear array silicon microstrip detector. Under the combined action of relevant structures and preparation processes, the finished product obtained can, in actual application, while ensuring the spatial resolution of the linear array silicon microstrip detector, improve the photon detection efficiency, and play a favorable role in enabling high-precision energy resolution detection and identification for related equipment.

[0005] The technical solution adopted by the present invention to solve its technical problems is:

[0006] A process for preparing a photoelectric and ray radiation linear array silicon microstrip detector, characterized in that the single pixel structure preparation process of the detector is as follows: step one: on a high-resistance N-type low-doped semiconductor substrate, an N-type heavily doped region is formed by ion implantation, and a three-dimensional P-type heavily doped and a spanning arm structure of the same doping type are formed by groove etching, epitaxial growth, and ion implantation; step two: at the pixel edge of the heavily doped region, a three-dimensional N-type heavily doped region is formed by groove etching, epitaxial growth, and ion implantation, and the pixel N-type heavily doped region is led out by a metal electrode and loaded with a high potential, wherein the bottom of the semiconductor substrate It is an N-type heavily doped area; step three: the three-dimensional P-type heavily doped in the middle of the pixel and its arm structure of the same doping type are led out through metal electrodes and loaded with a low potential; in specific applications, after the photons at the external detection point are incident, the electron carriers excited will drift to the N-type heavily doped area, and the excited hole carriers will drift to the P-type heavily doped area. The three-dimensional structure of the arm in the detector is arranged in the middle position in the thickness direction, which can reduce the drift distance of the photogenerated carriers and reduce the probability of the carriers being captured by defects or traps inside the detector, thereby improving the detector's collection time for carriers and improving the overall detection efficiency.

[0007] Furthermore, the high-resistance N-type low-doped semiconductor substrate in the step 1 can also be a P-type low-doped semiconductor substrate; the N-type heavily doped substrate can also be a P-type heavily doped substrate.

[0008] Furthermore, the N-type heavy doping in the step 2 can also be P-type heavy doping.

[0009] Furthermore, the high-resistance N-type low-doping region in step 1 has a resistivity between 1000 and 20000 Ω·cm and a thickness between 100 and 500 um; the junction depth of the N-type heavily doped region is between 0.3 and 1 um, and the peak concentration of the doped surface is 5E18 / cm 3 ~1E20 / cm 3 between.

[0010] Furthermore, the junction depth of the N-type heavily doped region in step 1 is between 0.3 and 1 μm, and the peak concentration of the doped surface is between 5E18 / cm 3 ~1E20 / cm 3 The width of the N-type heavily doped region is between 0.1 and 5 μm, and the peak doping concentration is 5E18 / cm 3 ~1E20 / cm 3 between.

[0011] Furthermore, the width of the three-dimensional P-type heavy doping in step 1 is between 0.1 and 5 μm, the thickness of the arm structure of the same doping type is between 1 and 10 μm, and the peak concentration of the three-dimensional P-type doping is between 5E18 / cm 3 ~1E20 / cm 3between

[0012] Furthermore, the pixel size pitch and longitudinal length in the second step are designed and optimized according to system requirements, and the passivation layer on the surface is made of an insulating material compatible with the silicon process, such as silicon dioxide or silicon nitride.

[0013] The beneficial effects of the present invention are as follows: The present invention can guide the drift motion of electron and hole carriers in the silicon microstrip detector body. Since the three-dimensional structure of the extension arm in the detector is arranged at the middle position in the thickness direction, the drift travel of the photo-generated carriers can be reduced, and the probability of the carriers being trapped by internal defects or traps in the detector can be reduced, thereby improving the collection time of the carriers by the detector and enhancing the overall detection efficiency. The insulation isolation structure can separate the pixel structures and avoid charge crosstalk between pixels; in addition, the electrodes of the metal oxide field plate in the isolation structure can be at a positive potential, thereby accelerating the collection of electron carriers through potential control in the insulation isolation layer. The electrode structure can also be multiple independent separated parts, improving the electric field distribution inside the semiconductor substrate, and thus accelerating the collection of sub-carriers. Based on the above, the present invention has good application prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 is a top view structural schematic diagram of a prior art silicon microstrip detector;

[0015] Figure 2 is Figure 1 a schematic cross-sectional view of a single pixel three-dimensional electrode of the silicon microstrip detector in

[0016] Figure 3 a schematic cross-sectional structure diagram of a single pixel of a linear array silicon microstrip detector according to Embodiment 1 of the present invention;

[0017] Figure 4 a schematic cross-sectional structure diagram of a single pixel of a linear array silicon microstrip detector according to Embodiment 2 of the present invention;

[0018] Figure 5 a schematic cross-sectional structure diagram of a single pixel of a linear array silicon microstrip detector according to Embodiment 3 of the present invention;

[0019] Figure 6 a schematic cross-sectional structure diagram of a single pixel of a linear array silicon microstrip detector according to Embodiment 4 of the present invention;

[0020] Figure 7 a schematic cross-sectional structure diagram of a single pixel of a linear array silicon microstrip detector according to Embodiment 5 of the present invention;

[0021] Figure 8 a schematic cross-sectional structure diagram of a single pixel of a linear array silicon microstrip detector according to Embodiment 6 of the present invention;

[0022] Figure 9Schematic diagram of the cross-section structure of a single pixel of the linear array silicon microstrip detector according to the seventh embodiment of the present invention. Detailed implementation manners

[0023] Figure 1 Fig. shows a top view structure diagram of an existing three-dimensional electrode silicon microstrip detector (100). It can be seen from the figure that the three-dimensional electrode silicon microstrip detector is divided into an anode region (101), a common cathode region (102), an anode electrode (103), and a cathode electrode (104). The detailed cross-section A-A part of a single pixel is given in Figure 2 As can be seen from Figure 2 Fig., the single pixel structure of the three-dimensional electrode silicon microstrip detector (200) is formed on a high-resistance N-type lightly doped (which can also be P-type) semiconductor substrate (206) by trench etching and epitaxial growth to form an N-type heavily doped (which can also be P-type heavily doped) region (204), and then by trench etching and epitaxial growth to form a P-type heavily doped (which can also be N-type heavily doped) region (203). At the bottom of the semiconductor substrate (206) is an N-type heavily doped (which can also be N-type heavily doped) region (207). The surface of the semiconductor substrate (206) is an oxide layer structure (205), an anode metal electrode (202), and a cathode metal electrode (208). The N-type heavily doped (which can also be P-type heavily doped) region at the bottom of the pixel of the semiconductor substrate (206) is led out through the metal electrode (208) and a high potential (which can also be a low potential) is applied; for the pixel P-type heavily doped (which can also be N-type heavily doped) region (203), a low potential (which can also be a high potential) is applied, so as to form an electric field direction pointing from the N-type heavily doped region to the P-type heavily doped region. After photons are incident, the excited electron carriers will drift towards the N-type heavily doped region (204), and the excited hole carriers will drift towards the P-type heavily doped region (203). The above structure results in the disadvantages of low drift rate of photo-generated carriers and low collection efficiency of carriers in the existing silicon microstrip detector (the specific reasons can be explained in the following embodiments of this application).

[0024] Figure 3As shown in the figure, in Embodiment 1, a preparation process of a photoelectric and ray radiation linear silicon microstrip detector. The preparation process of the single-pixel structure of the detector is as follows (the detector body is composed of multiple single-pixel structures). Step 1: On a high-resistance N-type lightly doped (or P-type) semiconductor substrate (306), an N-type heavily doped (or P-type heavily doped) region (304) is formed by ion implantation. A three-dimensional P-type heavily doped region (303) and its extension arm structure (309) of the same doping type are formed by means of trench etching, epitaxial growth, ion implantation, etc. Step 2: At the bottom of the semiconductor substrate (306) is an N-type heavily doped (or N-type heavily doped) region (307). At the pixel edge, a three-dimensional N-type heavily doped region (310) is formed by means of trench etching, epitaxial growth, ion implantation, etc. The N-type heavily doped region (307) of the detector pixel is led out through a metal electrode (308) and a high potential is applied. Step 3: The three-dimensional P-type heavily doped region (303) in the middle of the pixel and its extension arm structure (309) of the same doping type are led out through a metal electrode (302) and a low potential is applied. In specific applications, the electron carriers excited after the photons are incident will drift towards the N-type heavily doped regions (304, 310, 307), and the hole carriers excited will drift towards the P-type heavily doped regions (303, 309). Since the three-dimensional structure (309) of the extension arm in the detector is arranged at the middle position in the thickness direction, the drift distance of the photo-generated carriers can be reduced, and the probability of the carriers being trapped by the internal defects or traps in the detector can be reduced, thereby improving the collection time of the carriers by the detector and increasing the overall detection efficiency.

[0025] Figure 3 As shown in the figure, in Embodiment 1, the resistivity of the high-resistance N-type lightly doped region (306) is between 1000 and 20000 Ω·cm, and the thickness is between 100 and 500 um; the junction depth of the N-type heavily doped region (304) is between 0.3 and 1 um, and the doping surface peak concentration is between 5E18 / cm 3 ~1E20 / cm 3 The junction depth of the N-type heavily doped region (307) is between 0.3 and 1 um, and the doping surface peak concentration is between 5E18 / cm 3 ~1E20 / cm 3 The width of the N-type heavily doped region (310) is between 0.1 and 5 um, and the doping peak concentration is between 5E18 / cm 3 ~1E20 / cm 3 The width of the three-dimensional P-type heavily doped region (303) is between 0.1 and 5 um, the thickness of its extension arm structure (309) of the same doping type is between 1 and 10 um, and the three-dimensional P-type doping peak concentration is between 5E18 / cm 3 ~1E20 / cm 3Therein; the pixel size pitch and the longitudinal length can be designed and optimized according to system requirements, and the surface passivation layer (305) can be an insulating substance compatible with the silicon process such as silicon dioxide or silicon nitride.

[0026] Figure 4 As shown, in Embodiment 2, a preparation process of a photoelectric and ray radiation linear silicon microstrip detector. The preparation process of the single-pixel structure of the detector is as follows. Step 1: On a high-resistance N-type lightly doped (or P-type) semiconductor substrate (406), an N-type heavily doped (or P-type heavily doped) region (404) is formed by ion implantation. A three-dimensional P-type heavily doped region (403) and its extension arm structure (409) of the same doping type are formed through trench etching, epitaxial growth, ion implantation, etc. Step 2: At the bottom of the semiconductor substrate (406) is an N-type heavily doped (or N-type heavily doped) region (407), and the pixel edge is an insulating trench structure (410). The N-type heavily doped region (407) of the detector pixel is led out through a metal electrode (408) and a high potential is applied. Step 3: The three-dimensional P-type heavily doped region (403) in the middle of the pixel and its extension arm structure (409) of the same doping type are led out through a metal electrode (402) and a low potential is applied. In specific applications, the electron carriers excited after photon incidence will drift towards the N-type heavily doped regions (404, 407), and the hole carriers excited will drift towards the P-type heavily doped regions (403, 409). Since the three-dimensional structure (409) of the extension arm in the detector is arranged at the middle position in the thickness direction, the drift distance of the photo-generated carriers can be reduced, and the probability of the carriers being trapped by internal defects or traps in the detector can be reduced, thereby improving the collection time of the carriers by the detector and enhancing the overall detection efficiency.

[0027] Figure 4 As shown, in Embodiment 2, the resistivity of the high-resistance N-type lightly doped region (406) is between 1000 and 20000 Ω·cm, and the thickness is between 100 and 500 um; the junction depth of the N-type heavily doped region (404) is between 0.3 and 1 um, and the doping surface peak concentration is between 5E18 / cm 3 ~1E20 / cm 3 The junction depth of the N-type heavily doped region (407) is between 0.3 and 1 um, and the doping surface peak concentration is between 5E18 / cm 3 ~1E20 / cm 3 The width of the insulating trench structure (410) is between 0.1 and 5 um, the width of the three-dimensional P-type heavily doped region (403) is between 0.1 and 5 um, the thickness of its extension arm structure (409) of the same doping type is between 1 and 10 um, and the three-dimensional P-type doping peak concentration is between 5E18 / cm 3 ~1E20 / cm 3Therein; the pixel size pitch and the longitudinal length can be designed and optimized according to system requirements. The surface passivation layer (405) can be an insulating substance compatible with the silicon process such as silicon dioxide or silicon nitride.

[0028] Figure 5 As shown, in Embodiment 3, a preparation process of a photoelectric and ray radiation linear silicon microstrip detector. The preparation process of the single-pixel structure of the detector is as follows. Step 1: On a high-resistance N-type lightly doped (which can also be P-type) semiconductor substrate (506), an N-type heavily doped (which can also be P-type heavily doped) region (504) is formed by ion implantation. A three-dimensional P-type heavily doped region (503) and its outrigger structure (509) of the same doping type are formed through trench etching, epitaxial growth, ion implantation, etc. Step 2: At the bottom of the semiconductor substrate (506) is an N-type heavily doped (which can also be N-type heavily doped) region (507); the pixel edge is a trench field plate structure composed of metal or doped polysilicon (510) and oxide (505). The N-type heavily doped region (507) of the detector pixel is led out through a metal electrode (508) and a high potential is applied. Step 3: The three-dimensional P-type heavily doped region (503) and its outrigger structure (509) of the same doping type in the middle of the pixel are led out through a metal electrode (502) and a low potential is applied. The metal or doped polysilicon (510) in the trench field plate structure (510) composed of metal or doped polysilicon (510) and oxide (505) is applied with a high potential. In specific applications, the electron carriers excited after photon incidence will drift towards the N-type heavily doped regions (504, 507), and the hole carriers excited will drift towards the P-type heavily doped regions (503, 509). Since the three-dimensional structure (509) of the outrigger in the detector is arranged at the middle position in the thickness direction, the drift distance of the photo-generated carriers can be reduced, and the probability of the carriers being trapped by internal defects or traps in the detector can be reduced. In addition, applying a potential to the metal or doped polysilicon (510) can strengthen the electric field and promote the drift movement of the carriers, thereby improving the collection time of the carriers by the detector and enhancing the overall detection efficiency.

[0029] Figure 5 As shown, in Embodiment 3, the resistivity of the high-resistance N-type lightly doped region (506) is between 1000 and 20000 Ω·cm, and the thickness is between 100 and 500 um; the junction depth of the N-type heavily doped region (504) is between 0.3 and 1 um, and the doping surface peak concentration is between 5E18 / cm 3 ~1E20 / cm 3 Therein, the junction depth of the N-type heavily doped region (507) is between 0.3 and 1 um, and the doping surface peak concentration is between 5E18 / cm 3 ~1E20 / cm 3Between them, the overall width of the trench field plate structure composed of metal or doped polysilicon (510) and oxide (505) is between 0.5 and 5 μm, where the width of the oxide trench (505) is about between 0.1 and 3 μm, and this trench field plate structure penetrates the silicon body. The width of the three-dimensional P-type heavy doping (503) is between 0.1 and 5 μm, the thickness of its arm structure (509) of the same doping type is between 1 and 10 μm, and the peak concentration of the three-dimensional P-type doping is between 5E18 / cm 3 ~1E20 / cm 3 Between; the pixel size pitch and the longitudinal length can be designed and optimized according to system requirements, and the surface passivation layer can be an insulating substance compatible with the silicon process such as silicon dioxide or silicon nitride.

[0030] Figure 6 As shown, in Embodiment 4, a preparation process of a photoelectric and ray radiation linear silicon microstrip detector, the preparation process of the single pixel structure of the detector is as follows. Step 1: On a high-resistance N-type lightly doped (or P-type) semiconductor substrate (606), an N-type heavy doping (or P-type heavy doping) region (604) is formed by ion implantation, and a three-dimensional P-type heavy doping (603) and its arm structure (609) of the same doping type are formed through trench etching, epitaxial growth, ion implantation, etc. Step 2: The bottom of the semiconductor substrate (606) is an N-type heavy doping (or N-type heavy doping) region (607), and the pixel edge is composed of two upper and lower trench field plate structures of metal or doped polysilicon (610) and oxide (605). The N-type heavy doping region (607) of the detector pixel is led out through a metal electrode (608) and a high potential is applied; Step 3: The three-dimensional P-type heavy doping (603) and its arm structure (609) of the same doping type in the middle of the pixel are led out through a metal electrode (602) and a low potential is applied; in the trench field plate structure composed of metal or doped polysilicon (610) and oxide (605), the metal or doped polysilicon (610) is applied with a high potential. In specific applications, the electron carriers excited after photon incidence will drift towards the N-type heavy doping regions (604, 607), and the hole carriers excited will drift towards the P-type heavy doping regions (603, 609). Since the three-dimensional structure (609) of the arm in the detector is arranged in the middle position in the thickness direction, the drift distance of the photo-generated carriers can be reduced, and the probability of the carriers being trapped by internal defects or traps in the detector can be reduced. In addition, the metal or doped polysilicon (610) introduces a high electric field at the corner position of the field plate, and the applied potential can superimpose on the strong electric field, thereby promoting the drift motion of the carriers, improving the collection time of the carriers by the detector, and improving the overall detection efficiency.

[0031] Figure 6As shown, in Embodiment 4, the resistivity of the high-resistance N-type lightly doped region (606) is between 1000 and 20000 Ω·cm, and the thickness is between 100 and 500 um; the junction depth of the N-type heavily doped region (604) is between 0.3 and 1 um, and the doping surface peak concentration is between 5E18 / cm 3 ~1E20 / cm 3 Between them, the junction depth of the N-type heavily doped region (607) is between 0.3 and 1 um, and the doping surface peak concentration is between 5E18 / cm 3 ~1E20 / cm 3 Between them, the overall width of the trench field plate structure composed of metal or doped polysilicon (610) and oxide (605) is between 0.5 and 5 um, where the width of the oxide (605) is about between 0.1 and 3 um, and the metal or doped polysilicon (610) extends inward from the upper and lower surfaces by between 20 and 200 um, and the optimal depth is near one-fourth of the silicon wafer thickness. This trench field plate structure penetrates the silicon body. The three-dimensional P-type heavy doping (603) has a width between 0.1 and 5 um, the thickness of its spreading arm structure (609) of the same doping type is between 1 and 10 um, and the three-dimensional P-type doping peak concentration is between 5E18 / cm 3 ~1E20 / cm 3 Between them; the pixel size pitch and longitudinal length can be designed and optimized according to system requirements, and the surface passivation layer can be an insulating substance compatible with the silicon process such as silicon dioxide or silicon nitride.

[0032] Figure 7As shown in the figure, in Embodiment 5, a preparation process of a photoelectric and ray radiation linear silicon microstrip detector. The preparation process of the single-pixel structure of the detector is as follows: Step 1: On a high-resistance N-type lightly doped (or P-type) semiconductor substrate (706), an N-type heavily doped (or P-type heavily doped) region (704) is formed by ion implantation. A three-dimensional P-type heavily doped region (703) and its connected structure (709) of the same doping type are formed through trench etching, epitaxial growth, ion implantation, etc. Step 2: At the bottom of the semiconductor substrate (706) is an N-type heavily doped (or N-type heavily doped) region (707). The detector pixel N-type heavily doped regions (704, 707) are led out through metal electrodes (708) and a high potential is applied. Step 3: The three-dimensional P-type heavily doped region (703) in the middle of the pixel and its connected structure (709) of the same doping type are led out through metal electrodes (702) and a low potential is applied. In specific applications, the electron carriers excited after photon incidence will drift towards the N-type heavily doped regions (704, 707), and the hole carriers excited will drift towards the P-type heavily doped regions (703, 709). Since the connected three-dimensional structure (709) in the detector is arranged at the middle position in the thickness direction, the drift distance of the photo-generated carriers can be reduced, the probability of the carriers being trapped by internal defects or traps in the detector can be reduced, the collection time of the carriers by the detector can be improved, and the overall detection efficiency can be increased.

[0033] Figure 7 As shown in the figure, in Embodiment 5, the high-resistance N-type lightly doped region (706) has a resistivity between 1000 and 20000 Ω·cm and a thickness between 100 and 500 μm; the junction depth of the N-type heavily doped region (704) is between 0.3 and 1 μm, and the doping surface peak concentration is between 5E18 / cm 3 ~1E20 / cm 3 The junction depth of the N-type heavily doped region (707) is between 0.3 and 1 μm, and the doping surface peak concentration is between 5E18 / cm 3 ~1E20 / cm 3 The width of the three-dimensional P-type heavily doped region (703) is between 0.1 and 5 μm, the thickness of its connected structure (709) of the same doping type is between 1 and 10 μm, and the three-dimensional P-type doping peak concentration is between 5E18 / cm 3 ~1E20 / cm 3 The pixel size pitch and longitudinal length can be designed and optimized according to system requirements. The surface passivation layer (705) can be an insulating substance compatible with the silicon process such as silicon dioxide or silicon nitride.

[0034] Figure 8As shown in the figure, in Embodiment 6, a preparation process of a photoelectric and ray radiation linear silicon microstrip detector is provided. The preparation process of the single-pixel structure of the detector is as follows: Step 1: On a high-resistance N-type lightly doped (or P-type) semiconductor substrate (806), an N-type heavily doped (or P-type heavily doped) region (804) is formed by ion implantation. A three-dimensional P-type heavily doped region (803) and its connected structure (809) of the same doping type are formed through trench etching, epitaxial growth, ion implantation, etc., and a silicon dioxide or silicon nitride insulating isolation structure (810) between pixels; Step 2: At the bottom of the semiconductor substrate (806) is an N-type heavily doped (or N-type heavily doped) region (807). The N-type heavily doped regions (804, 807) of the detector pixels are led out through metal electrodes (808) and a high potential is applied; Step 3: The three-dimensional P-type heavily doped region (803) in the middle of the pixel and its connected structure (809) of the same doping type are led out through metal electrodes (802) and a low potential is applied. In specific applications, the electron carriers excited after the incident photons will drift towards the N-type heavily doped regions (804, 807), and the hole carriers excited will drift towards the P-type heavily doped regions (803, 809). Since the connected three-dimensional structure (809) in the detector is arranged at the middle position in the thickness direction, the drift distance of the photo-generated carriers can be reduced, the probability of the carriers being trapped by internal defects or traps in the detector can be reduced, the collection time of the carriers by the detector can be improved, and the overall detection efficiency can be enhanced.

[0035] Figure 8 As shown in the figure, in Embodiment 6, the high-resistance N-type lightly doped region (806) has a resistivity between 1000 and 20000 Ω·cm and a thickness between 100 and 500 um; the junction depth of the N-type heavily doped region (804) is between 0.3 and 1 um, and the doping surface peak concentration is between 5E18 / cm 3 ~1E20 / cm 3 The junction depth of the N-type heavily doped region (807) is between 0.3 and 1 um, and the doping surface peak concentration is between 5E18 / cm 3 ~1E20 / cm 3 The width of the silicon dioxide or silicon nitride insulating isolation structure (810) between pixels is about 0.5 to 10 um. The width of the three-dimensional P-type heavily doped region (803) is between 0.1 and 5 um, the thickness of its connected structure (809) of the same doping type is between 1 and 10 um, and the three-dimensional P-type doping peak concentration is between 5E18 / cm 3 ~1E20 / cm 3 The pixel size pitch and longitudinal length can be designed and optimized according to system requirements. The surface passivation layer (805) can be an insulating substance compatible with the silicon process such as silicon dioxide or silicon nitride.

[0036] Figure 9As shown in the figure, in Embodiment 7, a preparation process of an optoelectronic and radiation linear silicon microstrip detector. The preparation process of the single-pixel structure of the detector is as follows: Step 1: On a high-resistance N-type lightly doped (or P-type) semiconductor substrate (906), an N-type heavily doped (or P-type heavily doped) region (904) is formed by ion implantation. A three-dimensional P-type heavily doped region (903) and its co-doped type of extended fork arm structure (909), and a silicon dioxide or silicon nitride insulating isolation structure (910) between pixels are formed by means of trench etching, epitaxial growth, ion implantation, etc.; Step 2: At the bottom of the semiconductor substrate (906) is an N-type heavily doped (or N-type heavily doped) region (907). The N-type heavily doped regions (904, 907) of the detector pixels are led out through metal electrodes (908) and a high potential is applied; Step 3: The three-dimensional P-type heavily doped region (903) in the middle of the pixel and its co-doped type of extended fork arm structure (909) are led out through metal electrodes (902) and a low potential is applied. The electron carriers excited after the photons are incident will drift towards the N-type heavily doped regions (904, 907), and the hole carriers excited will drift towards the P-type heavily doped regions (903, 909). Since the connected three-dimensional structure (909) in the detector is arranged at the middle position in the thickness direction, the drift distance of the photo-generated carriers can be reduced, the probability of the carriers being trapped by internal defects or traps in the detector can be reduced, the collection time of the carriers by the detector can be improved, and the overall detection efficiency can be increased.

[0037] Figure 9 As shown in the figure, in Embodiment 7, the high-resistance N-type lightly doped region (906) has a resistivity between 1000 and 20000 Ω·cm and a thickness between 100 and 500 um; the junction depth of the N-type heavily doped region (904) is between 0.3 and 1 um, and the doping surface peak concentration is between 5E18 / cm 3 ~1E20 / cm 3 ; the junction depth of the N-type heavily doped region (907) is between 0.3 and 1 um, and the doping surface peak concentration is between 5E18 / cm 3 ~1E20 / cm 3 ; the width of the silicon dioxide or silicon nitride insulating isolation structure (910) between pixels is about between 0.5 and 10 um. The width of the three-dimensional P-type heavily doped region (903) is between 0.1 and 5 um, the thickness of its co-doped type of extended fork arm structure (909) is between 1 and 10 um, and the three-dimensional P-type doping peak concentration is between 5E18 / cm 3 ~1E20 / cm 3 ; the pixel size pitch and the longitudinal length can be designed and optimized according to system requirements, and the surface passivation layer (905) can be an insulating substance compatible with the silicon process such as silicon dioxide or silicon nitride.

[0038] The present invention can guide the drift motion of electron and hole carriers in the body of a silicon microstrip detector. Since the three-dimensional structure of the outstretched arm in the detector is arranged at the middle position in the thickness direction, it can reduce the drift travel of photo-generated carriers and the probability of carriers being trapped by internal defects or traps in the detector, thereby improving the collection time of carriers by the detector and enhancing the overall detection efficiency. The insulation isolation structure can separate the pixel structure and avoid charge crosstalk between pixels. In addition, the electrode of the metal oxide field plate in the isolation structure can be at a positive potential, thereby accelerating the collection of electron carriers. The potential control electrode structure in the insulation isolation layer can also be multiple independent separated parts, improving the electric field distribution inside the semiconductor substrate and thus accelerating the collection of electron carriers.

[0039] The foregoing has shown and described the basic principles, main features and advantages of the present invention. For those skilled in the art, it is obvious that the present invention is limited to the details of the above-described exemplary embodiments, and without departing from the spirit or basic characteristics of the present invention, the present invention can be implemented in other specific forms. Therefore, in any regard, the embodiments should be regarded as exemplary and non-limiting. The scope of the present invention is defined by the appended claims rather than the above description. Therefore, it is intended to embrace all changes that fall within the meaning and scope of the equivalent elements of the claims in the present invention.

[0040] In addition, it should be understood that although this specification is described according to embodiments, not every embodiment only contains an independent technical solution. This narrative way of the specification is only for clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in the embodiments can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A preparation process for an optoelectronic and ray radiation linear silicon microstrip detector, characterized in that the preparation process of the single-pixel structure of the detector is as follows. Step 1: On the upper surface of a high-resistance N-type lightly doped semiconductor substrate, an N-type heavily doped region is formed by ion implantation. Through trench etching, epitaxial growth, and ion implantation, a three-dimensional P-type heavily doped region and its extension arm structure of the same doping type are formed. The P-type heavily doped region is connected to the extension arm structure. The P-type heavily doped region extends along the thickness direction of the semiconductor substrate, and the extension arm structure extends along the length direction of the semiconductor substrate. Step 2: A three-dimensional N-type heavily doped region is formed at the pixel edge of the heavily doped region through trench etching, epitaxial growth, and ion implantation. The pixel N-type heavily doped region is led out through a metal electrode and a high potential is applied. Among them, the bottom of the semiconductor substrate is an N-type heavily doped region. Step 3: The three-dimensional P-type heavily doped region in the middle of the pixel and its extension arm structure of the same doping type are led out through a metal electrode and a low potential is applied. In specific applications, the electron carriers excited after the photons at the external detection point enter will drift towards the N-type heavily doped region, and the hole carriers excited will drift towards the P-type heavily doped region. The extension arm structure in the detector is arranged at the middle position in the thickness direction of the semiconductor substrate, which can reduce the drift distance of the photo-generated carriers and reduce the probability of the carriers being trapped by the internal defects or traps of the detector, thereby improving the collection time of the carriers by the detector and increasing the overall detection efficiency.

2. The preparation process for an optoelectronic and ray radiation linear silicon microstrip detector according to claim 1, characterized in that the high-resistance N-type lightly doped semiconductor substrate is replaced with a P-type lightly doped semiconductor substrate; the N-type heavily doped region is replaced with a P-type heavily doped region, and the P-type heavily doped region is replaced with an N-type heavily doped region.

3. The preparation process for an optoelectronic and ray radiation linear silicon microstrip detector according to claim 1, characterized in that The high-resistance N-type low-doping region in step 1 has a resistivity between 1000 and 20000Ω·cm and a thickness between 100 and 500um; the junction depth of the N-type heavily doped region is between 0.3 and 1um, and the peak concentration of the doped surface is 5E18 / cm 3 ~1E20 / cm 3 between.

4. The preparation process for an optoelectronic and ray radiation linear silicon microstrip detector according to claim 1, characterized in that The junction depth of the N-type heavily doped region in Step 1 is between 0.3 and 1 μm, and the peak surface doping concentration is between 5E18 / cm 3 and 1E20 / cm 3 ; the width of the N-type heavily doped region is between 0.1 and 5 μm, and the peak doping concentration is between 5E18 / cm 3 and 1E20 / cm 3 .

5. The preparation process for an optoelectronic and ray radiation linear silicon microstrip detector according to claim 1, characterized in that The width of the three-dimensional P-type heavily doped region in Step 1 is between 0.1 and 5 μm, the thickness of the outrigger structure with the same doping region type is between 1 and 10 μm, and the peak concentration of the three-dimensional P-type doping region is between 5E18 / cm 3 and 1E20 / cm 3 .

6. The preparation process for an optoelectronic and ray radiation linear silicon microstrip detector according to claim 1, characterized in that the pixel size pitch and longitudinal length in step 2 are designed and optimized according to system requirements, and the surface passivation layer uses an insulating substance compatible with the silicon process such as silicon dioxide or silicon nitride.

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