Analog Front-End Circuit with Dynamically Adjustable Gain

Abstract

An analog front-end circuit with dynamically adjustable gain, comprising a programmable gain amplifier circuit, a plurality of sensors, a calculation circuit, a gain coarse control circuit, a gain fine control circuit, and an analog-to-digital converter. The programmable gain amplifier circuit includes an amplifier, a gain coarse adjustment circuit, and a gain fine adjustment circuit. The gain coarse adjustment circuit is controlled by a coarse control signal and adjusts the gain in a coarse step according to an initial gain. The gain fine adjustment circuit is controlled by a fine control signal in a data mode to adjust the gain in a fine step. The calculation circuit calculates a main gain adjustment amount and a secondary gain adjustment amount. The gain coarse control circuit generates a coarse control signal according to the main gain adjustment amount, and the gain fine control circuit generates a fine control signal according to the secondary gain adjustment amount.

Description

Technical Field

[0001] The present invention relates to an analog front-end circuit, and particularly to an analog front-end circuit with dynamically adjustable gain that can avoid drastic changes in SNR caused by dynamic gain adjustment. Background Art

[0002] In an existing Analog Front-End (AFE) system, after receiving an input signal, the input signal is amplified or attenuated to optimize the Signal-Noise Ratio (SNR) of the signal, and at the same time, the phenomenon of clipping or saturation of the output signal is also avoided.

[0003] When the AFE system determines the initial gain according to the signal magnitude in the Hand-shake mode, the input signal is fixed to be amplified with the initial gain. At this time, if the AFE system is affected by temperature drift, resulting in a change in signal strength, it may further affect the SNR optimization of the entire AFE system, and even cause the output signal to generate clipping or saturation phenomena, resulting in a sharp drop in the SNR of the AFE system. Taking a communication system as an example, it may cause packet loss.

[0004] However, if the gain of the AFE system is arbitrarily adjusted during normal operation, various transient responses will be generated during the gain conversion process, causing the SNR to change instantaneously. For a communication system, it will cause immediate packet loss. Although the SNR can be optimized after the AFE system stabilizes, the transient response caused by switching the gain has already caused irreparable packet loss, and if the system gain is continuously adjusted dynamically, it will continue to cause packet loss.

[0005] Therefore, how to improve the gain adjustment mechanism to avoid drastic changes in the system SNR caused by dynamic gain adjustment and overcome the above-mentioned defects has become one of the important issues to be solved in this field. Summary of the Invention

[0006] The technical problem to be solved by the present invention is to provide an analog front-end circuit with dynamically adjustable gain that can avoid drastic changes in SNR caused by dynamic gain adjustment in view of the deficiencies of the prior art.

[0007] To solve the above technical problems, one of the technical solutions adopted by the present invention is to provide an analog front-end circuit with dynamically adjustable gain, which is applicable to receiving an input signal from a signal source. The analog front-end circuit includes a programmable gain amplifier circuit, a plurality of sensors, a calculation circuit, a gain coarse control circuit, a gain fine control circuit, and an analog-to-digital converter. A programmable gain amplifier circuit includes an amplifier, a gain coarse adjustment circuit, and a gain fine adjustment circuit. The amplifier is used to receive and amplify the input signal. The gain coarse adjustment circuit is connected to the amplifier and is configured to be controlled by a coarse control signal to adjust the gain of the programmable gain amplifier circuit at a coarse level interval according to an initial gain determined in a handshake mode. The gain fine adjustment circuit is connected to the amplifier and is configured to be controlled by a fine control signal in a data mode after the end of the handshake mode to adjust the gain of the programmable gain amplifier circuit at a fine level interval. The plurality of sensors are configured to respectively perform sensing in the data mode to generate a plurality of sensing signals. The calculation circuit is connected to the sensors and is configured to calculate a main gain adjustment amount according to the initial gain and calculate a secondary gain adjustment amount according to the sensing signals. The gain coarse control circuit is configured to generate the coarse control signal according to the main gain adjustment amount. The gain fine control circuit is configured to generate the fine control signal according to the secondary gain adjustment amount. The analog-to-digital converter is configured to perform analog-to-digital conversion on the amplified input signal to generate an output signal. Wherein, the coarse level interval is within a coarse adjustment range, the fine level interval is within a fine adjustment range, and the coarse adjustment range is greater than the fine adjustment range.

[0008] One of the beneficial effects of the present invention is that for the analog front-end circuit provided by the present invention, when the system has slight changes due to temperature drift, the calculation circuit can calculate the secondary gain adjustment amount according to the temperature change, and then can be adjusted through the gain fine adjustment circuit, and control its adjustment speed, which can greatly reduce the burden of the system under transient conditions while solving the temperature drift problem.

[0009] Furthermore, in the analog front-end circuit provided by the present invention, when the gain is adjusted by the gain fine control circuit along with the change of the system state, the gain switching is performed in a coding manner different from that of the gain coarse control circuit, which can limit the adjustment within a smaller range, and thus reduce the possibility of a drastic change in the system SNR during dynamic gain adjustment.

[0010] To enable a further understanding of the features and technical content of the present invention, please refer to the following detailed description and drawings of the present invention. However, the provided drawings are only for reference and illustration and are not used to limit the present invention. Description of the Drawings

[0011] Figure 1It is a functional block diagram of the analog front-end circuit according to the embodiment of the present invention.

[0012] Figures 2 to 5 They are respectively the first to fourth circuit layout diagrams of the programmable gain amplifier circuit according to the embodiment of the present invention.

[0013] Figure 6 It is a detailed block schematic diagram between the gain fine control circuit and the gain fine adjustment circuit according to the embodiment of the present invention.

[0014] Symbol Explanation

[0015] 1: Analog front-end circuit

[0016] 10: Programmable gain amplifier circuit

[0017] 12: Calculation circuit

[0018] 14: Coarse gain control circuit

[0019] 16: Fine gain control circuit

[0020] 18: Analog-to-digital converter

[0021] 20: Noise reduction circuit

[0022] 22: Switch driver

[0023] 100: Amplifier

[0024] 102: Coarse gain adjustment circuit

[0025] 104: Fine gain adjustment circuit

[0026] 11-1, 11-2,... 11-n: Sensors

[0027] CH: High-pass capacitor

[0028] CL: Low-pass capacitor

[0029] Cv1: First variable capacitor circuit

[0030] Cv2: Second variable capacitor circuit

[0031] Gi: Initial gain

[0032] Gp: Main gain adjustment amount

[0033] Gs: Secondary gain adjustment amount

[0034] HPF: High-pass filter

[0035] LPF: Low-pass filter

[0036] RH: High-pass resistor

[0037] RL: Low-pass resistance

[0038] Rv1: First variable resistance circuit

[0039] Rv2: Second variable resistance circuit

[0040] Rv3: Third variable resistance circuit

[0041] Rv4: Fourth variable resistance circuit

[0042] S01, S02, … S0n: Sensing signals

[0043] S1: Coarse control signal

[0044] S2: Fine control signal

[0045] S21, S22: Control signals

[0046] Sin: Input signal

[0047] Sin': Amplified input signal

[0048] Sout: Output signal

[0049] Ss: Signal source Detailed implementation manners

[0050] The following are specific embodiments to illustrate the implementation manners of the "analog front-end circuit with dynamically adjustable gain" disclosed in the present invention. Those skilled in the art can understand the advantages and effects of the present invention from the content disclosed in this specification. The present invention can be implemented or applied through other different specific embodiments, and various details in this specification can also be modified and changed based on different viewpoints and applications without departing from the concept of the present invention. Additionally, the drawings of the present invention are only for simple schematic illustration and are not drawn according to actual dimensions, which is stated in advance. The following implementation manners will further detail the related technical content of the present invention, but the disclosed content is not intended to limit the protection scope of the present invention. In addition, the term "or" used herein should, depending on the actual situation, possibly include any one or a combination of more of the associated listed items.

[0051] Refer to Figure 1 As shown, an embodiment of the present invention provides an analog front-end circuit 1 with dynamically adjustable gain, which is applicable to receiving an input signal Sin from a signal source Ss. The analog front-end circuit includes a programmable gain amplifier circuit 10, a plurality of sensors 11-1, 11-2, … 11-n, a calculation circuit 12, a gain coarse control circuit 14, a gain fine control circuit 16, and an analog-to-digital converter 18.

[0052] The programmable gain amplifier (PGA) circuit 10 is an amplifier with high versatility, and its amplification factor can be controlled as needed. The programmable gain amplifier circuit 10 includes an amplifier 100, a gain coarse adjustment circuit 102, and a gain fine adjustment circuit 104.

[0053] The amplifier 100 can be used to receive and amplify the input signal Sin, and can be, for example, an operational amplifier. The gain coarse adjustment circuit 102 is connected to the amplifier 100 and is configured to be controlled by a coarse control signal S1 to adjust the gain of the programmable gain amplifier circuit 10 in a coarse step according to an initial gain Gi determined in a hand-shaking mode.

[0054] On the other hand, the gain fine adjustment circuit 104 is connected to the amplifier 100 and is configured to be controlled by a fine control signal S2 in a data mode after the hand-shaking mode ends to adjust the gain of the programmable gain amplifier circuit 10 in a fine step.

[0055] For example, an electronic device including the programmable gain amplifier circuit 10 can perform a hand-shaking mode with an electronic device including a signal source Ss in advance, determine the initial gain to be used by detecting the signal magnitudes of each other, and then enter the data mode to transmit data accordingly.

[0056] However, if the state of the AFE system changes, for example, affected by temperature drift, resulting in a change in signal strength, at this time, the present invention configures a plurality of sensors 11-1, 11-2,... 11-n to perform sensing respectively in the data mode, and generates a plurality of sensing signals S01, S02,... S0n according to the sensing results. For example, the sensors 11-1, 11-2,... 11-n can include a temperature sensor for sensing the system temperature.

[0057] The calculation circuit 12 is connected to sensors 11-1, 11-2, … 11-n, and is configured to calculate a primary gain adjustment amount Gp based on an initial gain Gi, and calculate a secondary gain adjustment amount Gs based on sensing signals S01, S02, … S0n. Specifically, both the gain coarse adjustment circuit 102 and the gain fine adjustment circuit 104 of the present invention have a gain adjustment mechanism. The difference is that the gain coarse adjustment circuit 102 bears most of the gain range, and the gain fine adjustment circuit 104 is responsible for a small part of the gain range. In other words, the coarse step can be within a coarse adjustment range, the fine step can be within a fine adjustment range, and the coarse adjustment range is larger than the fine adjustment range. Therefore, when the system has a slight change due to temperature drift, the calculation circuit 12 can calculate the secondary gain adjustment amount Gs according to the temperature change, and then can be adjusted by the gain fine adjustment circuit 104, and control its adjustment speed, which can greatly reduce the burden of the system under transient conditions while solving the temperature drift problem.

[0058] Continuing, the gain coarse control circuit 14 is configured to generate a coarse control signal S1 based on the primary gain adjustment amount Gp, and the gain fine control circuit is configured to generate a fine control signal S2 based on the secondary gain adjustment amount Gs, so that the programmable gain amplifier circuit 10 outputs an amplified input signal Sin'.

[0059] The analog-to-digital converter 18 then performs analog-to-digital conversion on the amplified input signal Sin' to generate an output signal Sout.

[0060] Reference can be further made to Figures 2 to 5 , which are the first to fourth circuit layout diagrams of the programmable gain amplifier circuit according to the embodiments of the present invention. As Figure 2 shown, the programmable gain amplifier circuit 10 may further include a low-pass filter LPF and a high-pass filter HPF. The low-pass filter is connected between the first input terminal (such as the negative input terminal shown in Figure 2 ) and the output terminal of the amplifier 100, and the high-pass filter HPF is connected to the first input terminal (such as the negative input terminal shown in Figure 2 ) of the amplifier 100. The second input terminal (such as the positive input terminal shown in Figure 2 ) of the amplifier 100 is grounded.

[0061] In Figure 2In the embodiment, the low-pass filter LPF may include a first variable resistor circuit Rv1, a second variable resistor circuit Rv2, and a low-pass capacitor CL, and the high-pass filter HPF includes a high-pass resistor RH and a high-pass capacitor CH. It should be noted that the gain coarse adjustment circuit 102 may be the first variable resistor circuit Rv1 in the low-pass filter LPF, the gain fine adjustment circuit 104 is the second variable resistor circuit Rv2 in the low-pass filter LPF, and the first variable resistor circuit Rv1 and the second variable resistor circuit Rv2 are respectively controlled by the aforementioned coarse control signal S1 and fine control signal S2, and the first variable resistor circuit Rv1 and the second variable resistor circuit Rv2 are in series. Therefore, by controlling the resistance value of the second variable resistor circuit Rv2 with the fine control signal S2, the resistance value of the low-pass filter LPF located on the negative feedback path of the amplifier 100 can be controlled, thereby adjusting the gain of the programmable gain amplifier circuit 10.

[0062] In Figure 3 the embodiment, the architecture of the programmable gain amplifier circuit 10 is basically the same as Figure 2 that shown, except that the first variable resistor circuit Rv1 and the second variable resistor circuit Rv2 are in parallel. Therefore, by controlling the resistance value of the second variable resistor circuit Rv2 with the fine control signal S2, the resistance value of the low-pass filter LPF located on the negative feedback path of the amplifier 100 can be controlled, thereby adjusting the gain of the programmable gain amplifier circuit 10.

[0063] As Figure 4 shown, the programmable gain amplifier circuit 10 also includes a low-pass filter LPF and a high-pass filter HPF. The low-pass filter is connected between the first input terminal (such as Figure 2 the negative input terminal shown) of the amplifier 100 and the output terminal, and the high-pass filter HPF is connected to the first input terminal (such as Figure 2 the negative input terminal shown) of the amplifier 100.

[0064] In Figure 4 the embodiment, the low-pass filter LPF may include a low-pass resistor RL and a low-pass capacitor CL, and the high-pass filter HPF includes a first variable capacitor circuit Cv1, a second variable capacitor circuit Cv2, and a high-pass resistor RH. It should be noted that the gain coarse adjustment circuit 102 may be the first variable capacitor circuit Cv1 in the high-pass filter HPF, the gain fine adjustment circuit 104 may be the second variable capacitor circuit Cv2 in the high-pass filter HPF, and the first variable capacitor circuit Cv1 and the second variable capacitor circuit Cv2 are respectively controlled by the aforementioned coarse control signal S1 and fine control signal S2. Therefore, the capacitance value of the high-pass filter HPF of the amplifier 100 can be controlled by the fine control signal S2, thereby adjusting the gain of the programmable gain amplifier circuit 10.

[0065] In Figure 5 the embodiment of, the architecture of the programmable gain amplifier circuit 10 is substantially the same as that Figure 4 shown, except that the high-pass filter HPF includes a third variable resistance circuit Rv3, a fourth variable resistance circuit Rv4, and a high-pass capacitor CH. In this embodiment, the gain coarse adjustment circuit 102 is the third variable resistance circuit Rv3 in the high-pass filter HPF, and the gain fine adjustment circuit 104 is the fourth variable resistance circuit Rv4 in the high-pass filter HPF.

[0066] It should be noted that the variable resistance circuit and the variable capacitance circuit serving as the gain coarse adjustment circuit 102 and the gain fine adjustment circuit 104 may include a plurality of switching elements, thereby switching the overall resistance value of the variable resistance circuit or the overall capacitance value of the variable capacitance circuit, and these switching elements can be controlled in binary.

[0067] For example, when both the gain coarse control circuit 14 and the gain fine control circuit 16 use binary to generate the coarse control signal S1 and the fine control signal S2, taking Figure 4 adjusting the capacitance value of the high-pass filter HPF as an example, the capacitance value ratios to be switched are arranged as follows:

[0068] Set the gain coarse control circuit 14 to be able to switch 5B, corresponding to 512:256:128:64:32;

[0069] Set the gain fine control circuit 16 to be able to switch 6b, corresponding to 64:32:16:8:4:2;

[0070] Therefore, the total capacitance value that the gain coarse control circuit 14 can switch is:

[0071] 512 + 256 + 128 + 64 + 32 = 992, that is, 992 units.

[0072] On the other hand, the total capacitance value that the gain fine control circuit 16 can switch is:

[0073] 64 + 32 + 16 + 8 + 4 + 2 = 126, that is, 126 units.

[0074] Therefore, the aforementioned coarse adjustment range is 992 units, and the coarse step size is within 992 units. On the other hand, the fine step size is within the fine adjustment range, that is, 126 units, and the coarse adjustment range (992) is greater than the fine adjustment range (126). When switching, the maximum fine step size (i.e., the capacitance value that can be switched) that the gain fine control circuit 16 can instantaneously switch can be switched from 011111 to 100000, with a total of 126 units that can be switched. Therefore, since the gain fine control circuit 16 adjusts the gain according to the system state change, the adjustment can be restricted within a smaller range, which can reduce the possibility of a drastic change in the system SNR during dynamic gain adjustment.

[0075] In other embodiments, the gain coarse control circuit 14 and the gain fine control circuit 16 can also be encoded in different ways. For example, the gain fine control circuit 16 can use thermometer code.

[0076] Similarly, in this case, the capacitance values to be switched are arranged as follows:

[0077] Set that the gain coarse control circuit 14 can switch 5B, corresponding to 512:256:128:64:32;

[0078] Set that the gain fine control circuit 16 can switch 64T, corresponding to 2*63;

[0079] Therefore, the total capacitance value that the gain coarse control circuit 14 can switch is:

[0080] 512 + 256 + 128 + 64 + 32 = 992, that is, 992 units.

[0081] On the other hand, the total capacitance value that the gain fine control circuit 16 can switch is:

[0082] 2*63 = 126, that is, 126 units.

[0083] However, when using thermometer code, the gain fine control circuit 16 only allows a maximum adjustment limit, for example, 2 units, within one adjustment cycle (e.g., when the system clock is incremented by 1). Therefore, each change can be made smaller, reducing the instantaneous burden on the system and further reducing the probability of a drastic change in SNR.

[0084] It should be noted that although binary system and thermometer code are used in the above embodiments, the present invention is not limited thereto, and Gray Code can also be used to adjust the gain in a similar manner.

[0085] In addition to the above encoding method, the impact on the system caused by switching the gain can also be reduced through circuit planarization technology. Further reference can be made to Figure 6 , which is a detailed block diagram showing the details between the gain fine control circuit and the gain fine adjustment circuit according to an embodiment of the present invention. As shown in the figure, the analog front-end circuit 1 may further include a noise removal circuit 20 and a switch driver 22.

[0086] The noise removal circuit 20 is connected between the gain fine adjustment circuit 104 and the gain fine control circuit 16, and is configured to remove the noise of the fine control signal S2. For example, the noise removal circuit 20 may be a D-type flip-flop (DFF), which can align the fine control signal S2 according to the system clock, eliminate the possible noise, and enable the subsequent analog-to-digital converter 18 to sample at the optimal position during analog-to-digital conversion.

[0087] On the other hand, the switch driver 22 may be connected between the gain fine adjustment circuit 104 and the gain fine control circuit 16, and is configured to generate a set of fine control signals according to the fine control signal S2, including a plurality of control signals S21, S22,.... Here, in addition to coordinating the control signals S21, S22,... so that the corresponding switching elements in the gain fine adjustment circuit 104 are not mis-conducted during the switching process, the switch driver 22 can also prevent the ground terminal in the gain fine adjustment circuit 104 from being simultaneously conducted with the first input terminal (i.e., the negative input terminal) of the amplifier 100, causing a short circuit.

[0088] It should be noted that the noise removal circuit 20 and the switch driver 22 can be used simultaneously, or as Figure 6 shown, only one of them is used, but the present invention is not limited thereto. Furthermore, the computing circuit 12, the gain coarse control circuit 14, the gain fine control circuit 16, and the switch driver 22 mentioned in the foregoing embodiments can all be implemented by one or more processing units, microcontrollers, microprocessors, and / or digital signal processors, and all the above circuits can be implemented in the form of hardware, software, or firmware.

[0089] [Advantages of the Embodiment]

[0090] One of the advantages of the present invention is that for the analog front-end circuit provided by the present invention, when the system has some slight changes due to temperature drift, the computing circuit can calculate the secondary gain adjustment amount according to the temperature change, and then can be adjusted through the gain fine adjustment circuit, and control its adjustment speed, which can greatly reduce the burden of the system under transient conditions while solving the temperature drift problem.

[0091] Furthermore, in the analog front-end circuit provided by the present invention, when the gain is adjusted by the gain fine control circuit according to the change of the system state, the gain switching is performed in a coding manner different from that of the gain coarse control circuit, which can limit the adjustment within a smaller range, thereby reducing the possibility of drastic changes in the system SNR during dynamic gain adjustment.

[0092] The above-disclosed content is only the preferred feasible embodiment of the present invention, and does not limit the claims of the present invention. Therefore, all equivalent technical changes made by using the content of the specification and drawings of the present invention are included in the claims of the present invention.

Claims

1. An analog front-end circuit with dynamically adjustable gain, suitable for receiving an input signal from a signal source. The analog front-end circuit includes: A programmable gain amplifier circuit, including: An amplifier for receiving and amplifying the input signal; A gain coarse adjustment circuit connected to the amplifier, configured to be controlled by a coarse control signal, and adjust the gain of the programmable gain amplifier circuit in a coarse step according to an initial gain determined in a handshaking mode with the signal source; and A gain fine adjustment circuit connected to the amplifier, configured to be controlled by a fine control signal in a data mode after the handshaking mode ends, and adjust the gain of the programmable gain amplifier circuit in a fine step to transmit data in the data mode; a plurality of sensors configured to respectively perform sensing to generate a plurality of sensing signals in the data mode; A calculation circuit connected to the sensors, configured to calculate a main gain adjustment amount according to the initial gain and a secondary gain adjustment amount according to the sensing signals; A gain coarse control circuit configured to generate the coarse control signal according to the main gain adjustment amount; A gain fine control circuit configured to generate the fine control signal according to the secondary gain adjustment amount; and An analog-to-digital converter configured to perform analog-to-digital conversion on the amplified input signal to generate an output signal, wherein the coarse step is within a coarse adjustment range, the fine step is within a fine adjustment range, and the coarse adjustment range is greater than the fine adjustment range.

2. The analog front-end circuit according to claim 1, wherein the gain fine control circuit uses thermometer coding to generate the fine control signal to control the fine step of the gain fine adjustment circuit.

3. The analog front-end circuit according to claim 2, wherein when the gain fine adjustment circuit adjusts the gain of the programmable gain amplifier circuit in the fine step, the gain fine adjustment circuit has a maximum adjustment amount limit in an adjustment cycle.

4. The analog front-end circuit according to claim 1, wherein the programmable gain amplifier circuit includes: A low-pass filter connected between a first input terminal and an output terminal of the amplifier; And A high-pass filter connected to the first input terminal of the amplifier.

5. The analog front-end circuit according to claim 4, wherein the gain coarse adjustment circuit is a first variable resistance circuit of the low-pass filter, and the gain fine adjustment circuit is a second variable resistance circuit of the low-pass filter.

6. The analog front-end circuit according to claim 4, wherein the gain coarse adjustment circuit is a first variable capacitance circuit of the high-pass filter, and the gain fine adjustment circuit is a second variable capacitance circuit of the high-pass filter.

7. The analog front-end circuit according to claim 4, wherein the gain coarse adjustment circuit is a third variable resistance circuit of the high-pass filter, and the gain fine adjustment circuit is a fourth variable resistance circuit of the high-pass filter.

8. The analog front-end circuit according to claim 1, wherein the sensor includes a temperature sensor configured to sense a system temperature, and the calculation circuit calculates the secondary gain adjustment amount based on the system temperature.

9. The analog front-end circuit according to claim 1, further comprising a noise removal circuit connected between the gain fine adjustment circuit and the gain fine control circuit and configured to remove the noise of the fine control signal.

10. The analog front-end circuit according to claim 1, wherein the gain fine adjustment circuit includes a plurality of switching elements, and the analog front-end circuit further includes a switch driver connected between the gain fine adjustment circuit and the gain fine control circuit and configured to generate a set of fine control signals based on the fine control signal.

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