Computer-readable storage medium, virtualized register device and method of accessing the device

Abstract

The present application relates to a computer readable storage medium, a virtualized register device and a method for accessing the device, the virtualized register device comprising: a register space, which is divided into a plurality of physical blocks, wherein each physical block comprises a plurality of register groups, and each register group comprises a plurality of registers; and an address decoder, which receives an address of a selected register group from a processing unit to activate the selected register group, wherein the register group is selected by the processing unit according to a virtual device which is about to send a request, from the plurality of physical blocks, a physical block corresponding to the virtual device, and according to information of the virtual device, one register group from a plurality of register groups in the determined physical block. The present application changes the access path by the above-mentioned division of register groups and dynamic execution of block selection and group selection, without the need to save and restore data previously stored in the registers, thereby improving the efficiency of register access.

Description

[0001] This application is a divisional application of Chinese Patent Application No. 202011611273.1, filed on December 30, 2020, entitled "Computer-readable storage medium, virtualized register device and method for accessing the device". Technical Field

[0002] This invention relates to registers, and more particularly to a computer-readable storage medium, a virtualized register device, and a method for accessing the device. Background Technology

[0003] In a virtualized environment, register virtualization is crucial. Each virtual machine user can access the registers of their own virtual device, making it appear as if the entire physical device is occupied by that virtual machine. For devices that support virtualization, it is necessary to ensure the isolation and efficiency of register access, while also minimizing the complexity of hardware design and resource consumption.

[0004] Traditionally, in some implementations, hardware can allocate a separate register space for each virtual machine user. However, physical register hardware resources are very large, requiring a significant amount of hardware interface space, and the required physical hardware resources increase with the number of supported virtual devices, sometimes becoming so large as to be difficult to implement.

[0005] In other implementations, the hardware may include an arbiter to allow all virtual machine users to access the complete registers in a time-sharing manner, achieving register virtualization. However, before each virtual machine user can access a register, the arbiter needs to save the register contents of the previous virtual machine user and then write the saved contents back to the register hardware before the next virtual machine user switches back. In other words, the arbiter needs to perform a save and restore process for each virtual machine user switch, which is costly. When there are many virtual devices, the save and restore time becomes very long, significantly impacting the efficiency of device virtualization.

[0006] In order to solve or reduce the technical problems of the embodiments described above, the present invention provides a computer-readable storage medium, a virtualized register device, and a method for accessing the device. Summary of the Invention

[0007] This invention relates to a virtualized register device, comprising: a register space divided into multiple physical blocks, wherein each physical block contains multiple register groups, and each register group contains multiple registers; and an address decoder that receives from a processing unit the address of a register group selected by the processing unit to activate the selected register group, wherein the register group is selected by the processing unit from the multiple physical blocks according to a virtual device that is about to make a request, and from the multiple register groups in the determined physical block according to information of the virtual device.

[0008] The present invention also relates to a method for accessing a virtualized register device, implemented by a processing unit when loading and executing computer code of a virtual device, the virtualized register device including a register space, an address decoder, and read / write circuitry, the register space comprising a plurality of physical blocks. The method includes: determining a virtual device from the plurality of physical blocks; selecting one of a plurality of register groups within the determined physical block based on information about the virtual device that will issue a request or the function performed by the virtual device; sending the address of the selected register group within the determined physical block to the address decoder for activating the selected register group; and sending a request to the read / write circuitry for accessing the activated register group, reading data from the register, or writing data to the register.

[0009] The present invention also relates to a computer-readable storage medium for storing computer code executable by a processing unit, and for implementing, when the computer code is executed by the processing unit, a method for accessing virtualized register devices as described above.

[0010] One of the advantages of the above embodiments is that by dividing the register group as described above, and changing the access path through dynamic execution block selection and group selection, it is not necessary to save and restore the data previously stored in the register, thereby improving the efficiency of register access.

[0011] Another advantage of the above embodiments is that it is not necessary to reserve more registers than actually needed in order to support more virtual machines, thus saving hardware costs.

[0012] Other advantages of the present invention will be explained in more detail below with reference to the accompanying drawings. Attached Figure Description

[0013] The accompanying drawings, which are provided to further understand this application and constitute a part of this application, illustrate exemplary embodiments of this application and are used to explain this application, but do not constitute an undue limitation of this application.

[0014] Figure 1 This is a block diagram of an electronic device according to an embodiment of the present invention.

[0015] Figure 2 This is a block diagram of a virtual device and a virtualized register apparatus operating according to an embodiment of the present invention.

[0016] Figure 3 This is an example of register group partitioning according to an embodiment of the present invention.

[0017] Figure 4 This is a flowchart of a method for accessing a virtualized register device according to an embodiment of the present invention.

[0018] Figure 5 This is a block diagram of a virtual device and a virtualized register apparatus operating according to an embodiment of the present invention.

[0019] Figure 6 This is a flowchart of a method for accessing a virtualized register device according to an embodiment of the present invention.

[0020] The symbols in the attached diagram are briefly explained as follows:

[0021] 10: Electronic device; 110: Processing unit; 130: Virtualized register device; 150: Instruction cache; 170: Instruction scheduler; 212, 214: Virtual machine; 232, 234: Virtual device; 250: Register space; 252, 254: Physical block; 252-1~252-4, 254-1~254-4: Register group; 272: Block selector; 274, 276: Group selector; 290: Read / write circuit; 310-1~310-1024: Register; S410~S440: Method steps; 530: Virtualized register device; 532: Address decoder; S610~S640: Method steps. Detailed Implementation

[0022] The embodiments of the present invention will be described below with reference to the accompanying drawings. In these drawings, the same reference numerals denote the same or similar components or method flows.

[0023] It must be understood that the words “comprising” and “including” used in this specification are used to indicate the presence of specific technical features, values, method steps, work processes, components and / or components, but do not preclude the addition of more technical features, values, method steps, work processes, components, components, or any combination thereof.

[0024] In this invention, terms such as "first," "second," and "third" are used to modify components in the claims and are not intended to indicate a priority order, a precedence relationship, or that one component precedes another, or the chronological order of the execution of method steps. They are only used to distinguish components with the same name.

[0025] It's important to understand that when a component is described as "connected" or "coupled" to another component, it can be a direct connection or coupling to other components, and there may be intermediate components. Conversely, when a component is described as "directly connected" or "directly coupled" to another component, there are no intermediate components. Other words used to describe the relationship between components can be interpreted in a similar way, such as "between" versus "directly between," or "adjacent" versus "directly adjacent," and so on.

[0026] refer to Figure 1Electronic device 10 can be implemented in electronic products such as mainframes, workstations, personal computers, laptop PCs, tablet computers, mobile phones, digital cameras, and digital camcorders. Electronic device 10 includes at least a processing unit 110, a virtualization register device 130, an instruction cache 150, and an instruction scheduler 170, and they are interconnected via physical lines to transmit data, addresses, control signals, etc. The instruction cache 150 stores multiple instructions for multiple virtual machines or virtual devices, while the instruction scheduler 170 fetches instructions to be executed from the instruction cache 150 for each virtual machine or virtual device based on the program counter (PC). The instruction scheduler 170 may include a program counter register to record the location (i.e., the instruction address) of the currently executing instruction. The program counter is incremented by one each time an instruction is fetched from the instruction cache 150. The instruction scheduler 170 delivers instructions to the processing unit 110 for execution at appropriate times. Processing unit 110 can load and execute computer code corresponding to different virtual machines or virtual devices. A virtual machine is a computer system simulated by software, possessing complete hardware functionality and running in an environment completely isolated from other virtual machines. Different virtual machines can run different operating systems, such as Linux and Red Hat, and are physically isolated from each other. This means that data, tables, variables, and execution results within a virtual machine cannot be accessed by any other virtual machine. A virtual machine can provide the functionality of multiple virtual devices, such as data computation, address translation, video processing, audio processing, and wired and wireless data transmission. Processing unit 110 may include an arithmetic logic unit to perform various operations on a virtual device, such as integer and floating-point addition and multiplication, comparison operations, Boolean operations, bit shifting, and algebraic functions (such as plane interpolation, trigonometric functions, exponential functions, and logarithmic functions). Furthermore, processing unit 110 can also perform data transfer between different components of a virtual device. During execution, the processing unit 110 can read data from the virtualization register device 130 and write back the execution results to the virtualization register device 130.

[0027] refer to Figure 2For example, processing unit 110 can execute computer instructions corresponding to two virtual machines 212 and 214, which provide the functions of virtual devices 232 and 234, respectively. During execution, virtual devices 232 and 234 need to write data to and read data from virtualization register device 130. Virtualization register device 130 includes register space 250 for storing data accessed by different virtual devices during execution. Register space 250 can be divided into multiple non-overlapping physical blocks 252 and 254, and each physical block is allocated to a specific virtual machine. For example, physical block 252 is allocated to virtual machine 212, and physical block 254 is allocated to virtual machine 214. In other words, only virtual device 232 or other virtual devices executing in virtual machine 212 can access the registers in physical block 252, while virtual device 234 or other virtual devices executing in virtual machine 214 cannot access the registers in physical block 252. Each physical block can contain multiple register groups. For example, physical block 252 contains four register groups 252-1 to 252-4, and physical block 254 contains four register groups 254-1 to 254-4. The register groups can be defined by the user, either according to their type (e.g., for data transfer, device attribute waiting, etc.) or their function (e.g., for video processing, address translation, data calculation, etc.). For virtual devices implementing the same function, the registers within each register group are identical, ensuring that the implemented virtual devices are all the same. Alternatively, registers can be divided according to their represented functions, so that one register group can represent the function of a virtual device.

[0028] These register groups can be assigned to different virtual devices, or to different functions executed within different virtual devices. For example, three virtual devices execute on virtual machine 212: a virtual Wi-Fi communication device, a virtual display, and a virtual video decoder. The virtual video decoder provides video and audio decoding functions. Register group 252-1 can be assigned to the virtual Wi-Fi communication device executing on virtual machine 212, and register group 252-2 can be assigned to the virtual display executing on virtual machine 212. Additionally, register groups 252-3 and 252-4 can be assigned to the video and audio decoding functions provided by the virtual video decoder executing on virtual machine 212, respectively. Although Figure 2 The example described is of dividing register space 250 into two physical blocks, but those skilled in the art can divide register space 250 into more physical blocks as needed to support a greater number of virtual machines, and the invention is not limited thereto. Although Figure 2Examples of physical blocks 252 and 254 of the same size are described in the description, but those skilled in the art can make the size of the physical blocks different according to the needs of the system to meet the different needs of the virtual machine, and the present invention is not limited thereto.

[0029] Each register group may contain multiple registers. In some embodiments, the number of registers in different register groups is the same, ensuring that each virtual device or function within a virtual device has the same register resources. (See reference) Figure 3 Each register set contains 1024 registers. For example, register set 252-1 contains registers 300-1 to 300-1024, each of which can store 32 bits (4 bytes) of data, allowing register set 252-1 to store 4KB of data. Although Figure 3 The example described herein contains 1024 registers per register group. Those skilled in the art can set more or fewer registers in each register group according to the needs of the system, and the invention is not limited thereto. For example, each register group may contain 2048, 512, or 256 registers, allowing each register group to store 8KB, 2KB, or 1KB of data.

[0030] In other embodiments, the number of registers in different register groups varies according to user needs, ensuring on-demand allocation and reflecting flexibility. For example, register groups 252-1, 252-2, 252-3, and 252-4 contain 1024, 512, 2048, and 512 registers, respectively.

[0031] Reference Figure 2The virtualization register device 130 includes a block selector 272 and two group selectors 274 and 276, used to set access paths based on control signals received from the processing unit 110, wherein the control signals correspond to a specific virtual device or a specific function executed within a specific virtual device. Block selector 272 is coupled to group selectors 274 and 276; group selector 274 is coupled to register groups 252-1 to 252-4; and group selector 276 is coupled to register groups 254-1 to 254-4. Block selector 272 enables group selector 274 or 276 based on control signals received from the processing unit 110, wherein the control signals correspond to virtual machine instructions. Those skilled in the art will understand that virtual machine instructions are translated into an operation on a specific virtual device. Group selector 274 activates one of register groups 252-1 to 252-4 based on a control signal received from processing unit 110, and group selector 276 activates one of register groups 254-1 to 254-4 based on a control signal received from processing unit 110, wherein the control signal corresponds to a specific virtual device or a specific function executed within a specific virtual device. The virtualized register device 130 also includes read / write circuitry 290 for reading data from or writing data to registers specified by an access path. Specifically, when the virtualized register device 130 receives a register request from virtual device 232 or 234, read / write circuitry 290 accesses registers in the access path set by block selector 272, group selectors 274 and 276.

[0032] The logic described above, such as the partitioning of register space 250 and the allocation of register groups in each physical block, can be recorded in the computer code of virtual devices 232 and 234. When these logics are loaded and executed by processing unit 110, they are used to control block selector 272 and group selector 274 and 276 in virtualized register device 130 to dynamically set access paths.

[0033] Matching suggestions Figure 4 The method for accessing the virtualized register device 130, as shown, is implemented by the processing unit 110 when it loads and executes the computer code of the virtual device 232 or 234, and includes the following steps:

[0034] Step S410: A control block selector is used to initiate one of a plurality of group selectors corresponding to a virtual machine instruction. Those skilled in the art will understand that virtual machine instructions are translated into an operation on a specific virtual device. For example, when virtual device 212 is about to issue a request, control block selector 272 initiates group selector 274.

[0035] Step S420: Based on the information of the virtual device (or the function performed by the virtual device) that is about to make a request, control the already started group selector to start one of the multiple register groups. For example, when the virtual device (hereinafter assumed to be a virtual Wi-Fi communication device) 232 running on virtual machine 212 is about to make a request, control the group selector 274 to start register group 252-1.

[0036] Step S430: A request is sent to the read / write circuit 290 to access the already activated register set, read data from a specified register, or write data to a specified register. The request may include the type (e.g., read, write, delete), offset, and the data to be written. For example, the virtual Wi-Fi communication device 232 running on virtual machine 212 sends a request to the read / write circuit 290, requesting to read data from the address with offset "100". The read / write circuit 290 reads data from registers 310-100 and replies to the virtual Wi-Fi communication device 232.

[0037] Step S440: Determine whether the virtual device (or the function performed by the virtual device) has completed the register access. If yes, the process continues to step S410. Otherwise, the process continues to step S430.

[0038] The method described above includes an accelerated access mechanism. The virtualized register device 130 can ensure that the access path of the registers remains unchanged after the register group is started, until the next start of the register group changes. Thus, when a virtual device (or a specific function performed by a virtual device) accesses the same register group for a period of time, the virtualized register device 130 does not need to perform any access path changes. In other words, before a virtual device (or a specific function performed by a virtual device) completes the pre-set access to the already started register group, the block selector 272 and group selectors 274 and 276 are not controlled to change the access path, reducing the time overhead of the entire access process and thus improving access efficiency.

[0039] Figure 2 The functions of block selector 272, group selector 274, and 276 shown can also be implemented using software. (See reference) Figure 5 The virtualized register device 530 shown in other embodiments includes an address decoder 532 for activating one of a plurality of register groups 252-1 to 254-4 based on an address transmitted by virtual device 232 or 234.

[0040] In response Figure 5 The virtualized register device 530 shown is configured in conjunction with reference to... Figure 6 The method for accessing the virtualized register device 530, as shown, is implemented by the processing unit 110 when it loads and executes the computer code of the virtual device 232 or 234, and includes the following steps:

[0041] Step S610: Select the physical block corresponding to the virtual device from a plurality of physical blocks. For example, physical block 252 is selected when virtual device 232 is about to make a request.

[0042] Step S620: Select one of the multiple register groups in the physical block based on the information of the virtual device (or the function performed by the virtual device) that is about to make a request. For example, when the virtual device (hereinafter assumed to be a virtual Wi-Fi communication device) 232 running on virtual machine 212 is about to make a request, register group 252-1 in physical block 252 is selected.

[0043] Step S630: Send the address corresponding to the selection register group in the physical block to the address decoder 532 to start the selected register group.

[0044] Step S640: Send a request to the read / write circuit 290 to access the activated register group, read data from the specified register, or write data to the specified register. The detailed technical content of this step is similar to that of step S430; those skilled in the art can refer to the description of step S430, which will not be repeated here for the sake of brevity.

[0045] One of the advantages of the above embodiments is that by dividing the register group as described above, and changing the access path through dynamic execution block selection and group selection, it is not necessary to save and restore the data previously stored in the register, thereby improving the efficiency of register access.

[0046] Another advantage of the above embodiments is that it is not necessary to reserve more registers than actually needed in order to support more virtual machines, thus saving hardware costs.

[0047] All or part of the steps in the method described in this invention can be implemented by a computer program, such as any combination of application programs, drivers, and operating systems. Furthermore, it can also be implemented in other types of programs as shown above. Those skilled in the art can write the methods of the embodiments of this invention into computer code, which will not be described further for the sake of brevity. The computer program implementing the method according to the embodiments of this invention can be stored on a suitable computer-readable storage medium, such as a DVD, CD-ROM, USB flash drive, or hard disk, or placed on a network server accessible via a network (e.g., the Internet, or other suitable media).

[0048] Although Figure 1 , Figure 2 , Figure 5It includes the components described above, but does not preclude the use of other additional components to achieve better technical results without violating the spirit of the invention. Furthermore, although... Figure 4 , Figure 6 The flowchart describes the steps in a specified order. However, those skilled in the art can modify the order of these steps to achieve the same effect without violating the spirit of the invention. Therefore, this invention is not limited to using only the order described above. Furthermore, those skilled in the art can integrate several steps into one step, or perform more steps sequentially or in parallel, in addition to these steps, and this invention should not be limited thereto.

[0049] The above description is only a preferred embodiment of the present invention, but it is not intended to limit the scope of the present invention. Any person skilled in the art can make further improvements and changes on this basis without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the scope defined in the claims of this application.

Claims

1. A virtualized register device, characterized in that, include: The register space is divided into multiple physical blocks, each physical block containing multiple register groups, each register group containing multiple registers, and each physical block is assigned to a specific virtual machine, and only the virtual device executing in the specific virtual machine can access the registers in the physical block; as well as An address decoder receives the address of a register group selected by a processing unit connected to the virtualization register device to start the selected register group, wherein the register group is selected by the processing unit from a plurality of physical blocks according to a virtual device running on the processing unit that is about to issue a request, and from a plurality of register groups in the determined physical block according to information of the virtual device.

2. The virtualized register device as described in claim 1, characterized in that, The multiple physical blocks do not overlap.

3. The virtualized register device as described in claim 1, characterized in that, Also includes: The read / write circuitry is used to access the already activated register set, read data from a specified register, or write data to a specified register.

4. The virtualized register device as described in claim 3, characterized in that, The multiple register groups contain the same number of registers.

5. The virtualized register device as described in claim 3, characterized in that, The number of registers contained in the multiple register groups is different.

6. A method for accessing a virtualized register device, implemented by a processing unit connected to the virtualized register device during loading and execution of computer code for a virtual device, the virtualized register device comprising a register space, an address decoder, and read / write circuitry, the register space comprising a plurality of physical blocks, each physical block comprising a plurality of register groups, each register group comprising a plurality of registers, and each physical block being assigned to a specific virtual machine, and only a virtual device executing in the specific virtual machine being able to access the registers in the physical block, characterized in that, The method for accessing the virtualized register device includes: One of the virtual devices is determined from the plurality of physical blocks; Based on information about the virtual device that is about to make a request or the function performed by the virtual device, one of the multiple register groups in the determined physical block is selected; Send the address of the selected register group corresponding to the determined physical block to the address decoder to activate the selected register group; and A request is sent to the read / write circuit to access the already activated register group, to read data from the register, or to write data to the register.

7. The method for accessing a virtualized register device as described in claim 6, characterized in that, The multiple physical blocks do not overlap.

8. A computer-readable storage medium for storing computer code executable by a processing unit, characterized in that, When the computer code is executed by the processing unit, it implements the method of accessing a virtualized register device as described in any one of claims 6 to 7.

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