A soft switching control method, totem pole bridgeless circuit and system

Abstract

The present invention provides a soft switching control method, a totem pole bridgeless circuit, and a system. The totem pole bridgeless circuit includes a first bridge arm, a second bridge arm, a bus capacitor, and an inductor. The first bridge arm includes a first switching tube and a second switching tube connected in series. The second bridge arm includes a third switching tube, a fourth switching tube, a first current mutual induction circuit, and a second current mutual induction circuit. When the alternating current output by the alternating current power supply is in a positive half-cycle, a negative current is used to drain the charge of the output junction capacitance of the fourth switching tube, thereby achieving zero-voltage switching of the fourth switching tube, reducing the switching loss of the fourth switching tube and the electromagnetic interference problem caused by hard switching. When the alternating current output by the alternating current power supply is in a negative half-cycle, a negative current is used to drain the charge of the output junction capacitance of the third switching tube, thereby achieving zero-voltage switching of the third switching tube, reducing the switching loss of the third switching tube and the electromagnetic interference problem caused by hard switching.

Description

Technical Field

[0001] The present invention relates to the technical field of PFC circuits, and in particular to a soft switching control method, a totem pole bridgeless circuit and a system. Background Art

[0002] Traditional bridge PFC circuits have numerous conducting devices and high conduction losses, making them unsuitable for medium- to high-power applications. Bridgeless PFC circuits, on the other hand, can reduce conduction losses and improve efficiency. Bridgeless PFC circuits employ two control methods: CCM and CRM. Bridgeless PFC circuits employing CCM control typically use switches with good reverse recovery characteristics, such as SiCMOS and GaN MOS. However, these switches are expensive and require a hard-switching turn-on process, resulting in high switching losses and hindering miniaturization. Furthermore, hard-switching can generate significant electromagnetic interference (EMI). CRM control eliminates the need for SiC MOS, GaN MOS, and other switching transistors, leading to lower costs.

[0003] However, traditional CRM control has a disadvantage. When the instantaneous value of the input voltage is greater than half the bus voltage, the voltage across the switch tube cannot drop to zero when it is turned on. There is a certain amount of hard switching in the CRM control, which increases losses, reduces efficiency, and also increases electromagnetic interference problems. Summary of the Invention

[0004] The purpose of the present invention is to provide a soft switching control method, a totem pole bridgeless circuit and a system to solve the problem in the prior art that when the instantaneous value of the input voltage of the totem pole bridgeless circuit using CRM control is greater than half the bus voltage, the switch tube cannot achieve zero voltage switching, thereby reducing efficiency and increasing electromagnetic interference.

[0005] A first aspect of the present invention provides a totem pole bridgeless circuit, the totem pole bridgeless circuit comprising:

[0006] A first bridge arm includes a first switching tube and a second switching tube connected in series, wherein the first switching tube and the second switching tube are connected to form a first connection point;

[0007] a second bridge arm, connected in parallel with the first bridge arm, comprising a third switching tube and a fourth switching tube, wherein the third switching tube and the fourth switching tube are connected to form a second connection point, a first bus terminal is formed between the third switching tube and the first switching tube, and a second bus terminal is formed between the fourth switching tube and the second switching tube, a primary winding of a first current transformer is connected in series between the second connection point and the first bus terminal, a secondary winding of the first current transformer is connected to a first current detection circuit, a primary winding of a second current transformer is connected in series between the second connection point and the second bus terminal, and a secondary winding of the second current transformer is connected to a second current detection circuit;

[0008] a busbar capacitor, a first end of which is connected to the first bus terminal, and a second end of which is connected to the second bus terminal;

[0009] an inductor, one end of which is connected to the second connection point, and an AC power source is connected between the other end of the inductor and the first connection point;

[0010] A control module is connected to the control end of the third switch tube, the control end of the fourth switch tube, the first current detection circuit, and the second current detection circuit respectively.

[0011] The present invention provides a soft switch control method, a totem pole bridgeless circuit and a system. The totem pole bridgeless circuit includes a first bridge arm, a second bridge arm, a bus capacitor, an inductor and a control module. The first bridge arm includes a first switch tube and a second switch tube connected in series. The second bridge arm includes a third switch tube, a fourth switch tube, a first current transformer and a second current transformer circuit. The secondary winding of the first current transformer is connected to the first current detection circuit, and the secondary winding of the second current transformer is connected to the second current detection circuit. When the AC power output by the AC power supply is in a positive half cycle, the third switch tube and the fourth switch tube are turned off, and the third switch tube is turned on after a first preset time. When the polarity of the voltage at both ends of the seventh switch tube is detected to change, the third switch tube is turned off after a second preset time, and the fourth switch tube is turned on after the third preset time, and then after the third preset time, the fourth switch tube is turned on. After four preset times, the process returns to execute shutdown of the fourth switch tube, and uses a negative current to drain the charge of the output junction capacitance of the fourth switch tube, thereby achieving zero-voltage turn-on of the fourth switch tube, reducing the turn-on loss of the fourth switch tube and the electromagnetic interference problem caused by hard turn-on; when the AC power output by the AC power supply is in the negative half cycle, the third switch tube and the fourth switch tube are turned off, and after a fifth preset time, the fourth switch tube is turned on. When a change in the polarity of the voltage across the fifth switch tube is detected, the fourth switch tube is turned off after a sixth preset time, and the third switch tube is turned on after a seventh preset time. After an eighth preset time, the process returns to execute shutdown of the third switch tube, and uses a negative current to drain the charge of the output junction capacitance of the third switch tube, thereby achieving zero-voltage turn-on of the third switch tube, thereby reducing the turn-on loss of the third switch tube and the electromagnetic interference problem caused by hard turn-on. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments or descriptions of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0013] Figure 1 1 is a schematic structural diagram of a totem pole bridgeless circuit provided by an embodiment of the present invention;

[0014] Figure 2 is a circuit diagram of a totem pole bridgeless circuit provided by an embodiment of the present invention;

[0015] Figure 3 1 is a structural diagram of a first current detection circuit in a totem pole bridgeless circuit provided by an embodiment of the present invention;

[0016] Figure 4 is a circuit diagram of a first current detection circuit in a totem pole bridgeless circuit provided by an embodiment of the present invention;

[0017] Figure 5 1 is a structural diagram of a second current detection circuit in a totem pole bridgeless circuit provided by an embodiment of the present invention;

[0018] Figure 6 is a circuit diagram of a second current detection circuit in a totem pole bridgeless circuit provided by an embodiment of the present invention;

[0019] Figure 7 is a flow chart of a soft switch control method provided by an embodiment of the present invention;

[0020] Figure 8 This is a current waveform diagram of the AC power output by an AC power supply in a totem pole bridgeless circuit provided by an embodiment of the present invention when the AC power is in the positive half cycle;

[0021] Figure 9 This is a current flow diagram of a totem pole bridgeless circuit provided by an embodiment of the present invention;

[0022] Figure 10 is a current flow diagram of a first current detection circuit in a totem pole bridgeless circuit provided by an embodiment of the present invention;

[0023] Figure 11 is another current flow diagram of a totem pole bridgeless circuit provided by an embodiment of the present invention;

[0024] Figure 12 is a current flow diagram of a second current detection circuit in a totem pole bridgeless circuit provided by an embodiment of the present invention;

[0025] Figure 13 is another flow chart of a soft switch control method provided by an embodiment of the present invention;

[0026] Figure 14 This is a current waveform diagram of the AC power output by an AC power supply in a totem pole bridgeless circuit provided by an embodiment of the present invention when the AC power is in the negative half cycle;

[0027] Figure 15is another current flow diagram of a totem pole bridgeless circuit provided by an embodiment of the present invention;

[0028] Figure 16 is another current flow diagram of a second current detection circuit in a totem pole bridgeless circuit provided by an embodiment of the present invention;

[0029] Figure 17 is another current flow diagram of a totem pole bridgeless circuit provided by an embodiment of the present invention;

[0030] Figure 18 This is a current flow diagram of a first current detection circuit in a totem pole bridgeless circuit provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0031] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0032] In order to illustrate the technical solution of the present invention, specific embodiments are provided below.

[0033] The embodiment of the present invention provides a totem pole bridgeless circuit such as Figure 1 As shown, the totem pole bridgeless circuit includes:

[0034] A first bridge arm includes a first switch tube 101 and a second switch tube 102 connected in series, wherein the first switch tube 101 and the second switch tube 102 are connected to form a first connection point;

[0035] a second bridge arm, which is connected in parallel with the first bridge arm and includes a third switching tube 103 and a fourth switching tube 104. The third switching tube 103 and the fourth switching tube 104 are connected to form a second connection point. A first bus terminal is formed between the third switching tube 103 and the first switching tube 101, and a second bus terminal is formed between the fourth switching tube 104 and the second switching tube 102. The primary winding of the first current transformer 106 is connected in series between the second connection point and the first bus terminal. The secondary winding of the first current transformer 106 is connected to the first current detection circuit 110. The primary winding of the second current transformer 107 is connected in series between the second connection point and the second bus terminal. The secondary winding of the second current transformer 107 is connected to the second current detection circuit 111.

[0036] a bus capacitor 108 , a first end of which is connected to the first bus terminal, and a second end of which is connected to the second bus terminal;

[0037] The inductor 105 has one end connected to the second connection point, and the other end thereof is connected to the AC power supply between the first connection point.

[0038] Among them, the first switch tube 101 and the second switch tube 102 can be diodes or MOS tubes, the third switch tube 103 and the fourth switch tube 104 can be N-channel metal oxide semiconductor field effect transistors MOSFET or insulated gate bipolar transistors IGBT, the inductor 105 is a PFC inductor, and an AC power supply 109 is connected between one end of the inductor 105 and the first connection point, and the AC power supply 109 outputs AC power.

[0039] Among them, such as Figure 2 As shown, the first switch tube 101 is a diode D1, the second switch tube 102 is a diode D2, the third switch tube 103 is a MOS tube Q3, the fourth switch tube 104 is a MOS tube Q4, the bus capacitor is a capacitor Cbus, the inductor 105 is an inductor L1, the first current transformer 106 is a current transformer CT1, and the second current transformer 107 is a current transformer CT2.

[0040] Among them, such as Figure 3 As shown, the first current detection circuit 110 includes a first reset circuit 121, a seventh switch tube 122, an eighth switch tube 123 and a second resistor. The first end of the secondary winding of the first current transformer CT1 is connected to the first end of the first reset circuit 121 and the first end of the seventh switch tube 122, the second end of the seventh switch tube 122 is connected to the first end of the second resistor, the second end of the secondary winding of the first current transformer CT1 is connected to the second end of the first reset circuit 121 and the first end of the eighth switch tube 123, and the second end of the eighth switch tube 123 is connected to the second end of the second resistor; the control module is connected to the control end of the seventh switch tube 122 and the control end of the eighth switch tube 123. Figure 4 As shown, the seventh switch tube 122 is a MOS tube Q7, the eighth switch tube 123 is a MOS tube Q8, the second resistor is a resistor R2, the control module is a complex programmable logic device CPLD or a field programmable gate array FPGA or a digital signal processor DSP or a microcontroller MCU, and the first reset circuit includes a resistor or a capacitor or a TVS or a voltage regulator tube. For example, the first reset circuit includes a capacitor C2, a voltage regulator tube VT3, and a voltage regulator tube VT4.

[0041] Among them, such as Figure 5As shown, the second current detection circuit 111 includes a second reset circuit 131, a fifth switch tube 132, a sixth switch tube 133 and a first resistor. The first end of the secondary winding of the second current transformer CT2 is connected to the first end of the second reset circuit 131 and the first end of the fifth switch tube 132, the second end of the fifth switch tube 132 is connected to the first end of the first resistor, the second end of the secondary winding of the second current transformer CT2 is connected to the second end of the second reset circuit 131 and the first end of the sixth switch tube 133, and the second end of the sixth switch tube 133 is connected to the second end of the first resistor; the control module is connected to the control end of the fifth switch tube 132 and the control end of the sixth switch tube 133. Figure 6 As shown, the fifth switch tube 132 is a MOS tube Q5, the sixth switch tube 133 is a MOS tube Q6, the first resistor is a resistor R1, the control module is a complex programmable logic device CPLD or a field programmable gate array FPGA or a digital signal processor DSP or a microcontroller MCU, and the second reset circuit 131 includes a resistor or a capacitor or a TVS or a voltage regulator tube. For example, the second reset circuit 131 includes a capacitor C1, a voltage regulator tube VT1, and a voltage regulator tube VT2.

[0042] The control module outputs driving signals to the fifth switch tube, the sixth switch tube, the seventh switch tube and the eighth switch tube according to the positive and negative polarity signals output by the AC power supply.

[0043] An embodiment of the present invention further provides a totem pole bridgeless system, including the above-mentioned totem pole bridgeless circuit.

[0044] The embodiment of the present invention also provides a soft switch control method, which is applied to a control module, such as Figure 7 As shown, the control module performs the following steps. When the AC power output by the AC power supply is in the positive half cycle, the soft switching control method includes:

[0045] Step S101 , turning off the third switch tube and the fourth switch tube, and turning on the third switch tube after a first preset time.

[0046] In step S102 , when detecting a change in polarity of the voltage across the seventh switch tube, the third switch tube is turned off after a second preset time delay, wherein during the second preset time, the first current flowing through the third switch tube gradually decreases to zero and then to a negative number.

[0047] Step S103: after a third preset time, the fourth switch tube is turned on, and after a fourth preset time, the process returns to step S101. During the third preset time, the voltage of the junction capacitor across the fourth switch tube is discharged to zero.

[0048] The specific process of the above steps is as follows, the AC power supply outputs the positive half cycle of AC power:

[0049] like Figure 8 , which is a waveform diagram of each point, where I1 represents the inductor current; I_CT1_P is the primary current of the first current transformer; I_CT1_S is the secondary current of the first current transformer; U_GJ is the voltage between points G and J, U_COPARE is the output of the voltage polarity detection unit; U_Q4_GS is the drive signal of the MOS transistor Q4; and U_Q3_GS is the drive signal of the MOS transistor Q3.

[0050] like Figure 9 As shown, at time t0, MOS tube Q4 is turned off and the current direction in the loop is:

[0051] L line → inductor L1 → body diode of MOS tube Q3 → first current transformer CT1 → capacitor Cbus → diode D2 → N line.

[0052] In order to reduce conduction loss and improve efficiency, when the switch MOS tube Q3 is turned off, the current flows through the body diode of the MOS tube Q3. After a delay, the MOS tube Q3 is turned on at time t1, and the current flows from the body diode of the MOS tube Q3 to the channel of the MOS tube Q3.

[0053] like Figure 10 As shown, in the main topology, the current flow direction of the first current transformer CT1 is from terminal F to terminal E. At this time, the current flow direction in the secondary circuit of the first current transformer CT1 is:

[0054] H terminal → MOS tube Q8 → resistor R2 → body diode of MOS tube Q7 → G terminal. The voltage of resistor R2 can be used for overcurrent protection. At this time, the voltage U_GJ<0.

[0055] During the on-time of MOS tube Q3, the inductor current continuously decreases. Due to the influence of the excitation current of the first current transformer, the secondary current of the first current transformer leads its primary current. Therefore, as the inductor current continuously decreases, the secondary current first reaches zero at time t2, and the primary current reaches zero at time t3.

[0056] When the secondary current of the first current transformer CT1 decreases to zero, the current begins to flow in the reverse direction. Since MOS transistor Q7 is off, the current cannot flow in the reverse direction through the channel of MOS transistor Q7. When the current crosses zero, the body diode of MOS transistor Q7 is turned off. When the current crosses zero and increases in the reverse direction, part of the current charges the output junction capacitance of MOS transistor Q7, increasing the DS voltage U_GJ of MOS transistor Q7. Part of the current flows through capacitor C2 or Zener diodes VT3 and VT4. At this time, U_GJ>0. When the inductor current crosses zero, the first current transformer CT1 begins magnetic reset, but U_GJ is still greater than zero.

[0057] From the above analysis, we can see that the zero-crossing moment of the secondary current of the first current transformer can be determined by determining the polarity of the voltage across GJ. After a delay of a certain period, at time t3, the primary current of the first current transformer crosses zero, that is, the inductor current crosses zero. After another delay, at time t4, MOS transistor Q3 is turned off. At this time, the inductor current is negative. After MOS transistor Q3 is turned off, this negative current will draw the charge stored in the output junction capacitance of MOS transistor Q4. When the charge stored in the output junction capacitance of MOS transistor Q4 is completely drawn, that is, when the voltage across DS of MOS transistor Q4 is zero, MOS transistor Q4 is turned on at time t5, thereby achieving zero-voltage turn-on of MOS transistor Q4. That is, when a change in the polarity of the voltage across GJ is detected, MOS transistor Q3 is turned off with a delay of a certain period, and MOS transistor Q4 is turned on with another delay of a certain period. The negative current is used to draw the charge from the output junction capacitance of MOS transistor Q4, achieving zero-voltage turn-on of MOS transistor Q4, reducing the turn-on loss of MOS transistor Q4 and the electromagnetic interference caused by hard turn-on.

[0058] like Figure 11 As shown in the figure, at time t5, after the MOS tube Q4 is turned on, the inductor current gradually increases, and the current flow direction is:

[0059] L line → inductor L1 → second current transformer CT2 → MOS tube Q4 → diode D24 → N line.

[0060] like Figure 12 As shown, in the main topology, the current flow direction of the second current transformer CT2 is: from terminal A to terminal B. At this time, the current flow direction in the secondary circuit of the second current transformer CT2 is:

[0061] C terminal → MOS tube Q5 → resistor R1 → body diode of MOS tube Q6 → D terminal. At this time, the voltage of resistor R1 can be used for overcurrent protection.

[0062] At time t6, the MOS tube Q4 is turned off, and the event occurring at this moment repeats the event at time t0.

[0063] In this embodiment, when a change in the voltage polarity across the MOS transistor Q7 is detected, the MOS transistor Q3 is turned off with a delay, and the MOS transistor Q4 is turned on with another delay. The charge of the output junction capacitance of the MOS transistor Q4 is completely drained by a negative current, thereby achieving zero-voltage turn-on of the MOS transistor Q4. This reduces turn-on loss of the MOS transistor Q4 and electromagnetic interference problems caused by hard turn-on.

[0064] When the AC power output by the AC power supply is in the negative half cycle, such as Figure 13 As shown, the method includes:

[0065] Step S104 , turning off the third switch tube and the fourth switch tube, and turning on the fourth switch tube after a fifth preset time.

[0066] In step S105 , when detecting a change in polarity of the voltage across the fifth switch tube, the fourth switch tube is turned off after a sixth preset time. During the sixth preset time, the third current flowing through the fourth switch tube gradually decreases to zero and then to a negative number.

[0067] Step S106 , turning on the third switch tube after the seventh preset time, and returning to step S104 after the eighth preset time, wherein, during the seventh preset time, the junction capacitance across the third switch tube is discharged to zero voltage.

[0068] The specific process of the above steps is as follows, the AC power supply outputs the negative half cycle of AC power:

[0069] like Figure 14 , which is a schematic diagram of the waveforms at various points in the negative half-cycle of the AC current, where I1 represents the inductor current; I_CT1_P is the primary current of the first current transformer; I_CT1_S is the secondary current of the first current transformer; U_COPARE is the output of the voltage polarity detection unit; U_Q4_GS is the drive signal of the MOS transistor Q4; and U_MOS ​​transistor Q3_GS is the drive signal of the MOS transistor Q3.

[0070] like Figure 15 As shown, at time t7, MOS tube Q3 is turned off, and the current direction in the loop is:

[0071] N line → diode D1 → capacitor Cbus → body diode of MOS tube Q4 → inductor L1 → second current transformer CT2 → L line.

[0072] When the switch MOS tube Q3 is turned off, the current flows through the body diode of MOS tube Q4. In order to reduce conduction loss and improve efficiency, MOS tube Q4 is turned on at time t8 after a delay. The current flows from the body diode of MOS tube Q4 to the channel of MOS tube Q4.

[0073] like Figure 16 As shown, in the main topology, the current flow direction of the second current transformer CT2 is: from terminal B to terminal A. At this time, the current flow direction in the secondary circuit of the second current transformer CT2 is:

[0074] D terminal → MOS tube Q6 → resistor R1 → body diode of MOS tube Q5 → C terminal. The voltage of resistor R1 can be used for overcurrent protection. At this time, the voltage U_CE<0.

[0075] During the on-time of MOS tube Q4, the inductor current is continuously decreasing. Due to the influence of the excitation current of the second current transformer, the secondary current of the second current transformer leads the primary current. Therefore, as the inductor current continues to decrease, the secondary current of the second current transformer reaches zero at time t9, and the primary current reaches zero at time t10.

[0076] When the secondary current of the second current transformer CT2 decreases to zero, the secondary current begins to flow in the reverse direction. Since MOS transistor Q5 is off, the current cannot flow in the reverse direction through the channel of MOS transistor Q5. When the current crosses zero, the body diode of MOS transistor Q5 is turned off. When the current crosses zero and increases in the reverse direction, part of the current charges the output junction capacitance of MOS transistor Q5, increasing the DS voltage U_CE of MOS transistor Q5. Part of the current flows through capacitor C1 or Zener diodes VT1 and VT2. At this time, U_CE>0. When the primary current of the second current transformer CT2 crosses zero, the second current transformer CT2 begins magnetic reset, but U_CE is still greater than zero.

[0077] From the above analysis, we can determine the zero-crossing moment of the secondary current of the second current transformer by determining the polarity of the voltage across CE. After a delay, at time t10, the primary current of the second current transformer crosses zero, i.e., the inductor current crosses zero. After another delay, at time t11, MOS transistor Q4 is turned off. At this time, the inductor current is negative. After MOS transistor Q4 is turned off, this negative current draws the charge stored in the output junction capacitance of MOS transistor Q3. When the charge stored in the output junction capacitance of MOS transistor Q3 is completely drawn, i.e., when the voltage across DS of MOS transistor Q3 is zero, MOS transistor Q3 is turned on at time t11, thereby achieving zero-voltage turn-on of MOS transistor Q3. This process can be simply summarized as follows: when a change in the polarity of the voltage across CE is detected, MOS transistor Q4 is turned off with a delay, and MOS transistor Q3 is turned on with another delay. The negative current draws the charge from the output junction capacitance of MOS transistor Q3, achieving zero-voltage turn-on of MOS transistor Q3. This reduces the turn-on loss of MOS transistor Q3 and the electromagnetic interference caused by hard turn-on.

[0078] like Figure 17 As shown, at time t12, after the MOS tube Q3 is turned on, the inductor current gradually increases, and the current flows as follows: L line → diode D1 → first current transformer CT1 → MOS tube Q3 → PFC inductor L1 → L line.

[0079] like Figure 18 As shown, after the negative half-cycle MOS tube Q3 is turned on, in the main topology, the current flow direction of the first current transformer CT1 is: from terminal E to terminal F. At this time, the current flow direction in the secondary circuit of the first current transformer CT1 is:

[0080] G terminal → MOS tube Q7 → resistor R2 → body diode of MOS tube Q8 → D terminal. At this time, the voltage of resistor R2 can be used for overcurrent protection.

[0081] At time t13, the MOS tube Q4 is turned off, and the events at time t7 are repeated, which will not be described in detail.

[0082] This embodiment can be summarized as follows: when a change in the voltage polarity across the MOS transistor Q5 is detected, the MOS transistor Q4 is turned off after a delay, and the MOS transistor Q3 is turned on after another delay. The charge of the output junction capacitance of the MOS transistor Q3 is completely drained by a negative current, thereby achieving zero-voltage turn-on of the MOS transistor Q3. This reduces the turn-on loss of the MOS transistor Q3 and the electromagnetic interference problem caused by hard turn-on.

[0083] An embodiment of the present invention provides a soft switch control method, a totem pole bridgeless circuit and a system. The totem pole bridgeless circuit includes a first bridge arm, a second bridge arm, a bus capacitor, an inductor and a control module. The first bridge arm includes a first switch tube and a second switch tube connected in series. The second bridge arm includes a third switch tube, a fourth switch tube, a first current transformer and a second current transformer circuit. The secondary winding of the first current transformer is connected to the first current detection circuit, and the secondary winding of the second current transformer is connected to the second current detection circuit. When the AC power output by the AC power supply is in the positive half cycle, the third switch tube and the fourth switch tube are turned off, and the third switch tube is turned on after a first preset time. When the polarity of the voltage at both ends of the seventh switch tube is detected to change, the third switch tube is turned off after a second preset time, and the fourth switch tube is turned on after a third preset time. After the fourth preset time, the process returns to execute the shutdown of the fourth switch tube, and uses the negative current to drain the charge of the output junction capacitance of the fourth switch tube, thereby achieving zero-voltage turn-on of the fourth switch tube, reducing the turn-on loss of the fourth switch tube and the electromagnetic interference problem caused by hard turn-on; when the AC power output by the AC power supply is in the negative half cycle, the third switch tube and the fourth switch tube are turned off, and after the fifth preset time, the fourth switch tube is turned on. When it is detected that the polarity of the voltage across the fifth switch tube changes, the fourth switch tube is turned off after the sixth preset time, and the third switch tube is turned on after the seventh preset time. After the eighth preset time, the process returns to execute the shutdown of the third switch tube, and uses the negative current to drain the charge of the output junction capacitance of the third switch tube, thereby achieving zero-voltage turn-on of the third switch tube, thereby reducing the turn-on loss of the third switch tube and the electromagnetic interference problem caused by hard turn-on.

[0084] The above is a further detailed description of the present invention in conjunction with specific preferred embodiments, and the specific implementation of the present invention should not be considered to be limited to these descriptions. For those skilled in the art to which the present invention relates, any equivalent substitutions or obvious modifications that do not depart from the concept of the present invention and have the same performance or use should be deemed to fall within the scope of patent protection of the present invention as determined by the submitted claims.

Claims

1. A totem pole bridgeless circuit, characterized in that: The totem pole bridgeless circuit comprises: A first bridge arm includes a first switching tube and a second switching tube connected in series, wherein the first switching tube and the second switching tube are connected to form a first connection point; a second bridge arm, connected in parallel with the first bridge arm, comprising a third switching tube and a fourth switching tube, wherein the third switching tube and the fourth switching tube are connected to form a second connection point, a first bus terminal is formed between the third switching tube and the first switching tube, and a second bus terminal is formed between the fourth switching tube and the second switching tube, a primary winding of a first current transformer is connected in series between the second connection point and the first bus terminal, a secondary winding of the first current transformer is connected to a first current detection circuit, a primary winding of a second current transformer is connected in series between the second connection point and the second bus terminal, and a secondary winding of the second current transformer is connected to a second current detection circuit; a busbar capacitor, a first end of which is connected to the first bus terminal, and a second end of which is connected to the second bus terminal; an inductor, one end of which is connected to the second connection point, and an AC power source is connected between the other end of the inductor and the first connection point; a control module, connected to the control end of the third switch tube, the control end of the fourth switch tube, the first current detection circuit, and the second current detection circuit respectively; The first current detection circuit includes a first reset circuit, a seventh switching tube, an eighth switching tube, and a second resistor. The first end of the secondary winding of the first current transformer is connected to the first end of the first reset circuit and the first end of the seventh switching tube, the second end of the seventh switching tube is connected to the first end of the second resistor, the second end of the secondary winding of the first current transformer is connected to the second end of the first reset circuit and the first end of the eighth switching tube, and the second end of the eighth switching tube is connected to the second end of the second resistor. The control module is connected to the control terminal of the seventh switch tube and the control terminal of the eighth switch tube; the control module is used to determine the zero-crossing moment of the secondary current of the first current transformer by detecting the voltage polarity change of the seventh switch tube, turn off the third switch tube after a delay, and turn on the fourth switch tube after another delay, so as to use the negative current to drain the junction capacitance output by the fourth switch tube, thereby achieving zero-voltage switching of the fourth switch tube; The second current detection circuit includes a second reset circuit, a fifth switch tube, a sixth switch tube, and a first resistor. The first end of the secondary winding of the second current transformer is connected to the first end of the second reset circuit and the first end of the fifth switch tube, the second end of the fifth switch tube is connected to the first end of the first resistor, the second end of the secondary winding of the second current transformer is connected to the second end of the second reset circuit and the first end of the sixth switch tube, and the second end of the sixth switch tube is connected to the second end of the first resistor. The control module is connected to the control end of the fifth switch tube and the control end of the sixth switch tube; the control module is used to determine the zero-crossing moment of the secondary current of the second current transformer by detecting the voltage polarity change of the fifth switch tube, delay turning off the fourth switch tube for a period of time, and then delay turning on the third switch tube for another period of time, using negative current to drain the junction capacitance charge output by the third switch tube, thereby achieving zero-voltage turning on of the third switch tube.

2. The totem pole bridgeless circuit according to claim 1, wherein: The first reset circuit includes a resistor, a capacitor, a TVS, or a voltage regulator.

3. The totem pole bridgeless circuit according to claim 1, wherein: The second reset circuit includes a resistor, a capacitor, a TVS, or a voltage regulator.

4. The totem pole bridgeless circuit according to claim 1, wherein: The control module outputs a driving signal to the fifth switching tube, the sixth switching tube, the seventh switching tube, and the eighth switching tube according to the positive and negative polarity signals output by the AC power supply.

5. A totem pole bridgeless system, characterized in that: The totem pole bridgeless circuit comprises the totem pole bridgeless circuit according to any one of claims 1 to 4.

6. A soft switching control method based on the totem pole bridgeless circuit according to claim 1, characterized in that: When the AC power output by the AC power supply is in a positive half cycle, the soft switching control method includes: A. turning off the third switch and the fourth switch, and turning on the third switch after a first preset time; B. upon detecting a change in polarity of the voltage across the seventh switch, turning off the third switch after a second preset time, wherein during the second preset time, the first current flowing through the third switch gradually decreases to zero and then to a negative value; C. Turning on the fourth switch tube after a third preset time, and returning to step A after another fourth preset time, wherein within the third preset time, the voltage of the junction capacitance across the fourth switch tube is discharged to zero.

7. The soft switch control method according to claim 6, wherein: When the AC power output by the AC power supply is in a negative half cycle, the soft switching control method includes: Step D, turning off the third switch tube and the fourth switch tube, and turning on the fourth switch tube after a fifth preset time; Step E: When detecting a change in polarity of the voltage across the fifth switch tube, turning off the fourth switch tube after a sixth preset time, wherein during the sixth preset time, the third current flowing through the fourth switch tube gradually decreases to zero and then to a negative number; Step F: Turn on the third switch tube after the seventh preset time, and then return to step D after the eighth preset time, wherein, during the seventh preset time, the voltage of the junction capacitor across the third switch tube is discharged to zero.

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