Grooved MESFET

Abstract

Provided is a trench-type MESFET (1), comprising: an n-type semiconductor layer (11) including a Ga<subgt;2< / subgt;O<subgt;3< / subgt>-based single crystal and having a plurality of trenches (12) opening on one surface (19); an insulator (14) buried in the bottom of each of the plurality of trenches (12); a gate electrode (13) buried on the insulator (14) of each of the plurality of trenches (12) and contacting the n-type semiconductor layer (11) on its side surface; a source electrode (16) connected to a mesa-shaped portion (18) between adjacent trenches (12) of the n-type semiconductor layer (11); an insulator (15) buried on the gate electrode (13) of each of the plurality of trenches (12) to insulate the gate electrode (13) from the source electrode (16); and a drain electrode (17) directly or indirectly connected to the side of the n-type semiconductor layer (11) opposite to the source electrode (16).

Description

Technical Field

[0001] The present invention relates to a trench-type MESFET. Background Art

[0002] Conventionally, a trench-type Ga2O3-based MOSFET in which a gate electrode is embedded in a semiconductor layer has been known (for example, refer to Patent Document 1). The trench-type MOSFET has high breakdown voltage characteristics due to its trench gate structure.

[0003] Generally, in a MOSFET, there is a correlation between the resistance of the semiconductor layer and the breakdown voltage characteristics. If the resistance of the semiconductor layer is increased, the breakdown voltage characteristics can be improved. However, on the other hand, the conduction loss becomes large. Since the trench-type MOSFET has a trench gate structure, it can improve the breakdown voltage characteristics without increasing the resistance of the semiconductor layer. Therefore, it is easier to achieve both high breakdown voltage and low loss compared with a planar MOSFET.

[0004] Prior Art Documents

[0005] Patent Documents

[0006] Patent Document 1: Japanese Unexamined Patent Application Publication No. 2016-15503 Summary of the Invention

[0007] Problems to be Solved by the Invention

[0008] However, such a trench-type MOSFET disclosed in Patent Document 1 is not very capable of operating at high frequencies and cannot be applied to uses that require operation at high frequencies, such as base station devices for mobile phones and wireless power supply devices.

[0009] An object of the present invention is to provide a trench-type MESFET having high breakdown voltage and capable of high-frequency driving.

[0010] Solutions for Solving the Problems

[0011] In order to achieve the above object, one aspect of the present invention provides the following trench-type MESFETs [1] to [5].

[0012] [1]A trench-type MESFET includes: an n-type semiconductor layer including a Ga2O3-based single crystal and having a plurality of trenches opening on one surface; a first insulator buried in the bottom of each of the plurality of trenches; a gate electrode buried on the first insulator in each of the plurality of trenches and in contact with the n-type semiconductor layer on its side surface; a source electrode connected to a mesa-shaped portion between adjacent trenches of the n-type semiconductor layer; a second insulator buried on the gate electrode in each of the plurality of trenches to insulate the gate electrode from the source electrode; and a drain electrode directly or indirectly connected to the side of the n-type semiconductor layer opposite to the source electrode.

[0013] [2]In the trench-type MESFET according to [1] above, the gate electrode includes NiO.

[0014] [3]In the trench-type MESFET according to [1] or [2] above, the radius of curvature at the vertex of the curve of the bottom edge of the gate electrode in the cross-section in the width direction of the trench is 0.1 μm or more.

[0015] [4]In the trench-type MESFET according to any one of [1] to [3] above, the donor concentration in the region between the bottom of the trench and the bottom surface of the n-type semiconductor layer in the n-type semiconductor layer is 7×10 16 cm -3 or less.

[0016] [5]In the trench-type MESFET according to any one of [1] to [4] above, the thickness of the first insulator is in the range of 50 nm or more and 300 nm or less.

[0017] Effects of the Invention

[0018] According to the present invention, a trench-type MESFET with high breakdown voltage and capable of high-frequency driving can be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 is a vertical cross-sectional view of the trench-type MESFET of the first embodiment.

[0020] Figure 2 is a partially enlarged view of the vicinity of the bottom of the trench of the trench-type MESFET Figure 1 magnified.

[0021] Figure 3A graph showing the relationship between the gate voltage and the gate leakage current, and the relationship between the gate voltage and the drain current in the trench-type MESFET of Example 1 when the material of the gate electrode is Pt and a drain voltage of 20V is applied.

[0022] Figure 4 A vertical cross-sectional view of the pn junction diode of Example 1.

[0023] Figure 5 A graph showing the relationship between the applied voltage and the current density of the pn junction diode of Example 1.

[0024] Figure 6 A graph showing the relationship between the gate voltage and the gate leakage current, and the relationship between the gate voltage and the drain current in the trench-type MESFET of Example 1 when the material of the gate electrode 13 is NiO and a drain voltage of 20V is applied.

[0025] Figure 7 A graph showing the relationship between the drain voltage and the drain current in the trench-type MESFET of Example 1 when the material of the gate electrode 13 is NiO and a gate voltage of 0 to 1.6V is applied.

[0026] Figure 8 A graph showing the relationship between the radius of curvature of the gate electrode and the electric field strength at points in the channel layer and the insulator in the trench-type MESFET of Example 2.

[0027] Figure 9 A graph showing the relationship between the donor concentration of the breakdown voltage layer and the electric field strength at points in the breakdown voltage layer and the insulator in the trench-type MESFET of Example 3.

[0028] Figure 10 A graph showing the relationship between the thickness of the insulator and the electric field strength at points in the breakdown voltage layer and the insulator in the trench-type MESFET of Example 4. Detailed Description

[0029] 〔Embodiment〕

[0030] (Configuration of Trench-Type MESFET)

[0031] Figure 1 A vertical cross-sectional view of the trench-type MESFET (Metal Semiconductor Field Effect Transistor) 1 of the first embodiment. The trench-type MESFET 1 is a vertical field effect transistor having a trench gate structure.

[0032] The trench-type MESFET 1 includes: an n-type semiconductor substrate 10; an n-type semiconductor layer 11, which is a layer stacked on the n-type semiconductor substrate 10 and has a plurality of trenches 12 opening on a surface 19 on the side opposite to the n-type semiconductor substrate 10; a first insulator 14 buried in the bottom of each of the plurality of trenches 12; a gate electrode 13 buried on the first insulator 14 in each of the plurality of trenches 12 and in contact with the n-type semiconductor layer 11 on its side; a source electrode 16 connected to a mesa-shaped portion 18 between adjacent trenches 12 of the n-type semiconductor layer 11; and a drain electrode 17 formed on a surface of the n-type semiconductor substrate 10 on the side opposite to the n-type semiconductor layer 11.

[0033] In the mesa-shaped portion 18 of the n-type semiconductor layer 11, a depletion layer is formed due to the Schottky barrier formed at the interface between the n-type semiconductor layer 11 and the gate electrode 13. In the trench-type MESFET 1, the thickness of the depletion layer can be controlled by the gate voltage (the voltage applied to the gate electrode 13, which is the voltage applied between the source electrode and the gate electrode 13 when the source electrode 16 is grounded), thereby opening and closing the channel in the mesa-shaped portion 18.

[0034] The trench-type MESFET 1 can be normally-off type or normally-on type, but when used as a power device, from the viewpoint of safety, it is usually manufactured as the normally-off type. This is to prevent the source electrode 16 from conducting with the drain electrode 17 when the gate becomes uncontrollable due to a disconnection in the gate circuit or the like.

[0035] In the normally-off type trench-type MESFET 1, in a state where no gate voltage is applied, the channel in the mesa-shaped portion 18 is closed due to the depletion layer. Then, by applying a gate voltage above the threshold voltage, the depletion layer thins and the channel opens, and current flows from the drain electrode 17 to the source electrode 16.

[0036] The n-type semiconductor substrate 10 includes an n-type Ga2O3-based single crystal containing group-IV elements such as Si and Sn as donors. The donor concentration of the n-type semiconductor substrate 10 is, for example, 1.0×10 18 cm -3 or more and 1.0×10 20 cm -3 or less. The thickness of the n-type semiconductor substrate 10 is, for example, 10 μm or more and 600 μm or less.

[0037] Here, the so-called Ga2O3-based single crystal refers to a Ga2O3 single crystal or a Ga2O3 single crystal doped with elements such as Al and In. For example, it can be (Ga x Al y In (1-x-y))2O3 (0 < x ≤ 1, 0 ≤ y < 1, 0 < x + y ≤ 1) single crystal. When Al is added, the bandgap becomes wider, and when In is added, the bandgap becomes narrower. In addition, the above-mentioned Ga2O3 single crystal has, for example, a β-type crystal structure.

[0038] The plane orientation of the n-type semiconductor substrate 10 is not particularly limited, but preferably the (001) plane where the growth rate of the Ga2O3-based single crystal constituting the n-type semiconductor layer 11 becomes large. Additionally, preferably the (011) plane where a flat Ga2O3-based single crystal film can be grown.

[0039] The n-type semiconductor layer 11 includes an n-type Ga2O3-based single crystal containing group IV elements such as Si and Sn as donors. The thickness T of the n-type semiconductor layer 11 is, for example, 1 μm or more and 500 μm or less.

[0040] The n-type semiconductor layer 11 has: a channel layer 11b into which the gate electrode 13 is embedded and a channel is formed when a gate voltage is applied; a breakdown voltage layer 11a below the channel layer 11b for maintaining the breakdown voltage; and a contact layer 11c formed near the interface with the source electrode 16 by ion implantation, epitaxial growth, etc. for making an ohmic connection between the source electrode 16 and the n-type semiconductor layer 11.

[0041] Here, the region of the n-type semiconductor layer 11 below the height of the bottom of the trench 12, that is, the region between the bottom of the trench 12 and the bottom surface 20 (the surface on the drain electrode 17 side) of the n-type semiconductor layer 11 is the breakdown voltage layer 11a, and its thickness is set to T p . Additionally, the region of the n-type semiconductor layer 11 above the height of the bottom of the trench 12 (the source electrode 16 side) is the channel layer 11b, and the contact layer 11c is provided near the upper end of the channel layer 11b.

[0042] The donor concentration of the breakdown voltage layer 11a is one of the parameters determining the breakdown voltage characteristics of the trench-type MESFET1. When assuming that the dielectric breakdown electric field strength of Ga2O3 is constant at 8 MV / cm, it is preferably 3×10 17 cm -3 or less for obtaining a breakdown voltage of 600 V, preferably 1.5×10 17 cm -3 or less for obtaining a breakdown voltage of 1200 V, preferably 5.4×10 16 cm -3 or less for obtaining a breakdown voltage of 3300 V, preferably 2.7×10 16 cm -3 or less for obtaining a breakdown voltage of 6600 V, preferably 1.5×10 16 cm-3 At around or below, in order to obtain a breakdown voltage of 100,000 V, it is preferably 2×10 15 cm -3 or below. In the case of obtaining a breakdown voltage lower than 600 V or in order to obtain a breakdown voltage higher than 6600 V, it is only necessary to set appropriate concentrations respectively. In addition, when the maximum dielectric breakdown electric field strength of Ga2O3 is around 4 MV / cm, the above concentrations respectively become values below half.

[0043] The thickness T of the breakdown voltage layer 11a p is one of the parameters determining the breakdown voltage characteristics of the trench-type MESFET1. When assuming that the dielectric breakdown electric field strength of Ga2O3 is constant at 8 MV / cm as the estimated value based on the bandgap, for example, in order to obtain the performance of a breakdown voltage of 600 V used in home appliances, vehicles, etc., it is at least required to be about 1 - 2 μm or more. In order to obtain a breakdown voltage of 1200 V used in industrial equipment, etc., it is required to be about 3 μm or more. In order to obtain a breakdown voltage of 3300 V used in large transportation equipment such as bullet trains, it is required to be about 8 - 9 μm or more. In order to obtain a breakdown voltage of 6600 V in high-power applications such as power generation and power transmission, it is required to be about 16 - 17 μm or more. In order to obtain a breakdown voltage of 12,000 V in medium-voltage circuit breakers, it is required to be about 30 μm or more. In order to obtain a breakdown voltage of 100,000 V in high-voltage circuit breakers, it is required to be about 250 μm or more.

[0044] In addition, currently, the maximum dielectric breakdown electric field strength of Ga2O3 has not been able to be actually measured. Assuming a case of about 4 MV / cm which is the maximum value in the actually measured values that have been carried out, the above film thickness needs to be doubled. For example, in order to obtain a breakdown voltage of 100,000 V, it is required to be about 500 μm. In the case of obtaining a breakdown voltage for small home appliances lower than 600 V, the thickness T p can also be shorter than 1 μm, but from the aspect of manufacturing stability, it is preferably at least about 1 μm. Therefore, the thickness T p is preferably 1 μm or more and 500 μm or less.

[0045] The channel concentration of the channel layer 11b (the donor concentration in the region between two adjacent gate electrodes 13) and the mesa width W which is the width of the mesa-shaped portion 18 m are one of the parameters determining whether the trench-type MESFET1 is normally-off type or normally-on type. In the case of forming a normally-off type, it is only necessary to make the channel concentration lower and make the mesa width W m narrower. In the case of forming a normally-on type, it is only necessary to make the channel concentration higher and make the mesa width W m wider.

[0046] In the case where the trench-type MESFET1 is a normally-off type, in order to suppress the cut-off leakage current, for example, when the work function of the gate electrode 13 is 4.5 eV and the channel concentration of the channel layer 11b is 5×10 15 cm -3 to 1×10 16 cm -3 the mesa width W m is preferably 0.4 μm or less. When the work function of the gate electrode 13 is 5.0 eV and the channel concentration of the channel layer 11b is 5×10 15 cm -3 or less, the mesa width W m is preferably 0.6 μm or less. When the work function of the gate electrode 13 is 5.0 eV and the channel concentration of the channel layer 11b is greater than 5×10 15 cm -3 and is 1×10 16 cm -3 or less, the mesa width W m is preferably 0.4 μm or less. When the work function of the gate electrode 13 is 5.5 to 6.5 eV and the channel concentration of the channel layer 11b is 5×10 15 cm -3 to 1×10 16 cm -3 the mesa width W m is preferably 0.6 μm or less.

[0047] In addition, the smaller the width W m of the region of the mesa shape, the higher the channel concentration can be made, and thus the lower the on-resistance of the channel layer 11b can be. On the other hand, the narrower the width W m is, the higher the manufacturing difficulty becomes, and there will be a problem of a decrease in the manufacturing yield.

[0048] Therefore, for example, when the trench 12 is formed by patterning using a general stepper, the width W m of the region of the mesa shape is preferably 0.5 μm or more and 2 μm or less. When the trench 12 is formed by patterning using higher-resolution EB (electron beam) lithography, the width W m of the region of the mesa shape is preferably 0.1 μm or more and 2 μm or less.

[0049] Regarding the width W t of the trench 12, since it depends on the resolution of the exposure apparatus, it is preferably set within the same numerical range as the width W m of the region of the mesa shape according to the type of exposure apparatus used.

[0050] The thickness of the contact layer 11c is, for example, 10 nm or more and 5 μm or less. The donor concentration of the contact layer 11c is higher than the channel concentration of the channel layer 11b, for example, 1×10 18 cm -3 or more and 1×10 21 cm -3 or less.

[0051] The gate electrode 13 includes a material that can apply a gate voltage within a range where gate leakage does not occur to open and close the channel in the mesa-shaped portion 18. For example, when NiO is used as the material of the gate electrode 13, in the normally-off trench-type MESFET 1, by applying a gate voltage within a range where gate leakage does not occur, a large range of current can flow from the drain electrode 17 to the source electrode 16.

[0052] The insulator 14 is buried in the bottom of the trench 12 and is located between the gate electrode 13 and the breakdown voltage layer 11a. The insulator 15 is buried on the gate electrode 13 in the trench 12 and is located between the gate electrode 13 and the source electrode 16. The insulator 14 and the insulator 15 include, for example, HfO2 or SiO2.

[0053] The n-type semiconductor layer 11 includes, for example, an epitaxial growth film formed by the HVPE method or the like. When the n-type semiconductor layer 11 is formed by the HVPE method, since chloride gas is used as the raw material of the Ga2O3-based single crystal or the dopant raw material, the n-type semiconductor layer 11 contains Cl derived from the raw material of the Ga2O3-based single crystal or the dopant raw material.

[0054] When the HVPE method is used, the crystal growth rate is fast, so that the film formation time can be shortened or the cost can be reduced. This is particularly advantageous when the n-type semiconductor layer 11 is formed thick. In addition, when the HVPE method is used, an n-type semiconductor layer 11 with good crystal quality can be formed, so that the manufacturing yield can be improved. In addition, a high-purity n-type semiconductor layer 11 can be formed, so that the donor concentration can be controlled with high precision.

[0055] In addition, although the contact layer 11c can be formed by implanting donors using the ion implantation method on the upper part of the channel layer 11b formed by epitaxial growth, forming it by the crystal growth of the Ga2O3-based single crystal while adding donor impurities can suppress the manufacturing cost.

[0056] The source electrode 16 is formed on the upper surface 19 of the n-type semiconductor layer 11 and is connected to the mesa-shaped portion 18. As Figure 1As shown, the drain electrode 17 is connected to the surface of the n-type semiconductor substrate 10 on the side opposite to the n-type semiconductor layer 11. However, when the trench-type MESFET 1 does not include the n-type semiconductor substrate 10, it may also be connected to the surface of the n-type semiconductor layer 11 on the side opposite to the source electrode 16. That is, the drain electrode 17 is directly or indirectly connected to the side of the n-type semiconductor layer 11 opposite to the source electrode 16.

[0057] The source electrode 16 and the drain electrode 17 are ohmically connected to the contact layer 11c of the n-type semiconductor layer 11 and the n-type semiconductor substrate 10, respectively. The source electrode 16 and the drain electrode 17 have, for example, a Ti / Au laminated structure.

[0058] Figure 2 is an enlarged view of the vicinity of the bottom of the trench 12 of the trench-type MESFET 1 Figure 1 partial enlarged view.

[0059] The electric field intensity at point P1 in the channel layer 11b near the edge (width W t direction end) 130 at the bottom of the gate electrode 13, and the electric field intensity at point P2 on the upper edge (width W t direction end) of the insulator 14 depend on Figure 2 the radius of curvature R at the vertex of the curve of the edge 130 at the bottom of the gate electrode 13 in the cross-section in the width direction (width W t direction) of the trench 12 shown.

[0060] Figure 2 The circle C shown is the circle containing the arc when the vicinity of the vertex of the curve of the edge 130 at the bottom of the gate electrode 13 in the cross-section in the width direction of the trench 12 is approximated as an arc, and the radius of the circle C corresponds to the radius of curvature R.

[0061] By suppressing the electric field intensity at point P1 in the channel layer 11b, which is the end of the gate electrode 13, and at point P2 in the insulator 14 to be low, gate leakage exceeding the Schottky barrier formed at the interface between the channel layer 11b and the gate electrode 13 can be suppressed.

[0062] For example, in the normally-off type trench-type MESFET 1, in order to prevent gate leakage when a voltage of 1200 V is applied between the source electrode 16 and the drain electrode 17, it is preferable that the value of the radius of curvature R is 0.1 μm or more.

[0063] In addition, the electric field intensity at point P3 in the breakdown voltage layer 11a near the center in the width W t direction at the bottom of the trench 12, and the width W at the bottom of the trench 12 tThe electric field strength at point P4 in insulator 14 near the center of the direction depends on the donor concentration of the pressure-resistant layer 11a and the thickness T of insulator 14 i 。

[0064] By suppressing the electric field strengths at points P3 in the pressure-resistant layer 11a and P4 in insulator 14, which are points with particularly high electric field strengths in the n-type semiconductor layer 11 and insulator 14, the dielectric breakdown in the n-type semiconductor layer 11 and insulator 14 can be suppressed.

[0065] For example, in the normally-off trench-type MESFET1, in order to prevent dielectric breakdown of the n-type semiconductor layer 11 and insulator 14 when a voltage of 1200V is applied between the source electrode 16 and the drain electrode 17, it is preferable that the donor concentration of the pressure-resistant layer 11a is 7×10 16 cm -3 or less. Additionally, it is preferable that the thickness T of insulator 14 i is in the range of 50nm or more and 300nm or less.

[0066] Insulator 14 and insulator 15 are formed, for example, by atomic layer deposition (ALD). The shape of the upper edge of insulator 14 can be controlled by the formation conditions of insulator 14, thereby controlling the radius of curvature R of the gate electrode 13.

[0067] (Effect of the embodiment)

[0068] According to the trench-type MESFET1 of the above embodiment, high voltage resistance can be achieved through the trench structure, and high-frequency driving can be achieved through the MESFET structure.

[0069] Example 1

[0070] The current-voltage characteristics of the trench-type MESFET1 of the above embodiment were investigated through simulation. In this simulation, assuming the material is Ga2O3, the electron affinity of the n-type semiconductor layer 11 was set to 3.7eV, and the potential of the source electrode 16 was set to 0V.

[0071] Figure 3 is a coordinate diagram showing the relationship between the gate voltage and the gate leakage current, and the relationship between the gate voltage and the drain current in the trench-type MESFET1 when the work function of the gate electrode 13 is set to 5.0eV assuming the material is Pt and a drain voltage of 20V is applied.

[0072] According to Figure 3 , gate leakage occurs starting from around when the gate voltage exceeds 1V. And by applying a gate voltage of 0 to 1V where gate leakage does not occur, a current of approximately 0 to 0.8×10 -6The drain current of A. Additionally, the threshold voltage (the gate voltage at which the drain current starts to flow) is about 0.7 V.

[0073] The inventors of the present invention conducted research to find a more suitable material for the gate electrode 13, and as a result, found that NiO is suitable as the material for the gate electrode 13.

[0074] Figure 4 FIG. 50 is a vertical cross-sectional view of a pn junction diode 50 having a p-type NiO film as a p layer used in the above research. The pn junction diode 50 includes: an n-type Ga2O3 substrate 51; an n-type Ga2O3 film 52 formed on the n-type Ga2O3 substrate 51; a p-type NiO film 53 formed on the n-type Ga2O3 film 52; an anode electrode 54 formed on the p-type NiO film 53; and a cathode electrode 55 formed on the surface of the n-type Ga2O3 substrate 51 on the side opposite to the n-type Ga2O3 film 52.

[0075] An n-type Ga2O3 film 52 and a p-type NiO film 53 form a pn junction, and the pn junction diode 50 utilizes the rectifying property of this pn junction.

[0076] In the pn junction diode 50, by applying a forward voltage (the anode electrode 54 side is at a positive potential) between the anode electrode 54 and the cathode electrode 55, the potential barrier at the interface between the p-type NiO film 53 and the n-type Ga2O3 film 52 as seen from the n-type Ga2O3 film 52 decreases, and current flows from the anode electrode 54 to the cathode electrode 55.

[0077] The n-type Ga2O3 substrate 51 includes an n-type Ga2O3 single crystal containing Sn as a donor impurity. The donor concentration of the n-type Ga2O3 substrate 51 is approximately 1.0×10 18 cm -3 . The thickness of the n-type Ga2O3 substrate 51 is approximately 600 μm.

[0078] The n-type Ga2O3 film 52 includes an n-type Ga2O3 single crystal containing Si as a donor impurity. The donor concentration of the n-type Ga2O3 film 52 is 6×10 16 cm -3 . The thickness of the n-type Ga2O3 film 52 is approximately 3 μm.

[0079] The p-type NiO film 53 includes p-type NiO.

[0080] The anode electrode 54 includes a circular Ni film with a diameter of 300 μm and forms an ohmic contact with the p-type NiO film 53.

[0081] The cathode electrode 55 includes a Ti / Au film and forms an ohmic contact with the n-type Ga2O3 substrate 51.

[0082] Figure 5 It is a coordinate diagram showing the relationship between the applied voltage and the current density of the pn junction diode 50. From Figure 5 the characteristics of the pn junction diode 50 shown, it is speculated that when NiO is used as the material of the gate electrode 13 of the trench-type MESFET1, a Schottky barrier of about 2 eV will be formed, and thus the work function of NiO is speculated to be 5.7 eV.

[0083] Figure 6 It is a coordinate diagram showing the relationship between the gate voltage and the gate leakage current, and the relationship between the gate voltage and the drain current in the trench-type MESFET1 when the material of the gate electrode 13 is NiO and a drain voltage of 20 V is applied.

[0084] According to Figure 6 , even when the gate voltage is applied up to about 1.9 V, gate leakage does not occur. And by applying a gate voltage of 0 to 1.9 V where gate leakage does not occur, a drain current of approximately 0 to 7×10 -6 A flows. In addition, the threshold voltage is about 0.9 V.

[0085] It is confirmed from the upper limit value of the gate voltage that can be applied to the gate electrode 13 while suppressing the occurrence of gate leakage and the range of the drain current that can flow while suppressing the occurrence of gate leakage that NiO is more preferable as the material of the gate electrode 13 than Pt.

[0086] Figure 7 It is a coordinate diagram showing the relationship between the drain voltage and the drain current in the trench-type MESFET1 when the work function of the gate electrode 13 is set to 5.7 eV assuming the material is NiO and a gate voltage of 0 to 1.6 V is applied. According to Figure 7 , regular current-voltage characteristics are obtained.

[0087] In addition, in the simulation of this embodiment, the material (parent crystal) of the n-type semiconductor layer 11 is set to a Ga2O3 single crystal, but the same result will be obtained when it is set to other Ga2O3-based single crystals.

[0088] Example 2

[0089] Regarding the trench-type MESFET1 of the above-described embodiment, the relationship between the radius of curvature R at the apex of the curve of the edge 130 at the bottom of the gate electrode 13 and the electric field strength at the point P1 in the channel layer 11b and the point P2 in the insulator 14 (refer to Figure 2 ) in the cross section in the width direction of the trench 12 was investigated by simulation.

[0090] In this simulation, the electron affinity of the n-type semiconductor layer 11 is set to 3.7 eV, and the thickness T of the breakdown voltage layer 11a p is set to 4.3 μm, and the width W of the mesa-shaped portion 18 m is set to 0.4 μm. The channel concentration of the channel layer 11b is set to 1×10 16 cm -3 , the donor concentration of the breakdown voltage layer 11a is set to 9×10 16 cm -3 , the dielectric constant of the insulator 14 is set to 22, and the thickness T of the insulator 14 i is set to 0.2 μm. The work function of the gate electrode 13 is set to 5.0 eV, the potentials of the source electrode 16 and the gate electrode 13 are set to 0 V, and the potential of the drain electrode 17 is set to 1200 V. In addition, the electron affinity of 3.7 eV of the n-type semiconductor layer 11 is the electron affinity assumed when the material is Ga2O3, the work function of 5.0 eV of the gate electrode 13 is the work function assumed when the material is Pt, and the dielectric constant of 22 of the insulator 14 is the dielectric constant assumed when the material is HfO2.

[0091] Figure 8 is a graph showing the relationship between the radius of curvature R and the electric field strength at point P1 in the channel layer 11b and point P2 in the insulator 14. In Table 1 below, the numerical values of the plotted points Figure 8 are shown.

[0092] [Table 1]

[0093]

[0094] To suppress gate leakage current exceeding the Schottky barrier formed at the interface between the channel layer 11b and the gate electrode 13, it is preferable that the electric field strength at point P1 in the channel layer 11b is 2.5 MV / cm ( Figure 8 the dashed line in Figure 8 ) or less, and it is preferable that the electric field strength at point P2 in the insulator 14 is 5 MV / cm (

[0095] the single-dashed line in Figure 8 ) or less.

[0096] In addition, in the simulation of this embodiment, the material (parent crystal) of the n-type semiconductor layer 11 was set to a Ga2O3 single crystal. However, the same results would be obtained when it was set to other Ga2O3-based single crystals. Additionally, the material of the insulator 14 was set to HfO2, but the same results would be obtained when it was set to SiO2.

[0097] Example 3

[0098] Regarding the trench-type MESFET 1 of the above-described embodiment, the relationship between the donor concentration of the breakdown voltage layer 11a and the electric field strength at point P3 in the breakdown voltage layer 11a and point P4 in the insulator 14 was investigated by simulation.

[0099] In this simulation, the electron affinity of the n-type semiconductor layer 11 was set to 3.7 eV, the thickness T of the breakdown voltage layer 11a p was set to 7 μm, the width W of the mesa-shaped portion 18 m was set to 0.4 μm, the channel concentration of the channel layer 11b was set to 1×10 16 cm -3 , the dielectric constant of the insulator 14 was set to 22, the thickness T of the insulator 14 i was set to 0.2 μm, the work function of the gate electrode 13 was set to 5.0 eV, the radius of curvature R of the gate electrode 13 was set to 0.2 μm, the potentials of the source electrode 16 and the gate electrode 13 were set to 0 V, and the potential of the drain electrode 17 was set to 1200 V. In addition, the electron affinity of 3.7 eV for the n-type semiconductor layer 11 was the electron affinity assumed when the material was Ga2O3, the work function of 5.0 eV for the gate electrode 13 was the work function assumed when the material was Pt, and the dielectric constant of 22 for the insulator 14 was the dielectric constant assumed when the material was HfO2.

[0100] Figure 9 is a coordinate diagram showing the relationship between the donor concentration of the breakdown voltage layer 11a and the electric field strength at point P3 in the breakdown voltage layer 11a and point P4 in the insulator 14. In Table 2 below, the numerical values of the plotted points are shown Figure 9 .

[0101] [Table 2]

[0102]

[0103] To suppress dielectric breakdown in the n-type semiconductor layer 11 and the insulator 14, it is preferable that the electric field strength at point P3 in the breakdown voltage layer 11a is 8 MV / cm ( Figure 9 the dashed line in Figure 9 ) or less, and it is preferable that the electric field strength at point P4 in the insulator 14 is 5 MV / cm ( Figure 9 the single-dot chain line in Figure 9 ) or less.

[0104] According to Figure 9 , the range of the donor concentration of the breakdown voltage layer 11a that satisfies these conditions is approximately 7×10 16 cm -3 or less. Therefore, it can be said that in the normally-off trench-type MESFET 1, in order to prevent dielectric breakdown in the n-type semiconductor layer 11 and the insulator 14 when a voltage of 1200 V is applied between the source electrode 16 and the drain electrode 17, it is preferable that the donor concentration of the breakdown voltage layer 11a is 7×10 16 cm -3 or less.

[0105] In addition, in the simulation of this embodiment, the material (parent crystal) of the n-type semiconductor layer 11 is set to a Ga2O3 single crystal, but the same result will be obtained when it is set to other Ga2O3-based single crystals. In addition, the material of the insulator 14 is set to HfO2, but the same result will be obtained when it is set to SiO2.

[0106] Example 4

[0107] Regarding the trench-type MESFET 1 of the above-described embodiment, the relationship between the thickness T i of the insulator 14 and the electric field strengths at point P3 in the breakdown voltage layer 11a and point P4 in the insulator 14 was investigated by simulation.

[0108] In this simulation, the electron affinity of the n-type semiconductor layer 11 was set to 3.7 eV, the thickness T p of the breakdown voltage layer 11a was set to 4.4 μm, the width W m of the mesa-shaped portion 18 was set to 0.4 μm, the channel concentration of the channel layer 11b was set to 1×10 16 cm -3 , the dielectric constant of the insulator 14 was set to 22, the work function of the gate electrode 13 was set to 5.0 eV, the radius of curvature R of the gate electrode 13 was set to 0.2 μm, the potentials of the source electrode 16 and the gate electrode 13 were set to 0 V, and the potential of the drain electrode 17 was set to 1200 V. In addition, the electron affinity of 3.7 eV of the n-type semiconductor layer 11 is the electron affinity assumed when the material is Ga2O3, the work function of 5.0 eV of the gate electrode 13 is the work function assumed when the material is Pt, and the dielectric constant of 22 of the insulator 14 is the dielectric constant assumed when the material is HfO2.

[0109] Figure 10 is a coordinate diagram showing the relationship between the thickness T i of the insulator 14 and the electric field strengths at point P3 in the breakdown voltage layer 11a and point P4 in the insulator 14. In Table 3 below,Figure 10 The value of the plotted point

[0110] [Table 3]

[0111]

[0112] As described above, in order to suppress the dielectric breakdown in the n-type semiconductor layer 11 and the insulator 14, it is preferable that the electric field strength at point P3 in the breakdown voltage layer 11a is 8 MV / cm ( Figure 10 the dotted line in), and it is preferable that the electric field strength at point P4 in the insulator 14 is 5 MV / cm ( Figure 10 the single dotted line in) or less.

[0113] According to Figure 10 , the thickness T of the insulator 14 that satisfies these conditions i is in the range of approximately 50 nm or more and 300 nm or less. Therefore, it can be said that in the normally-off trench-type MESFET 1, in order to suppress the dielectric breakdown in the n-type semiconductor layer 11 and the insulator 14 when a voltage of 1200 V is applied between the source electrode 16 and the drain electrode 17, it is preferable that the thickness T of the insulator 14 i is in the range of 50 nm or more and 300 nm or less.

[0114] In addition, in the simulation of this embodiment, the material (parent crystal) of the n-type semiconductor layer 11 is set to a Ga2O3 single crystal, but the same result will be obtained when it is set to other Ga2O3-based single crystals. Also, the material of the insulator 14 is set to HfO2, but the same result will be obtained when it is set to SiO2.

[0115] The above has described the embodiments and examples of the present invention, but the present invention is not limited to the above embodiments and examples, and various modifications can be made without departing from the gist of the invention.

[0116] In addition, the above-described embodiments and examples do not limit the invention described in the claims. In addition, it should be noted that not all combinations of the features described in the embodiments and examples are necessary for the solution to the problems of the invention.

[0117] Industrial Applicability

[0118] Provided is a trench-type MESFET having high breakdown voltage and capable of high-frequency driving.

[0119] Explanation of Reference Signs

[0120] 1... Grooved MESFET, 10... n-type semiconductor substrate, 11... n-type semiconductor layer, 11a... breakdown voltage layer, 12... groove, 13... gate electrode, 14... insulator, 16... source electrode, 17... drain electrode, 18... mesa-shaped portion, 130... edge, R... radius of curvature, T i ... thickness.

Claims

1. A trench-type MESFET, characterized in that, Comprising: An n-type semiconductor layer, which includes a Ga2O3-based single crystal and has a plurality of grooves opening on one surface; A first insulator, which is buried at the bottom of each of the plurality of grooves; A gate electrode, which is buried on the first insulator of each of the plurality of grooves and contacts the n-type semiconductor layer on its side surface; A source electrode, which is connected to a mesa-shaped portion between adjacent grooves of the n-type semiconductor layer; A second insulator, which is buried on the gate electrode of each of the plurality of grooves and insulates the gate electrode from the source electrode; and A drain electrode, which is directly or indirectly connected to the side of the n-type semiconductor layer opposite to the source electrode, The donor concentration of the pressure-resistant layer in the region between the bottom of the trench and the bottom surface of the n-type semiconductor layer in the above-mentioned n-type semiconductor layer is 7×10 16 cm -3 or less. The thickness of the first insulator is in the range of 50 nm or more and 300 nm or less.

2. The trench-type MESFET according to claim 1, wherein The gate electrode includes NiO.

3. The trench-type MESFET according to claim 1 or 2, wherein The radius of curvature at the vertex of the curve of the edge of the bottom of the gate electrode in the cross section in the width direction of the trench is 0.1 μm or more.

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