A method, device, equipment, and medium for monitoring the dynamic balancing phase of PCIe devices.

Abstract

This application discloses a method, apparatus, device, and medium for monitoring the dynamic balancing phase of a PCIe device, relating to the field of computer technology. The method includes: reading data from a pre-integrated dynamic balancing status register in the PCIe device to retrieve target register data corresponding to the current dynamic balancing phase of the PCIe device; querying a pre-defined mapping database using the target register data to retrieve the target phase indication method corresponding to the target register data; selecting a target indicator light from a pre-integrated indicator light group in the PCIe device, and controlling the target indicator light to display according to the target phase indication method. This technical solution avoids the need for a protocol analyzer to determine the current dynamic balancing state of the PCIe device, thereby significantly saving on equipment R&D costs, maintenance costs, and user learning costs, and avoiding complex equipment operation procedures.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a method, apparatus, device, and medium for monitoring the dynamic balancing phase of PCIe devices. Background Technology

[0002] PCIe (Peripheral Component Interconnect Express) is the third generation of I / O bus after ISA (Industry Standard Architecture) and PCI bus. Its main advantages are high data transfer rate, strong anti-interference capability, long transmission distance, and low power consumption.

[0003] Starting with PCIe 3.0, the PCI-SIG (Peripheral Component Interconnect Special Interest Group) introduced the concept of Dynamic Equalization, which was also adopted in PCIe 4.0, PCIe 5.0, and PCIe 6.0. The following section uses PCIe 3.0 as an example to introduce the concept and process of equalization:

[0004] Because PCIe 3.0 signals can reach speeds of up to 8Gb / s, and the link traces can be quite long, excessive attenuation of high-speed signals can occur, preventing the acquisition of an open eye diagram at the receiving end. Therefore, equalization settings are used at both the Tx and Rx ends of PCIe 3.0 to compensate for the attenuation of high-speed signals over long links. However, since the transmission link lengths of PCIe 3.0 signals vary in actual products, equalization at the Tx transmitting end may be sufficient for good compensation, without the need for equalization at the Rx end; alternatively, using appropriate equalization level combinations at both the Tx transmitting and Rx receiving ends may be necessary to obtain the optimal eye diagram.

[0005] In PCIe 3.0, a dynamic equalization method is used to automatically configure the optimal equalization combination to meet the needs at different times. That is, the system will automatically analyze the performance of high-speed signals at the receiving end (such as eye diagrams) based on the link conditions, and use the analysis results to guide how to set the equalization parameters for the Tx transmitter and Rx receiver. The dynamic equalization initialization process in PCIe 3.0 includes several stages. For example, Phase 0: The downstream port uses 8b / 10b encoding to convey the preset values (presets) of the transmitter and receiver to the upstream port, and these values are conveyed using the TS2 training sequence (Train Sequence 2). After the signal rate switches to 8GT / s, the upstream port sends the TS1 training sequence containing the preset values it received. Phase 1: Through the exchange of the TS1 training sequence, the initialization link with the preset 8GT / s is successfully established (BER <= 10e-4). Phase 2: The downstream port device sends an equalization request through the TS1 training sequence to adjust the output settings of the upstream port device until the optimal settings are obtained (BER <= 10e-12). Phase 3: The upstream port device sends an equalization (equalization coefficient / preset) request through the TS1 training sequence to adjust the output settings of the downstream port device until the optimal settings are obtained (BER <= 10e-12).

[0006] During the dynamic equalization process, negotiation between two devices may fail, resulting in the PCIe device not setting the optimal parameter values, which may cause the PCIe device not to reach the normal operating speed, or many errors may occur during operation, leading to device failures, system crashes and other problems. At this time, it is often necessary to determine whether the negotiation process is successfully completed. If not, at which stage it is stuck, so as to locate and solve the problem. The existing technology currently uses a protocol analyzer to analyze the entire dynamic equalization negotiation process. Among the mainstream protocol analyzers on the market, in addition to the instrument itself, a matching test card needs to be purchased. This card is installed between the master device and the slave device at both ends of the PCIe signal to analyze the negotiation equalization process between them.

[0007] However, protocol analyzer devices are expensive, and now the PCIe is updated very quickly, and the instruments also need to be updated, which increases the R & D investment cost greatly. Secondly, when using a protocol analyzer, not only the instrument needs to be purchased, but also a fixture needs to be purchased. The fixture is easily damaged when plugged and unplugged, and is expensive and troublesome to repair. In addition, the use of a protocol analyzer requires long-term training to get started, which puts forward new learning requirements and training needs for R & D personnel. And currently, there is only one type of interface for the test card supporting the protocol analyzer, while there are various interface types for PCIe devices. Some high-speed interfaces are not compatible with the test card, resulting in inability to use. Or there is no physical interface between two terminals, and they communicate and negotiate directly through a transmission line, which makes it impossible to perform the card insertion operation. Summary of the Invention

[0008] In view of this, the purpose of this invention is to provide a method, apparatus, device, and medium for monitoring the dynamic balancing phase of PCIe devices, enabling users to quickly and intuitively understand the current dynamic balancing phase of a PCIe device at a very low cost, without the need for a protocol analyzer. The specific solution is as follows:

[0009] Firstly, this application discloses a method for monitoring the dynamic balancing phase of PCIe devices, including:

[0010] Data is read from the pre-integrated dynamic balancing status register in the PCIe device to retrieve the target register data corresponding to the current dynamic balancing stage of the PCIe device.

[0011] The target register data is used to query a preset mapping database to retrieve the target stage indication method corresponding to the target register data.

[0012] The target indicator light is selected from the indicator light group pre-integrated in the PCIe device, and the target indicator light is controlled to display according to the target stage indication method.

[0013] Optionally, before reading data from the pre-integrated dynamic balancing status register in the PCIe device, the method further includes:

[0014] Collect target stage feature information corresponding to the current dynamic balancing stage of the PCIe device;

[0015] The collected target stage feature information is saved to the dynamic equilibrium state register to obtain the corresponding target register data;

[0016] The current dynamic balancing stage of the PCIe device is any one of the following stages in the PCIe dynamic balancing process: Phase 1, Phase 2, Phase 3, and EQ complete.

[0017] Optionally, before querying the preset mapping database using the target register data, the method further includes:

[0018] Pre-collect stage characteristic information corresponding to different types of dynamic equilibrium stages;

[0019] Different stage indication methods are configured for different stage feature information, and the corresponding mapping relationships are recorded to obtain the mapping relationship library.

[0020] Optionally, configuring different stage indication methods for different stage feature information includes:

[0021] Different indicator light display colors and different indicator light flashing modes are configured for different stage feature information.

[0022] Optionally, the step of filtering the target indicator light from the indicator light group pre-integrated in the PCIe device includes:

[0023] Based on the pre-set correspondence between different stage feature information and different indicator lights, the target indicator light corresponding to the target register data is selected from the indicator light group pre-integrated in the PCIe device.

[0024] Optionally, the process of controlling the target indicator light to display according to the target stage indication method further includes:

[0025] The indicator light corresponding to the previous dynamic equilibrium stage is turned off.

[0026] Optionally, the PCIe device dynamic balancing phase monitoring method further includes:

[0027] Monitor whether the indicator lights corresponding to each of the dynamic balancing stages of the PCIe device within the preset time period have been displayed in accordance with the corresponding stage indication method;

[0028] If not, determine the target dynamic equilibrium stage corresponding to the indicator light currently in the display state, determine the preset device parameters corresponding to the target dynamic equilibrium stage, and then adjust the preset device parameters.

[0029] Secondly, this application discloses a PCIe device dynamic balancing phase monitoring device, comprising:

[0030] The data reading module is used to read data from the dynamic balancing status register pre-integrated in the PCIe device, so as to read the target register data corresponding to the current dynamic balancing stage of the PCIe device from the dynamic balancing status register.

[0031] The information query module is used to query a preset mapping relationship library using the target register data, so as to retrieve the target stage indication method corresponding to the target register data from the mapping relationship library;

[0032] The status indication module is used to filter out the target indicator from the indicator group pre-integrated in the PCIe device and control the target indicator to display according to the target stage indication method.

[0033] Thirdly, this application discloses an electronic device, including:

[0034] Memory, used to store computer programs;

[0035] A processor is used to execute the computer program to implement the aforementioned PCIe device dynamic balancing phase monitoring method.

[0036] Fourthly, this application discloses a computer-readable storage medium for storing a computer program, which, when executed by a processor, implements the aforementioned PCIe device dynamic balancing phase monitoring method.

[0037] In this application, data is first read from the pre-integrated dynamic balancing status register in the PCIe device to retrieve target register data corresponding to the current dynamic balancing stage of the PCIe device. Then, the target register data is used to query a preset mapping database to retrieve the target stage indication mode corresponding to the target register data. Finally, target indicator lights are selected from the pre-integrated indicator light groups in the PCIe device, and the target indicator lights are controlled to display according to the target stage indication mode. Therefore, this application integrates a dynamic balancing status register into the PCIe device in advance. By reading data from this dynamic balancing status register, the target register data corresponding to the current dynamic balancing stage of the PCIe device can be retrieved. Then, based on the target register data, the corresponding target stage indication method is determined to control the target indicator light to perform the corresponding display operation. In this way, users can quickly know the current dynamic balancing status of the PCIe device by directly observing the indication method presented by the indicator light. This allows users to carry out corresponding device debugging and performance optimization operations accordingly, avoiding the need to use a protocol analyzer to know the current dynamic balancing status of the PCIe device. This greatly saves equipment R&D investment costs, maintenance costs, and user learning costs, and avoids complex device operation procedures. Attached Figure Description

[0038] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0039] Figure 1 This is a flowchart of a PCIe device dynamic balancing stage monitoring method disclosed in this application;

[0040] Figure 2 This application discloses a flowchart of a specific PCIe device dynamic balancing stage monitoring method.

[0041] Figure 3 This is a schematic diagram of the structure of a PCIe device dynamic balancing stage monitoring device disclosed in this application;

[0042] Figure 4 This is a structural diagram of an electronic device disclosed in this application. Detailed Implementation

[0043] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0044] Current technology uses protocol analyzers to analyze the entire dynamic balancing negotiation process of PCIe devices. Most mainstream protocol analyzers on the market require not only the instrument itself but also a matching test card. This card is installed between the master and slave devices at both ends of the PCIe signal to analyze their negotiation and balancing process. However, protocol analyzers are expensive, and with the rapid pace of PCIe technology updates, the instruments also need to be updated, significantly increasing R&D costs. Secondly, using a protocol analyzer requires purchasing not only the instrument but also fixtures, which are prone to damage during insertion and removal, are expensive, and difficult to repair. Furthermore, using a protocol analyzer requires extensive training, posing new learning requirements and training needs for R&D personnel. Moreover, current protocol analyzer test cards only come with one type of interface, while PCIe devices have various interface types. Some high-speed interfaces are incompatible with the test card, rendering them unusable. Alternatively, there may be no physical interface between the two terminals, communicating and negotiating directly through a transmission line, which prevents card insertion.

[0045] To address this, this application provides a dynamic balancing phase monitoring scheme for PCIe devices, which avoids the need for a protocol analyzer to determine the current dynamic balancing status of PCIe devices. This significantly reduces equipment R&D costs, maintenance costs, and user learning costs, and avoids complex equipment operation procedures.

[0046] See Figure 1 As shown in the figure, this invention discloses a method for monitoring the dynamic balancing phase of PCIe devices, including:

[0047] Step S11: Read data from the pre-integrated dynamic balancing status register in the PCIe device to retrieve the target register data corresponding to the current dynamic balancing stage of the PCIe device.

[0048] In this embodiment, a dynamic balancing status register for recording the stage characteristic information of the current dynamic balancing stage of the PCIe device is pre-integrated in the PCIe device. By reading the data from the dynamic balancing status register, the stage characteristic information of the current dynamic balancing stage of the PCIe device can be obtained, that is, the corresponding target register data can be obtained.

[0049] Specifically, before reading data from the pre-integrated dynamic balancing status register in the PCIe device, the process may further include: collecting target stage feature information corresponding to the current dynamic balancing stage of the PCIe device; and saving the collected target stage feature information to the dynamic balancing status register to obtain the corresponding target register data.

[0050] The current dynamic balancing phase of the PCIe device can be any one of the following phases in the PCIe dynamic balancing process: Phase 1, Phase 2, Phase 3, and EQ complete. Phase 1: A successful initial connection is established using the TS1 training sequence with a preset 8GT / s (BER <= 10e-4). Phase 2: Downlink devices send balancing requests via the TS1 training sequence to adjust the output settings of uplink devices until the optimal settings are achieved (BER <= 10e-12). Phase 3: Uplink devices send balancing (balancing coefficient / preset) requests via the TS1 training sequence to adjust the output settings of downlink devices until the optimal settings are achieved (BER <= 10e-12). The EQ complete phase indicates the balancing is complete.

[0051] It is understood that the aforementioned stage feature information is used to uniquely represent the feature information of the corresponding dynamic equilibrium stage, and can be set according to the actual application needs, without specific limitations here.

[0052] Step S12: Use the target register data to query the preset mapping relationship library to find the target stage indication method corresponding to the target register data from the mapping relationship library.

[0053] In this embodiment, a mapping relationship library is pre-set to record the mapping relationship between stage feature information and stage indication method.

[0054] Specifically, before querying the preset mapping relationship library using the target register data, the process may further include: pre-collecting stage feature information corresponding to different types of dynamic equilibrium stages; configuring different stage indication methods for different stage feature information; and recording the corresponding mapping relationships to obtain the mapping relationship library.

[0055] In this embodiment, different stage feature information corresponds to different stage indication methods. That is, this embodiment uses different indication methods to indicate different dynamic equilibrium nodes, so that users can easily tell which type of dynamic equilibrium stage the current indicator light display corresponds to by visual observation. Specifically, configuring different stage indication methods for different stage feature information may include configuring different indicator light display colors and different indicator light flashing patterns for different stage feature information. That is, this embodiment may consider indicating different dynamic equilibrium stages based on different indicator light display colors and different indicator light flashing patterns. Of course, in addition to this, this embodiment may also use other indication methods for indication, and is not limited to indicator light display colors and indicator light flashing patterns. For example, it may also be based on different indicator light brightness.

[0056] Step S13: Select the target indicator light from the indicator light group pre-integrated in the PCIe device, and control the target indicator light to display according to the target stage indication method.

[0057] In this embodiment, a set of indicator lights is pre-integrated into the PCIe device. After determining the target stage indication method corresponding to the current dynamic balancing stage through step S12, a target indicator light can be selected from the indicator light group, and then the target indicator light is controlled to display according to the target stage indication method. For example, assuming the target stage indication method is to use blue as the indicator light color and flash once every 5 seconds, then the target indicator light will display the color and flash once every 5 seconds under the control of the target stage indication method. In this embodiment, the indicator lights include, but are not limited to, LED lights.

[0058] Therefore, this application embodiment integrates a dynamic balancing status register in advance in the PCIe device. By reading data from this dynamic balancing status register, the target register data corresponding to the current dynamic balancing stage of the PCIe device can be retrieved. Then, based on the target register data, the corresponding target stage indication method is determined to control the target indicator light to perform the corresponding display operation. In this way, users can quickly know the current dynamic balancing status of the PCIe device by directly observing the indication method presented by the indicator light. This allows users to carry out corresponding device debugging and performance optimization operations accordingly, avoiding the need to use a protocol analyzer to know the current dynamic balancing status of the PCIe device. This greatly saves equipment R&D investment costs, maintenance costs, and user learning costs, and avoids complex device operation procedures.

[0059] See Figure 2 As shown in the figure, this application discloses a specific method for monitoring the dynamic balancing phase of PCIe devices, including:

[0060] Step S21: Read data from the pre-integrated dynamic balancing status register in the PCIe device to retrieve the target register data corresponding to the current dynamic balancing stage of the PCIe device.

[0061] Step S22: Use the target register data to query the preset mapping relationship library to find the target stage indication method corresponding to the target register data from the mapping relationship library.

[0062] For details regarding steps S21 to S22, please refer to the relevant content disclosed in the foregoing embodiments, which will not be repeated here.

[0063] Step S23: Based on the pre-set correspondence between different stage feature information and different indicator lights, select the target indicator light corresponding to the target register data from the indicator light group pre-integrated in the PCIe device.

[0064] In this embodiment, a correspondence between different stage feature information and different indicator lights is pre-set. After obtaining the target register data, since the target register data is actually the corresponding stage feature information stored in the dynamic equalization state register, the target indicator light corresponding to the target register data can be selected from the indicator light group pre-integrated in the PCIe device by searching the correspondence.

[0065] Step S24: Control the target indicator light to display according to the target stage indication method.

[0066] Furthermore, in the process of controlling the target indicator light to display according to the target stage indication method in this embodiment, it may also include: controlling the indicator light corresponding to the previous dynamic balancing stage to turn off. That is, in this embodiment, while indicating the current latest dynamic balancing stage, the indicator light corresponding to the previous dynamic balancing stage is turned off, so that the user can more clearly know which dynamic balancing stage the PCIe device is currently in.

[0067] Step S25: Monitor whether the indicator lights corresponding to all dynamic balancing stages of the PCIe device within the preset time period have been displayed in accordance with the corresponding stage indication method.

[0068] Step S26: If not, determine the target dynamic equilibrium stage corresponding to the indicator light currently in the display state, determine the preset device parameters corresponding to the target dynamic equilibrium stage, and then adjust the preset device parameters.

[0069] In this embodiment, it is possible to monitor whether the indicator lights corresponding to each of the dynamic balancing stages have been displayed in accordance with the corresponding stage indication method within a preset time period. If not, it is very likely that the current dynamic balancing negotiation process is stuck at the currently indicated stage. Therefore, the target dynamic balancing stage corresponding to the indicator light currently in the display state is further determined, and the preset device parameters corresponding to the target dynamic balancing stage are determined. Then, the preset device parameters are adjusted to optimize the performance of the PCIe device.

[0070] Accordingly, see Figure 3 As shown in the illustration, this application also discloses a PCIe device dynamic balancing phase monitoring device, comprising:

[0071] The data reading module 11 is used to read data from the dynamic balancing status register pre-integrated in the PCIe device, so as to read the target register data corresponding to the current dynamic balancing stage of the PCIe device from the dynamic balancing status register.

[0072] The information query module 12 is used to query a preset mapping relationship library using the target register data, so as to retrieve the target stage indication method corresponding to the target register data from the mapping relationship library;

[0073] The status indication module 13 is used to filter out the target indicator from the indicator group pre-integrated in the PCIe device and control the target indicator to display according to the target stage indication method.

[0074] Therefore, this application embodiment integrates a dynamic balancing status register in advance in the PCIe device. By reading data from this dynamic balancing status register, the target register data corresponding to the current dynamic balancing stage of the PCIe device can be retrieved. Then, based on the target register data, the corresponding target stage indication method is determined to control the target indicator light to perform the corresponding display operation. In this way, users can quickly know the current dynamic balancing status of the PCIe device by directly observing the indication method presented by the indicator light. This allows users to carry out corresponding device debugging and performance optimization operations accordingly, avoiding the need to use a protocol analyzer to know the current dynamic balancing status of the PCIe device. This greatly saves equipment R&D investment costs, maintenance costs, and user learning costs, and avoids complex device operation procedures.

[0075] In one specific embodiment, the device further includes:

[0076] The information acquisition module is used to acquire target stage feature information corresponding to the current dynamic balancing stage of the PCIe device;

[0077] The information storage module is used to save the collected target stage feature information to the dynamic equilibrium state register to obtain the corresponding target register data;

[0078] The current dynamic balancing stage of the PCIe device is any one of the following stages in the PCIe dynamic balancing process: Phase 1, Phase 2, Phase 3, and EQ complete.

[0079] In one specific embodiment, the device further includes:

[0080] The information collection module is used to collect the stage characteristic information corresponding to different types of dynamic equilibrium stages in advance;

[0081] The configuration module is used to configure different stage indication methods for different stage feature information and record the corresponding mapping relationship to obtain the mapping relationship library.

[0082] In one specific implementation, the configuration module is specifically used to configure different indicator light display colors and different indicator light flashing modes for different stage feature information.

[0083] In one specific implementation, the status indication module 13 is specifically used to filter out the target indicator corresponding to the target register data from the indicator group pre-integrated in the PCIe device based on the correspondence between different stage feature information and different indicator lights in a pre-set manner.

[0084] In one specific embodiment, the device is further configured to control the indicator corresponding to the previous dynamic equilibrium stage to turn off during the process in which the status indication module 13 controls the target indicator to display in accordance with the target stage indication method.

[0085] In one specific embodiment, the device further includes:

[0086] The monitoring module is used to monitor whether the indicator lights corresponding to each dynamic balancing stage of the PCIe device within a preset time period have been displayed in accordance with the corresponding stage indication method;

[0087] The debugging module is used to determine the target dynamic equilibrium stage corresponding to the indicator light currently in the display state when the monitoring result of the monitoring module is negative, and to determine the preset device parameters corresponding to the target dynamic equilibrium stage, and then to debug the preset device parameters.

[0088] Figure 4 The illustration shows an electronic device 20 provided in an embodiment of this application. Specifically, the electronic device 20 may further include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input / output interface 25, and a communication bus 26. The memory 22 stores a computer program, which is loaded and executed by the processor 21 to implement the relevant steps in the PCIe device dynamic balancing stage monitoring method disclosed in any of the foregoing embodiments. Alternatively, the electronic device 20 in this embodiment may specifically be a computer.

[0089] In this embodiment, the power supply 23 is used to provide voltage to the various hardware devices on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and external devices, and the communication protocol it follows can be any communication protocol applicable to the technical solution of this application, and is not specifically limited here; the input / output interface 25 is used to acquire external input data or output data to the outside world, and its specific interface type can be selected according to the specific application needs, and is not specifically limited here.

[0090] In addition, the memory 22, as a carrier for resource storage, can be a read-only memory, random access memory, disk or optical disk, etc. The resources stored thereon can include operating system 221, computer program 222, etc., and the storage method can be temporary storage or permanent storage.

[0091] The operating system 221 is used to manage and control the various hardware devices on the electronic device 20, and the computer program 222 may be Windows Server, Netware, Unix, Linux, etc. In addition to including a computer program capable of performing the PCIe device dynamic balancing phase monitoring method executed by the electronic device 20 as disclosed in any of the foregoing embodiments, the computer program 222 may further include a computer program capable of performing other specific tasks.

[0092] Furthermore, this application also discloses a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, it implements the aforementioned PCIe device dynamic balancing phase monitoring method. Specific steps of this method can be found in the corresponding content disclosed in the foregoing embodiments, and will not be repeated here.

[0093] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0094] The present invention provides a detailed description of a method, apparatus, device, and medium for monitoring the dynamic balancing stage of PCIe devices. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, those skilled in the art will recognize that there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A PCIe device dynamic equalization phase monitoring method, characterized in that, The method comprises the following steps: collecting target stage characteristic information corresponding to the current dynamic balance stage of the PCIe device; saving the collected target stage characteristic information to a dynamic balance state register to obtain corresponding target register data; reading data from the dynamic balance state register pre-integrated in the PCIe device to read out target register data corresponding to the current dynamic balance stage of the PCIe device from the dynamic balance state register; querying a preset mapping relationship library using the target register data to query a target stage indication mode corresponding to the target register data from the mapping relationship library; selecting a target indicator light from the indicator light group pre-integrated in the PCIe device and controlling the target indicator light to display according to the target stage indication mode; wherein the current dynamic balance stage of the PCIe device is any one of the Phase 1 stage, the Phase 2 stage, the Phase 3 stage and the EQ complete stage in the PCIE dynamic balance process; the Phase 1 stage comprises passing through an alternating TS1 training sequence with a preset 8GT / s initialization link success; the Phase 2 stage comprises sending a balance request by a downlink port device through a TS1 training sequence to adjust the output setting of an uplink port device until the optimal setting is obtained; the Phase 3 stage comprises sending a balance request by an uplink port device through a TS1 training sequence to adjust the output setting of a downlink port device until the optimal setting is obtained; the EQ complete stage is the balance completion stage.

2. The PCIe device dynamic equalization phase monitoring method of claim 1, wherein, Before querying the preset mapping relationship library using the target register data, the method further comprises the following steps: pre-collecting stage characteristic information corresponding to different types of dynamic balance stages respectively; configuring different stage indication modes for different stage characteristic information and recording corresponding mapping relationships to obtain the mapping relationship library.

3. The PCIe device dynamic equalization phase monitoring method of claim 2, wherein, The method further comprises the following steps: configuring different indicator light display colors and different indicator light flashing modes for different stage characteristic information.

4. The PCIe device dynamic equalization phase monitoring method of claim 2 or 3, wherein, The method further comprises the following steps: based on the correspondence between different stage characteristic information and different indicator lights pre-set, selecting a target indicator light corresponding to the target register data from the indicator light group pre-integrated in the PCIe device.

5. The PCIe device dynamic equalization phase monitoring method of claim 4, wherein, The method further comprises the following steps: controlling the indicator light corresponding to the previous dynamic balance stage to be turned off.

6. The PCIe device dynamic equalization phase monitoring method of claim 5, wherein, The method further comprises the following steps: monitoring whether all indicator lights corresponding to all dynamic balance stages of the PCIe device have been displayed according to the corresponding stage indication mode within a preset time period; If no, a target dynamic balance stage corresponding to the indicator light currently in a display state is determined, preset device parameters corresponding to the target dynamic balance stage are determined, and the preset device parameters are debugged.

7. A PCIe device dynamic equalization phase monitoring apparatus, characterized in that, The method comprises the steps of: An information acquisition module is configured to acquire target stage characteristic information corresponding to a current dynamic balance stage of a PCIe device; An information saving module is configured to save the acquired target stage characteristic information to a dynamic balance state register to obtain corresponding target register data; A data reading module is configured to read data from the dynamic balance state register pre-integrated in the PCIe device to read out target register data corresponding to the current dynamic balance stage of the PCIe device from the dynamic balance state register; An information query module is configured to query a preset mapping relationship library using the target register data to query a target stage indication mode corresponding to the target register data from the mapping relationship library; A state indication module is configured to select a target indicator light from a group of indicator lights pre-integrated in the PCIe device and control the target indicator light to display in the target stage indication mode; The current dynamic balance stage of the PCIe device is any one of a Phase 1 stage, a Phase 2 stage, a Phase 3 stage, and an EQ complete stage in a PCIE dynamic balance process; The Phase 1 stage comprises successfully initializing a link with a preset 8GT / s through an alternating TS1 training sequence; The Phase 2 stage comprises sending a balance request by a downlink port device through a TS1 training sequence to adjust output settings of an uplink port device until optimal settings are obtained; The Phase 3 stage comprises sending a balance request by an uplink port device through a TS1 training sequence to adjust output settings of a downlink port device until optimal settings are obtained; The EQ complete stage is a balance completion stage.

8. An electronic device, comprising: The method comprises the steps of: A memory is configured to save a computer program; A processor is configured to execute the computer program to implement the PCIe device dynamic balance stage monitoring method according to any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that, A computer program is saved, and the computer program is executed by a processor to implement the PCIe device dynamic balance stage monitoring method according to any one of claims 1 to 6.

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