Phase change storage material, phase change memory and preparation method thereof

Abstract

The embodiments of the present disclosure provide a phase change memory material, a phase change memory and a preparation method thereof. The phase change memory material includes Ga, Sb and Te elements, wherein the Ga content is x mol%, and 0<x≤50, the Sb content is y mol%, and 20≤y≤90, and the Te content is (100-x-y) mol%.

Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor technology, and in particular to a phase change memory material, a phase change memory and a preparation method thereof. Background Art

[0002] In the existing storage hierarchy, there's a gap in storage speed and capacity between dynamic random access memory (DRAM) and non-volatile memory (Flash), limiting further advancements in computing power. To address this, storage-class memory (SCM), a type of memory with storage speed and capacity intermediate between DRAM and Flash, has been proposed. Phase-change memory (PCM) is considered the most promising solution for SCM, and through the selection of PCM materials, a balance between performance and cost can be achieved. Summary of the Invention

[0003] According to a first aspect of the present disclosure, a phase change memory material is provided, comprising Ga, Sb and Te elements, wherein the Ga content is x mol%, and 0<x≤50, the Sb content is y mol%, and 20≤y≤90, and the Te content is (100-xy)mol%.

[0004] In some embodiments, the phase-change memory material further comprises Ti element, wherein the content of Ti is z mol %, and 0<z≤50, and the content of Te is (100-xyz) mol %.

[0005] In some embodiments, the Ga content satisfies: 5 mol%≤x mol%≤10 mol%.

[0006] In some embodiments, the Te content satisfies: greater than 0 and less than or equal to 80 mol %.

[0007] According to a second aspect of the present disclosure, a phase change memory is provided, comprising:

[0008] A first conductive line, a phase-change memory unit, and a second conductive line are sequentially stacked along a first direction, the first conductive line extends along a second direction, the second conductive line extends along a third direction, and the first direction, the second direction, and the third direction are perpendicular to each other;

[0009] The phase-change memory unit includes a phase-change memory layer, and a constituent material of the phase-change memory layer includes the phase-change memory material as described in the first aspect of the present disclosure.

[0010] In some embodiments, the phase-change memory layer further comprises Ti, wherein the content of Ti is z mol %, and 0<z≤50, and the content of Te is (100-xyz) mol %.

[0011] In some embodiments, the Ga content satisfies: 5 mol%≤x mol%≤10 mol%; and / or,

[0012] The Te content satisfies: greater than 0 and less than or equal to 80 mol%.

[0013] In some embodiments, the phase-change memory unit further includes two electrode layers, which are arranged on opposite sides of the phase-change memory layer along the first direction, and the two electrode layers are in contact with the phase-change memory layer;

[0014] The adhesion between the phase change memory layer and the electrode layer is characterized by an energy release rate, and the energy release rate is greater than or equal to 0.7 J / m 2 .

[0015] In some embodiments, the electrode layer is made of tungsten.

[0016] According to a third aspect of the present disclosure, a method for preparing a phase change memory is provided, comprising:

[0017] A first conductive line layer and a memory cell material layer are stacked and formed along a first direction; wherein the memory cell material layer comprises a phase change memory material layer, and the material of the phase change memory material layer comprises the phase change memory material described in the first aspect of the present disclosure; the first direction is perpendicular to the plane where the first conductive line layer is located;

[0018] forming a plurality of first isolation structures penetrating the first conductive line layer and the memory cell material layer; wherein each first isolation structure extends along a second direction, and the plurality of first isolation structures are arranged in parallel along a third direction; the plurality of first isolation structures divide the first conductive line layer into a plurality of first conductive lines, and the plurality of first isolation structures also divide the memory cell material layer into a plurality of phase change memory strips; the third direction and the second direction are perpendicular to the first direction;

[0019] forming a second conductive line layer covering the first isolation structure and the memory cell material layer;

[0020] A plurality of second isolation structures are formed that penetrate the second conductive line layer and the storage unit material layer; wherein each second isolation structure extends along the third direction, and the plurality of second isolation structures are arranged in parallel along the second direction; the plurality of second isolation structures divide the second conductive line layer into a plurality of second conductive lines; and the plurality of second isolation structures divide the plurality of phase change storage strips into a plurality of mutually independent phase change storage units.

[0021] In the phase-change memory material provided by the embodiments of the present disclosure, the Ga content is x mol%, with 0<x≤50, the Sb content is y mol%, with 20≤y≤90, and the Te content is (100-xy) mol%. The phase-change memory material provided by the embodiments of the present disclosure has good adhesion to the electrode material, reducing the probability of delamination between the phase-change memory layer and the electrode layer, and improving the long-term reliability of the phase-change memory using the phase-change memory material.

[0022] Furthermore, when the Ga and Sb content are within the above-mentioned ranges, the phase-change memory material has a relatively high hardness, so that during the preparation process of the phase-change memory, when the electrode layer deposited on the phase-change memory layer applies stress to the phase-change memory layer, the phase-change memory layer does not deform or only deforms slightly, thereby reducing the probability of peeling between the phase-change memory layer and the electrode layer below it during the preparation process, thereby improving the production yield of the phase-change memory. In summary, the phase-change memory layer prepared by the phase-change memory material provided by the present disclosure has a low probability of peeling from the electrode layer, which can reduce production risks. In addition, the material composition can be flexibly and controllably adjusted, and by regulating the proportion of the Ga element, a compromise between thermal stability and operating speed can be achieved to a certain extent. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1a and Figure 1b A comparison chart of peeling results of two phase-change memory layers provided in an embodiment of the present disclosure;

[0024] Figure 2 A schematic diagram of the structure of a phase change memory provided by an embodiment of the present disclosure;

[0025] Figure 3 for Figure 2 A partial cross-sectional view of the phase change memory shown;

[0026] Figure 4 A schematic diagram of a sample structure for adhesion testing of a phase change memory material layer and a tungsten layer provided in an embodiment of the present disclosure;

[0027] Figure 5 for Figure 4 Energy release rates of the different specimens shown;

[0028] Figure 6A schematic flow chart of a method for preparing a phase change memory provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0029] The technical solution of the present disclosure is further elaborated in detail below with reference to the accompanying drawings and specific embodiments.

[0030] In the description of the present disclosure, it should be understood that the terms "length", "width", "depth", "up", "down", "outside", etc., indicating orientation or positional relationships, are based on the orientation or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present disclosure and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present disclosure.

[0031] The basic principle of phase-change memory (PCM) is that a high-value, short-duration (i.e., high and narrow) electric pulse is applied to a PCM cell. Due to Joule heating and other factors, a portion of the initially crystalline PCM layer melts due to temperatures exceeding its melting point. After the pulse is interrupted, the melted portion rapidly cools, reverting to an amorphous state with low atomic order, completing the transition from low resistance to high resistance. This is the erase (reset) process. The melted portion during this process is called the programming volume. If a low-value, long-duration (i.e., low and wide) electric pulse is applied, causing the temperature within the programming volume to rise above the crystallization temperature but below the melting temperature, and the duration is sufficient for the amorphous structure within the programming volume to crystallize, a low-resistance state is achieved. This is the write (set) process. The read process of PCM involves applying a low, narrow electric pulse to the PCM cell, bringing the PCM layer below its crystallization temperature, and then measuring the cell's resistance.

[0032] Phase-change memory materials, the storage medium of phase-change memory, have a direct impact on the device's performance. Typically, the performance of phase-change memory is measured by metrics such as write speed, data retention, and on / off ratio. Therefore, performance research on phase-change memory materials includes studies on parameters such as crystallization rate, crystallization temperature, amorphous structure stability, thermal stability, and resistance window (i.e., the ratio of the resistivity of the amorphous and crystalline states).

[0033] For phase-change memory, write operations typically take longer than erase operations, becoming a key factor limiting its high-speed operation. This write time is related to the crystallization rate of the phase-change memory material. A faster crystallization rate shortens the write time, and the phase-change memory's operating speed increases.

[0034] The data retention of phase-change memory (PCM) depends on the amorphous structural stability and thermal stability of the PCM material. The better the amorphous structural and thermal stability, the longer the data retention. To achieve these high amorphous structural and thermal stability, the PCM material must have a higher crystallization temperature.

[0035] The on / off ratio of phase-change memory (PCM) is determined by the resistance window of the PCM material. This refers to the resistivity difference between the amorphous and crystalline states. A larger resistivity difference between the amorphous and crystalline states results in a larger resistance window, ensuring a higher on / off ratio and enabling accurate and fast data reads.

[0036] The most mature phase-change memory material is the germanium-antimony-tellurium (Ge-Sb-Te, GST) ternary compound. Doping modification based on the Ge-Sb-Te compound is a relatively effective modification method, capable of meeting the application requirements of most devices. However, as the price of germanium (Ge) rises, the price of phase-change memory materials also rises, which in turn leads to an increase in the price of phase-change memory.

[0037] Antimony-tellurium (Sb-Te) compounds have a relatively fast crystallization rate, making them the preferred phase-change memory material for achieving high-speed operation in phase-change memories, and they also offer a price advantage. However, Sb-Te compounds often suffer from low crystallization temperatures and poor amorphous structural stability, making it impossible to guarantee sufficient data retention in the device. More importantly, when Sb-Te compounds are applied to phase-change memories, the phase-change memory layer using Sb-Te compounds easily peels off from the electrode layer, causing damage to the phase-change memory cell, which severely limits the application of Sb-Te compounds in commercial phase-change memories.

[0038] Figure 1a and Figure 1b A comparison of the peeling results of the two phase change storage layers. Figure 1a and Figure 1b The phase change memory layer and the tungsten layer 40 are sequentially deposited on the substrate 10, and multiple phase change memory cells are formed by etching, wherein: Figure 1a The phase change storage layer is the commonly used GST layer. Figure 1b The phase change memory layer is a Sb-Te layer. An interconnection structure is provided in the substrate 10, and the interconnection structure is used to contact and connect with the GST layer or the Sb-Te layer.

[0039] An electric pulse is applied to the tungsten layer 40 using the electrode 90. Under the action of the electric pulse, the phase change memory layer undergoes a phase change, and it is observed whether the phase change memory layer and the tungsten layer will peel off. Figure 1a As shown, the GST layer and the tungsten layer 40 do not peel off; Figure 1b As shown, the Sb—Te layer and the tungsten layer 40 are peeled off over a large area, exposing the substrate 10 .

[0040] Here, the grayscale of the substrate 10 exposed after the Sb-Te layer and the tungsten layer 40 are peeled off is different from that of the substrate 10 not covered by the Sb-Te layer and the tungsten layer 40. This is because the substrate 10 not covered by the Sb-Te layer and the tungsten layer 40 has a different reflection effect on light after etching.

[0041] Depend on Figure 1a and Figure 1b It can be seen that if the Sb-Te layer is applied to phase change memory, the Sb-Te layer will peel off during the programming operation, causing damage to the phase change memory cell. Therefore, Sb-Te material is difficult to apply to mass-produced phase change memory.

[0042] In view of this, the embodiment of the present disclosure provides a phase change memory material, which is obtained by doping and modification of Sb-Te compound. The phase change memory material includes Ga, Sb and Te elements, wherein the Ga content is x mol%, and 0<x≤50, the Sb content is y mol%, and 20≤y≤90, and the Te content is (100-xy)mol%. The phase change memory material is represented by the chemical formula Ga x Sb y Te (100-x-y) , where x satisfies 0<x≤50, and y satisfies 20≤y≤90.

[0043] The content of Te element is (100-xy) mol%, which can be understood as: when the total amount of Ga-Sb-Te material is 100 mol, except for x mol of Ga element and y mol of Sb element, the rest are Te element.

[0044] For example, the content of Te element satisfies greater than 0 and less than or equal to 80 mol %.

[0045] In the phase-change memory material provided by the embodiments of the present disclosure, the Ga content is x mol%, with 0<x≤50, the Sb content is y mol%, with 20≤y≤90, and the Te content is (100-xy) mol%. The phase-change memory material provided by the embodiments of the present disclosure has good adhesion to the electrode material, reducing the probability of delamination between the phase-change memory layer and the electrode layer, and improving the long-term reliability of the phase-change memory using the phase-change memory material.

[0046] Furthermore, when the Ga and Sb content are within the above-mentioned ranges, the phase-change memory material has a relatively high hardness, so that during the preparation process of the phase-change memory, when the electrode layer deposited on the phase-change memory layer applies stress to the phase-change memory layer, the phase-change memory layer does not deform or only deforms slightly, thereby reducing the probability of peeling between the phase-change memory layer and the electrode layer below it during the preparation process, thereby improving the production yield of the phase-change memory. In summary, the phase-change memory layer prepared by the phase-change memory material provided by the present disclosure has a low probability of peeling from the electrode layer, which can reduce production risks. In addition, the material composition can be flexibly and controllably adjusted, and by regulating the proportion of the Ga element, a compromise between thermal stability and operating speed can be achieved to a certain extent.

[0047] The embodiment of the present disclosure also provides a phase change memory using the phase change storage material. Figure 2 A schematic diagram of the structure of a phase change memory provided by an embodiment of the present disclosure is shown. Figure 3 for Figure 2 A partial cross-sectional view of a phase change memory is shown. Figure 2 and Figure 3 As shown, the phase change memory includes: a first conductive line 100, a phase change memory unit 200, and a second conductive line 300 stacked in sequence along a first direction, the first conductive line 100 extends along a second direction, and the second conductive line 300 extends along a third direction, and the first direction, the second direction, and the third direction are perpendicular to each other;

[0048] The phase change memory unit 200 includes a phase change memory layer 201 , which is made of Ga—Sb—Te material, wherein the Ga content is x mol %, 0<x≤50, the Sb content is y mol %, 20≤y≤90, and the Te content is (100-xy) mol %.

[0049] Here, the first direction is defined as the Z direction, the second direction is defined as the X direction, and the third direction is defined as the Y direction. The first conductive line 100 and the second conductive line 300 are perpendicular to each other, and the phase-change memory unit 200 is located at the intersection of the first conductive line 100 and the second conductive line 300. For example, the first conductive line 100 can be a bit line, and the second conductive line 300 can be a word line. Alternatively, the first conductive line 100 can be a word line, and the second conductive line 300 can be a bit line.

[0050] See further Figure 3 The phase change memory unit 200 further includes a bottom electrode 202, a gating layer 203, an intermediate electrode 204 and a top electrode 205 sequentially arranged on the first conductive line along the first direction, wherein the phase change memory layer 201 is located between the intermediate electrode 204 and the top electrode 205.

[0051] In some embodiments, the phase change memory unit 200 may also include a bottom electrode 202 , a phase change memory layer 201 , an intermediate electrode 204 , a gating layer 203 and a top electrode 205 sequentially disposed on the first conductive line 100 along the first direction.

[0052] Intermediate electrode 204 is generally considered a heating electrode for phase-change memory layer 201. When an electrical pulse flows through phase-change memory cell 200, it generates Joule heat, raising the temperature of phase-change memory layer 201 and achieving a transition between the crystalline and amorphous states. The heating electrode not only affects the electrical pulses used in write and erase operations, but the adhesion between the heating electrode and phase-change memory layer 201 also directly impacts the lifespan of the phase-change memory.

[0053] It is understood that during the write and erase cycles, the phase-change memory material repeatedly transforms between the amorphous state and the crystalline state. Due to the density difference between the crystalline and amorphous states, the volume of the phase-change memory layer 201 changes during the cycle. If the adhesion between the phase-change memory layer 201 and the heater electrode is poor, the phase-change memory layer 201 and the heater electrode may peel off, resulting in a sharp increase in resistance at the interface between the phase-change memory layer 201 and the heater electrode, causing erase anomalies and device failure. In addition, in some embodiments, when a metal electrode is deposited on the phase-change memory layer 201, the stress applied to the phase-change memory layer 201 by the metal electrode may also cause peeling between the phase-change memory layer and the electrode in contact therewith.

[0054] The material of the phase change memory layer 201 provided in the embodiment of the present disclosure is Ga-Sb-Te material, which is composed of gallium (Ga), antimony (Sb) and tellurium (Te). The Ga content is x mol%, and 0<x≤50, the Sb content is y mol%, and 20≤y≤90, and the Te content is (100-xy)mol%. The composition of the phase change memory layer 201 is written in the form of a chemical formula, which can be expressed as Ga x Sb y Te (100-x-y) , where x satisfies 0<x≤50, and y satisfies 20≤y≤90.

[0055] The content of Te element is (100-xy) mol%, which can be understood as: when the total amount of Ga-Sb-Te material is 100 mol, except for x mol of Ga element and y mol of Sb element, the rest are Te element.

[0056] For example, the content of Te element satisfies greater than 0 and less than or equal to 80 mol %.

[0057] In some embodiments, the chemical formula of the material of the phase change memory layer 201 may be Ga 50 Sb 20 Te30 、Ga 50 Sb 45 Te5、Ga 40 Sb 55 Te5、Ga 30 Sb 65 Te5、Ga 20 Sb 75 Te5、Ga 10 Sb 89 Te1 or Ga1Sb 20 Te 79 .

[0058] In the phase-change memory provided in the embodiments of the present disclosure, a Ga-Sb-Te material is used to prepare a phase-change memory layer. When the Ga element content is x mol%, and 0<x≤50, the Sb content is y mol%, and 20≤y≤90, and the Te content is (100-xy)mol%, the phase-change memory layer and the electrode layer can have good adhesion, thereby reducing the probability of peeling between the phase-change memory layer and the electrode layer and improving the long-term reliability of the phase-change memory.

[0059] Furthermore, when the Ga and Sb content are within the aforementioned ranges, the Ga-Sb-Te material exhibits a high hardness. This allows the phase-change memory layer to remain intact or undergo minimal phase change when an electrode layer deposited thereon applies stress to the phase-change memory layer during its fabrication. This reduces the probability of localized separation between the phase-change memory layer and the electrode layer, improving the production yield and reliability of the phase-change memory and extending its service life. Furthermore, Ga can increase the crystallization temperature of the phase-change memory layer, thereby enhancing the stability of the amorphous structure and thermal stability of the phase-change memory layer and improving data retention.

[0060] In summary, this disclosure provides a phase-change memory material, namely a Ga-Sb-Te material, that can be applied to mass-produced phase-change memories. The phase-change memory layer and electrode layer produced with this material have a low probability of delamination, reducing production risks and improving process compatibility. Furthermore, the material composition is flexible and controllable, allowing the ratio of each element to be adjusted within the aforementioned content range to meet different performance and cost requirements. For example, by adjusting the Ga ratio, it is possible to achieve a certain degree of compromise between thermal stability and operating speed.

[0061] The following combination Figures 4 to 6 The experimental results analyze the adhesion and hardness advantages of Ga-Sb-Te materials.

[0062] Figure 4 Schematic diagram of the sample structure for adhesion test of the phase change memory material layer and the tungsten layer provided in an embodiment of the present disclosure. Figure 5for Figure 4 Energy release rates of different specimens are shown.

[0063] In the adhesion test employed in this disclosure, a phase-change memory material layer and an electrode material layer are sequentially deposited on a substrate. A tensile force is applied to the electrode material layer, causing the two layers to separate. The energy release rate during the separation process is then measured to measure the adhesion between the two layers. For example, a silicon wafer can be attached to the topmost electrode material layer and pulled upward, thereby applying an upward tensile force to the electrode material layer, thereby separating the two layers.

[0064] Energy release rate Gc is a parameter commonly used in the field to measure the adhesion between film layers. The energy release rate can quantitatively characterize the adhesion between different film layers. The energy release rate has the dimension J / m 2 , which indicates how much energy is required per unit area to break the adhesion between film layers. The greater the energy release rate, the better the adhesion.

[0065] Figure 4 and Figure 5 The adhesion test results shown here use tungsten as the electrode material. In other adhesion tests, amorphous carbon can also be used as the electrode material.

[0066] like Figure 4 As shown, sample No. 1 (#01) is a first tungsten layer 20, an Sb-Te layer 30 and a second tungsten layer 40 deposited in sequence on the substrate 10. Sample No. 2 (#02) is a Sb-Te layer 30 and a tungsten layer 40 deposited in sequence on the substrate 10. Sample No. 3 (#3) is a Ga-Sb layer 50 and a tungsten layer 60 deposited on the substrate 10.

[0067] Here, the thickness of the tungsten layer 40 in Sample No. 1 and Sample No. 2 is the same, and the thickness of the tungsten layer 60 in Sample No. 3 is greater than that of the tungsten layer in Sample No. 1 and Sample No. 2. For example, the thickness of the tungsten layer in Sample No. 3 is greater than the maximum tungsten layer thickness used in mass-produced phase change memories.

[0068] Here, the Sb-Te layer 30 and the Ga-Sb layer 50 are phase change memory material layers. The Sb-Te layer 30 is made of SbTe (i.e., the atomic ratio of Sb to Te is 1:1), and the Ga-Sb layer 50 is made of Ga. 50 Sb 50 In some other adhesion tests, the material of the Ga-Sb layer 50 of sample No. 3 can also be Ga 40 Sb 60 、Ga 30 Sb 70 、Ga 20 Sb 80 、Ga10 Sb 90 One of them.

[0069] Here, the material of the substrate 10 includes an oxide, such as silicon oxide. In some embodiments, the silicon oxide is formed using a chemical vapor deposition (CVD) process. The silicon oxide has good adhesion to the phase change memory material layer or the electrode material layer 20, ensuring that during the adhesion test, delamination does not occur between the substrate 10 and the phase change memory material layer or the electrode material layer 20, but rather between the phase change memory material layer and the electrode material layer 20. This allows the energy release rate to be determined when the phase change memory material layer and the electrode material layer 20 are delaminated.

[0070] When testing the adhesion of specimens 1, 2, and 3, Figure 4 and Figure 5 As shown in FIG1 , sample No. 1, sample No. 2, and sample No. 3 peeled off from the interface corresponding to the dotted line between the two scissors symbols. Specifically, sample No. 1 peeled off from the interface between the Sb-Te layer 30 and the tungsten layer 40, and the energy release rate was 0.702 J / m 2 Sample No. 2 peeled off not only from the interface between the Sb-Te layer 30 and the tungsten layer 40, but also from the interface between the Sb-Te layer 30 and the substrate 10, and the energy release rate was only 0.35 J / m 2 In actual operation, a slight external force can be applied to sample No. 2 to peel off the tungsten layer 40 from the Sb-Te layer 30, and the Sb-Te layer 30 is also peeled off from the substrate 10, indicating that the adhesion between the Sb-Te layer 30 and the tungsten layer 40 is extremely poor, and the adhesion between the Sb-Te layer 30 and the substrate 10 is also extremely poor.

[0071] Sample No. 3 peeled off from the interface between the Ga-Sb layer 50 and the tungsten layer 60, and the energy release rate was 1.34 J / m 2 , much larger than 0.35J / m of sample No. 2 2 and 0.702J / m of sample No. 1 2 , indicating that the adhesion between the Ga—Sb layer 50 and the tungsten layer 60 is much better than the adhesion between the Sb—Te layer 30 and the tungsten layer 40 .

[0072] Furthermore, the thickness of the tungsten layer 60 in sample No. 3 is greater than the thickness of the tungsten layer 40 in sample No. 1 and sample No. 2. It is understandable that metals (such as tungsten) deposited by physical vapor deposition (PVD) often have strong compressive stress, which is equivalent to applying a large external force to the phase change memory material layer. And as the thickness of the metal layer increases, the external force on the phase change memory material layer gradually increases, which will aggravate the peeling tendency of the phase change memory material layer. However, when the tungsten layer 60 is thicker, sample No. 3 achieves a greater energy release rate than sample No. 2, further indicating that the adhesion between the Ga-Sb layer 50 and the tungsten layer is much better than the adhesion between the Sb-Te layer 30 and the tungsten layer.

[0073] also, Figure 5 In the figure, the dotted line L parallel to the horizontal axis represents the energy release rate of the GST layer and the tungsten layer peeling. Figure 5 As shown, the energy release rate of sample No. 3 is greater than the energy release rate of the GST layer, indicating that the adhesion between the Ga—Sb layer 50 and the tungsten layer is greater than the adhesion between the GST layer and the tungsten layer.

[0074] In some other embodiments of the present disclosure, the element content of the Ga-Sb material and the material and thickness of the electrode material layer in sample No. 3 were adjusted and multiple tests were conducted. The results showed that the energy release rate when the Ga-Sb layer 50 and the electrode material layer peeled off was greater than or equal to 0.7 J / m 2 .

[0075] In summary, the adhesion between Ga-Sb material and commonly used electrode materials (tungsten and amorphous carbon) is better than that between Sb-Te material and commonly used electrode materials, and the energy release rate of Ga-Sb material and commonly used electrode materials during peeling is greater than or equal to 0.7 J / m 2 , meeting the adhesion requirements of mass-produced phase change memory for the phase change memory layer and the electrode layer.

[0076] Since the atomic radii of Sb and Te are not much different and their bonding modes are similar, the Ga-Sb-Te material obtained by replacing the Sb atoms in the Ga-Sb material with some Te atoms can still maintain good adhesion to the electrode material layer.

[0077] In some other embodiments of the present disclosure, titanium (Ti) is also doped into the Sb-Te compound to obtain a Ti-Sb-Te material. The Ti-Sb-Te material includes Ti 0.5 Sb1Te1, Ti1Sb1Te1, Ti2Sb1Te1. The adhesion of these Ti-Sb-Te materials to the electrode material layer (including tungsten layer and amorphous carbon layer) was tested. The results can be seen in the following table. Figure 4 and Figure 5 .

[0078] like Figure 4 As shown, sample No. 4 (#04) is a sample in which a first tungsten layer 20, a Ti-Sb-Te layer 70 and a second tungsten layer 40 are deposited in sequence on the substrate 10. Sample No. 5 (#05) is a sample in which a Ti-Sb-Te layer 70 and a tungsten layer 40 are deposited in sequence on the substrate 10. Sample No. 6 (#6) is a sample in which a Ti-Sb-Te layer 70, an adhesion layer 80 and a tungsten layer 40 are deposited on the substrate 10.

[0079] Here, the material of the adhesion layer 80 includes WSiN. In some embodiments, when the material of the phase change memory layer is GST, an adhesion layer is usually provided between the phase change memory layer and the electrode layer to improve the adhesion between the phase change memory layer and the electrode layer, thereby preventing the phase change memory layer from peeling off from the electrode layer after multiple cycles.

[0080] Here, the Ti-Sb-Te layer 70 is a phase change memory material layer, wherein the composition material of the Ti-Sb-Te layer 70 is TiSbTe (i.e., the atomic ratio of Ti, Sb and Te is 1:1:1). In some other adhesion tests, the composition material of the Ti-Sb-Te layer 70 may also include Ti 0.5 Sb1Te1 or Ti2Sb1Te1.

[0081] When testing the adhesion of samples No. 4, No. 5, and No. 6, Figure 4 and Figure 5 As shown in FIG. 4 , the peeling of samples No. 4, No. 5, and No. 6 occurred at the interface corresponding to the dotted line between the two scissors symbols. Specifically, the peeling of samples No. 4 and No. 5 occurred at the interface between the Ti-Sb-Te layer 70 and the tungsten layer 40, but the energy release rate of sample No. 4 was 1.5 J / m 2 , while the energy release rate of sample No. 5 is 0.954J / m 2 This indicates that, compared to providing a tungsten layer on only one side of the phase-change memory material layer and an electrode layer of another material on the other side, providing a tungsten layer on both sides of the phase-change memory material layer simultaneously can achieve a greater energy release rate. In other words, providing tungsten layers on both sides of the phase-change memory material layer simultaneously can improve the adhesion between the phase-change memory material layer and the tungsten layers on each side, significantly reducing the probability of peeling between the phase-change memory material layer and the tungsten layer.

[0082] Sample No. 6 peeled off from the interface between the Ti-Sb-Te layer 70 and the adhesion layer 80, and the energy release rate was only 0.604 J / m 2 , which is less than the energy release rate of sample No. 5. This indicates that providing the adhesion layer 80 between the Ti—Sb—Te layer 70 and the tungsten layer 40 will increase the probability of the Ti—Sb—Te layer 70 peeling off.

[0083] The energy release rates of samples 4 and 5 were both greater than that of sample 1, indicating that the adhesion between the Ti-Sb-Te layer 70 and the tungsten layer was better than that between the Sb-Te layer 30 and the tungsten layer. The energy release rates of samples 4 and 5 were both greater than that of GST, indicating that the adhesion between the Ti-Sb-Te layer 70 and the tungsten layer was better than that between the commonly used phase-change memory material GST and the tungsten layer.

[0084] In some other embodiments, the element content of the Ti-Sb-Te material and the material of the electrode material layer in sample No. 5 were adjusted and multiple tests were conducted. The results showed that the energy release rate when the Ti-Sb-Te layer 70 and the electrode material layer peeled off was greater than or equal to 0.7 J / m 2 .

[0085] However, phase-change memory using Ti-Sb-Te materials still suffers from severe peeling problems during fabrication. Considering the inherently low hardness and layered structure of Sb-Te materials, this paper suggests that the lower hardness of Ti-Sb-Te may be responsible. Meanwhile, this paper's research has found that Ga-Sb materials have higher hardness, as shown in the table below.

[0086] Table 1 GST and Ga with different element contents x Sb y Hardness value of the material

[0087] GST <![CDATA[Ga 55 Sb 45 ]]> <![CDATA[Ga 40 Sb 60 ]]> <![CDATA[Ga 15 Sb 85 ]]> Crystalline 3.08 5.59 5.22 4.67 Amorphous 3.03 5.06 4.24 3.52

[0088] Unit: GPa

[0089] Ga-Sb materials have high hardness values in both crystalline and amorphous states, greater than that of GST materials. This is because Ga and Sb can form chemical bonds to form a four-coordinate tetrahedral structure. Sb-Te materials have a layered structure, and when doped with a certain amount of titanium, Ti-Sb-Te can still maintain a layered structure. Compared to the layered structure, the tetrahedral structure is more stable and less prone to deformation. Therefore, Ga-Sb materials are harder than Ti-Sb-Te materials. Even though the adhesion of Ti-Sb-Te materials is comparable to that of Ga-Sb materials, due to the greater hardness of Ga-Sb materials, devices using Ga-Sb materials did not peel off during the preparation process, while devices using Ti-Sb-Te materials did peel off during the preparation process.

[0090] According to the research disclosed in this paper, the Sb-Te material has a layered structure, which includes multiple layers, each layer includes multiple layers of atoms, and adjacent layers are connected by van der Waals forces. In this disclosure, when Ga is doped into Sb-Te, Ga and Sb can form chemical bonds, forming tetrahedral structures in parts of the multiple layers, such as at grain boundaries, between adjacent layers, and at defects in the layers, thereby forming a crystal structure that is interwoven with a layered structure and a small amount of tetrahedral structures as a whole, thereby improving the hardness of the entire film layer.

[0091] Furthermore, according to the research disclosed in the present invention, the good adhesion between the Ti-Sb-Te material and the tungsten layer is because the Ti element can form bonds with Sb and W, thereby strengthening the interaction force between the Ti-Sb-Te material and W, thereby improving adhesion.

[0092] The above analysis shows that to reduce the probability of delamination between the phase-change memory layer and the electrode layer, the adhesion between the two layers should be improved. Furthermore, the hardness of the phase-change memory layer should be increased to reduce deformation and the probability of tearing under external forces. The Ga-Sb-Te material provided in the disclosed embodiments combines good adhesion with high hardness, reducing the probability of delamination from the electrode layer and extending the device's service life.

[0093] During research into other properties of Ga-Sb-Te and Ti-Sb-Te materials, the present disclosure discovered that Ti-Sb-Te has a larger resistance window, and therefore a larger programming window, than Ga-Sb-Te. Therefore, in some embodiments of the present disclosure, gallium and titanium (Ti) are simultaneously doped into the Sb-Te material to produce a phase-change memory layer with a larger resistance window and resistance to delamination from the electrode layer.

[0094] Specifically, the phase change memory layer 201 is made of Ti-Ga-Sb-Te material, wherein the Ga content is x mol%, and 0<x≤50, the Sb content is y mol%, and 20≤y≤90, the Ti content is z mol%, and 0<z≤50, and the Te content is (100-xyz) mol%. It can be expressed in the form of a chemical formula as Ti z Ga x Sb y Te (100-x-y-z) , where x satisfies 0<x≤50; y satisfies 20≤y≤90; and z satisfies 0<z≤50.

[0095] Here, the content of Te element is (100-xyz) mol%, which can be understood as: when the total amount of Ti-Ga-Sb-Te material is 100 mol, except for x mol of Ga element, y mol of Sb element and z mol of Ti element, the rest are Te element.

[0096] For example, the content of Te element satisfies: greater than 0 and less than or equal to 80 mol %.

[0097] In the present disclosure, firstly, by adding the above-mentioned content of Ti element, the adhesion between the Ti-Ga-Sb-Te material and the electrode layer can be improved, and the Ti-Ga-Sb-Te material has a larger resistance window and thus a larger switching ratio.

[0098] According to the research disclosed in this disclosure, the good adhesion between the Ti-Ga-Sb-Te material and the tungsten electrode layer is due to the Ti atoms forming bonds with the Sb atoms and the W atoms, which strengthens the interaction between the Ti-Ga-Sb-Te material and W, thereby improving adhesion.

[0099] However, the Ti content should not be too high. When the Ti content exceeds the above range, a conductive filament structure will form in the Ti-Ga-Sb-Te material, forming a conductive path and causing the phase change memory layer to be short-circuited.

[0100] In the present disclosure, by adding the aforementioned Ga content, the hardness of the phase-change memory layer can be increased without reducing the adhesion between the phase-change memory layer and the electrode layer, thereby reducing the probability of separation between the phase-change memory layer and the electrode layer. Furthermore, the addition of Ga can also increase the crystallization temperature of the phase-change memory layer, thereby improving the thermal stability and amorphous structure stability of the phase-change memory layer.

[0101] According to the research disclosed in this paper, the Sb-Te material has a layered structure, which includes multiple layers, each layer includes multiple layers of atoms, and adjacent layers are connected by van der Waals forces. In this disclosure, when Ga is doped into Sb-Te, Ga and Sb can form chemical bonds, forming tetrahedral structures in parts of the multiple layers, such as at grain boundaries, between adjacent layers, and at defects in the layers, thereby forming a crystal structure that is interwoven with a layered structure and a small amount of tetrahedral structures as a whole, thereby improving the hardness of the entire film layer.

[0102] However, the gallium content should not be too high. According to the research disclosed in this paper, the Ga element will reduce the resistance window of the Sb-Te material. If the Ga element content exceeds the above content, the resistance window of the Ti-Ga-Sb-Te material will be significantly reduced, reducing the cyclability of the phase change memory layer.

[0103] The Ti-Ga-Sb-Te material provided in the present disclosure has flexible and controllable composition adjustment. The proportion of each element can be adjusted within the above-mentioned content range according to performance and cost requirements to obtain the required phase change memory.

[0104] For example, in some embodiments, when the Ti element content is high, the adhesion between the phase change memory layer and the electrode layer is high, and thus the probability of peeling off between the phase change memory layer and the electrode layer is reduced. This can reduce production risks and reduce the probability of peeling off between the phase change memory layer and the electrode layer during repeated phase changes of the phase change memory, thereby improving the cycle capacity of the phase change memory.

[0105] In some embodiments, when the Ga content is high, the hardness of the phase change memory layer is high, so the probability of peeling between the phase change memory layer and the electrode layer is reduced, thereby reducing production risks.

[0106] In some embodiments, when the Ga content is high, the crystallization temperature of the phase-change memory layer can be increased, thereby improving the thermal stability and amorphous structure stability of the phase-change memory layer.

[0107] In some embodiments, when the Ga content is low, the resistance window of the phase change memory layer is larger, and the phase change memory has a larger switching ratio, which can improve the speed and accuracy of data reading.

[0108] In some embodiments, when the contents of Sb and Te are higher, the phase-change memory layer has a faster operating speed (ie, erase / write speed).

[0109] In summary, in the present disclosure, the content of Ti and Ga elements can be flexibly adjusted according to actual requirements for cost, cycle capability, data retention, switching ratio, and erase / write speed to obtain the required phase change memory.

[0110] In some embodiments, the chemical formula of the phase change memory layer 201 may be Ti 10 Ga 10 Sb 40 Te 40 、Ti 12 Ga8Sb 40 Te 40 、Ti 15 Ga5b 40 Te 40 、Ti1Ga4Sb 90 Te5、Ti 50 Ga1Sb 25 Te 24 、Ti 10 Ga 50 Sb 20 Te 20 or Ti1Ga1Sb 20 Te 78 .

[0111] Furthermore, the comparison of the energy release rates of samples No. 4 and No. 5 in the above experiment shows that, compared to providing a tungsten layer on only one side of the phase-change memory material layer and an electrode layer made of another material on the other side, providing a tungsten layer on both sides of the phase-change memory material layer can achieve a higher energy release rate. Therefore, in some embodiments, the electrode layers on both sides of the phase-change memory layer 201 are both made of tungsten.

[0112] In some embodiments, the electrode layers on both sides of the phase-change memory layer 201 may be a middle electrode 204 and a top electrode 205, and both the middle electrode 204 and the top electrode 205 are made of tungsten. Because the adhesion of the Ti-Ga-Sb-Te material to tungsten is better than its adhesion to amorphous carbon, using tungsten for the middle and top electrodes can reduce the probability of delamination between the phase-change memory layer and the middle and top electrodes, thereby extending the service life of the phase-change memory.

[0113] In some embodiments, as Figure 3 As shown, the materials of the middle electrode and top electrode of the phase change memory cell can be amorphous carbon, and an electrode layer 206 made of tungsten is provided between the middle electrode 204 and the phase change memory layer 201. Another electrode layer 206 made of tungsten is provided between the top electrode 205 and the phase change memory layer 201. Here, a double-layer electrode is provided on both sides of the phase change memory layer. On the one hand, the middle electrode 204 and the top electrode 205 made of amorphous carbon have low thermal conductivity, which can effectively lock heat near the phase change memory layer 201 and reduce thermal crosstalk caused by thermal diffusion. On the other hand, the two electrode layers 206 made of tungsten can improve the adhesion between the phase change memory layer 201 and the electrode layer 206, reducing the probability of peeling between the phase change memory layer 201 and the electrode layer 206. The two electrode layers 206 can also prevent impurities in the middle electrode 204 and the top electrode 205 from diffusing into the phase change memory layer 201, causing device performance degradation.

[0114] In some embodiments, the adhesion between the phase change memory layer and the electrode layer is characterized by an energy release rate, and the energy release rate is greater than or equal to 0.7 J / m 2 .

[0115] Further analysis of other properties of the Ti-Ga-Sb-Te material reveals that adding Ga and Ti to the Sb-Te material significantly increases its crystallization temperature. While the crystallization temperature of Sb-Te is typically around 120°C, the crystallization temperature of Ti-Ga-Sb-Te is around 250°C.

[0116] In some embodiments, after comprehensively considering the negative impact of Ga on the resistance window and the positive impact on adhesion, hardness and crystallization temperature, the Ga content is further limited to meet the following conditions: 5 mol% ≤ x mol% ≤ 10 mol%.z Ga x Sb y Te (100-x-y-z) The composition satisfies 5≤x≤10, 20≤y≤90, and 0<z≤50. This allows Ti-Ga-Sb-Te to have a more suitable resistance window, higher adhesion and hardness, and a higher crystallization temperature, making each property more balanced and thus achieving better overall performance.

[0117] The present disclosure also provides a method for preparing a phase change memory, the method comprising:

[0118] S100: forming a stacked first conductive line layer and a memory cell material layer along a first direction; wherein the memory cell material layer includes a phase change memory material layer, and the phase change memory material layer includes a Ga-Sb-Te material, wherein the Ga content is x mol%, and 0<x≤50, the Sb content is y mol%, and 20≤y≤90, and the Te content is (100-xy) mol%. The first direction is perpendicular to the plane where the first conductive line layer is located.

[0119] S200: forming a plurality of first isolation structures penetrating the first conductive line layer and the memory cell material layer; wherein each first isolation structure extends along the second direction, and the plurality of first isolation structures are arranged in parallel along the third direction; the plurality of first isolation structures divide the first conductive line layer into a plurality of first conductive lines, and the plurality of first isolation structures also divide the memory cell material layer into a plurality of phase change memory strips; the third direction and the second direction are perpendicular to the first direction;

[0120] S300: forming a second conductive line layer covering the first isolation structure and the memory cell material layer;

[0121] S400: forming a plurality of second isolation structures penetrating the second conductive line layer and the storage unit material layer; wherein each second isolation structure extends along the third direction, and the plurality of second isolation structures are arranged in parallel along the second direction; the plurality of second isolation structures divide the second conductive line layer into a plurality of second conductive lines; and the plurality of second isolation structures divide the plurality of phase change storage strips into a plurality of mutually independent phase change storage units.

[0122] Here, the first direction is defined as the Z direction, the second direction is defined as the X direction, and the third direction is defined as the Y direction.

[0123] For example, the materials of the first and second isolation structures include, but are not limited to, silicon nitride, silicon oxide, and the like. The first and second isolation structures are used to electrically isolate independent phase-change memory cells. The material of the filling layer has low thermal conductivity, which can reduce heat transfer between adjacent phase-change memory cells, thereby reducing crosstalk caused by heat transfer and ensuring high reliability of the phase-change memory.

[0124] It should be noted that the second isolation structure only penetrates the second conductive line layer and the memory cell material layer along the first direction, but does not penetrate the first conductive line layer.

[0125] Here, in step S200, the first isolation structure divides the first conductive line layer, and the remaining material of the first conductive line layer forms a plurality of first conductive lines. In addition, each first conductive line extends along the second direction, and the plurality of first conductive lines are arranged in parallel along the third direction.

[0126] In step S400, the second isolation structure divides the second conductive line layer, and the remaining material of the second conductive line layer forms a plurality of second conductive lines. In addition, each second conductive line extends along a third direction, and the plurality of second conductive lines are arranged in parallel along the third direction.

[0127] The first isolation structure and the second isolation structure divide the memory cell material layer into a plurality of independent phase-change memory cells, which are arranged in an array. Each phase-change memory cell includes a phase-change memory layer. Each phase-change memory cell is connected to a first conductive line and a second conductive line at both ends along a first direction, respectively, for applying an operating pulse to the phase-change memory cell via the first conductive line and the second conductive line, thereby changing the resistance of the phase-change memory layer of the phase-change memory cell.

[0128] In the preparation method of the phase change memory provided in the embodiment of the present disclosure, a Ga-Sb-Te material is used to prepare the phase change memory layer. When the Ga element content is x mol%, and 0<x≤50, the Sb content is y mol%, and 20≤y≤90, and the Te content is (100-xy)mol%, the phase change memory layer and the electrode layer can have good adhesion, reducing the probability of peeling between the phase change memory layer and the electrode layer, and improving the long-term reliability of the phase change memory.

[0129] Furthermore, when the Ga and Sb element contents are within the above ranges, the Ga-Sb-Te material has a relatively high hardness, so that during the preparation process of the phase change memory, when the electrode layer deposited on the phase change memory layer applies stress to the phase change memory layer, the phase change memory layer does not deform or only deforms slightly, thereby reducing the probability of peeling between the phase change memory layer and the electrode layer underneath it during the preparation process, thereby improving the production yield of the phase change memory.

[0130] In some embodiments, the composition material of the phase change memory layer also includes Ti element, forming a Ti-Ga-Sb-Te material; wherein the Ga content is x mol%, and 0<x≤50, the Sb content is y mol%, and 20≤y≤90, the Ti content is z mol%, and 0<z≤50, and the Te content is (100-xyz) mol%.

[0131] The composition of the phase change memory layer can be expressed in the form of a chemical formula as Ti z Ga x Sb y Te (100-x-y-z) , where x satisfies 0<x≤50; y satisfies 20≤y≤90; and z satisfies 0<z≤50.

[0132] In some embodiments, the content of Te element satisfies: greater than 0 and less than or equal to 80 mol %.

[0133] In some embodiments, the Ga content satisfies: 5 mol% ≤ x mol% ≤ 10 mol%. In this way, the Ti-Ga-Sb-Te can have a more suitable resistance window, higher adhesion and hardness, and a higher crystallization temperature, so that the various properties are more balanced, thereby obtaining better overall performance. In some embodiments, the phase change memory material layer can be formed using processes such as physical vapor deposition, chemical vapor deposition (CVD), and atomic layer deposition (ALD). For example, physical vapor deposition includes but is not limited to magnetron co-sputtering and electron beam evaporation.

[0134] In this embodiment, the phase change memory material layer is formed by co-sputtering.

[0135] For example, according to Ti z Ga x Sb y Te (100-x-y-z) The Ti, Ga, Sb and Te elements are added to the Ti-Ga-Sb-Te phase change memory material layer by co-sputtering an Sb-Te alloy target, an Sb single target, a Ti single target and a Ga single target.

[0136] For example, the Sb-Te alloy target includes a Sb2Te3 alloy target, a Sb2Te1 target, or a Sb1Te1 target. Figure 3 As shown, the phase change memory cell 200 further includes a bottom electrode 202, a gate layer 203, an intermediate electrode 204, and a top electrode 205 stacked in sequence along the first direction. Correspondingly, the step of forming the memory cell material layer in S100 further includes:

[0137] Before forming the phase-change memory material layer, a bottom electrode material layer, a gate material layer and an intermediate electrode material layer are sequentially formed on the first conductive line layer;

[0138] forming a top electrode material layer on the phase change memory material layer;

[0139] Step S200 further includes:

[0140] forming a plurality of first isolation structures penetrating the bottom electrode material layer, the gate material layer, the middle electrode material layer, and the top electrode material layer;

[0141] Step S400 further includes:

[0142] A plurality of second isolation structures are formed that penetrate the bottom electrode material layer, the gate material layer, the intermediate electrode material layer, and the top electrode material layer; wherein the plurality of first isolation structures and the plurality of second isolation structures divide the bottom electrode material layer, the gate material layer, the intermediate electrode material layer, and the top electrode material layer into a plurality of bottom electrodes, a plurality of gate layers, a plurality of intermediate electrodes, and a plurality of top electrodes; each phase change memory cell includes a bottom electrode, a gate layer, an intermediate electrode, and a top electrode stacked in sequence along a first direction, and the phase change memory layer is located between the intermediate electrode and the top electrode.

[0143] In some embodiments, the phase change memory unit includes two electrode layers, the two electrode layers are arranged on opposite sides of the phase change memory layer along a first direction, and the two electrode layers are in contact with the phase change memory layer; the adhesion between the phase change memory layer and the electrode layer is characterized by an energy release rate, and the energy release rate is greater than or equal to 0.7 J / m 2 .

[0144] It should be noted that in some embodiments, the two electrode layers may be a middle electrode and a top electrode. Both the middle electrode and the top electrode are made of tungsten. Ti-Ga-Sb-Te material has better adhesion to tungsten than to amorphous carbon. Therefore, using tungsten for the middle and top electrodes can reduce the probability of delamination between the phase-change memory layer and the middle and top electrodes, thereby extending the lifespan of the phase-change memory.

[0145] In some other embodiments, the middle electrode and top electrode of the phase-change memory cell may be made of amorphous carbon, and an electrode layer made of tungsten is provided between the middle electrode and the phase-change memory layer. Another electrode layer made of tungsten is provided between the phase-change memory layer and the top electrode layer.

[0146] Correspondingly, the step of forming the memory cell material layer in S100 further includes:

[0147] Before forming the phase-change memory material layer, forming a first electrode material layer; wherein the phase-change memory material layer is in contact with the first electrode material layer;

[0148] A second electrode material layer is formed on the phase change memory material layer; wherein the second electrode material layer is in contact with the phase change memory material layer; the adhesion between the phase change memory material layer and each electrode material layer is characterized by an energy release rate, and the energy release rate is greater than or equal to 0.7 J / m 2 ;

[0149] Step S200 further includes:

[0150] forming a plurality of first isolation structures penetrating the first electrode material layer and the second electrode material layer;

[0151] Step S400 further includes:

[0152] A plurality of second isolation structures are formed that penetrate the first electrode material layer and the second electrode material layer; wherein the plurality of first isolation structures and the plurality of second isolation structures divide the first electrode material layer and the second electrode material layer into a plurality of first electrodes and a plurality of second electrodes, and in each phase change memory cell, the first electrode layer and the second electrode layer are arranged on opposite sides of the phase change memory layer along the first direction.

[0153] In some embodiments, the first electrode layer is located between the middle electrode and the phase-change memory layer, and the second electrode is located between the phase-change memory layer and the top electrode.

[0154] Here, both electrode layers are made of tungsten. The Ti-Ga-Sb-Te material adheres better to tungsten than to amorphous carbon. This reduces the likelihood of separation between the phase-change memory layer and the electrode layer, extending the lifespan of the phase-change memory.

[0155] The above embodiments are merely illustrative of the principles and effects of this disclosure and are not intended to limit this disclosure. Anyone skilled in the art may modify or alter the above embodiments without departing from the spirit and scope of this disclosure. Therefore, all equivalent modifications or alterations made by one of ordinary skill in the art without departing from the spirit and technical concepts disclosed herein shall be covered by the claims of this disclosure.

Claims

1. A phase change memory material, characterized in that: The phase change memory material includes Ga, Sb, Ti and Te elements, wherein the content of Ga is x mol%, and 0<x≤50, the content of Sb is y mol%, and 20≤y≤90, the content of Ti is z mol%, and 0<z≤50, and the content of Te is (100-xyz) mol%.

2. The phase change memory material according to claim 1, wherein The Ga content satisfies: 5mol%≤xmol%≤10mol%.

3. The phase change memory material according to claim 1, characterized in that The Te content satisfies: greater than 0 and less than or equal to 80 mol%.

4. A phase change memory, characterized in that: include: A first conductive line, a phase-change memory unit, and a second conductive line are sequentially stacked along a first direction, the first conductive line extends along a second direction, the second conductive line extends along a third direction, and the first direction, the second direction, and the third direction are perpendicular to each other; The phase change memory unit includes a phase change memory layer, and a constituent material of the phase change memory layer includes the phase change memory material according to any one of claims 1 to 3.

5. The phase change memory according to claim 4, wherein: The Ga content satisfies: 5mol%≤xmol%≤10mol%; and / or, The Te content satisfies: greater than 0 and less than or equal to 80 mol %.

6. The phase change memory according to claim 4, wherein: The phase-change memory unit further includes two electrode layers, which are arranged on opposite sides of the phase-change memory layer along the first direction, and the two electrode layers are in contact with the phase-change memory layer; The adhesion between the phase change memory layer and the electrode layer is characterized by an energy release rate, and the energy release rate is greater than or equal to 0.7 J / m 2 .

7. The phase change memory according to claim 6, wherein: The material of the electrode layer includes tungsten.

8. A method for preparing a phase change memory, characterized in that: include: A first conductive line layer and a memory cell material layer are stacked and formed along a first direction; wherein the memory cell material layer comprises a phase change memory material layer, and the material of the phase change memory material layer comprises the phase change memory material according to any one of claims 1 to 3; and the first direction is perpendicular to the plane where the first conductive line layer is located; forming a plurality of first isolation structures penetrating the first conductive line layer and the memory cell material layer; wherein each first isolation structure extends along a second direction, and the plurality of first isolation structures are arranged in parallel along a third direction; the plurality of first isolation structures divide the first conductive line layer into a plurality of first conductive lines, and the plurality of first isolation structures also divide the memory cell material layer into a plurality of phase change memory strips; the third direction and the second direction are perpendicular to the first direction; forming a second conductive line layer covering the first isolation structure and the memory cell material layer; A plurality of second isolation structures are formed that penetrate the second conductive line layer and the storage unit material layer; wherein each second isolation structure extends along the third direction, and the plurality of second isolation structures are arranged in parallel along the second direction; the plurality of second isolation structures divide the second conductive line layer into a plurality of second conductive lines; and the plurality of second isolation structures divide the plurality of phase change storage strips into a plurality of mutually independent phase change storage units.

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