UVM-based Optimization Method for Storage Modeling

Abstract

The present invention discloses an optimization method for storage modeling based on UVM, which includes the following steps: building a UVM verification environment; modeling the storage units of a storage entity as the mem_entry_shadow class in the UVM verification environment to obtain a register model; expanding and upgrading the storage model class uvm_mem of the UVM verification environment to obtain the mirror value and the actual value of the stored data; expanding and upgrading the predictor of the UVM verification environment for updating and synchronizing the mirror value and the actual value; creating a chek_mem_value method in the class uvm_reg_bloock of the register model for checking the mirror value and the actual value, and storing the mirror value and the actual stored value of the DUT at the end of the simulation. The present invention improves the development efficiency of verification developers for storage modeling, while avoiding the simulation performance problem of large memory consumption caused by creating storage entities, and reducing the code workload of developers.

Description

Technical Field

[0001] The present invention relates to the field of chip technology, and particularly relates to an optimization method for memory modeling based on UVM. Background Art

[0002] For digital chips, registers are almost indispensable inside. The role of registers is very important. It is the basis for implementing digital sequential logic circuits. For example, it can be used to store data, for high-speed computing and caching, or for indicating working modes and states. Therefore, for a DUT (Device Under Test), usually we need to configure its working mode or need to know its internal working state by the data stored in the registers. UVM (Universal Verification Methodology) provides a register model to model the registers inside the above digital chips. As Figure 1 shown, Figure 1 the instantiation in the register model in [the figure] includes registers, address mapping tables, memories, coverage collection components (reg coverage), and databases. The database here includes three simulations of the register values in the DUT used in the verification platform, including the actual value, mirror value, and expected value of the register. We can comprehensively use the above three different types of values for register modeling according to the actual project situation to model and finally compare the complex read and write operations of the register values in the DUT, so as to find out possible problems in the DUT, thereby helping to confirm the correctness of the DUT register function design.

[0003] Adopting the above existing solution increases the code workload for verification developers and is more troublesome to use because verification developers need to complete the following operations by themselves:

[0004] (1) UVM does not establish a corresponding storage entity for storage, that is, UVM does not provide mirror values and expected values similar to registers for storage. Therefore, it is necessary to create and maintain the storage entity by oneself.

[0005] (2) At the end of the simulation, compare the storage entity with the actual stored value in the DUT by oneself.

[0006] In addition, verification developers cannot use the interface methods of the three different types of values like registers in UVM to conveniently model the complex read and write operations of storage and make a final comparison, so as to find out possible problems in the DUT, thereby helping to confirm the correctness of the DUT storage function design. Summary of the Invention

[0007] According to an embodiment of the present invention, there is provided an optimization method for storage modeling based on UVM, including the following steps:

[0008] Build a UVM verification environment;

[0009] Model the storage unit of the storage entity as the mem_entry_shadow class in the UVM verification environment;

[0010] Expand and upgrade the storage model class uvm_mem of the UVM verification environment;

[0011] Expand and upgrade the predictor of the UVM verification environment;

[0012] Check the storage mirror value and the actual storage value of the DUT at the end of the simulation.

[0013] Furthermore, modeling the storage unit of the storage entity as the mem_entry_shadow class in the UVM verification environment includes the following sub-steps:

[0014] When the mem_entry_shadow class is constructed and instantiated, calculate the number of byte units occupied according to the passed storage bit width;

[0015] Use a dynamic array to slice the dynamic array into a byte array according to the actual storage data bit width, and declare the size space of the byte array;

[0016] Create read and write method interfaces in the mem_entry_shadow class.

[0017] Furthermore, expanding and upgrading the storage model class uvm_mem of the UVM verification environment includes the following sub-steps:

[0018] Declare the mem_entry_shadow class as an associative array to create storage mirror value and expected value entities;

[0019] Create read and write methods related to the storage model provided by the UVM verification environment.

[0020] Furthermore, expanding and upgrading the predictor of the UVM verification environment includes the following sub-steps:

[0021] Obtain the transaction data information of the register storage bus operation of the storage entity;

[0022] Convert the transaction data information into a transaction data type variable of the general register storage access uvm_reg_bus_op;

[0023] Call the get_mem_by_offset method of the address mapping table of the register model in the UVM verification environment to obtain the handle of the storage model provided by the UVM verification environment;

[0024] Obtain the handle of the storage model, and call the predict_mirrored_value method of the storage model to synchronously update the mirrored value of the storage unit.

[0025] Furthermore, obtain the handle of the storage model, and call the predict_mirrored_value method of the storage model to synchronously update the mirrored value of the storage unit, including the following sub-steps:

[0026] Call the get_offset method of the storage model to obtain the base address of the storage model;

[0027] Obtain the real address of the storage unit, subtract the base address of the storage model from the real address of the storage unit to obtain the offset address of the storage unit;

[0028] Update the synchronous mirrored value using the offset address.

[0029] Furthermore, at the end of the simulation, check the storage mirrored value and the actual storage value of the DUT, including the following sub-steps:

[0030] Create a check_mem_value method in the uvm_reg_block class of the register model in the UVM verification environment;

[0031] In the check_mem_value method, call get_memories to obtain the storage model provided by the UVM verification environment;

[0032] Call the check_mem_value method of the storage model to check the storage mirrored value and the actual storage value of the DUT.

[0033] According to the UVM-based storage modeling optimization method of the embodiments of the present invention, while improving the development efficiency of verification developers for storage modeling, it avoids the simulation performance problem of large memory consumption caused by creating storage entities, and reduces the code workload of developers.

[0034] It should be understood that both the foregoing general description and the following detailed description are exemplary and are intended to provide further explanation of the claimed technology. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 Schematic diagram of the prior art

[0036] Figure 2Schematic diagram of the UVM-based storage modeling optimization method according to an embodiment of the present invention;

[0037] Figure 3 Flowchart of the steps of the UVM-based storage modeling optimization method according to an embodiment of the present invention;

[0038] Figure 4 is Figure 3 Flowchart of the sub-steps of step S2 in

[0039] Figure 5 is Figure 3 Flowchart of the sub-steps of step S3 in

[0040] Figure 6 is Figure 3 Flowchart of the sub-steps of step S4 in

[0041] Figure 7 is Figure 6 Flowchart of the sub-steps of step S44 in

[0042] Figure 8 is Figure 3 Flowchart of the sub-steps of step S5 in Detailed implementation

[0043] Hereinafter, the preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings, and the present invention will be further elaborated.

[0044] First, it will be combined with Figures 2 - 7 Describe the UVM-based storage modeling optimization method according to an embodiment of the present invention, which is used to store data and has a wide range of application scenarios.

[0045] The UVM-based storage modeling optimization method according to an embodiment of the present invention includes the following steps:

[0046] In S1, as Figure 3 shown, build a UVM verification environment.

[0047] In S2, as Figure 3 shown, model the storage unit of the storage entity as the mem_entry_shadow class in the UVM verification environment.

[0048] In S3, as Figure 3 shown, expand and upgrade the storage model class uvm_mem of the UVM verification environment.

[0049] In S4, as Figure 3As shown, in order to achieve the update synchronization of the mirror value and the actual value, the predictor of the UVM verification environment is extended and upgraded. Mainly, a support function for displaying predictions of memory access is added to the write method received by its broadcast port. Generally speaking, it is more recommended to use the display prediction method to update the mirror value. Therefore, for this example, the default prediction method added is set to display prediction. Here, the predictor is derived from the uvm_reg_predictor class. It is connected to the monitor on the register memory bus to obtain data from the bus, then matches the address related to the register, and automatically calls the prediction method of the register model to complete the synchronization with the registers and memories in the DUT. An external predictor is used to monitor the bus. The adapter in this predictor converts the bus transaction into a register transaction type, then uses the corresponding address to access the target register or memory through the address mapping table, and finally calls the automatic prediction method of the register or memory to update the mirror values of the registers and memories in the register model, so as to synchronize with the actual values in the DUT. Since the transaction request information obtained by this predictor directly monitors the operations on the DUT registers and memories on the bus, there will be no omission problems in the register automatic prediction mechanism provided by UVM, ensuring the update synchronization of the mirror value and the actual value.

[0050] In S5, as Figure 3 shown, check the memory mirror value and the actual memory value of the DUT at the end of the simulation.

[0051] Furthermore, model the memory cells of the memory entity in the UVM verification environment, including the following sub-steps:

[0052] In S21, as Figure 4 shown, when the mem_entry_shadow class is constructed and instantiated, calculate the number of byte units occupied according to the passed memory bit width.

[0053] In S22, as Figure 4 shown, use a dynamic array to split the dynamic array into a byte array according to the bit width of the actually stored data, and declare the size space of the byte array, so as to avoid using a unified larger bit width as the memory cell to store data, which is equivalent to using on demand to avoid the invalid occupation of memory space to further improve the simulation performance.

[0054] In S23, as Figure 4 shown, create read and write method interfaces in the mem_entry_shadow class to complete the writing and reading of the value of this memory cell, including the type conversion between the byte type dynamic array and the uvm_reg_data_t bit type output.

[0055] Furthermore, the storage model class uvm_mem of the UVM verification environment is extended and upgraded, including the following sub-steps:

[0056] In S31, as Figure 5 shown, declare the mem_entry_shadow class of the storage unit as an associative array, thereby creating the mirror value and the expected value entities. Here, the associative array type is used to reduce the memory occupancy, so as to avoid the simulation performance problem of large memory loss caused by creating storage entities as much as possible.

[0057] In S32, as Figure 5 shown, create read and write methods related to the storage model provided by the UVM verification environment. The read and write methods related to the register model include:

[0058] write: Perform a write operation on the actual DUT value of the storage unit, and if the write is successful, update and synchronize its corresponding mirror value and expected value. Note that since we use the associative array type to model the storage unit here, we will first check whether the storage unit element exists in the associative array before updating the mirror value and expected value. If it does not exist, we will call the new constructor to declare and construct it before synchronizing. That is, the storage entity is created during the first read and write access operation to the storage unit.

[0059] read: Perform a read operation on the actual DUT value of the storage unit, and if the read is successful, update and synchronize its corresponding mirror value and expected value. Similarly, note that since we use the associative array type to model the storage unit here, we will first check whether the storage unit element exists in the associative array before updating the mirror value and expected value. If it does not exist, we will call the new constructor to declare and construct it before synchronizing. That is, the storage entity is created during the first read and write access operation to the storage unit.

[0060] get_mirrored_value: Used to obtain the mirror value of the storage unit.

[0061] predict_mirrored_value: Used to update and synchronize the mirror value of the storage unit and the actual storage unit value in the DUT.

[0062] check_mem_value: Used to check and compare the mirror values of all existing storage units in the current storage and the actual storage unit values in the corresponding DUT at the end of the simulation. First, it will traverse the storage units that have been declared and constructed in the mirror value associative array of the current storage model, then read their mirror values, then initiate a backdoor read operation on the corresponding storage units, and finally compare the values of the two and output the results.

[0063] In addition, there are many similar read and write access methods provided by UVM for the mirror value, expected value, and actual value of the DUT in the register. These methods can be easily modeled and implemented for storage through a similar approach. For example:

[0064] get and set: Used to set and obtain the expected value.

[0065] update: This method will first check whether the expected value and the mirror value are consistent. If they are not consistent, it will update the mirror value and the actual value in the actual hardware DUT to the expected value. The expected value here can be set by the previous set() or randomize() method.

[0066] predict: Used to update the expected value and mirror value of the register model without affecting the actual value in the DUT.

[0067] mirror: Update the expected value and mirror value to the actual value in the DUT.

[0068] Furthermore, expand and upgrade the predictor in the UVM verification environment, including the following sub-steps:

[0069] In S41, as Figure 6 shown, obtain the transaction data information of the register storage bus operation of the storage entity.

[0070] In S42, as Figure 6 shown, convert the transaction data information into a transaction data type variable of the general register storage access uvm_reg_bus_op. The transaction data information obtained by the user from the bus monitor through the TLM communication port is converted into a transaction data type variable of the general register storage access uvm_reg_bus_op through the bus2reg method of the adapter. This type of variable stores information such as the access type, access address, and data required for general register storage access. That is to say, the read and write of the register storage by the bus need to be completed through the transaction data type of the target bus protocol. Therefore, an adapter is required to convert these register storage read and write access operations into a transaction data type that conforms to the target bus protocol.

[0071] In S43, as Figure 6 shown, call the get_mem_by_offset method of the address mapping table (map) to query and obtain the handle of the storage model to which the accessed storage unit address belongs.

[0072] In S44, as Figure 6As shown, obtain the handle of the storage model, call the predict_mirrored_value method of the storage model to synchronously update the mirrored value of the storage unit, and determine that if the handle of the storage model to which the accessed storage unit belongs is obtained by querying and is not null, then determine that if the current access operation to the storage unit is a write operation, call the created predict_mirrored_value method in the storage model to synchronously update the mirrored value of the target storage unit.

[0073] Further, obtain the handle of the storage model, call the predict_mirrored_value method of the storage model to synchronously update the mirrored value of the storage unit, including the following sub-steps:

[0074] In S441, as Figure 7 shown, call the get_offset method of the storage model to obtain the base address of the storage model.

[0075] In S442, as Figure 7 shown, obtain the real address of the storage unit, subtract the base address of the storage model from the real address of the storage unit to obtain the offset address of the storage unit.

[0076] In S443, as Figure 7 shown, use the offset address to update the synchronous mirrored value.

[0077] Further, check the storage mirrored value and the actual storage value of the DUT at the end of the simulation, including the following sub-steps:

[0078] In S51, as Figure 8 shown, create a check_mem_value method in the uvm_reg_block class of the register model in the UVM verification environment;

[0079] In S52, as Figure 8 shown, call get_memories in the check_mem_value method to obtain the storage model;

[0080] In S53, as Figure 8 shown, recursively call the check_mem_value method of the storage model under its hierarchy to check the storage mirrored value and the actual storage value of the DUT, ultimately simplifying the code workload of the verification developer and eliminating the need for them to write relevant check code to check the storage values one by one, further improving their work efficiency.

[0081] This embodiment avoids the simulation performance problem of large memory loss caused by creating storage entities. We can use an associative array type to reduce the occupation of simulation memory. That is, we can use the associative array type to model the stored mirror values and expected values, and only model the storage units actually read and written in the test cases, that is, use a sparse matrix, so as to support a large storage space while allocating memory space according to usage, thereby improving the simulation performance; model specific storage units, use a dynamic array, and split it into byte arrays according to the actual stored data bit width of the storage, so as to avoid using a unified large bit width as the storage unit to store data, which is equivalent to using on demand to avoid the ineffective occupation of memory space to further improve the simulation performance. Automatically complete the update synchronization of the stored mirror value and the actual stored value of the DUT in a manner similar to the UVM register display prediction, avoiding the need for verification developers to manually update and synchronize the stored mirror value, and also avoiding omissions caused by the operation of the internal register storage bus, reducing the code workload of verification developers and improving work efficiency; provide a recursive check method for the stored mirror value and the actual stored value of the DUT used at the end of the simulation, thereby further simplifying the code workload of verification developers, so that they no longer need to write relevant check code by themselves to check the stored values one by one, further improving their work efficiency; without changing the original UVM-based usage syntax and usage habits, enabling verification developers to easily use it to model the storage in the DUT, reducing the learning cost and improving work efficiency.

[0082] As described above, with reference to Figures 2 - 7 The UVM-based storage modeling optimization method according to the embodiment of the present invention is described, which improves the development efficiency of verification developers for storage modeling while avoiding the simulation performance problem of large memory loss caused by creating storage entities, and reduces the code workload of developers.

[0083] It should be noted that in this specification, the term "including", "comprising" or any other variant thereof is intended to cover a non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, the elements defined by the statement "comprising..." do not exclude the existence of additional identical elements in the process, method, article or device including the said elements.

[0084] Although the content of the present invention has been described in detail through the above preferred embodiments, it should be recognized that the above description should not be considered as a limitation of the present invention. After those skilled in the art have read the above content, various modifications and alternatives to the present invention will be obvious. Therefore, the protection scope of the present invention should be defined by the appended claims.

Claims

1. An optimization method for storage modeling based on UVM, characterized in that The steps are as follows: Build a UVM verification environment; Model the storage unit of the storage entity as the mem_entry_shadow class in the UVM verification environment; Expand and upgrade the storage model class uvm_mem of the UVM verification environment; Expand and upgrade the predictor of the UVM verification environment; Check the storage mirror value and the actual storage value of the DUT at the end of the simulation; Expand and upgrade the storage model class uvm_mem of the UVM verification environment, including the following sub-steps: Declare the mem_entry_shadow class as an associative array to create entities for the mirror value and expected value of the storage; Create read and write methods related to the storage model provided by the UVM verification environment; Expand and upgrade the predictor of the UVM verification environment, including the following sub-steps: Obtain the transaction data information of the register storage bus operation of the storage entity; Convert the transaction data information into a transaction data type variable of the general register storage access uvm_reg_bus_op; Call the get_mem_by_offset method of the address mapping table of the register model in the UVM verification environment to obtain the handle of the storage model provided by the UVM verification environment; Obtain the handle of the storage model and call the predict_mirrored_value method of the storage model to synchronously update the mirror value of the storage unit; Obtain the handle of the storage model and call the predict_mirrored_value method of the storage model to synchronously update the mirror value of the storage unit, including the following sub-steps: Call the get_offset method of the storage model to obtain the base address of the storage model; Obtain the real address of the storage unit, subtract the base address of the storage model from the real address of the storage unit to obtain the offset address of the storage unit; Update and synchronize the mirror value using the offset address; Check the storage mirror value and the actual storage value of the DUT at the end of the simulation, including the following sub-steps: Create a check_mem_value method in the uvm_reg_block class of the register model in the UVM verification environment; Call get_memories in the check_mem_value method to obtain the storage model provided by the UVM verification environment; Call the check_mem_value method of the storage model to check the storage mirror value and the actual storage value of the DUT.

2. The UVM-based storage modeling optimization method according to claim 1, wherein Model the storage unit of the storage entity as the mem_entry_shadow class in the UVM verification environment, including the following sub-steps: Calculate the number of occupied byte units according to the passed storage bit width when the mem_entry_shadow class is constructed and instantiated; Use a dynamic array to slice the dynamic array into a byte array according to the actual storage data bit width and declare the size space of the byte array; Create read and write method interfaces in the mem_entry_shadow class.

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