switching unit

Abstract

Embodiments of the present disclosure relate to switching cells. An electronic cell includes an integrated stack structure including, in order: a first electrode; a bidirectional threshold switching layer below the first electrode; and a fixed resistor below the bidirectional threshold switching layer. A second electrode can be included between the fixed resistor and the bidirectional threshold switching layer. A memory layer, such as a phase change material layer, a resistive random access memory layer, or a magnetoresistive random access memory layer, can be included between the first electrode and the bidirectional threshold switching layer.

Description

[0001] Cross-reference to related applications

[0002] This application claims the benefit of French patent application No. 2100747, filed on January 27, 2021, the contents of which are incorporated herein by reference to the fullest extent permitted by law. Technical Field

[0003] This disclosure generally relates to electronic devices, and more specifically, to integrated switching units arranged in an array. In particular, the invention relates to bidirectional threshold switch (OTS) devices. Background Technology

[0004] Among chalcogenide materials, two classes of materials have been studied for use in electronic devices, particularly for the manufacture of switching devices and memories. Specifically, a distinction has been made between memory-free electronic switching materials (bidirectional threshold switch (OTS) materials) and phase change materials. Both types of materials can be used in thin films for electronic integrated devices.

[0005] Depending on the voltage potential applied to the cell, the OTS material switches between "on" and "off" states. The state of the bidirectional threshold switch changes when the voltage across it exceeds the threshold voltage. Once the threshold voltage is reached, the "on" state is triggered, and the bidirectional threshold switch is essentially in the on state. If the current or voltage drops below the threshold, the bidirectional threshold switch returns to the "off" state.

[0006] Phase change materials (PCMs) are materials that can switch between crystalline and amorphous phases under thermal influence. Since the electrical resistance of amorphous materials is significantly greater than that of crystalline materials, this phenomenon can be used to define two memory states, distinguished by the resistance measured through the PCM. The most commonly used PCM material is an alloy composed of germanium, antimony, and tellurium.

[0007] Bidirectional threshold switches are very useful as selection devices due to their drive current capability in the "on" state and the current ratio between the "on" and "off" states. However, bidirectional threshold switches are susceptible to current overshoot during switching.

[0008] There is a need to improve existing integrated switching units that include bidirectional threshold switches. Summary of the Invention

[0009] One embodiment is designed to overcome all or part of the disadvantages of existing switching units in integrated devices.

[0010] One embodiment provides an electronic unit comprising an integrated stack having, in sequence: a first electrode; a bidirectional threshold switch layer; and a resistor.

[0011] According to one embodiment, the electronic unit includes a second electrode located between the bidirectional threshold switch layer and the resistor.

[0012] According to one embodiment, the electronic unit includes a memory layer between the first electrode and the bidirectional threshold switch layer.

[0013] According to one embodiment, the electronic unit includes a blocking layer between the memory layer and the bidirectional threshold switch layer.

[0014] According to one embodiment, the memory layer is made of a phase change material.

[0015] According to one embodiment, the electronic unit is a resistive random access memory.

[0016] According to one embodiment, the electronic unit is a magnetoresistive random access memory.

[0017] According to an embodiment, the resistor has an L-shaped cross-section.

[0018] According to one embodiment, the L-shaped cross-section of the resistor is self-aligned with the shape of the bidirectional threshold switch layer.

[0019] One embodiment provides an array including the plurality of cells, wherein the cells are connected to word lines via their associated resistors and to bit lines via their associated first electrodes. Attached Figure Description

[0020] The above features and advantages, as well as other contents, will be described in detail in the following description of specific embodiments, which are given by way of illustrative rather than limiting drawings, wherein:

[0021] Figure 1A and Figure 1B Two simplified cross-sectional views of an embodiment of the bidirectional threshold switch unit are shown;

[0022] Figure 2A and Figure 2B Two simplified cross-sectional views of another embodiment of the bidirectional threshold switch unit are shown;

[0023] Figure 3 A simplified cross-sectional view of an embodiment of the memory cell is shown;

[0024] Figure 4 A simplified cross-sectional view of another embodiment of the memory cell is shown;

[0025] Figure 5 A simplified schematic diagram of a memory cell array is shown;

[0026] Figure 6 The diagram illustrates this. Figure 5The manufacturing process steps of the memory cell array shown;

[0027] Figure 7 The diagram illustrates this. Figure 5 Another step in the manufacturing process of the memory cell array shown;

[0028] Figure 8 The diagram illustrates this. Figure 5 Another step in the manufacturing process of the memory cell array shown;

[0029] Figure 9 The diagram illustrates this. Figure 5 Another step in the manufacturing process of the memory cell array shown; and

[0030] Figure 10 The diagram illustrates this. Figure 5 Another step in the manufacturing process of the memory cell array shown. Detailed Implementation

[0031] Similar features have been designated by similar reference numerals in various figures. Specifically, structural and / or functional features common in various embodiments may have the same reference numerals and may be configured with the same structure, dimensions, and material properties.

[0032] For clarity, only the operation and components that aid in understanding the embodiments described herein have been detailed and described. Specifically, the electrical connections between the switching units and selection circuits organized in the array have not been described in detail, and the disclosed embodiments are compatible with existing switching arrays or memory arrays and corresponding addressing circuits.

[0033] Unless otherwise stated, when referring to two elements connected together, it means that there is no direct connection between them except for the conductor, and when referring to two elements coupled together, it means that the two elements can be connected or coupled through one or more other elements.

[0034] In the following disclosure, unless otherwise stated, when referring to absolute position qualifiers such as the terms “front,” “back,” “up,” “down,” “left,” “right,” etc., or relative position qualifiers such as the terms “above,” “below,” “higher,” “lower,” etc., or directional qualifiers such as “horizontal,” “vertical,” etc., refer to the directions shown in the figures.

[0035] Unless otherwise specified, expressions such as “approximately,” “roughly,” “substantially,” and “on the order of…” indicate less than 10%, preferably less than 5%.

[0036] The disclosed embodiments aim to overcome all or part of the shortcomings of conventional bidirectional threshold switches in terms of voltage bounce, which occurs after the OTS is thresholded and causes current overshoot. Therefore, the disclosed embodiments provide a resistive element electrically connected in series with the OTS to absorb these overshoots. More specifically, the disclosed embodiments provide a solution that allows the integration of a series resistor using the OTS cell without requiring additional surface area.

[0037] Figure 1A and Figure 1B Two simplified cross-sectional views of an embodiment of a bidirectional threshold handover (OTS) cell 100 are shown.

[0038] Figure 1A and / or Figure 1B The representation shows only one unit or OTS, but it should be noted that the switching unit of this disclosure is part of a large number of integrated switching units manufactured using thin film layers of chalcogenide materials, semiconductor materials, resistive materials, insulating materials, conductive materials, etc.

[0039] For simplicity, references are made to each layer to designate the corresponding elements of the stack constituting the switching unit. However, it should be understood that in practice, the corresponding layers correspond to thin films deposited and etched to form individual switching elements separated by insulating trenches and arranged (e.g., in an array). The terminals or electrodes of each switching unit can be interconnected via the corresponding stacked layers, for example, in the form of lines and columns.

[0040] Unit 100 includes a resistor 102 or a resistive element (with a fixed resistance value, i.e., non-variable), a bidirectional threshold switch (OTS) layer 104, a top electrode 105, and a conductive layer 106 connected to the top electrode 105. The OTS layer 104 is located between the resistor 102 and the top electrode 105.

[0041] When the voltage applied between conductive layer 106 and resistor 102 exceeds the threshold voltage VTH, OTS layer 104 exhibits a significant decrease in resistivity. This reduction (or increase), triggered by the voltage applied between the top and bottom of the layer, allows the layer to be considered as a switch between an "off" and "on" state. If the voltage applied to OTS layer 104 is below the threshold VTH of OTS layer 104, OTS layer 104 remains in an "off" or high-resistance state. In this state, only leakage current flows through cell 100. If a voltage above the threshold VTH is applied, OTS layer 104 switches to an "on" state and operates in a relatively low-resistance state. In the "on" state, current flows through cell 100. The threshold voltage VTH of OTS layer 104 includes, for example, between 0.5V and 5V.

[0042] The OTS layer 104 is made of, for example, a chalcogenide material, such as selected from the following list: germanium (Ge), tellurium (Te), selenium (Se), tungsten (W), antimony (Sb), arsenic (As), indium (In), sulfur (S), or any combination or alloy of these materials. The OTS layer 104 is made of a material whose phase (crystal) does not change when energy is applied.

[0043] For example, the thickness of the OTS layer 104 is between 10 nm and 100 nm, preferably between 20 nm and 40 nm.

[0044] Examples of bidirectional materials suitable for forming OTS layer 104 can be found in U.S. Patent No. 8,148,707 (corresponding to European Patent No. 2,204,851), the contents of which are incorporated herein by reference to the extent permitted by law.

[0045] The top electrode 105 typically forms an electrode of the cell 100 (connected to the bit line), while the resistor 102 forms another electrode of the cell 100 (connected to the word line).

[0046] The top electrode 105 is connected to the conductive layer 106. The conductive layer 106 forms a bit line. The top electrode 105 and the conductive layer 106 are in direct contact, for example. The conductive layer 106 is connected to the top electrode 105, for example, through a conductive via smaller than the top electrode 105, and is made of tungsten, for example.

[0047] The conductive layer 106 has a width that is, for example, the same as or larger than one of the dimensions of the top electrode 105.

[0048] Each cell includes an OTS layer 104 and a top electrode 105, which are separated from the OTS layers 104 and top electrodes 105 of adjacent cells by an insulating layer (not shown). Each OTS layer 104 is “fully confined,” meaning that the OTS layer 104 of each cell is separated from the OTS layers 104 of adjacent cells by an insulating material. The OTS layer 104 and the top electrode 105 have, for example, a parallelepiped shape, and for both layers, they have, for example, the same width and length.

[0049] Resistor 102 has, for example, an L-shaped cross-section. Resistor 102 then has a horizontal portion 1020 and a vertical portion 1022. Resistor 102 is surrounded, for example, by an insulating layer, not shown. The thickness of this insulating layer is such that the upper surface of the vertical portion 1022 of resistor 102 is coplanar with the upper surface of the insulating layer. Figure 1A and / or Figure 1B In this embodiment, resistor 102 has an L-shaped cross-section, but the shape of resistor 102 can be easily adjusted within a square cross-section or any other shape. Resistor 102 is in contact with, for example, OTS layer 104.

[0050] For example, the top electrode 105 and resistor 102 are made of any refractory metal and / or refractory metal nitride, such as carbon (C), carbon nitride ((CN)n), titanium (Ti), titanium nitride (TiN), titanium silicon nitride (TiSiN), tungsten (W), tungsten nitride (W₂N, WN, WN₂), tungsten carbon nitride, tungsten silicon nitride, tantalum (Ta), tantalum nitride (TaN), tantalum silicon nitride, tantalum tungsten, or any combination or alloy of these materials. The top electrode 105 and resistor 102 may be made of the same material, for example. The top electrode 105 and resistor 102 may also be made of two different materials, for example.

[0051] The top electrode 105 and the conductive layer 106 can be made of the same conductive material or different conductive materials. The conductive layer 106 is made of copper, for example.

[0052] Figure 1A , Figure 1B , Figure 2A , Figure 2B , Figure 3 and Figure 4 The embodiment is shown in space following the orthogonal spatial system XYZ, where the Z-axis is orthogonal to the top surface of the conductive layer 106 of cell 100.

[0053] exist Figure 1A and Figure 1B In one embodiment, the top conductive layer 106 extends horizontally along the X direction. Figure 1A In the example, the vertical portion 1022 of resistor 102 is preferably centered relative to unit 100 and extends vertically along the Y direction. Figure 1B In the example, the vertical portion 1022 of resistor 102 is preferably centered relative to unit 100 and extends vertically along direction X.

[0054] therefore, Figure 1A and Figure 1B The difference lies in the orientation of the L-shaped resistor. Figure 1A This is called a "self-aligned wall" unit structure, in which the width of resistor 102 is equal to the width of conductive layer 106. Figure 1A In this process, resistor 102 and conductive layer 106 are formed in the same direction, for example, using the same mask layer.

[0055] Figure 1B Corresponding to different methods of using "self-aligned wall technology," where the width of resistor 102 is not equal to the width of conductive layer 106. Figure 1B For example, resistor 102, OTS layer 104 and top electrode 105 are formed using the same mask layer as the mask layer used to form conductive layer 106, but they are oriented in the vertical direction compared to the direction of conductive layer 106. Figure 1BThe cell architecture allows resistor 102 to be integrated into the OTS device without area loss, at the cost of a non-critical additional mask and several additional process steps.

[0056] exist Figure 1A and Figure 1B In both cases, the interconnects (not shown) at the bottom 1020 of each resistor 102 are perpendicular to the interconnects of the conductive layer 106. In other words, if the conductive layer 106 is organized in columns, the bottom electrodes are organized in rows.

[0057] The advantage of this embodiment is that the resistor 102 is not outside the unit 100, but is integrated into part of the unit 100.

[0058] Figure 2A and Figure 2B Two simplified cross-sectional views of another embodiment of the bidirectional threshold switch unit 200 are shown.

[0059] Figure 2A , Figure 2B The unit 200 shown is with Figure 1A , Figure 1B Similar to unit 100 shown, the difference is that unit 200 includes a local bottom electrode 202. For example, the bottom electrode 202 is located below the OTS layer 104, meaning it is situated between the resistor 102 and the OTS layer 104. The bottom electrode 202 extends, for example, beneath the entire surface of the OTS layer 104, meaning it has the same length and width as the OTS layer 104. The resistor 102, for example, contacts the bottom electrode 202, which in turn contacts the OTS layer 104.

[0060] The local bottom electrode 202 provides current homogenization across all surfaces of the OTS layer 104.

[0061] For example, the bottom electrode 202 may be made of any conductive material, such as carbon (C) or carbon nitride ((CN)n). For example, the bottom electrode 202 may not be made of a metal or a combination of metals.

[0062] For example, the thickness of the bottom electrode 202 is between 1 nm and 10 nm, preferably between 4 nm and 6 nm.

[0063] exist Figure 2A In the example, the vertical portion 1022 of resistor 102 is preferably centered relative to unit 200 and extends vertically along the Y direction.

[0064] exist Figure 2B In the example, the vertical portion 1022 of resistor 102 is preferably centered relative to unit 200 and extends vertically along the X direction.

[0065] The availability of resistor 102 integrated with the OTS unit provides new integration opportunities for a variety of devices. In particular, this allows for the integration of switches with memory cells without increasing additional area.

[0066] Figure 3 A cross-sectional view of an embodiment of memory cell 300 is shown.

[0067] Figure 4 A cross-sectional view of another embodiment of the memory cell 400 is shown.

[0068] Figure 3 The memory cell 300 shown and Figure 4 The memory cells 400 shown are respectively similar to Figure 1B The unit 100 shown and Figure 2B The cell 200 shown differs in that memory cells 300 and 400 include a memory layer 302. The memory layer 302 is located above the OTS layer 104 and between the OTS layer 104 and the top electrode 105.

[0069] When the voltage applied to the cell is higher than the threshold voltage (VTH) of the OTS layer 104, current can flow through the OTS layer 104 and the memory layer 302 in the memory cells 300 and 400, and may cause a change in the resistivity of layer 302. This change can alter the memory state of layer 302, thereby changing the electrical characteristics of the memory cells 300 and 400.

[0070] The high-impedance state can be associated with the "reset" state or a logic "0" value, while the low-impedance state can be associated with the "set" state or a logic "1" value.

[0071] according to Figure 3 and Figure 4 In one embodiment, memory cells 300 and 400 include a barrier layer 304 between memory layer 302 and OTS layer 104.

[0072] According to one embodiment, memory layer 302 is made of a phase change material (PCM) that switches from a high-resistance state (typically amorphous) to a low-resistance state (typically crystalline) when energy such as heat, light, voltage potential, or current is applied. The phase change material can switch from a completely amorphous state to a completely crystalline state, or switch between different locally ordered detectable states across the entire spectrum between completely amorphous and completely crystalline states. In the case where memory layer 302 is a PCM layer, resistor 102 is, for example, a heating compound. Memory layer 302 is made of any phase change material, such as a phase change chalcogenide compound. For example, memory layer 302 is made of germanium, antimony, tellurium, or any alloy of all or some of these compounds.

[0073] According to another embodiment, memory layer 302 is a resistive random access memory (RRAM) layer. Memory layer 302 is made of, for example, one or more dielectric materials, in which conductive paths are formed when a relatively high voltage is applied. More precisely, memory layer 302 is made of chalcogenides (e.g., Ge2Sb2Te5 alloy or AgInSbTe alloy), binary transition metal oxides (e.g., nickel oxide and titanium dioxide), perovskites (e.g., Sr(Zr)TiO3 and Pr...). 0.7 Ca 0.3 It consists of MnO3), solid electrolytes (such as germanium monosulfide, germanium selenide, silicon oxide, copper sulfide), organic charge transfer complexes (such as CuTCNQ), organic donor-acceptor systems (such as Al-AIDCN), and / or two-dimensional insulating materials (such as hexagonal boron nitride).

[0074] According to another embodiment, memory layer 302 is a magnetoresistive random access memory (MRAM) layer, meaning that the resistance of layer 302 changes when an electronic current is applied. Memory layer 302 is formed of two ferromagnetic layers, each of which can remain magnetized, separated by a thin insulating layer. One of the two ferromagnetic layers is called the "fixed layer," having a fixed (immutable) magnetization direction and acting as an electron spin polarizer. The other ferromagnetic layer is called the "free layer," whose direction can be flipped by a relatively high programming current (i.e., it is variable). The magnetization direction of the free layer can be changed by altering the direction of the programming current.

[0075] For example, memory layer 302 extends over the entire surface of OTS layer 104, meaning that the length and width of memory layer 302 are the same as the length and width of OTS layer 104. For example, the thickness of memory layer 302 includes between 10 nm and 100 nm, preferably between 30 nm and 60 nm.

[0076] For example, barrier layer 304 is a layer that restricts the diffusion of memory layer 302 into OTS layer 104, and vice versa. For example, barrier layer 304 is used to restrict the mixing of materials of memory layer 302 and OTS layer 104.

[0077] The barrier layer 304 is made of any conductive and / or diffusing material, such as carbon (C) and carbon nitride ((CN)n). For example, the barrier layer 304 is not made of metal due to the diffusion of metallic material in the OTS layer 104.

[0078] For example, the barrier layer 304 extends over the entire surface of the OTS layer 104, meaning that the length and width of the barrier layer 304 are the same as the length and width of the OTS layer 104 and the memory layer 302. The barrier layer 304 has a thickness, for example, between 5 nm and 30 nm, preferably between 15 nm and 25 nm.

[0079] exist Figure 3 In one example, the vertical portion 1022 of resistor 102 is preferably centered relative to memory cell 300 and extends vertically along the X direction. In another embodiment, the vertical portion 1022 of resistor 102 is preferably centered relative to memory cell 300 and extends vertically along the Y direction.

[0080] exist Figure 4 In one example, the vertical portion 1022 of resistor 102 is preferably centered relative to memory cell 400 and extends vertically along the X direction. In another embodiment, the vertical portion 1022 of resistor 102 is preferably centered relative to memory cell 400 and extends vertically along the Y direction.

[0081] Figure 5 A simplified schematic diagram of the memory cell array 500 is shown.

[0082] The memory cell array 500 includes multiple memory cells, such as Figure 3 The memory unit 300 shown.

[0083] exist Figure 5 In this context, memory cell 300 is located between multiple bit lines 501 and word lines 503. Figure 5 In the middle, bit line 501 is represented by a vertical line, and word line 503 is represented by a horizontal line.

[0084] Each memory cell 300 includes a resistor 102, an OTS layer 104 (or an OTS compound), and a memory layer 302 (or a modular resistivity compound). According to one embodiment, each memory cell 300 is connected to a bit line 501 formed by a conductive layer 106 via a top electrode 105 and to a word line 503 via a resistor 102.

[0085] The array of memory cells 500 has been shown with memory cells 300; however, the array of memory cells 500 can be easily adapted to cells 100, 200 or memory cells 400.

[0086] Figures 6 to 10 The diagram illustrates this. Figure 5 The manufacturing process steps of the memory cell array 500 shown.

[0087] In this embodiment, for example, a mask 601 is used along the first direction. Figure 6 ) to form an active region in order to create word lines (503, Figure 5 Some contacts 701 are then formed on top of the activation area. Figure 7 ).

[0088] For example, resistor 102, for instance, passes through mask 801 along a second direction orthogonal to the first direction. Figure 8 After forming resistor 102, OTS layer 104 and top electrode 105 are formed. The top electrode 105, OTS layer 104, and resistor 102 are then patterned using the "self-aligned wall" technique of mask 901. After depositing an insulating layer and removing it by chemical mechanical polishing to expose the top electrode, conductive layer 106 is deposited to form bit lines (501, Figure 5 ).

[0089] For example, conductive layer 106, top electrode 105, and OTS layer 104 are formed by mask 1001. Conductive layer 106 forms bit lines (501, Figure 5 ).

[0090] A mask is a temporary mask used to locate relevant steps and is then removed, as is customary in the microelectronics industry.

[0091] The advantage of including resistor 102 in each cell of the array is that it allows for limiting the overshoot of the current, which typically occurs during the threshold period, and the interference cell.

[0092] Another advantage of this application is that it increases the lifespan of the cell.

[0093] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these embodiments can be combined, and other variations will be readily apparent to them.

[0094] Finally, based on the functional descriptions provided above, the actual implementation of the embodiments and variations described herein is within the capabilities of those skilled in the art.

Claims

1. An electronic unit, comprising: The integrated stack includes, in sequence: First electrode; A bidirectional threshold switch layer is located below the first electrode; The second electrode is in direct contact with the bidirectional threshold switch layer; and A resistor, having a fixed resistance, is connected to the second electrode. The resistor has an L-shaped cross-section, including a horizontal portion and a vertical portion located between the horizontal portion and the second electrode; and The first end of the vertical portion is in direct contact with the second electrode, and the second end is in contact with the horizontal portion.

2. The electronic unit according to claim 1, wherein the lower surface of the bidirectional threshold switch layer contacts the upper surface of the second electrode, and wherein the upper surface and the lower surface have the same dimensions.

3. The electronic unit according to claim 1 further includes a memory layer, the memory layer being located between the first electrode and the bidirectional threshold switch layer.

4. The electronic unit according to claim 3 further includes a blocking layer between the memory layer and the bidirectional threshold switch layer.

5. The electronic unit according to claim 3, wherein the memory layer is made of a phase change material.

6. The electronic unit according to claim 3, wherein the memory layer is a resistive random access memory layer.

7. The electronic unit according to claim 3, wherein the memory layer is a magnetoresistive random access memory layer.

8. The electronic unit of claim 3, wherein the lower surface of the first electrode contacts the upper surface of the memory layer, and wherein the upper surface and the lower surface have the same dimensions.

9. The electronic unit of claim 8, wherein the L-shaped cross-section of the resistor is self-aligned with the shape of the bidirectional threshold switch layer.

10. The electronic unit of claim 1, wherein the unit is part of a memory including word lines and bit lines, and wherein the unit is connected to the word lines via the resistor and to the bit lines via the first electrode.

11. The electronic unit of claim 1, wherein the upper surface of the bidirectional threshold switch layer contacts the lower surface of the first electrode, and wherein the upper surface and the lower surface have the same dimensions.

12. The electronic unit of claim 1, wherein the bidirectional threshold switch layer comprises a chalcogenide material selected from the group consisting of germanium, tellurium, selenium, tungsten, antimony, arsenic, indium, sulfur, or any combination or alloy of these materials.

13. The electronic unit of claim 1, wherein the second end of the vertical portion of the resistor is in direct contact with the horizontal portion of the resistor.

14. The electronic unit according to claim 1, further comprising: A conductive layer is coupled to the first electrode. The vertical portion of the resistor is centered relative to the electronic unit and extends vertically along a first direction perpendicular to the horizontal portion; The width of the resistor is equal to the corresponding width of the conductive layer; and The resistor and the conductive layer are formed using the same mask layer and along the same first direction.

15. The electronic unit according to claim 14, wherein the conductive layer is in direct contact with the first electrode through a conductive via smaller than the first electrode.

16. The electronic unit according to claim 1, further comprising: A conductive layer is coupled to the first electrode. The vertical portion of the resistor is centered relative to the electronic unit and extends vertically along a second direction perpendicular to the horizontal portion. The width of the resistor is different from the corresponding width of the conductive layer; as well as The resistor and the conductive layer are formed using a first mask layer and a second mask layer oriented along the second direction and a first direction perpendicular to the second direction.

17. The electronic unit of claim 16, wherein the conductive layer is in direct contact with the first electrode through a conductive via smaller than the first electrode.

18. An electronic unit, comprising: The integrated stack includes, in sequence: First electrode; A bidirectional threshold switch layer is located below the first electrode; The second electrode is in direct contact with the bidirectional threshold switch layer; and A resistor, having a fixed resistance, is connected to the second electrode. The resistor has an L-shaped cross-section, including a horizontal portion and a vertical portion located between the horizontal portion and the second electrode; The first end of the vertical portion is in direct contact with the second electrode, and the second end is in contact with the horizontal portion; and The first electrode and the resistor are made of either a refractory metal or a refractory metal nitride.

19. The electronic unit of claim 18, wherein the lower surface of the bidirectional threshold switch layer contacts the upper surface of the second electrode, and wherein the upper surface and the lower surface have the same dimensions.

20. The electronic unit of claim 18 further includes a memory layer located between the first electrode and the bidirectional threshold switch layer.

21. The electronic unit of claim 20, further comprising a blocking layer located between the memory layer and the bidirectional threshold switch layer.

22. The electronic unit of claim 20, wherein the memory layer is made of a phase change material.

23. The electronic unit of claim 20, wherein the memory layer is a resistive random access memory layer.

24. The electronic unit of claim 20, wherein the memory layer is a magnetoresistive random access memory layer.

25. The electronic unit of claim 20, wherein the lower surface of the first electrode contacts the upper surface of the memory layer, and wherein the upper surface and the lower surface have the same dimensions.

26. The electronic unit of claim 18, wherein the L-shaped cross-section of the resistor is self-aligned with the shape of the bidirectional threshold switch layer.

27. The electronic unit of claim 18, wherein the unit is part of a memory including word lines and bit lines, and wherein the unit is connected to the word lines via the resistor and to the bit lines via the first electrode.

28. The electronic unit of claim 18, wherein the upper surface of the bidirectional threshold switch layer contacts the lower surface of the first electrode, and wherein the upper surface and the lower surface have the same dimensions.

29. A memory array, comprising: Word lines; Bit line; Multiple units are coupled between the word line and the bit line; Each unit includes: The integrated stack includes, in sequence: First electrode; A bidirectional threshold switch layer is located below the first electrode; The second electrode is in direct contact with the bidirectional threshold switch layer; and A resistor, having a fixed resistance, is connected to the second electrode. The resistor has an L-shaped cross-section, including a horizontal portion and a vertical portion located between the horizontal portion and the second electrode; The first end of the vertical portion is in direct contact with the second electrode, and the second end is in contact with the horizontal portion; and Each cell is connected to a word line of the word lines via the resistor and to a bit line of the bit lines via the first electrode.

30. A memory array, comprising: Word lines; Bit line; Multiple units are coupled between the word line and the bit line; Each unit includes: The integrated stack includes, in sequence: First electrode; A bidirectional threshold switch layer is located below the first electrode; The second electrode is in direct contact with the bidirectional threshold switch layer; and A resistor, having a fixed resistance, is connected to the second electrode. The resistor has an L-shaped cross-section, including a horizontal portion and a vertical portion located between the horizontal portion and the second electrode; The first end of the vertical portion is in direct contact with the second electrode, and the second end is in contact with the horizontal portion; The first electrode and the resistor are made of a refractory metal or a refractory metal nitride; and Each cell is connected to a word line of the word lines via the resistor and to a bit line of the bit lines via the first electrode.

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