Fabrication Method of Porous Source-Gate Electrode Vertical Transistor Array Based on Femtosecond Laser

Abstract

The present invention discloses a preparation method of a porous source-gate electrode vertical transistor array based on femtosecond laser, comprising the following steps: magnetron sputtering a semiconductor layer on a conductive substrate, and spin-coating a polystyrene microsphere solution on the semiconductor; after the solvent in the polystyrene microsphere solution volatilizes, magnetron sputtering a conductor layer thereon, and dissolving the polystyrene microspheres with an organic solvent to form a porous structure in the conductor layer; using femtosecond laser to punch through the semiconductor layer and the conductor layer containing the porous structure according to a preset pattern to form trenches, and dropping ionic liquid into the trenches and covering the ionic liquid on part of the conductor layer containing the porous structure; leading out a source electrode and a gate electrode in the area not covered with the ionic liquid, and using the bottom conductive substrate corresponding to the unit where the source electrode is located as a drain electrode. This application reduces the uncertain factors in the patterning process, is easy to integrate to form a transistor array, and the patterning process is simple, allowing for diversified pattern design.

Description

Technical Field

[0001] The present invention relates to the technical field of vertical transistor arrays, and particularly to a preparation method of a porous source-gate electrode vertical transistor array based on femtosecond laser. Background Art

[0002] Laser is one of the greatest inventions in the 20th century. Femtosecond laser has the characteristics of ultra-short pulse width and ultra-high peak power. In recent years, femtosecond laser has become one of the powerful tools in the fields of modern manufacturing and precision manufacturing. Various superhydrophobic microstructures can be prepared on the surface of solid materials through femtosecond laser micro-nano processing technology. The laser action position can be precisely controlled, so that various two-dimensional and three-dimensional microstructures can be obtained on the regulated material surface, that is, the wettability of the material is significantly affected by the surface micro-nano structure. By using femtosecond laser treatment to form special micro-scale and nano-scale structures on the material surface, various different wettabilities can be achieved. Femtosecond laser shows powerful capabilities in designing and modifying the wettability of materials. Functional materials with superhydrophobic surfaces prepared by femtosecond laser have important applications in liquid prevention, self-cleaning, anti-icing / fog / snow, anti-fouling, oil / water separation, anti-corrosion, drag reduction, water mist collection, droplet manipulation, liquid patterning, microfluidics, lab-on-a-chip, cell engineering, buoyancy enhancement, etc. Currently, femtosecond laser is used to design the surface wena structure and chemical composition of polymer materials to change their wettability.

[0003] Lithography process is a key process for fine pattern fabrication, which includes processes such as photoresist coating, development, and photoresist stripping.

[0004] The main function of photoresist is to transfer the designed pattern from the mask to the substrate. The function of stripping refers to removing the unwanted photoresist layer by stripping technology after selectively etching to form a microcircuit. Photoresist removal technology occupies a very important position in microelectronics preparation, and its cost accounts for about 30% of the integrated circuit manufacturing process. The quality of stripping directly affects the yield of the device and the final manufacturing cost of the device and circuit. At the same time, the thickness of the photoresist coated on the substrate and its own quality also have an important impact on the subsequent patterning and development process. It is easy to occur the situation of incomplete development and residual photoresist left, so that it is impossible to ensure the consistency of the performance of the subsequent prepared devices and the stability of integration. The quality of photoresist development directly affects the quality of pattern conversion.

[0005] In addition, the performance requirements of the used photoresist are relatively harsh. It is required to be able to strip the photoresist at low temperature in a short time, prevent the remaining substances of the photoresist from remaining on the substrate after rinsing, and the stripping liquid solvents do not react with each other when mixed. At the same time, it can ensure stability even at high temperature. The increase in the probability of photoresist residue leads to a significant increase in the defect rate of the device.

[0006] The pattern transfer process of traditional microfabrication technology requires the use of lithography technology. This step usually requires the use of a physical mask, and the pattern on the mask is copied onto the substrate through ultraviolet light, and then developed to form the required pattern. The steps are relatively cumbersome, and various defects are very likely to be introduced due to factors such as the instability of process equipment or the incompleteness of sanitation and cleaning steps during the process.

[0007] The preparation of vertical transistor devices usually adopts lithography machine overlay, step-by-step deposition on the substrate using mask plates with different patterns, or inkjet printing technology, etc. Overlay accuracy is a very important indicator of step-and-repeat projection lithography machines and is a key design rule in the process of preparing integrated vertical devices. The generation of overlay errors comes from the combined action of various relevant subsystem errors of the whole machine. The overall machine overlay accuracy mainly depends on the accuracy of the alignment system and the positioning accuracy of the worktable. It is also affected by various factors such as the change in objective lens magnification, mask tilt and rotation, silicon wafer deformation during the process, temperature, air pressure, humidity in the production environment, etc.

[0008] When using a mask to prepare vertical transistors, it is impossible to prepare vertical devices with small sizes, and the error in calibrating the correct position is very large and the accuracy is extremely low. The dimensional accuracy of its patterning can usually only be controlled within a range of dozens of micrometers or even larger, which cannot meet the requirements of small sizes.

[0009] The printing process of inkjet printing technology mainly consists of five parts: ink droplets are ejected from the nozzle, the ink droplets fall, adhere to the substrate, the ink droplets spread, and the solvent volatilizes. Since the ink usually has the characteristic of low viscosity, after the ink is deposited on the substrate surface, a certain degree of diffusion phenomenon will occur, which will have a certain impact on the pattern accuracy of inkjet printing, and further limit the resolution of the overall printed device. The diffusion of ink droplets is mainly affected by many factors such as the distance between the nozzle and the substrate, the surface energy of the substrate surface, the temperature of the substrate, and the performance of the oxide ink itself. When the surface energy of the substrate is relatively low, the diffusion process can be blocked, but a very low surface energy will affect the stability of the pattern and cause the line to split into individual droplets. To reduce the agglomeration of ink droplets on the low surface energy substrate, usually complex processes such as UV irradiation or plasma treatment of the substrate are required. At the same time, inkjet printing currently faces problems such as the coffee ring effect and printing accuracy (the control of the deposition position accuracy of the ink droplets ejected by inkjet printing has a huge impact on the accuracy of the thin film pattern. Therefore, during the printing process, it is necessary to ensure that the ink can evenly wet the nozzle and ensure that the droplets fall vertically on the substrate. This requires that the ink solvent at the nozzle neither volatilizes too fast, so as not to clog the needle tip with solute, affect the ink output volume of the needle tip, and damage the continuity and accuracy of printing; nor volatilize too slowly, resulting in the deposition of ink droplets shifting and deforming the pattern. Both of the above points will have a serious impact on the accuracy of inkjet printing. Therefore, this places high requirements on the ink, and it is necessary to comprehensively adjust factors such as the composition of the oxide ink, the slurry ratio, and the viscosity to ensure the smoothness and controllability of the printing process and optimize the inkjet printing accuracy).

[0010] Therefore, current vertical transistors can achieve short channel lengths, but the process is complex and demanding. Summary of the Invention

[0011] In view of the above-mentioned deficiencies currently existing, the present invention provides a method for preparing a porous source-gate electrode vertical transistor array based on femtosecond laser. In this application, a polystyrene microsphere solution is spin-coated on a semiconductor layer at room temperature, and then a conductor electrode layer is magnetron sputtered and the polystyrene microspheres are dissolved and cleaned with acetone to form a porous conductor electrode; this patent is based on femtosecond laser micro-nano processing technology. The femtosecond laser micro-nano processing technology reduces the uncertain factors in the patterning process, is easy to integrate to form a transistor array, and the patterning process is simple and diverse pattern designs can be carried out.

[0012] To achieve the above object, the present invention provides a method for preparing a porous source-gate electrode vertical transistor array based on femtosecond laser, including the following steps:

[0013] Step 1: After cleaning the conductive substrate, magnetron sputter a semiconductor layer on the conductive substrate and spin-coat a polystyrene microsphere solution on the semiconductor;

[0014] Step 2: After the solvent in the polystyrene microsphere solution on the semiconductor layer evaporates, a conductor layer is magnetron sputtered thereon, and the polystyrene microspheres are dissolved with an organic solvent, so that a porous structure left by the microsphere profile can be formed in the conductor layer;

[0015] Step 3: Use femtosecond laser to punch through the semiconductor layer and the conductor layer containing the porous structure according to a preset pattern to form grooves, and drop ionic liquid into the grooves and cover the ionic liquid on part of the conductor layer containing the porous structure;

[0016] Step 4: Lead out the source electrode and the gate electrode in the area not covered with ionic liquid, and use the bottom conductive substrate corresponding to the unit where the source electrode is located as the drain electrode, so as to obtain an array formed by independent vertical transistors.

[0017] According to one aspect of the present invention, the organic solvent is one or more of acetone, ethyl acetate, and tetrahydrofuran.

[0018] According to one aspect of the present invention, the conductive substrate is a silicon wafer, the semiconductor layer is an oxygenated transparent ITO film, and the conductor layer is a non-oxygenated transparent ITO film.

[0019] According to one aspect of the present invention, the polystyrene microsphere solution is formed by mixing polystyrene microspheres and a solvent.

[0020] According to one aspect of the present invention, the thickness of the semiconductor layer is 5-20 nm.

[0021] According to one aspect of the present invention, the thickness of the conductor layer is 5-20 nm.

[0022] According to one aspect of the present invention, the cleaning of the conductive substrate is specifically: the conductive substrate is ultrasonically cleaned successively with acetone, alcohol and deionized water, and then dried with a nitrogen gun.

[0023] According to one aspect of the present invention, Step 4 is specifically: lead out the source electrode on the surface of the conductor layer with a porous structure at the top of an independent unit in the area not covered with ionic liquid, use the bottom conductive substrate thereof as the drain electrode, and lead out the gate electrode on the surface of the conductor layer with a porous structure at the top of another independent unit in the area not covered with ionic liquid.

[0024] According to one aspect of the present invention, the preparation process of the ionic liquid is specifically: polyvinylidene fluoride-hexafluoropropylene, 1-ethyl-3-methylimidazole and acetone are mixed in a weight ratio of 1:4:7, then a magnetic stirrer is added, and the mixture is placed on a heating and stirring table at 90 °C and 700 rpm / s for mixing and stirring for 3 h to prepare.

[0025] The beneficial effects of the present invention:

[0026] (1) This application uses femtosecond laser micro-nano processing technology to fabricate short-channel vertical transistors, reducing the uncertain factors in the patterning process, facilitating integration to form transistor arrays, and having a simple patterning process that allows for diverse pattern designs.

[0027] (2) Compared with traditional processes, this application omits the photolithography step in the traditional patterning process, thereby reducing the preparation difficulty.

[0028] (3) The porous electrodes formed by dissolving polystyrene microspheres with organic solvents such as acetone, ethyl acetate, and tetrahydrofuran in this application, or the porous electrodes prepared through the pattern of a lithography mask with a designed hole shape, have increased porosity of the electrodes, can increase the specific surface area of the electrolyte, provide a place for the accumulation of electrolyte ions and charges, thereby increasing the specific capacitance, and also provide direct contact for the effective coupling between the gate and the channel.

[0029] (4) Femtosecond lasers, which are used to design the micro-nano structure and chemical composition of the polymer material surface to change its wettability, are used to etch the material to form trenches for fabricating neuromorphic transistor arrays. By controlling the power of the femtosecond laser, a specific material layer is penetrated to form trenches, and through the dropped ionic liquid, the integrated transistor is regulated. Brief Description of the Drawings

[0030] Figure 1 is a three-dimensional schematic diagram of the structure obtained in the first step of the present invention;

[0031] Figure 2 is a cross-sectional schematic diagram of the structure of the magnetron sputtered conductor layer in the second step of the present invention;

[0032] Figure 3 is a cross-sectional schematic diagram of the structure after dissolving polystyrene microspheres with organic solvents in the second step of the present invention;

[0033] Figure 4 is a cross-sectional schematic diagram of the trench structure formed after femtosecond laser treatment in the third step of the present invention;

[0034] Figure 5 is a cross-sectional schematic diagram of the structure after the ionic liquid is obtained in the third step of the present invention;

[0035] Figure 6 is a top-plane schematic diagram of the structure after the ionic liquid is obtained in the third step of the present invention.

[0036] Brief Description of the Drawings: 1. Conductive substrate; 2. Semiconductor layer; 3. Polystyrene microsphere solution; 4. Conductor layer; 5. Femtosecond laser; 6. Solid-state solid electrolyte; 7. Drain electrode; 8. Source electrode; 9. Gate electrode. Detailed Description of the Invention

[0037] To make the present invention easier to understand, the present invention will be further described below in conjunction with specific embodiments. It should be understood that these embodiments are only used to illustrate the present invention and not to limit the scope of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the scope of protection of the present invention. Unless otherwise defined, the technical terms used hereinafter have the same meaning as understood by those of ordinary skill in the art; unless otherwise specified, the raw materials and reagents involved in this article can be purchased from the market or prepared by well-known methods.

[0038] The model of the femtosecond laser used in this application is: Huari femtosecond fiber laser (center wavelength is 1035nm, pulse width is 350fs), from a commercial femtosecond fiber laser system (HR-Femto-IR-50-40B, Huaray, China).

[0039] The present invention provides a method for preparing a porous source-gate electrode vertical transistor array based on femtosecond laser, including the following steps:

[0040] Step 1: After cleaning the conductive substrate, magnetron sputter a semiconductor layer on the conductive substrate, and spin-coat a polystyrene microsphere solution on the semiconductor, as specifically Figure 1 shown; wherein, the thickness of the semiconductor is 5-20nm, and the polystyrene microsphere solution is a particulate solution prepared with polystyrene microspheres and a solvent (the solvent here is specifically water) to a required concentration, and the concentration range is 50mg / ml to 100mg / ml; the polystyrene microspheres are of micro-nano level, and the particle size uniformity of nano- and micron-sized polystyrene microspheres is good, the diameter can be adjusted within the range of 10-1000nm, the monodispersity coefficient is high, and it has a standard spherical morphology structure, and it is stable in aqueous solution and can be stored for a long time; the specific cleaning of the conductive substrate is: ultrasonically clean the conductive substrate successively with acetone, alcohol and deionized water, and then dry it with a nitrogen gun; the conductive substrate is a silicon wafer, the semiconductor layer is an oxygenated transparent ITO film, and the conductor layer is a non-oxygenated transparent ITO film.

[0041] Step 2: After the water in the polystyrene microsphere solution on the semiconductor layer volatilizes, magnetron sputter a conductor layer on it, as specifically Figure 2 shown, wherein, the thickness of the conductor layer is 5-20nm; and dissolve the polystyrene microspheres with an organic solvent, and a porous structure left by the microsphere profile can be formed in the conductor layer, as specifically Figure 3 shown; wherein, the organic solvent is one or more of acetone, ethyl acetate, and tetrahydrofuran; the organic solvent is preferably acetone.

[0042] Step 3: Use femtosecond laser to punch through the semiconductor layer and the conductor layer with a porous structure according to a preset pattern to form trenches, as specifically shown in Figure 4 ; and drop ionic liquid into the trenches and partially cover the conductor layer with a porous structure, as specifically shown in Figure 5 and Figure 6 ; wherein, the preparation process of the ionic liquid is as follows: Mix polyvinylidene fluoride-hexafluoropropylene, 1-ethyl-3-methylimidazole and acetone in a weight ratio of 1:4:7, add a magnetic stirrer, and place it on a heating and stirring table at 90 °C and 700 rpm / s for mixing and stirring for 3 h to prepare.

[0043] Step 4: Lead out the source electrode from the surface of the conductor layer with a porous structure at the top of an independent unit in the area not covered with ionic liquid, use the conductive substrate at the bottom as the drain electrode, and lead out the gate electrode from the surface of the conductor layer with a porous structure at the top of another independent unit in the area not covered with ionic liquid.

[0044] Figure 5 is Figure 6 the cross-sectional schematic diagram at the lateral symmetry axis of Figure 6 ; Drop ionic liquid at the trenches formed by the top conductor layer and femtosecond laser to form a solid electrolyte type gate dielectric. Use an insulating silicon wafer (conductive substrate) as the drain electrode of the vertical transistor, use the top conductor layer as the source electrode of the vertical transistor, and use the top conductor layer of the nearby device as the side gate to regulate the channel current of the transistor.

[0045] Example 1

[0046] In this example, the conductive substrate is a silicon wafer, the conductor layer is a transparent ITO film without oxygen, the semiconductor layer is a transparent ITO film with oxygen, the polystyrene solution is used as a template for forming pores, and the solid-state ion electrolyte is the prepared ionic liquid.

[0047] (1) Ultrasonically clean a silicon wafer conductive substrate with an area of 2 cm × 2 cm and a thickness of about 600 μm in turn with acetone, alcohol and deionized water, and then dry it with a nitrogen gun. Put the silicon wafer into the radio frequency magnetron sputtering vacuum chamber, and set the parameters: the radio frequency power, argon flow rate, oxygen flow rate and working pressure are 50 W, 20 sccm, 14 sccm and 0.65 Pa (Ar:O2 = 10:7) respectively. Use an ITO target to deposit a transparent ITO film with a thickness of 5-20 nm on this substrate through a sputtering process in a mixed gas of argon and oxygen as the semiconductor layer.

[0048] (2) Use a spin coater to spin coat a polystyrene microsphere solution (polystyrene microspheres + water) with a microsphere diameter of 500 nm on the deposited ITO semiconductor thin film layer at 700 rpm / s and 5000 rpm / s for 6 seconds and 30 seconds respectively.

[0049] (3) After the water in the polystyrene microsphere solution has evaporated, place it again in the radio frequency magnetron sputtering vacuum chamber. The parameters are set as follows: the radio frequency power, argon gas flow rate, and working pressure are 50 W, 15 sccm, and 0.65 Pa, respectively. Use an ITO target to deposit a transparent ITO thin film with a thickness of 5 - 20 nm at the gaps between the polystyrene microspheres as the conductor layer.

[0050] (4) After dissolving the polystyrene microspheres with acetone or tetrahydrofuran solution, a porous structure left by the microsphere profile can be formed in the top conductor layer.

[0051] (5) Use femtosecond laser to process the sample with two layers of materials deposited on the silicon wafer according to the set pattern, punch through the top porous conductor layer and the semiconductor layer to form trenches. Set the laser power to 60% and the etching speed to 100 mm / s to form an array integrated with multiple independent units.

[0052] (6) Mix poly(vinylidene fluoride - co - hexafluoropropylene), 1 - ethyl - 3 - methylimidazolium(trifluoromethanesulfonate), and acetone in a weight ratio of 1:4:7, add a magnetic stir bar, and place it on a heating and stirring table at 90 °C and 700 rpm / s to mix and stir for 3 h to prepare an ionic liquid. Drop the prepared ionic liquid into the trenches formed by the femtosecond laser and the top porous conductor layer, and the ionic liquid should not cover the entire top porous conductor layer, leaving positions for the pressure pins of the source and drain electrodes.

[0053] (7) Lead out the source electrode on the surface of the top porous ITO thin film area (the area not covered by the ionic liquid) of an independent unit, and at the same time use the bottom silicon wafer substrate of this unit as the drain electrode. Lead out the gate electrode on the surface of the top porous ITO thin film area of another independent unit, and perform side - gate regulation through the ionic liquid as the dielectric, thereby obtaining an array formed by independent vertical transistors.

[0054] As described above, this is only the specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present invention should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claimed rights.

Claims

1. A preparation method of a porous source-gate electrode vertical transistor array based on femtosecond laser, characterized in that, It includes the following steps: Step 1: After cleaning the conductive substrate, magnetron sputter a semiconductor layer on the conductive substrate, and spin-coat a polystyrene microsphere solution on the semiconductor; Step 2: After the solvent in the polystyrene microsphere solution on the semiconductor layer volatilizes, magnetron sputter a conductor layer on it, and dissolve the polystyrene microspheres with an organic solvent, so as to form a porous structure left by the microsphere profile in the conductor layer; Step 3: Use femtosecond laser to punch through the semiconductor layer and the conductor layer containing the porous structure according to a pre-set pattern to form trenches, and drop ionic liquid into the trenches and cover the ionic liquid on part of the conductor layer containing the porous structure; Step 4: Lead out the source electrode and the gate electrode in the area not covered with ionic liquid, and use the bottom conductive substrate corresponding to the unit where the source electrode is located as the drain electrode, that is, obtain an array formed by independent vertical transistors; Among them, the specific content of Step 4 is: lead out the source electrode on the surface of the conductor layer with a porous structure at the top of an independent unit in the area not covered with ionic liquid, use the bottom conductive substrate as the drain electrode, and lead out the gate electrode on the surface of the conductor layer with a porous structure at the top of another independent unit in the area not covered with ionic liquid.

2. The manufacturing method of the porous source-gate electrode vertical transistor array based on femtosecond laser according to claim 1, characterized in that The organic solvent is one or more of acetone, ethyl acetate, and tetrahydrofuran.

3. The manufacturing method of the porous source-gate electrode vertical transistor array based on femtosecond laser according to claim 1, characterized in that, The conductive substrate is a silicon wafer, the semiconductor layer is an oxygenated transparent ITO film, and the conductor layer is a non-oxygenated transparent ITO film.

4. The manufacturing method of the porous source-gate electrode vertical transistor array based on femtosecond laser according to claim 1, characterized in that, The polystyrene microsphere solution is formed by mixing polystyrene microspheres and a solvent.

5. The preparation method of the porous source-gate electrode vertical transistor array based on femtosecond laser according to claim 1, wherein The thickness of the semiconductor layer is 5 - 20 nm.

6. The preparation method of the porous source-gate electrode vertical transistor array based on femtosecond laser according to claim 1, characterized in that, The thickness of the conductor layer is 5 - 20 nm.

7. The preparation method of the porous source-gate electrode vertical transistor array based on femtosecond laser according to claim 1, characterized in that, The specific cleaning of the conductive substrate is: ultrasonically clean the conductive substrate successively with acetone, alcohol and deionized water, and then dry it with a nitrogen gun.

8. The preparation method of the porous source-gate electrode vertical transistor array based on femtosecond laser according to claim 1, characterized in that, The specific preparation process of the ionic liquid is: mix polyvinylidene fluoride - hexafluoropropylene, 1 - ethyl - 3 - methylimidazole and acetone in a weight ratio of 1:4:7, add a magnetic stirrer, and place it on a heating and stirring table at 90 °C and 700 rpm / s to mix and stir for 3 h to prepare.

Images