Solid-state imaging elements and imaging systems

Abstract

The solid-state imaging element (200) according to the present disclosure includes a first substrate (light receiving chip 201) and a second substrate (detection chip 202). The first substrate (light receiving chip 201) includes a photodiode (221) that photoelectrically converts incident light to generate a photocurrent. The second substrate (detection chip 202) is bonded to the first substrate (light receiving chip 201) and includes a brightness change detection circuit (current-voltage conversion circuit 310) that detects brightness changes of incident light based on a voltage signal converted by the conversion circuit (current-voltage conversion circuit 310), which converts the photocurrent into a voltage signal. A light shielding component (700) is provided in at least one of the first substrate (light receiving chip 201) and the second substrate (detection chip 202) and shields an area between the photodiode (221) and an active element (transistor TR) provided in the second substrate (detection chip 202).

Description

Technical Field

[0001] The present disclosure relates to a solid-state imaging element and an imaging system. Background Art

[0002] A solid-state imaging element used in a dynamic vision system photoelectrically converts incident light into a voltage signal, and detects a change in brightness of the incident light based on the voltage signal (for example, see Patent Document 1).

[0003] Reference List

[0004] Patent Literature

[0005] Patent Document 1: International Publication No. 2019 / 087472 Summary of the Invention

[0006] Problems to be solved by the present invention

[0007] However, in a solid-state imaging element that detects a change in luminance of incident light, if application of stray light occurs inside, the voltage of the voltage signal fluctuates, and the detection accuracy of the luminance change may deteriorate.

[0008] Therefore, the present disclosure proposes a solid-state imaging element and an imaging system capable of suppressing degradation in detection accuracy of luminance changes.

[0009] Solution to the problem

[0010] The solid-state imaging element according to the present disclosure is provided with a first substrate and a second substrate. The first substrate is provided with a photodiode, which photoelectrically converts incident light to generate a photocurrent. The second substrate is provided with a brightness change detection circuit, which detects brightness changes of the incident light based on a voltage signal converted by a conversion circuit, and the brightness change detection circuit is bonded to the first substrate, and the conversion circuit converts the photocurrent into a voltage signal. A light shielding unit is included, which is provided in at least any of the first substrate or the second substrate and shields light between the active element provided in the second substrate and the photodiode. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 is a block diagram showing a configuration example of an imaging device according to the present disclosure.

[0012] Figure 2 : is a diagram illustrating an example of a stacked structure of a solid-state imaging element according to the present disclosure.

[0013] Figure 3 is an example of a plan view of a light receiving chip according to the present disclosure.

[0014] Figure 4 is an example of a plan view of a detection chip according to the present disclosure.

[0015] Figure 5 is an example of a plan view of an address event detection unit according to the present disclosure.

[0016] Figure 6 is a block diagram showing a configuration example of an address event detection circuit according to the present disclosure.

[0017] Figure 7 is a circuit diagram showing a configuration example of a current-voltage conversion circuit according to the present disclosure.

[0018] Figure 8A is a circuit diagram showing a configuration example of a subtractor and a quantizer according to the present disclosure.

[0019] Figure 8B is a circuit diagram showing a variation of the quantizer according to the present invention.

[0020] Figure 9 is a schematic cross-sectional view of a solid-state imaging element according to the present disclosure.

[0021] Figure 10A : is a cross-sectional schematic diagram showing a configuration example of a light-receiving chip-side light-shielding wiring according to the present disclosure.

[0022] Figure 10B : is a cross-sectional schematic diagram showing a configuration example of a light-receiving chip-side light-shielding wiring according to the present disclosure.

[0023] Figure 10C 1 is a plan view schematically illustrating a configuration example of a light-receiving chip-side light-shielding wiring according to the present disclosure.

[0024] Figure 10D is a side illustrative view showing an arrangement example of a light-receiving chip-side light-shielding wiring according to the present disclosure.

[0025] Figure 11A 1 is a schematic plan view showing an example of arrangement of detection chip side light shielding wiring according to the present disclosure.

[0026] Figure 11B 1 is a schematic plan view showing an example of arrangement of detection chip side light shielding wiring according to the present disclosure.

[0027] Figure 11C 1 is a side view schematically illustrating a configuration example of a detection chip side light shielding wiring according to the present disclosure.

[0028] Figure 12 is a cross-sectional explanatory diagram illustrating another arrangement example of the light-shielding film according to the present disclosure.

[0029] Figure 13 is a schematic cross-sectional view showing a light-shielding trench structure according to the present disclosure.

[0030] Figure 14A is a schematic plan view showing an example of a first light shielding structure according to the present disclosure.

[0031] Figure 14B It is along Figure 14A A cross-sectional view taken along line AA' in FIG.

[0032] Figure 15A is a schematic plan view showing an example of a second light shielding structure according to the present disclosure.

[0033] Figure 15B It is along Figure 15A A cross-sectional view taken along line BB' in FIG.

[0034] Figure 16 is a block diagram showing another configuration example of the address event detection circuit according to the present disclosure.

[0035] Figure 17 is a block diagram illustrating a configuration example of a scanning-type image forming apparatus according to the present disclosure.

[0036] Figure 18 is a schematic diagram showing a configuration example of a distance measurement system according to an embodiment of the present disclosure.

[0037] Figure 19 is a block diagram showing a circuit configuration example of a distance measurement system according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0038] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In the following embodiments, the same parts are denoted by the same reference numerals and their descriptions are omitted.

[0039] [1. Configuration Example of Imaging Device]

[0040] Figure 1 1 is a block diagram illustrating an example configuration of an imaging device 100 according to the present disclosure. This imaging device 100 is an example of an imaging system for image data, and is provided with an imaging lens 110, a solid-state imaging element 200, a recording unit 120, and a control unit 130. As the imaging device 100, a camera mounted on an industrial robot, a vehicle-mounted camera, or the like is assumed.

[0041] The imaging lens 110 collects incident light and guides it to the solid-state imaging element 200. The solid-state imaging element 200 performs photoelectric conversion on the incident light to form image data. The solid-state imaging element 200 performs predetermined signal processing (such as image recognition processing) on the imaged image data and outputs the processed data to the recording unit 120 via the signal line 209.

[0042] The recording unit 120 records data from the solid-state imaging element 200. The control unit 130 controls the solid-state imaging element 200 to image the image data.

[0043] [2. Configuration Example of Solid-State Imaging Element]

[0044] Figure 2 2 is a diagram illustrating an example of a stacked structure of a solid-state imaging element 200 according to the present disclosure. This solid-state imaging element 200 includes a detection chip 202 and a light receiving chip 201 stacked on the detection chip 202. These chips are joined together using vias, etc. Note that in addition to vias, they can also be connected to each other using Cu-Cu joints or bumps. The detection chip 202 is an example of a signal processing chip that performs signal processing on the output from the solid-state imaging element 200.

[0045] Figure 3 2 is an example of a plan view of the light receiving chip 201 according to the present disclosure. The light receiving chip 201 is provided with a light receiving unit 220 and via arrangement units 211 , 212 , and 213 .

[0046] Vias connected to the detection chip 202 are provided in the via arrangement units 211, 212, and 213. Furthermore, in the light receiving unit 220, a plurality of photodiodes 221 are arranged in a two-dimensional lattice. The photodiodes 221 photoelectrically convert incident light to generate photocurrent. Each photodiode 221 is assigned a pixel address consisting of a row address and a column address and is treated as a pixel.

[0047] Figure 4 2 is an example of a plan view of a detection chip 202 according to the present disclosure. The detection chip 202 is provided with via arrangement units 231, 232, and 233, a signal processing circuit 240, a row driver circuit 251, a column driver circuit 252, and an address event detection unit 260. Vias connected to the light receiving chip 201 are arranged in the via arrangement units 231, 232, and 233.

[0048] The address event detection unit 260 generates a detection signal from the photocurrent of each of the plurality of photodiodes 221 and outputs it to the signal processing circuit 240. The detection signal is a 1-bit signal indicating whether the fact that the amount of incident light exceeds a predetermined threshold is detected as an address event.

[0049] The row driving circuit 251 selects a row address and allows the address event detection unit 260 to output a detection signal corresponding to the selected row address.

[0050] The column driving circuit 252 selects a column address and allows the address event detection unit 260 to output a detection signal corresponding to the selected column address.

[0051] The signal processing circuit 240 performs predetermined signal processing on the detection signal from the address event detection unit 260. The signal processing circuit 240 arranges the detection signal into pixel signals in a two-dimensional lattice manner and obtains image data with 1 bit of information for each pixel. The signal processing circuit 240 then performs signal processing such as image recognition processing on the image data.

[0052] Figure 5 is an example of a plan view of the address event detection unit 260 according to the present disclosure. In this address event detection unit 260, a plurality of address event detection circuits 300 are arranged in a two-dimensional lattice. Each address event detection circuit 300, to which a pixel address is assigned, is connected to the photodiode 221 having the same address.

[0053] The address event detection circuit 300 quantizes a voltage signal corresponding to the photocurrent from the corresponding photodiode 221 and outputs the voltage signal as a detection signal.

[0054] [3. Configuration Example of Address Event Detection Circuit]

[0055] Figure 6 3 is a block diagram showing a configuration example of an address event detection circuit 300 according to the present disclosure. The address event detection circuit 300 is provided with a current-voltage conversion circuit 310, a buffer 320, a subtractor 330, a quantizer 340, and a transfer circuit 350.

[0056] The current-to-voltage conversion circuit 310 converts the photocurrent from the corresponding photodiode 221 into a voltage signal and provides the voltage signal to the buffer 320 .

[0057] The buffer 320 corrects the voltage signal from the current-voltage conversion circuit 310 and outputs the corrected voltage signal to the subtractor 330 .

[0058] The subtractor 330 reduces the level of the voltage signal from the buffer 320 according to the row driving signal from the row driving circuit 251. The subtractor 330 supplies the reduced voltage signal to the quantizer 340.

[0059] The quantizer 340 quantizes the voltage signal from the subtractor 330 into a digital signal and outputs the digital signal and the detection signal to the transfer circuit 350 .

[0060] The transfer circuit 350 transfers the detection signal from the quantizer 340 to the signal processing circuit 240 according to the column driving signal from the column driving circuit 252 .

[0061] [4. Configuration Example of Current-Voltage Conversion Circuit]

[0062] Figure 7 1 is a circuit diagram showing an example configuration of a current-voltage conversion circuit 310 according to the present disclosure of the present technology. This current-voltage conversion circuit 310 is provided with a conversion transistor 311, a current source transistor 312, and a voltage supply transistor 313. As the conversion transistor 311 and the voltage supply transistor 313, for example, N-type metal oxide semiconductor (MOS) transistors are used. In addition, as the current source transistor 312, for example, a P-type MOS transistor is used.

[0063] The conversion transistor 311 converts the photocurrent I from the corresponding photodiode 221 in Converted into voltage signal V out The source of the conversion transistor 311 is connected to the cathode of the photodiode 221 and the gate of the voltage supply transistor 313 via the input signal line 314. The drain of the conversion transistor 311 is connected to the power supply, and the gate thereof is connected to the drain of the current source transistor 312, the drain of the voltage supply transistor 313, and the input terminal of the buffer 320 via the output signal line 315.

[0064] The current source transistor 312 supplies a predetermined constant current to the output signal line 315. bias is applied to the gate of the current source transistor 312. Its source is connected to the power supply, and its drain is connected to the output signal line 315.

[0065] The voltage supply transistor 313 supplies a constant voltage corresponding to a constant current from the output signal line 315 to the source of the conversion transistor 311 via the input signal line 314. Therefore, the source voltage of the conversion transistor 311 is fixed to a constant voltage. Therefore, when light is incident, the gate-source voltage of the conversion transistor 311 increases according to the photocurrent, and the voltage signal V out The level increases.

[0066] [5. Configuration Example of Subtractor and Quantizer]

[0067] Figure 8A 3 is a circuit diagram showing a configuration example of the subtractor 330 and the quantizer 340 according to the present disclosure. The subtractor 330 is provided with capacitors 331 and 333, an inverter 332, and a switch 334. In addition, the quantizer 340 is provided with a comparator 341.

[0068] One end of the capacitor 331 is connected to the output terminal of the buffer 320, and the other end thereof is connected to the input terminal of the inverter 332. The capacitor 333 is connected to the inverter 332 in parallel.

[0069] The switch 334 includes, for example, a metal oxide semiconductor field effect transistor (MOSFET) and opens and closes a path connecting both ends of the capacitor 333 according to a row driving signal. The switch 334 functions as a reset transistor for discharging and resetting the capacitor 333 by connecting both ends of the capacitor 333.

[0070] The inverter 332 inverts the voltage signal input via the capacitor 331 , and outputs the inverted signal to the non-inverting input terminal (+) of the comparator 341 .

[0071] The comparator 341 is, for example, an inverting amplifier, and functions as a luminance change detection circuit that detects a luminance change of incident light incident on the photodiode 221 based on the voltage signal input from the subtractor 330 .

[0072] The comparator 341 compares the voltage signal from the subtractor 330 with predetermined threshold voltages VthON and VthOFF applied to the inverting input terminal (-) to detect brightness changes of the incident light. The comparator 341 outputs a signal indicating the comparison result as a detection signal to the transfer circuit 350.

[0073] In the comparator 341, for example, when the imaging device 100 is used for facial authentication, threshold voltages VthON and VthOFF are input in synchronization with the blink cycle of the light source that applies blink light to the face of the subject. The comparator 341 compares the input voltage signal with the threshold voltage VthON during the period when the light source is turned on. Furthermore, the comparator 341 compares the input voltage signal with the threshold voltage VthOFF during the period when the light source is turned off.

[0074] It should be noted that the configuration of the quantizer 340 is not limited to Figure 8A The configuration shown in , and may be, for example Figure 8B FIG8 is a circuit diagram showing a variation of the quantizer according to the present invention. Figure 8B As shown, the quantizer 340a according to this modification is provided with two comparators 341a and 341b connected in parallel to the input.

[0075] The voltage signal is input to the non-inverting input terminals (+) of the comparators 341a and 341b from the subtractor 330. The threshold voltage VthON is input to the inverting input terminal (-) of the comparator 341a. The threshold voltage VthOFF is input to the inverting input terminal (-) of the comparator 341b.

[0076] The comparator 341a outputs a detection signal SigON indicating a comparison result between the voltage signal and the threshold voltage VthON to the transfer circuit 350. The comparator 341b outputs a detection signal SigOFF indicating a comparison result between the voltage signal and the threshold voltage VthOFF to the transfer circuit 350.

[0077] By the quantizer 340a having such a configuration, Figure 8A Similar to the quantizer 340 shown in FIG, a change in the brightness of incident light incident on the photodiode 221 can be detected based on the voltage signal input from the subtractor 330, and the detection result can be output to the transmission circuit 350.

[0078] Here, in the quantizers 340 and 340a, when the parasitic light sensitivity (PLS) of the subtractor 330 is high, the voltage of the input voltage signal fluctuates due to application of stray light or diffusion of light-generated charges in the subtractor 330, and detection accuracy of luminance variation deteriorates.

[0079] For example, in Figure 8A In the case of the configuration shown in , when application of stray light or diffusion of light-generated charges occurs in the impurity diffusion regions A1 and A2 respectively connected to the capacitors 331 and 333 included in the subtractor 330, photoelectric conversion occurs, and the voltage of the voltage signal input to the quantizer 340 fluctuates.

[0080] Furthermore, when application of stray light or diffusion of photogenerated charges occurs in the impurity diffusion region A3 connected to the gate of the switch 334 , abnormality occurs in the opening / closing operation of the switch 334 , and the voltage of the voltage signal input to the quantizer 340 may fluctuate.

[0081] Furthermore, for example, in the address event detection circuit 300 , a light emission phenomenon associated with generation of hot carriers (hereinafter, referred to as HC light emission) may occur near the gate electrode of a transistor having a relatively large amount of current.

[0082] When light emitted by the HC light transmits through the inside of the solid-state imaging element 200 and is received by the photodiode 221 , photoelectric conversion occurs, dark current and random noise increase, and detection accuracy of luminance changes deteriorates.

[0083] Therefore, the solid-state imaging element 200 according to the present disclosure has a configuration that suppresses the degradation of the detection accuracy of the luminance change caused by the application of stray light or the diffusion of light-generated charge. Hereinafter, the solid-state imaging element having a configuration that suppresses the degradation of the detection accuracy of the luminance change according to the present disclosure will be described in detail.

[0084] [6. Solid-state imaging element according to the present disclosure]

[0085] [6-1. Overall Configuration of Solid-State Imaging Element According to the Present Disclosure]

[0086] Next, refer to Figure 9 A solid-state imaging element according to the present disclosure is described. Figure 9 It is a schematic cross-sectional view of a solid-state imaging element according to the present disclosure. Note that, for convenience, the following description assumes that the side of the surface of the solid-state imaging element on which light is incident is the upper side, and the side opposite to the surface on which light is incident is the lower side.

[0087] like Figure 9 As shown, the solid-state imaging element 200 according to the present disclosure is provided with a light receiving chip 201 as an example of a first substrate on which a photodiode 221 is provided and a detection chip 202 as an example of a second substrate bonded to the light receiving chip 201. An on-chip lens 600 is stacked on the light receiving chip 201.

[0088] The light receiving chip 201 is provided with a semiconductor layer 400 in which a plurality of photodiodes 221 are arranged in a matrix, and a first wiring layer 500 provided on a side opposite to a surface of the semiconductor layer 400 on which light is incident.

[0089] The semiconductor layer 400 is, for example, a silicon (Si) substrate doped with a P-type impurity such as boron (B). The photodiodes 221 are regions in which N-type impurities such as phosphorus (P) are diffused in the semiconductor layer 400. Deep trench isolation (DTI) 401 is provided between the photodiodes 221 to electrically and optically isolate the photodiodes 221 from each other.

[0090] The first wiring layer 500 includes, for example, an interlayer insulating film 501 such as a silicon oxide (SiO2) film, multilayer wiring including a first wiring M1, a second wiring M2, a third wiring M3, and the like provided inside the interlayer insulating film 501, and a connection electrode MCu. The connection electrode MCu is an electrode that electrically connects the light receiving chip 201x to the detection chip 202x through a Cu (copper)-Cu (copper) connection.

[0091] For example, the detection chip 202 is provided with a semiconductor layer 410 and a second wiring layer 510, in which a circuit element such as a transistor TR included in a signal processing circuit such as an address event detection circuit 300 is provided, and the second wiring layer 510 is provided on one side of the surface of the semiconductor layer 410 where light is incident.

[0092] The semiconductor layer 410 is, for example, a silicon (Si) substrate doped with a P-type impurity such as boron (B). For example, the semiconductor layer 410 includes a region in which an N-type impurity such as phosphorus (P) is diffused. The region in which the N-type impurity is diffused becomes, for example, the source S and drain D of the transistor TR.

[0093] The second wiring layer 510 includes, for example, an interlayer insulating film 511 such as a silicon oxide (SiO2) film, multilayer wiring M disposed within the interlayer insulating film 511, and a connection electrode MCu. The connection electrode MCu is an electrode that electrically connects the detection chip 202x to the light receiving chip 201x via a Cu (copper)-Cu (copper) connection. Furthermore, the gate electrode G of the transistor TR is disposed in the second wiring layer 510.

[0094] Here, in the solid-state imaging element 200 , when the light 800 incident on the on-chip lens 600 transmits through the photodiode 221 , the first wiring layer 500 , and the second wiring layer 510 and is incident on the semiconductor layer 410 of the detection chip 202 x , the detection accuracy of the brightness change may deteriorate.

[0095] As described above, when light 800 is incident on, for example, the impurity diffusion region connected to the capacitors 331 and 333 and the gate of the switch 334 in the subtractor 330, photoelectric conversion occurs in the impurity diffusion region, and the voltage of the voltage signal input to the quantizer 340 fluctuates. Therefore, in the solid-state imaging element 200, the detection accuracy of the luminance change deteriorates.

[0096] Furthermore, in the solid-state imaging element 200, when light 802 generated by HC light emission 801 near the gate electrode G of the transistor TR is transmitted through the second wiring layer 510 and the first wiring layer 500 and is incident on the photodiode 221, dark current and random noise increase. Therefore, in the solid-state imaging element 200, the detection accuracy of the luminance change deteriorates.

[0097] Therefore, the light receiving chip 201 according to the present disclosure is provided with a light shielding film 700 serving as a light shielding unit that shields light between the active element provided in the detection chip 202 and the photodiode 221 provided in the first wiring layer 500 between the semiconductor layer 400 and the detection chip 202 .

[0098] According to this light receiving chip 201, the light 800 incident on the on-chip lens 600 and transmitted through the photodiode 221 can be prevented from being transmitted through the first wiring layer 500. Therefore, the solid-state imaging element 200 can suppress the deterioration of the detection accuracy of the brightness change caused by the light 800 incident on the on-chip lens 600 being incident on the detection chip 202.

[0099] It should be noted that the light receiving chip 201 may be provided with wiring for shielding light (hereinafter referred to as "light shielding wiring") instead of the light shielding film 700 at a position where the light shielding film 700 is provided. Figure 9In the example shown, the transmission of the light 800 can be prevented only by changing the wiring pattern of the second wiring M2 without separately adding a step of forming the light shielding film 700 .

[0100] In this case, the light-shielding wiring may be connected to the first wiring M1 , the second wiring M2 , the third wiring M3 , etc., or may be a dummy wiring not connected to the first wiring M1 , the second wiring M2 , the third wiring M3 , etc.

[0101] In contrast, the detection chip 202 is provided with a light shielding wiring 701 serving as a light shielding unit that shields light between the active elements provided in the detection chip 202 and the photodiode 221 provided in the second wiring layer 510 between the semiconductor layer 410 and the light receiving chip 201 .

[0102] According to this detection chip 202, light 802 by HC light emission 801 can be prevented from transmitting through the second wiring layer 510. Therefore, the solid-state imaging element 200 can suppress deterioration in detection accuracy of luminance changes due to incidence of light 802 by HC light emission 801 on the photodiode 221.

[0103] The light-shielding wiring 701 may be connected to another multilayer wiring M provided in the second wiring layer 510 or may be a dummy wiring not connected to another multilayer wiring M. In addition, a light-shielding film 202 may be provided in place of the light-shielding wiring 701 at the location where the light-shielding wiring 701 is provided.

[0104] Here, a case where the solid-state imaging element 200 is provided with the light shielding film 700 and the light shielding wiring 701 is described, but the solid-state imaging element 200 may be provided with at least either the light shielding film 700 or the light shielding wiring 701 .

[0105] In addition, the case where a light shielding unit such as a light shielding film and a light shielding wiring is provided in both the light receiving chip 201 and the detection chip 202 is described herein, but the light shielding unit may be provided in at least either one of the light receiving chip 201 or the detection chip 202 .

[0106] [6-2. Configuration Example of Light-Receiving Chip-Side Light-Shielding Wiring According to the Present Disclosure]

[0107] Next, refer to 10A to 10D A configuration example of the light-shielding wiring on the light-receiving chip side is described. Figure 10A and Figure 10B : is a cross-sectional schematic diagram showing a configuration example of a light-receiving chip-side light-shielding wiring according to the present disclosure. Figure 10C 1 is a plan view schematically illustrating a configuration example of a light-receiving chip-side light-shielding wiring according to the present disclosure. Figure 10D1 is a side schematic diagram showing a configuration example of a light-receiving chip-side light-shielding wiring according to the present disclosure.

[0108] like Figure 10A As shown, the light receiving chip 201 has a structure in which the wiring pattern in the first wiring layer 500 is regularly repeated. Figure 10A In the example shown, the structure is such that the same wiring pattern is repeated in every three adjacent pixels.

[0109] Therefore, in the light receiving chip 201 , even if the light 800 incident via the on-chip lens 600 is reflected by the light shielding wiring 710 , the first wiring M1 , the second wiring M2 , and the third wiring M3 , the reflected light is uniformly incident on the photodiode 221 in units of three pixels.

[0110] Therefore, the light receiving chip 201 can prevent the occurrence of unevenness in received light brightness among the photodiodes 221 of three pixels due to reflected light of the light shielding wiring 710 , the first wiring M1 , the second wiring M2 , and the third wiring M3 .

[0111] It should be noted that Figure 10A A case is shown in which the light-shielding wiring 710 is provided in the same layer in the first wiring layer 500, but this is an example, and for example, Figure 10B As shown, the light-shielding wiring 711 , the light-shielding wiring 712 , and the light-shielding wiring 713 may be provided in a plurality of layers in the first wiring layer 500 .

[0112] exist Figure 10B In the light receiving chip 201a shown in FIG, the light shielding wiring 711 is provided in the same layer as the first wiring M1 in the first wiring layer 500, the light shielding wiring 712 is provided in the same layer as the third wiring M3, and the light shielding wiring 713 is provided in the same layer as the connection electrode MCu. The plurality of light shielding wirings 711, 712, and 713 provided in the first wiring layer 500 are provided at positions that at least partially overlap with each other in a plan view.

[0113] For example, Figure 10C As shown, the light-shielding wiring 711 closest to the semiconductor layer 400 is provided in a plan view at a position in the lower layer so as to partially overlap with both ends of the light-shielding wiring 712. Note that, although not shown here, the light-shielding wiring 712 in the lower layer is similarly provided in a plan view at a position partially overlapping with both ends of the light-shielding wiring 713 in another lower layer.

[0114] Therefore, in the light receiving chip 201, for example, light 800 leaked from the upper light shielding wiring 711 is blocked by the lower light shielding wiring 712, and light 800 leaked from the lower light shielding wiring 712 is blocked by the lower light shielding wiring 713, so that more reliable light shielding can be performed.

[0115] In addition, if Figure 10D As shown, the shading wiring 711 on the upper layer is formed so that the width DB overlapping with the shading wiring 712 in the lower layer is equal to or greater than the distance DA from the shading wiring 712 in the lower layer in the vertical direction and the interval DC from the adjacent shading wiring 711 in the side view.

[0116] In addition, although not shown here, the light-shielding wiring 712 in the lower layer is similarly formed so that the width of the overlap with the light-shielding wiring 713 in another lower layer is equal to or greater than the distance in the vertical direction from the adjacently arranged light-shielding wiring 713 in a side view and the interval from the light-shielding wiring 712. Therefore, the light receiving chip 201 can more reliably shield the light 800 incident in an oblique direction.

[0117] [6-3. Configuration Example of Detection Chip Side Light-Shielding Wiring According to the Present Disclosure]

[0118] Next, refer to Figure 11A and Figure 11B An example of arrangement of light-shielding wiring on the detection chip side will be described. Figure 11A and Figure 11B 1 is a schematic plan view showing an example of arrangement of detection chip side light shielding wiring according to the present disclosure. Figure 11C 1 is a side view schematically illustrating a configuration example of a detection chip side light shielding wiring according to the present disclosure.

[0119] like Figure 11A As shown, for example, the light-shielding wiring 701 provided in the detection chip 202 is provided at a position overlapping the circuit blocks 411, 412, and 413 including the active element (such as the transistor TR) that generates HC light emission 801. Then, the light-shielding wiring 701 has a size that surrounds the circuit blocks 411, 412, and 413 in a plan view.

[0120] That is, light-shielding wiring 701 covers circuit blocks 411, 412, and 413 with a coverage rate of 100% or greater. Note that circuit blocks 411, 412, and 413 may be active elements themselves in which HC light emission 801 occurs, or may be regions including multiple impurity diffusion regions. Therefore, light-shielding wiring 701 can prevent light 802 caused by HC light emission 801 occurring in detection chip 202 from being incident on photodiode 221.

[0121] In addition, if Figure 11BAs shown, in the second wiring layer 510 of the detection chip 202, light shielding wiring 721, light shielding wiring 722 and light shielding wiring 723 may be provided for the circuit blocks 411, 412 and 413 respectively. Figure 11C As shown, for example, the light-shielding wiring 721 is formed so that a protruding width DB1 protruding from the outer periphery of the circuit block 411 in a side view is equal to or greater than a distance DA1 in the vertical direction from the circuit block 411 in a side view.

[0122] Furthermore, the light-shielding wiring 722 and the light-shielding wiring 723 are similarly formed so that the protruding width from the outer periphery in a side view of the corresponding circuit blocks 412 and 413 is equal to or greater than the distance from the circuit blocks 412 and 413 in the vertical direction.

[0123] In addition, Figure 11A In the example shown, the light-shielding wiring 701 is formed so that the protruding width from the periphery of the region including the circuit blocks 411, 412 and 413 in the side view is equal to or greater than the distance from the circuit blocks 11, 412 and 413 in the vertical direction in the side view.

[0124] Therefore, even when the light 802 passing through the HC light emission 801 is radially diffused, the light shielding wiring 701 , the light shielding wiring 721 , and the light shielding wiring 722 can prevent the light 802 from being incident on the photodiode 221 .

[0125] Note that the case where the light shielding wiring 701, the light shielding wiring 721, and the light shielding wiring 722 in one layer are provided in the second wiring layer 510 of the detection chip 202 is described here, but this is an example. Figure 11B In the first wiring layer 500 shown in FIG, the light-shielding wiring 711, the light-shielding wiring 712, and the light-shielding wiring 713 may be provided in a plurality of layers.

[0126] [6-4. Another arrangement example of the light-shielding film according to the present disclosure]

[0127] Next, refer to Figure 12 Another arrangement example of the light-shielding film according to the present disclosure is described. Figure 12 is a cross-sectional explanatory diagram illustrating another arrangement example of the light-shielding film according to the present disclosure.

[0128] like Figure 12 As shown, the light receiving chip 201b is provided with a light blocking film 730 that is securely placed over the entire area overlapping with the light receiving region in which the plurality of photodiodes 221 are arranged in a plan view in the first wiring layer 500. In addition, in the light blocking film 730, an opening portion for connecting the photodiode 221 to a readout electrode for photocurrent is provided outside the light receiving region.

[0129] Therefore, the light receiving chip 201 b can more reliably prevent the light 800 transmitted through the photodiode 221 and the light 802 transmitted through the HC light emission 801 from being transmitted through the first wiring layer 500 .

[0130] Furthermore, a light shielding film 730 is provided between the first wiring M1 closest to the semiconductor layer 400 among the multilayer wirings provided in the first wiring layer 500 and the semiconductor layer 400. Therefore, in the light receiving chip 201b, the distance between the light shielding film 730 and the photodiode 221 is further shortened, so that even when light 800 transmitted through the photodiode 221 is reflected by the light shielding film 730, the light is prevented from entering the adjacent photodiode. That is, according to the light receiving chip 201b, crosstalk caused by light reflected from the light shielding film 730 can be reduced.

[0131] [6-5. Light-Shielding Groove Structure According to the Present Disclosure]

[0132] Next, refer to Figure 13 A light-shielding trench structure according to the present disclosure is described. Figure 13 is a schematic cross-sectional view showing a light-shielding trench structure according to the present disclosure.

[0133] like Figure 13 As shown, the light receiving chip 201c is provided with a light shielding member 740 embedded in a groove extending from a boundary region between adjacent photodiodes 221 toward the inside of the first wiring layer 500. Therefore, in the light receiving chip 201c, light 800 incident on the photodiode 221 in an oblique direction can be shielded by the light shielding member 740.

[0134] Note that by providing the light shielding member 740 in addition to the configuration of the other light receiving chips 201 , 201 a , and 201 b described above, the light shielding performance of the light receiving chips 201 , 201 a , and 201 b can be further improved, and crosstalk of reflected light can be reduced.

[0135] [6-6. First Light Shielding Structure Example According to the Present Disclosure]

[0136] Next, refer to Figure 14A and Figure 14B A first light shielding structure example is described. Figure 14A is a schematic plan view showing an example of a first light shielding structure according to the present disclosure. Figure 14B It is along Figure 14A Schematic diagram of a cross section taken along line AA' in FIG. It should be noted that Figure 14A and Figure 14B A portion corresponding to one pixel in the light-receiving chip 201d is shown.

[0137] like Figure 14A and Figure 14B As shown, the light receiving chip 201d includes a photodiode region APD that requires light shielding and a pixel transistor region ATr that does not. Therefore, in the photodiode region APD, a plurality of parallel first wirings M1 extending in the plane direction of the first wiring layer 500 are arranged at equal intervals in the layer below the photodiode 221. Furthermore, in the layer below the first wirings M1, a plurality of parallel second wirings M2 are arranged at equal intervals in a strip-like shape parallel to the first wirings.

[0138] In a plan view, the first wiring M1 and the second wiring M2 are alternately arranged and arranged so that the ends of the second wiring M2 in the lateral direction overlap the ends of the first wiring M1 in the lateral direction. Therefore, the light receiving chip 201d can block the light between the photodiode 221 and the detection chip 202 through the first wiring M1 and the second wiring M2.

[0139] [6-7. Second Light Shielding Structure Example According to the Present Disclosure]

[0140] Next, refer to Figure 15A and Figure 15B A second light shielding structure example is described. Figure 15A is a schematic plan view showing an example of a second light shielding structure according to the present disclosure. Figure 15B It is along Figure 15A It should be noted that Figure 15A and Figure 15B A portion corresponding to one pixel in the light-receiving chip 201d is shown.

[0141] like Figure 15A and Figure 15B As shown, the light receiving chip 201e also includes a photodiode region APD that requires light shielding and a pixel transistor region ATr that does not require light shielding. Therefore, in the photodiode region APD, a plurality of parallel first wirings M1 in a strip shape extending in the planar direction of the first wiring layer 500 are arranged at equal intervals in the layer below the photodiode 221.

[0142] Then, in the layer below the first wiring M1, multiple parallel strips of second wiring M2 are arranged at equal intervals in a strip-shaped pattern that intersects the first wiring. That is, in a plan view, the first wiring M1 and the second wiring M2 are arranged in a lattice pattern. Furthermore, in the layer below the second wiring M2, a connection electrode MCu is provided in a region that overlaps with the photodiode 221 in a plan view.

[0143] Therefore, the light receiving chip 201 e can shield light between the photodiode 221 and the detection chip 202 through the first wiring M1 , the second wiring M2 , and the connection electrode MCu.

[0144] [7. Another Configuration Example of Address Event Detection Circuit]

[0145] Figure 16 1 is a block diagram showing a second configuration example of the address event detection circuit 1000. Figure 16 As shown, the address event detection circuit 1000 according to this configuration example includes a storage unit 1336 and a control unit 1337 in addition to a current-voltage conversion unit 1331 , a buffer 1332 , a subtractor 1333 , a quantizer 1334 , and a transmission unit 1335 .

[0146] The storage unit 1336 is provided between the quantizer 1334 and the transmission unit 1335, and accumulates the output of the quantizer 1334 (i.e., the comparison result of the comparator 1334a) based on the sampling signal provided from the control unit 1337. The storage unit 1336 may be a sampling circuit such as a switch, plastic, or capacitor, or may be a digital memory circuit such as a latch or a flip-flop.

[0147] The control unit 1337 supplies a predetermined threshold voltage Vth to the inverting (-) input terminal of the comparator 1334a. The threshold voltage Vth supplied from the control unit 1337 to the comparator 1334a can have different voltage values in a time-division manner. For example, the control unit 1337 supplies a threshold voltage Vth1 corresponding to a turn-on event indicating that the amount of change in the photocurrent exceeds an upper threshold value, and a threshold voltage Vth2 corresponding to a turn-off event indicating that the amount of change falls below a lower threshold value, at different timings, so that a single comparator 1334a can detect multiple types of address events.

[0148] For example, the storage unit 1336 can accumulate the comparison result of the comparator 1334a using the threshold voltage Vth1 corresponding to the on event during a period in which the threshold voltage Vth2 corresponding to the off event is supplied from the control unit 1337 to the inverting (-) input terminal of the comparator 1334a. It should be noted that the storage unit 1336 can be located inside the pixel 2030 (see FIG. Figure 17 ) or outside the pixel 2030. In addition, the storage unit 1336 is not an essential component of the address event detection circuit 1000. That is, the storage unit 1336 can be omitted.

[0149] [8. Configuration Example of Scanning-Type Imaging Device According to the Present Disclosure]

[0150] The imaging device 100 is an asynchronous imaging device that reads events using an asynchronous reading method. Note that the event reading method is not limited to the asynchronous reading method and may be a synchronous reading method. An imaging device that applies the synchronous reading method is a scanning type imaging device similar to a normal imaging device that performs imaging at a predetermined frame rate.

[0151] Figure 17 1 is a block diagram showing a configuration example of a scanning type imaging device according to the present disclosure. Figure 17 As shown, the imaging device 2000 according to the present disclosure is provided with a pixel array unit 2021 , a driving unit 2022 , a signal processing unit 2025 , a reading area selection unit 2027 , and a signal generation unit 2028 .

[0152] The pixel array unit 2021 includes a plurality of pixels 2030. The plurality of pixels 2030 outputs an output signal in response to a selection signal from the read region selection unit 2027. Each of the plurality of pixels 2030 may have a quantizer comparator in the pixel. The plurality of pixels 2030 outputs an output signal corresponding to a change in the intensity of light. The plurality of pixels 2030 may be arranged two-dimensionally as follows: Figure 17 The matrix shown.

[0153] The driving unit 2022 drives each of the plurality of pixels 2030 to output a pixel signal generated in each pixel 2030 to the signal processing unit 2025. Note that the driving unit 2022 and the signal processing unit 2025 are circuit units for acquiring grayscale information. Therefore, when acquiring only event information, the driving unit 2022 and the signal processing unit 2025 can be omitted.

[0154] The read area selection unit 2027 selects some of the plurality of pixels 2030 included in the pixel array unit 2021. Specifically, the read area selection unit 2027 determines the selected area in response to a request from each pixel 2030 of the pixel array unit 2021. For example, the read area selection unit 2027 selects any one or more rows included in the structure corresponding to the two-dimensional matrix of the pixel array unit 2021. The read area selection unit 2027 sequentially selects one or more rows according to a preset cycle. Furthermore, the read area selection unit 2027 may determine the selected area in response to a request from each pixel 2030 of the pixel array unit 2021.

[0155] Based on the output signals of the pixels selected by the read area selection unit 2027, the signal generation unit 2028 generates event signals corresponding to active pixels where an event has been detected in the selected pixels. An event is a change in light intensity. Active pixels are pixels where the change in light intensity corresponding to the output signal exceeds or falls below a preset threshold. For example, the signal generation unit 2028 compares the pixel output signals with a reference signal, detects active pixels where the output signal exceeds or falls below the reference signal, and generates event signals corresponding to the active pixels.

[0156] The signal generation unit 2028 may include, for example, a column selection circuit that arbitrates signals entering the signal generation unit 2028. Furthermore, the signal generation unit 2028 may be configured to output information not only of active pixels where an event is detected, but also of inactive pixels where no event is detected.

[0157] The address information and time stamp information (e.g., (X, Y, T)) of the active pixel where the event is detected are output from the signal generation unit 2028 through the output line 2015. Note that the data output from the signal generation unit 2028 may be not only address information and time stamp information but also information of a frame format (e.g., (0, 0, 1, 0, ...).

[0158] [9. Distance measurement system]

[0159] A distance measurement system according to an embodiment of the present disclosure is a system for measuring the distance to an object using a structured light method. Furthermore, the distance measurement system according to an embodiment of the present disclosure can also be used as a system for acquiring three-dimensional (3D) images, in which case it can be referred to as a 3D image acquisition system. In the structured light method, distance measurement is performed by identifying a point image and the coordinates of a light source (so-called a point light source) from which the point image is projected through pattern matching.

[0160] Figure 18 is a schematic diagram showing an example of a configuration of a distance measurement system according to an embodiment of the present disclosure, and Figure 19 is a block diagram showing an example of a circuit configuration.

[0161] The distance measurement system 3000 according to this embodiment uses a surface-emitting semiconductor laser (e.g., a vertical cavity surface-emitting laser (VCSEL) 3010) as a light source unit and uses an event detection sensor 3020, known as a DVS, as a light receiving unit. The vertical cavity surface-emitting laser (VCSEL) 3010 projects a predetermined pattern of light onto a subject. In addition to the vertical cavity surface-emitting laser 3010 and the event detection sensor 3020, the distance measurement system 3000 according to this embodiment is further provided with a system control unit 3030, a light source driving unit 3040, a sensor control unit 3050, a light source side optical system 3060, and a camera side optical system 3070.

[0162] The system control unit 3030 includes, for example, a processor (CPU), drives the VCSEL 3010 via the light source driving unit 3040, and drives the event detection sensor 3020 via the sensor control unit 3050. More specifically, the system control unit 3030 synchronously controls the VCSEL 3010 and the event detection sensor 3020.

[0163] In the distance measurement system 3000 according to the present embodiment having the above-described structure, light of a predetermined pattern emitted from a vertical cavity surface emitting laser 3010 is projected onto a subject (measurement object) 3100 through a light source side optical system 3060. This projected light is reflected by the object 3100. Then, the light reflected by the object 3100 is incident on the event detection sensor 3020 through the camera side optical system 3070. The event detection sensor 3020 receives the light reflected by the object 3100 and detects a change in the brightness of a pixel exceeding a predetermined threshold as an event. The event information detected by the event detection sensor 3020 is provided to an application processor 3200 outside the distance measurement system 3000. The application processor 3200 performs predetermined processing on the event information detected by the event detection sensor 3020.

[0164] [10. Effect]

[0165] According to the solid-state imaging element disclosed in the present invention, a first substrate and a second substrate are provided. The first substrate is provided with a photodiode, which photoelectrically converts incident light to generate a photocurrent. The second substrate is provided with a brightness change detection circuit, which detects the brightness change of the incident light based on a voltage signal converted by a conversion circuit, which converts the photocurrent into a voltage signal, and the second substrate is bonded to the first substrate. A shading unit is included that is provided in at least any one of the first substrate or the second substrate and blocks the light between the active element provided in the second substrate and the photodiode. Therefore, the solid-state imaging element can suppress the deterioration of the detection accuracy of the brightness change by blocking the light between the first substrate and the second substrate by the shading unit.

[0166] Furthermore, the light shielding means is a light shielding film provided in the first wiring layer, which is provided between the semiconductor layer including the photodiodes of the first substrate and the second substrate. Therefore, the solid-state imaging element can suppress degradation in the accuracy of detecting brightness changes by shielding light between the first and second substrates with the light shielding film.

[0167] Furthermore, the light-shielding film is provided in an area overlapping with the light-receiving region where the plurality of photodiodes are arranged in a plan view. Therefore, in the solid-state imaging element, by shielding light between the first substrate and the second substrate with the light-shielding film provided in the entire area overlapping with the light-receiving region in a plan view, it is possible to suppress degradation in the accuracy of detecting brightness changes.

[0168] Furthermore, a light shielding film is provided between the semiconductor layer and the wiring closest to the semiconductor layer among the multilayer wiring provided in the first wiring layer, so that crosstalk of reflected light caused by the light shielding film can be reduced.

[0169] Furthermore, the light shielding means is a light shielding wiring provided in a first wiring layer provided between the semiconductor layer including the photodiodes of the first substrate and the second substrate. Therefore, the solid-state imaging element can prevent light transmission simply by changing the wiring pattern of the wiring provided in the first wiring layer, without adding a separate step of forming a light shielding film.

[0170] Furthermore, the light shielding wiring provided in the first wiring layer includes multiple layers of wiring that at least partially overlap in plan view. Therefore, the solid-state imaging element can prevent light transmission more reliably than a single layer of light shielding wiring.

[0171] Furthermore, the light shielding element is a light shielding wiring provided in a second wiring layer provided between the semiconductor layer including the active element in the second substrate and the first substrate. Therefore, the solid-state imaging element can prevent light emitted by HC light generated in the active element from being incident on the photodiode.

[0172] Furthermore, the light shielding wiring provided in the second wiring layer includes multiple layers of wiring that at least partially overlap in plan view. Therefore, the solid-state imaging element can prevent light transmission more reliably than a single layer of light shielding wiring.

[0173] Furthermore, the light shielding element is a connection electrode that electrically connects the first substrate to the second substrate. Therefore, the solid-state imaging element can prevent light transmission simply by changing the wiring pattern of the existing connection electrode for performing Cu-Cu connection, for example, without adding a separate step of forming a light shielding film.

[0174] Furthermore, the solid-state imaging element includes a light shielding member embedded in a groove that extends from a boundary region between adjacent photodiodes toward the interior of a first wiring layer disposed between a semiconductor layer including the photodiodes in the first substrate and a second substrate. Therefore, in the solid-state imaging element, light incident in an oblique direction can be shielded by the light shielding member.

[0175] In addition, the imaging system includes a solid-state imaging element and a signal processing chip. The solid-state imaging element is provided with a lens, a first substrate and a second substrate. The first substrate is provided with a photodiode, which photoelectrically converts incident light to generate a photocurrent. The second substrate is provided with a brightness change detection circuit, which detects the brightness change of the incident light based on a voltage signal converted by a conversion circuit, which converts the photocurrent into a voltage signal, and the second substrate is bonded to the first substrate. The solid-state imaging element includes a light shielding unit. The light shielding unit is provided in at least any one of the first substrate or the second substrate, and the light shielding unit is provided between the active element in the second substrate and the photodiode. The signal processing chip performs signal processing on the output from the solid-state imaging element. Therefore, the imaging system can suppress the deterioration of the detection accuracy of the brightness change by shielding the light between the first substrate and the second substrate by the light shielding unit.

[0176] Note that the effects described in this specification are merely illustrative; the effects are not limited thereto, and there may also be another effect.

[0177] It should be noted that the present technology can also have the following configurations. (1)

[0179] A solid-state imaging element is provided with:

[0180] a first substrate provided with a photodiode for photoelectrically converting incident light to generate a photocurrent; and

[0181] The second substrate is provided with a brightness change detection circuit, which detects the brightness change of the incident light based on the voltage signal converted by the conversion circuit. The conversion circuit converts the photocurrent into the voltage signal. The second substrate is bonded to the first substrate.

[0182] Solid-state imaging elements include:

[0183] The light shielding unit is provided in at least one of the first substrate and the second substrate and shields light between the active element and the photodiode provided in the second substrate. (2)

[0185] The solid-state imaging element according to (1) above, wherein

[0186] The shading unit includes:

[0187] The light shielding film is provided in a first wiring layer provided between the semiconductor layer including the photodiode in the first substrate and the second substrate. (3)

[0189] The solid-state imaging element according to (2) above, wherein

[0190] shading film

[0191] The photodiodes are provided in a region overlapping with a light receiving region where a plurality of photodiodes are arranged in a plan view. (4)

[0193] The solid-state imaging element according to (2) or (3) above, wherein

[0194] shading film

[0195] The wiring closest to the semiconductor layer among the multilayer wirings in the first wiring layer is provided between the semiconductor layer and the wiring. (5)

[0197] The solid-state imaging element according to any one of (1) to (4) above, wherein

[0198] The shading unit includes:

[0199] The light-shielding wiring is provided in a first wiring layer provided between the semiconductor layer including the photodiode in the first substrate and the second substrate. (6)

[0201] The solid-state imaging element according to (5) above, wherein

[0202] The light-shielding wiring provided in the first wiring layer includes

[0203] Multiple layers of wiring that at least partially overlap in plan view. (7)

[0205] The solid-state imaging element according to any one of (1) to (6) above, wherein

[0206] The shading unit includes:

[0207] A light-shielding wiring is provided in a second wiring layer provided between a semiconductor layer including an active element in a second substrate and the first substrate. (8)

[0209] The solid-state imaging element according to (7) above, wherein

[0210] The light-shielding wiring provided in the second wiring layer includes

[0211] Multiple layers of wiring that at least partially overlap in plan view. (9)

[0213] The solid-state imaging element according to any one of (1) to (8) above, wherein

[0214] Shading unit includes

[0215] The connecting electrodes electrically connect the first substrate to the second substrate. (10)

[0217] The solid-state imaging element according to any one of (1) to (9) above, further provided with:

[0218] The light shielding member is embedded in a groove extending from a boundary region between adjacent photodiodes toward the inside of a first wiring layer provided between the semiconductor layer including the photodiodes in the first substrate and the second substrate. (11)

[0220] An imaging system is provided with:

[0221] Solid-state imaging elements, including:

[0222] lens;

[0223] a first substrate provided with a photodiode for photoelectrically converting incident light to generate a photocurrent; and

[0224] The second substrate is provided with a brightness change detection circuit, which detects the brightness change of the incident light based on the voltage signal converted by the conversion circuit. The conversion circuit converts the photocurrent into the voltage signal. The second substrate is bonded to the first substrate.

[0225] Solid-state imaging elements include

[0226] a light shielding unit provided in at least any one of the first substrate or the second substrate and shielding light between the active element and the photodiode provided in the second substrate; and

[0227] A signal processing chip performs signal processing on the output from the solid-state imaging element.

[0228] Reference Signs List

[0229] 100 Imaging Device

[0230] 110 Imaging Lens

[0231] 120 recording units

[0232] 130 control unit

[0233] 200 solid-state imaging element

[0234] 201, 201a to 201e optical receiver chips

[0235] 202 Detection Chip

[0236] 211,212,213,231,232,233 via placement units

[0237] 220 light receiving unit

[0238] 221 Photodiode

[0239] 240 signal processing circuit

[0240] 251 row driver circuit

[0241] 252 column driver circuit

[0242] 260 Address Event Detection Unit

[0243] 300 Address event detection circuit

[0244] 310 Current-Voltage Conversion Circuit

[0245] 311 switching transistor

[0246] 331,333 Capacitors

[0247] 312 Current Source Transistor

[0248] 313 Voltage Supply Transistor

[0249] 320 buffer

[0250] 330 Subtractor

[0251] 332: Inverter

[0252] 334 switch

[0253] 340,340a Quantizer

[0254] 341 Comparator

[0255] 350 Transfer Circuit

[0256] 400,410 Semiconductor layer

[0257] 500 First wiring layer

[0258] 510 Second wiring layer

[0259] 600 on-chip lenses

[0260] 700,730 Light-shielding film

[0261] 701, 710 to 713, 721 to 723 Shading wiring

[0262] 740 Shading member

[0263] M Multilayer wiring

[0264] M1 first wiring

[0265] M2 Second wiring

[0266] M3 third wiring

[0267] MCu connection electrode

Claims

1. A solid-state imaging device comprising: a first substrate provided with a photodiode for photoelectrically converting incident light to generate a photocurrent; and a second substrate provided with a brightness change detection circuit, the brightness change detection circuit detecting the brightness change of the incident light based on a voltage signal converted by a conversion circuit, the conversion circuit converting the photocurrent into the voltage signal, the second substrate being bonded to the first substrate; The solid-state imaging element comprises: a light shielding unit provided in at least any one of the first substrate or the second substrate and shielding light between the active element provided in the second substrate and the photodiode; as well as A light shielding member is embedded in a groove extending from a boundary region between adjacent photodiodes toward an interior of a first wiring layer provided between a semiconductor layer including the photodiodes in the first substrate and the second substrate.

2. The solid-state imaging element according to claim 1, wherein The shading unit includes: A light shielding film is provided in a first wiring layer provided between the semiconductor layer including the photodiode in the first substrate and the second substrate.

3. The solid-state imaging element according to claim 2, wherein The light-shielding film The photodiodes are provided in a region overlapping with a light receiving region where a plurality of photodiodes are arranged in a plan view.

4. The solid-state imaging element according to claim 2, wherein The light-shielding film The wiring is provided between the semiconductor layer and a wiring closest to the semiconductor layer among the multilayer wirings in the first wiring layer.

5. The solid-state imaging element according to claim 1, wherein The shading unit includes: A light-shielding wiring is provided in a first wiring layer provided between a semiconductor layer including the photodiode in the first substrate and the second substrate.

6. The solid-state imaging element according to claim 5, wherein The light shielding wiring provided in the first wiring layer includes Multiple layers of wiring that at least partially overlap in plan view.

7. The solid-state imaging element according to claim 1, wherein The shading unit includes: A light-shielding wiring is provided in a second wiring layer provided between the semiconductor layer including the active element in the second substrate and the first substrate.

8. The solid-state imaging element according to claim 7, wherein The light-shielding wiring provided in the second wiring layer includes Multiple layers of wiring that at least partially overlap in plan view.

9. The solid-state imaging element according to claim 1, wherein The shading unit includes The connecting electrodes electrically connect the first substrate to the second substrate.

10. An imaging system comprising: Solid-state imaging elements, including: lens; a first substrate provided with a photodiode for photoelectrically converting incident light to generate a photocurrent; and a second substrate provided with a brightness change detection circuit, the brightness change detection circuit detecting the brightness change of the incident light based on a voltage signal converted by a conversion circuit, the conversion circuit converting the photocurrent into the voltage signal, the second substrate being bonded to the first substrate; The solid-state imaging element includes a light shielding unit provided in at least any one of the first substrate or the second substrate and shielding light between the active element provided in the second substrate and the photodiode; a light shielding member embedded in a groove extending from a boundary region between adjacent photodiodes toward an interior of a first wiring layer provided between a semiconductor layer including the photodiodes in the first substrate and the second substrate; and A signal processing chip performs signal processing on an output from the solid-state imaging element.

Images