Audio input / output system and noise cancellation circuit

Abstract

This invention application discloses a sound input / output system and a noise cancellation circuit. The noise cancellation circuit includes: a first filtering circuit for filtering a first input signal according to a first filtering coefficient to generate a first filtered signal; a signal processing circuit for generating a feedback signal based on a second input signal and an audio signal; a second filtering circuit for filtering the feedback signal according to a second filtering coefficient to generate a second filtered signal; a first multiplication circuit for multiplying the first filtered signal by a first factor to generate a first intermediate signal; a second multiplication circuit for multiplying the second filtered signal by a second factor to generate a second intermediate signal; a first addition circuit for adding the first intermediate signal to the second intermediate signal to generate a noise cancellation signal; and a second addition circuit for adding the noise cancellation signal to the audio signal to generate an output signal.

Description

Technical Field

[0001] This invention application relates to noise cancellation, and more particularly to hybrid active noise cancellation. Background Technology

[0002] Figure 1 This displays an existing audio input / output system with hybrid noise cancellation functionality. The audio input / output system 10 includes a microphone 11, a microphone 12, a speaker 13, a filter circuit 14, a filter circuit 15, a filter circuit 16, an adder circuit 17, an adder circuit 18, and an adder circuit 19.

[0003] Microphone 11 receives a first ambient noise and generates a first input signal x. Microphone 12 receives sound and generates a second input signal e, which includes the second ambient noise and the sound output by speaker 13. The sound output by speaker 13 travels to microphone 12 via sound propagation path 100.

[0004] Filter circuit 14 filters the first input signal x to generate a filtered signal y. ff The filter circuit 15 filters the feedback signal f to generate the filtered signal y. fb Adder circuit 17 will add the filtered signal y ff With the filtered signal y fb The noise cancellation signal y is added to the audio signal v to generate an output signal z. The speaker 13 outputs sound based on the output signal z. The audio signal v can be music that the user is listening to or a human voice during a conversation.

[0005] The filtering coefficients of filter circuit 16 can describe the sound propagation path 100; that is, filter circuit 16 is a model simulating the sound propagation path 100. Filter circuit 16 filters the audio signal v to generate the filtered signal v. s (Right now, These are the filter coefficients of filter circuit 16. The bottom line is used to represent It is a vector, which can be obtained by measuring the sound propagation path 100 beforehand, and the symbol "*" represents convolution. The adder circuit 19 will add the filtered signal v s The feedback signal f is generated by subtracting from the second input signal e. The second input signal e and the feedback signal f can be expressed as follows:

[0006] e = (y + v) * s +d (1)

[0007]

[0008] in, s Represents the sound propagation path 100, (y+v)* s The output of speaker 13 is transmitted through sound propagation path 100, while d represents the second ambient noise.

[0009] "Composite" means that the noise cancellation signal y includes a feedforward noise cancellation component (i.e., through the filtered signal y). ff And feedback noise cancellation components (i.e., through the filtered signal y) fb When the audio input / output system 10 adaptively cancels noise based on ambient noise, the filter coefficients of the filter circuits 14 and 15 must be frequently updated. However, existing audio input / output systems 10 often suffer from slow or poor convergence of the filter coefficients. Summary of the Invention

[0010] In view of the shortcomings of the prior art, one object of this application is to provide a sound input / output system and a noise cancellation circuit to improve the shortcomings of the prior art.

[0011] This invention discloses a sound input / output system, comprising: a sound output device for outputting an output signal; a first audio input device for generating a first input signal; a second audio input device for generating a second input signal; a first filtering circuit coupled to the first audio input device for filtering the first input signal according to a first filtering coefficient to generate a first filtered signal; a signal processing circuit coupled to the second audio input device for generating a feedback signal based on the second input signal and the audio signal; a second filtering circuit coupled to the signal processing circuit for filtering the feedback signal according to a second filtering coefficient to generate a second filtered signal; a first multiplication circuit coupled to the first filtering circuit for multiplying the first filtered signal by a first multiplier to generate a first intermediate signal; a second multiplication circuit coupled to the second filtering circuit for multiplying the second filtered signal by a second multiplier to generate a second intermediate signal; a first addition circuit coupled to the first multiplication circuit and the second multiplication circuit for adding the first intermediate signal to the second intermediate signal to generate a noise cancellation signal; and a second addition circuit coupled to the first addition circuit for adding the noise cancellation signal to the audio signal to generate the output signal.

[0012] This application of the present invention discloses a noise cancellation circuit, comprising: a first filtering circuit for filtering a first input signal according to a first filtering coefficient to generate a first filtered signal; a signal processing circuit for generating a feedback signal according to a second input signal and an audio signal; a second filtering circuit coupled to the signal processing circuit for filtering the feedback signal according to a second filtering coefficient to generate a second filtered signal; a first multiplication circuit coupled to the first filtering circuit for multiplying the first filtered signal by a first multiplier to generate a first intermediate signal; a second multiplication circuit coupled to the second filtering circuit for multiplying the second filtered signal by a second multiplier to generate a second intermediate signal; a first addition circuit coupled to the first multiplication circuit and the second multiplication circuit for adding the first intermediate signal to the second intermediate signal to generate a noise cancellation signal; and a second addition circuit coupled to the first addition circuit for adding the noise cancellation signal to the audio signal to generate an output signal. Attached Figure Description

[0013] To make the above-mentioned and other objects, features, advantages and embodiments of this invention application clearer and easier to understand, the following description will be made in conjunction with the accompanying drawings.

[0014] Figure 1 This displays an existing audio input / output system with hybrid noise cancellation functionality;

[0015] Figure 2 This is a functional block diagram of an embodiment of the sound input / output system of the present invention;

[0016] Figure 3 A functional block diagram showing an embodiment of the rate and filter coefficient update circuit;

[0017] Figure 4 A functional block diagram showing another embodiment of the rate and filter coefficient update circuit is displayed;

[0018] Figure 5 This is a functional block diagram of another embodiment of the sound input / output system of the present invention;

[0019] Figure 6 A functional block diagram showing another embodiment of the rate and filter coefficient update circuit is displayed;

[0020] Figure 7 A functional block diagram showing another embodiment of the rate and filter coefficient update circuit is displayed;

[0021] Figure 8 A functional block diagram showing one embodiment of the rate update circuit is displayed;

[0022] Figure 9 A functional block diagram showing another embodiment of the rate update circuit; and

[0023] Figure 10 A functional block diagram showing another embodiment of the rate update circuit is displayed.

[0024] Symbol Explanation

[0025] 10, 20, 50: Sound input / output system

[0026] 11, 12: Microphone

[0027] 13: Horn

[0028] 14, 15, 16, 250, 252, 282, 410, 420, 440, 470, 512, 522, 532, 562, 382, ​​386, 450, 582, 620, 730: Filtering circuits

[0029] 17, 18, 19, 270, 272, 284, 384, 388, 610, 710: Adder circuits

[0030] x: First input signal

[0031] e: Second input signal

[0032] 100: Sound propagation path

[0033] y ff y fb v s y ff，s y fb，s x s y ff，d，s y fb，d，s x d，s y s g s g d，s y Δ，s y Δ，d，s Filtered signal

[0034] f, g: Feedback signals

[0035] y: Noise cancellation signal

[0036] v: Audio signal

[0037] z: Output signal

[0038] 21, 22: Audio input devices

[0039] 23: Sound output device

[0040] 24, 34: Noise cancellation circuit

[0041] 260, 262: Multiplication circuits

[0042] 280, 380: Signal processing circuits

[0043] 290, 800, 900, 1000: Rate update circuit

[0044] 295, 395: Filter coefficient update circuit

[0045] w ff , w fb Filter coefficients

[0046] a, b: Multiplier

[0047] a×y ff b×y fb Intermediate signal

[0048] 300, 400, 600, 700: Ratio and filter coefficient update circuit

[0049] 430, 540, 460, 590, 630, 740, 840: Control circuit

[0050] 510, 520, 530, 560, 580, 720, 760: Samplers with reduced sampling frequency

[0051] 550, 750: Conversion circuit

[0052] y ff，d f d y fb，d x d g d y Δ，d Down-frequency sampling signal

[0053] a low Downsampling factor

[0054] b low Downsampling factor

[0055] w ff，low , w fb，low Downsampling filter coefficients

[0056] y Δ Difference signal

[0057] 810, 820: Pre-enhancement filters

[0058] y Δ，d，s，f Adjusted filtered signal

[0059] f d，fAdjusted down-frequency sampling signal Detailed Implementation

[0060] The technical terms used in the following description are conventional terms in this technical field. If this specification provides explanations or definitions for certain terms, the explanations or definitions in this specification shall prevail.

[0061] The disclosure of this invention application includes a sound input / output system and a noise cancellation circuit. Since some components included in this invention application may be known individually, details of known components will be omitted in the following description without affecting the full disclosure and implementability of the device.

[0062] In the following discussion, m and n are positive integers representing time indices.

[0063] Figure 2 This is a functional block diagram of one embodiment of the sound input / output system of the present invention. The sound input / output system 20 includes an audio input device 21, an audio input device 22, a sound output device 23, and a noise cancellation circuit 24. In some embodiments, the sound input / output system 20 may be headphones, the audio input devices 21 and 22 may be sound capture devices (e.g., each including at least one microphone), and the sound output device 23 may be a sound playback device or a sound generation device (e.g., including at least one headphone driver or at least one speaker).

[0064] The noise cancellation circuit 24 includes a filter circuit 250, a filter circuit 252, a multiplication circuit 260, a multiplication circuit 262, an addition circuit 270, an addition circuit 272, a signal processing circuit 280, a multiplier update circuit 290, and a filter coefficient update circuit 295.

[0065] Audio input device 21 receives a first ambient noise and generates a first input signal x(n). Audio input device 22 receives sound and generates a second input signal e(n), which includes the second ambient noise and the sound output by sound output device 23. Sound output device 23 is used to output the output signal z(n) generated by noise cancellation circuit 24. The sound output by sound output device 23 travels to audio input device 22 via sound propagation path 100.

[0066] The filter circuit 250 is coupled to the audio input device 21 and is used to filter based on the filter coefficients. w ff (n) Filter the first input signal x(n) to generate the filtered signal y ff(n). Signal processing circuit 280 is coupled to audio input device 22 and is used to generate feedback signal f(n) based on the second input signal e(n) and audio signal v(n). Filtering circuit 252 is coupled to signal processing circuit 280 and is used to generate feedback signal f(n) based on filtering coefficients. w fb (n) Filter the feedback signal f(n) to generate the filtered signal y fb (n). The multiplier circuit 260 is coupled to the filter circuit 250 to filter the signal y. ff Multiply (n) by the scale a(n) to generate the intermediate signal a(n)×y ff (n). Multiplication circuit 262 is coupled to filter circuit 252 to filter signal y. fb Multiply (n) by the multiplier b(n) to generate the intermediate signal b(n)×y fb (n). Adder circuit 270 is coupled to multiplier circuit 260 and multiplier circuit 262 to multiply the intermediate signal a(n) by y. ff (n) plus intermediate signal b(n)×y fb The noise cancellation signal y(n) is generated by adding the noise cancellation signal y(n). The adder circuit 272 is coupled to the adder circuit 270 and is used to add the audio signal v(n) to the noise cancellation signal y(n) to generate the output signal z(n).

[0067] The signal processing circuit 280 includes a filter circuit 282 and an adder circuit 284. The filter coefficients of the filter circuit 282 can describe the sound propagation path 100; that is, the filter circuit 282 is a model simulating the sound propagation path 100. The filter circuit 282 is used to filter the audio signal v(n) to generate the filtered signal v. s (n)(that is, The adder circuit 284 is coupled to the filter circuit 282 to filter the signal v. s (n) is subtracted from the second input signal e(n) to generate the feedback signal f(n). In other words, f(n) = e(n) - v s (n).

[0068] The rate update circuit 290 is coupled to filter circuit 250, filter circuit 252, signal processing circuit 280, multiplier circuit 260, and multiplier circuit 262, and is used to update the rate based on the filtered signal y. ff (n), filtered signal y fb The feedback signal f(n) updates the scaling factor a(n) and scaling factor b(n).

[0069] The filter coefficient update circuit 295 is coupled to the signal processing circuit 280, the filter circuit 250, and the filter circuit 252, and is used to update the filter coefficients according to the first input signal x(n), the feedback signal f(n), the multiplier a(n), and the multiplier b(n).w ff (n) and filter coefficients w fb (n).

[0070] Figure 3 A functional block diagram of one embodiment of the magnification and filter coefficient update circuit is shown. The magnification and filter coefficient update circuit 300 is equivalent to a combination of the magnification update circuit 290 and the filter coefficient update circuit 295. The magnification and filter coefficient update circuit 300 includes filter circuits 410, 420, 430, 440, and 470. Filter circuits 410, 420, and 430 are included in the magnification update circuit 290, while the control circuits 430, 440, and 470 are included in the filter coefficient update circuit 295; in other words, the control circuit 430 is shared by the magnification update circuit 290 and the filter coefficient update circuit 295. The filter coefficients of filter circuits 410, 420, 440, and 470 can describe the sound propagation path 100, meaning that each of the filter circuits 410, 420, 440, and 470 is a model simulating the sound propagation path 100.

[0071] Filter circuit 410 is used to filter the filtered signal y ff (n) to generate the filtered signal y ff，s (n)(that is, The filter circuit 420 is used to filter the filtered signal y. fb (n) to generate the filtered signal y fb，s (n)(that is, The filter circuit 440 is used to filter the first input signal x(n) to generate a filtered signal. x s (n)(that is, The filter circuit 470 is used to filter the feedback signal f(n) to generate the filtered signal f. s (n)(that is, ).

[0072] In some embodiments, the control circuit 430 employs the steepest descent algorithm to update the magnification a(n) and magnification b(n). For example, the control circuit 430 updates the magnification a(n) and magnification b(n) according to equation (3).

[0073]

[0074] μ a and μ bLet J be the step size used during the update, and J be the cost function. When the cost function minimizes the power of the feedback signal f(n), equation (3) becomes:

[0075]

[0076] In other words, as shown in equation (4), the control circuit 430 controls the signal y according to the filtered signal y. ff，s (n), filtered signal y fb，s The feedback signal f(n) updates the multipliers a(n) and b(n). In some embodiments, upper and lower bounds of f(n) can be defined to increase the stability of the system (i.e., the convergence of multipliers a(n+1) and b(n+1) is more stable). For information on defining the upper and lower bounds of f(n), please refer to: Ted S. Wada and Biing-Hwang Juang, “Enhancement of Residual Echo for Robust Acoustic Echo Cancellation,” IEEE Transactions on Audio, Speech, and Language Processing, Vol. 20, No. 1, January 2012.

[0077] Control circuit 430 updates the filter coefficients according to equation (5) w ff (n) and filter coefficients w fb (n).

[0078]

[0079] x s (n) represents the length and w ff Consistent vectors. If w ff If the length is L (L is a positive integer), then x s (n)=[x s (n), x s (n-1), ..., x s (n-L+1)] T μ ff and μ fb This is the increment value used during the update. In other words, as shown in equation (5), the control circuit 430 adjusts the value based on the filtered signal.x s (n), feedback signal f(n), multiplier a(n) and multiplier b(n) update filter coefficients w ff (n) and filter coefficients w fb (n).

[0080] Figure 4 This diagram shows a functional block diagram of another embodiment of the rate and filter coefficient update circuit, where the rate and filter coefficient update circuit 400 is equivalent to a combination of the rate update circuit 290 and the filter coefficient update circuit 295. The rate update circuit 290 includes a down-sampler 510, a filter circuit 512, a down-sampler 520, a filter circuit 522, a down-sampler 530, a filter circuit 532, a control circuit 540, a conversion circuit 550, a down-sampler 560, and a filter circuit 562. The downsampling frequency sampler 510, filter circuit 512, downsampling frequency sampler 520, downsampling frequency sampler 530, filter circuit 532, control circuit 540, and conversion circuit 550 are included in the rate update circuit 290, while the downsampling frequency sampler 520, filter circuit 522, control circuit 540, conversion circuit 550, downsampling frequency sampler 560, and filter circuit 562 are included in the filter coefficient update circuit 295; in other words, the downsampling frequency sampler 520, control circuit 540, and conversion circuit 550 are shared by the rate update circuit 290 and the filter coefficient update circuit 295. Filter circuits 512, 522, 532, and 562 are each a model simulating the sound propagation path 100 at a low sampling frequency (their filter coefficients are expressed as follows). express).

[0081] Sampler 510 is used to downsample and filter the signal y. ff (n) to generate a down-sampled signal y ff，d (m). The filter circuit 512 is coupled to the sampler 510 to reduce the sampling frequency, and is used to filter the downsampled signal y. ff，d (m) to generate the filtered signal y ff，d，s (m)(that is, The sampler 520 is used to downsample the feedback signal f(n) to generate a downsampled signal f. d (m). The filter circuit 522 is coupled to the sampler 520 to reduce the sampling frequency, and is used to filter the downsampled signal f. d (m) to generate the filtered signal f d，s (m)(that is, Sampler 530 is used to downsample and filter the signal y by reducing the sampling frequency. fb (n) to generate a down-sampled signal y fb，d (m). The filter circuit 532 is coupled to the downsampled frequency sampler 530 to filter the downsampled signal y. fb，d (m) to generate the filtered signal y fb，d，s (m)(that is, The sampler 560 is used to downsample the first input signal x(n) to generate a downsampled signal x. d (m). The filter circuit 562 is coupled to the downsampled frequency sampler 560 to filter the downsampled signal x. d (m) to generate a filtered signal x d，s (m)(that is, ).

[0082] Control circuit 540 is coupled to filter circuit 512, sampler 520, filter circuit 522, filter circuit 532 and filter circuit 562, and is used to generate a downsampling factor a according to equation (6). low (m+1) and downsampling factor b low (m+1), and the down-sampling filter coefficients generated according to equation (7) w ff，low (m+1) and down-frequency sampling filter coefficients w fb，low (m+1)(μ in equation (6) a and μ b They can be different from μ in equation (4). a and μ b 。).

[0083]

[0084]

[0085] In other words, the control circuit 540 determines the filtering signal y based on the filtering signal y. ff，d，s (m), filtered signal y fb，d，s (m) and down-frequency sampling signal f d (m) Generates downsampling factor a low (m+1) and downsampling factor b low (m+1) (as shown in equation (6)), and according to the filtered signal x d，s (m), frequency reduction sampling signal f d (m), downsampling factor a low(m) and downsampling factor b low (m) Generate down-sampling filter coefficients w ff，low (m+1) and down-frequency sampling filter coefficients w fb，low (m+1) (as shown in equation (7)).

[0086] The conversion circuit 550 is coupled to the control circuit 540 to reduce the sampling rate a. low (m+1) and downsampling factor b low (m+1) is converted into multipliers a(n+1) and b(n+1) (equivalent to updating multipliers a(n) and b(n)), and the down-sampling filter coefficients are... w ff，low (m+1) and down-frequency sampling filter coefficients w fb，low (m+1) is converted into filter coefficients. w ff (n+1) and filter coefficients w fb (n+1) (equivalent to updating filter coefficients) w ff (n) and filter coefficients w fb (n)). For example, the conversion circuit 550 can be converted according to the following formula.

[0087]

[0088] Where T low T high These are the sampling periods for low sampling rate and high sampling rate, respectively.

[0089] In some embodiments, the conversion circuit 550 utilizes up-sampling to perform the conversion. In other embodiments, the conversion circuit 550 utilizes frequency stacking to perform the conversion (see: Dennis R. Morgan and James C. Thi, “A Delayless Subband Adaptive Filter Architecture,” IEEE Transactions on Signal Processing, Vol. 43, No. 8, August 1995).

[0090] Figure 5This is a functional block diagram of another embodiment of the sound input / output system of the present invention. The sound input / output system 50 is similar to the sound input / output system 20, except that the noise cancellation circuit 34 includes a signal processing circuit 380 (instead of the signal processing circuit 280) and a filter coefficient update circuit 395 (instead of the filter coefficient update circuit 295).

[0091] Signal processing circuit 380 includes filter circuit 382, ​​adder circuit 384, filter circuit 386, and adder circuit 388. The functions of filter circuit 382 and adder circuit 384 are the same as those of filter circuit 282 and adder circuit 284, respectively, and therefore will not be described further. The filter coefficients of filter circuit 386 can describe the sound propagation path 100; that is, filter circuit 386 is a model simulating the sound propagation path 100. Filter circuit 386 is used to filter the noise cancellation signal y(n) to generate the filtered signal y. s (n)(that is, Adder circuit 388 is coupled to filter circuit 252, adder circuit 384 and filter circuit 386 to filter signal y. s (n) is subtracted from the intermediate signal f(n) to generate the feedback signal g(n). In other words, g(n) = f(n) - y s (n). Figure 5 The intermediate signal f(n) is equal to Figure 2 The feedback signal f(n) is filtered by filter circuit 252 to generate the filtered signal y. fb (n).

[0092] Figure 6 A functional block diagram of another embodiment of the magnification and filter coefficient update circuit is shown. The magnification and filter coefficient update circuit 600 is equivalent to a combination of the magnification update circuit 290 and the filter coefficient update circuit 395. The magnification and filter coefficient update circuit 600 includes filter circuits 410, 420, 440, 450, control circuit 460, and filter circuit 470. Filter circuits 410, 420, and control circuit 460 are included in the magnification update circuit 290, while filter circuits 440, 450, control circuit 460, and 470 are included in the filter coefficient update circuit 395; in other words, control circuit 460 is shared by the magnification update circuit 290 and the filter coefficient update circuit 395. The filter coefficients of filter circuit 450 can describe the sound propagation path 100, that is, filter circuit 450 is a model simulating the sound propagation path 100. Filter circuit 450 is used to filter the feedback signal g(n) to generate the filtered signal g. s (n)(that is, The control circuit 460 is coupled to filter circuits 410, 420, 440, 450 and 470.

[0093] The control circuit 460 updates the multiplier a(n) and multiplier b(n) according to equation (4), and updates the filter coefficients according to the following formula. w ff (n) and filter coefficients w fb (n).

[0094]

[0095] In other words, as shown in equation (9), the control circuit 460 adjusts the signal according to the filtered signal. x s (n), feedback signal f(n), filter signal g s (n), multiplier a(n) and multiplier b(n) update filter coefficients w ff (n) and filter coefficients w fb (n).

[0096] Figure 7 This diagram shows a functional block diagram of another embodiment of the magnification and filter coefficient update circuit 700, which is equivalent to a combination of the magnification update circuit 290 and the filter coefficient update circuit 395. The magnification and filter coefficient update circuit 700 includes a downsampling frequency sampler 510, a filter circuit 512, a downsampling frequency sampler 520, a filter circuit 522, a downsampling frequency sampler 530, a filter circuit 532, a downsampling frequency sampler 560, a filter circuit 562, a downsampling frequency sampler 580, a filter circuit 582, a control circuit 590, and a conversion circuit 550. The downsampling frequency sampler 510, filter circuit 512, downsampling frequency sampler 520, downsampling frequency sampler 530, filter circuit 532, control circuit 590, and conversion circuit 550 are included in the rate update circuit 290, while the downsampling frequency sampler 520, filter circuit 522, downsampling frequency sampler 560, filter circuit 562, downsampling frequency sampler 580, filter circuit 582, control circuit 590, and conversion circuit 550 are included in the filter coefficient update circuit 395; in other words, the downsampling frequency sampler 520, control circuit 590, and conversion circuit 550 are shared by the rate update circuit 290 and the filter coefficient update circuit 395. The downsampling frequency sampler 580 is used to downsample the feedback signal g(n) to generate the downsampled signal g. d(m). Filter circuit 582 is a model simulating the sound propagation path 100 at low sampling frequencies. Filter circuit 582 is coupled to a downsampling frequency sampler 580 to filter the downsampled signal g. d (m) to generate a filtered signal g d，s (m)(that is, ).

[0097] Control circuit 590 generates a down-sampling factor a according to equation (6). low (m+1) and downsampling factor b low (m+1), and the down-sampling filter coefficients are generated according to the following formula. w ff，low (m+1) and down-frequency sampling filter coefficients w fb，low (m+1).

[0098]

[0099] In other words, as shown in equation (10), the control circuit 590 controls the signal based on the filtered signal. x d，s (m), frequency reduction sampling signal f d (m), Filtered signal g d，s (m), downsampling factor a low (m) and downsampling factor b low (m) Generate down-sampling filter coefficients w ff，low (m+1) and down-frequency sampling filter coefficients w fb，low (m+1).

[0100] The above-mentioned magnification a(n), magnification b(n), and filter coefficients w ff (n), Filter coefficients w fb (n), downsampling factor a low (m), downsampling factor b low (m), frequency downsampling filter coefficient w ff，low (m) and down-frequency sampling filter coefficients w fb，low(m) can be stored in memory (not shown). Control circuits 430, 540, 460, and 590 can be circuits or electronic components with program execution capabilities, such as a central processing unit, microprocessor, microprocessor unit, digital signal processor (DSP), or equivalent circuitry. Control circuits 430, 540, 460, and 590 perform the aforementioned calculations by executing program code or program instructions stored in memory. Control circuits 430, 540, 460, and 590 may or may not include this memory.

[0101] In other embodiments, those skilled in the art can design control circuits 430, 540, 460 and 590 based on the above disclosure. That is, control circuits 430, 540, 460 and 590 can be application-specific integrated circuits (ASICs) or implemented by circuits or hardware such as programmable logic devices (PLDs).

[0102] Those skilled in the art can implement the conversion circuit 550 in hardware (e.g., a circuit composed of transistors) or software / firmware based on the above disclosure. When the conversion circuit 550 is implemented in software / firmware, it can be integrated into the control circuit 540 or the control circuit 590 (i.e., the control circuit 540 or the control circuit 590 executes program code or program instructions to implement the conversion).

[0103] In some embodiments, to simplify the circuitry and / or reduce the computational load on control circuits 430, 540, 460, and 590, the multipliers a(n) and b(n) can be designed to conform to a certain relationship, such as a(n) + b(n) = c, where c is an integer. For example, Figure 8 The rate update circuit 800 is an embodiment of the rate update circuit 290 (corresponding to b(n) = 1 - a(n)). The rate update circuit 800 includes an adder circuit 610, a filter circuit 620, and a control circuit 630. The adder circuit 610 is coupled to the filter circuits 250 and 252 to process the filtered signal y. ff (n) Subtract the filtered signal y fb (n) to generate the difference signal y Δ (n). The filter coefficients of filter circuit 620 can describe the sound propagation path 100, that is, filter circuit 620 is a model simulating the sound propagation path 100. Filter circuit 620 is coupled to adder circuit 610 to filter the difference signal y. Δ (n) to generate the filtered signal yΔ，s (n)(that is, The control circuit 630 is coupled to the filter circuit 620, and the multiplier a(n) is updated according to the following formula.

[0104] a(n+1)=a(n)-μ a ×y Δ，s (n)×f(n) (11)

[0105] In other words, the control circuit 630 determines the filtering signal y based on the filtering signal y. Δ，s b(n) and the feedback signal f(n) update the multiplier a(n). Since b(n+1) = 1 - a(n+1), the update multiplier a(n) is equivalent to the upper multiplier b(n) being updated at the same time.

[0106] Figure 9 The rate update circuit 900 is another embodiment of the rate update circuit 290 (also corresponding to b(n) = 1 - a(n)), which helps to reduce the computational load of the control circuit. The rate update circuit 900 includes an adder circuit 710, a downsampling frequency sampler 720, a filter circuit 730, a control circuit 740, a conversion circuit 750, and a downsampling frequency sampler 760.

[0107] The adder circuit 710 has the same function as the adder circuit 610, and will not be described again. The sampler 720, coupled to the adder circuit 710, is used to downsample the difference signal y at a lower frequency. Δ (n) to generate a down-sampled signal y Δ，d (m). Filter circuit 730 is a model simulating the sound propagation path 100 at low sampling frequencies. Filter circuit 730 is coupled to a downsampling frequency sampler 720 to filter the downsampled signal y. Δ，d (m) to generate the filtered signal y Δ，d，s (m)(that is, The downsampling frequency sampler 760 is coupled to the signal processing circuit 280 or the rate update circuit 290 to downsample the feedback signal f(n) (corresponding to the audio input / output system 20) or the intermediate signal f(n) (corresponding to the audio input / output system 50) to generate the downsampled signal f. d (m). The control circuit 740 is coupled to the filter circuit 730 and the sampler 760 to reduce the sampling frequency, and is used to generate the downsampling factor a according to the following formula. low (m+1).

[0108] a low (m+1)=a low (m)-μ a ×y Δ，d，s (m)×f d (m) (12)

[0109] In other words, the control circuit 740 determines the filtering signal y based on the filtering signal y. Δ，d，s (m) and down-frequency sampling signal f d (m) Generates downsampling factor a low (m+1). The conversion circuit 750 is coupled to the control circuit 740 to reduce the sampling rate a. low (m+1) is converted to a multiplier a(n+1).

[0110] In some embodiments, Figure 4 and Figure 7 The circuit can be combined with a pre-emphasis filter, for example, placed between filter circuit 562 and control circuit 540 (or control circuit 590), between sampler 520 (which reduces the sampling frequency) and control circuit 540 (or control circuit 590), and between filter circuit 582 and control circuit 590. The pre-emphasis filter can be selected to apply the desired noise cancellation frequency band and improve the noise cancellation effect. Depending on the placement of the pre-emphasis filter, Figure 10 Showing a functional block diagram of another embodiment of the rate update circuit 290 (also corresponding to b(n) = 1 - a(n)). Compared to Figure 9 , Figure 10 The rate update circuit 1000 includes a control circuit 840, and also includes a pre-enhancement filter 810 and a pre-enhancement filter 820. The aforementioned pre-enhancement filter can be a finite impulse response (FIR) filter or an infinite impulse response (IIR) filter.

[0111] The pre-enhancement filter 810 is coupled between the filter circuit 730 and the control circuit 840 to adjust the filter signal y. Δ，d，s (m) to the frequency band of interest to generate the adjusted filtered signal y Δ，d，s，f (m). The pre-enhancement filter 820 is coupled between the downsampling frequency sampler 760 and the control circuit 840 to adjust the downsampling signal f. d (m) to the frequency band of interest to generate the adjusted downsampled signal f d，f (m). The control circuit 840 updates the downsampling factor a according to the following formula. low (m+1).

[0112] a low (m+1)=a low (m)-μ a ×y Δ，d，s，f (m)×f d，f (m) (13)

[0113] Compared with existing technologies, the sound input / output system and noise cancellation circuit of the present invention can increase the convergence speed of the filter coefficient and improve the convergence effect of the filter coefficient.

[0114] Please note that the shapes, sizes, and proportions of the components in the icons disclosed above are merely illustrative and intended for those skilled in the art to understand the invention, and are not intended to limit the invention.

[0115] Although the contents of this application have been disclosed above through specific embodiments, these embodiments are not intended to limit the contents of this application. Those skilled in the art can modify or adjust the technical solutions of this application based on the explicit or implicit contents of this application without departing from the concept and scope of this application. All such changes may fall within the scope of patent protection sought by this application. In other words, the scope of protection of this application shall be determined by the scope defined in the claims.

Claims

1. A sound input / output system, characterized in that, The sound input / output system includes: A sound output device, used to output signals; The first audio input device generates the first input signal; A second audio input device generates a second input signal; A first filtering circuit, coupled to the first audio input device, is used to filter the first input signal according to a first filtering coefficient to generate a first filtered signal. A signal processing circuit, coupled to the second audio input device, is used to generate a feedback signal based on the second input signal and the audio signal; The second filtering circuit, coupled to the signal processing circuit, is used to filter the feedback signal according to the second filtering coefficient to generate the second filtered signal. The first multiplication circuit, coupled to the first filter circuit, is used to multiply the first filter signal by a first multiplier to generate a first intermediate signal. The second multiplication circuit, coupled to the second filter circuit, is used to multiply the second filter signal by a second multiplier to generate a second intermediate signal. The first adder circuit, coupled to the first multiplier circuit and the second multiplier circuit, is used to add the first intermediate signal to the second intermediate signal to generate a noise cancellation signal. as well as The second adder circuit, coupled to the first adder circuit, is used to add the noise cancellation signal to the audio signal to generate the output signal. The sound input / output system also includes: A rate update circuit, coupled to the first filter circuit, the second filter circuit, the signal processing circuit, the first multiplication circuit, and the second multiplication circuit, is used to update the first rate and the second rate based on the first filter signal, the second filter signal, and the feedback signal. as well as A filter coefficient update circuit, coupled to the signal processing circuit, the first filter circuit, and the second filter circuit, is used to update the first filter coefficient and the second filter coefficient according to the first input signal, the feedback signal, the first multiplier, and the second multiplier.

2. The sound input / output system as described in claim 1, characterized in that, The signal processing circuit includes: The third filtering circuit is used to filter the audio signal to generate a third filtered signal. as well as The third adder circuit, coupled to the third filter circuit, is used to subtract the third filter signal from the second input signal to generate the feedback signal.

3. The sound input / output system as described in claim 1, characterized in that, The signal processing circuit includes: The third filtering circuit is used to filter the audio signal to generate a third filtered signal. The third adder circuit, coupled to the third filter circuit, is used to subtract the third filter signal from the second input signal to generate a third intermediate signal. The fourth filtering circuit is used to filter the noise cancellation signal to generate the fourth filtered signal; as well as The fourth adder circuit, coupled to the second filter circuit, the third adder circuit, and the fourth filter circuit, is used to subtract the fourth filter signal from the third intermediate signal to generate the feedback signal.

4. A noise cancellation circuit, characterized in that, The noise cancellation circuit includes: The first filtering circuit is used to filter the first input signal according to the first filtering coefficient to generate the first filtered signal. The signal processing circuit is used to generate a feedback signal based on the second input signal and the audio signal; The second filtering circuit, coupled to the signal processing circuit, is used to filter the feedback signal according to the second filtering coefficient to generate the second filtered signal. The first multiplication circuit, coupled to the first filter circuit, is used to multiply the first filter signal by a first multiplier to generate a first intermediate signal. The second multiplication circuit, coupled to the second filter circuit, is used to multiply the second filter signal by a second multiplier to generate a second intermediate signal. The first adder circuit, coupled to the first multiplier circuit and the second multiplier circuit, is used to add the first intermediate signal to the second intermediate signal to generate a noise cancellation signal. The second adder circuit, coupled to the first adder circuit, is used to add the noise cancellation signal to the audio signal to generate an output signal. A rate update circuit, coupled to the first filter circuit, the second filter circuit, the signal processing circuit, the first multiplication circuit, and the second multiplication circuit, is used to update the first rate and the second rate based on the first filter signal, the second filter signal, and the feedback signal. as well as A filter coefficient update circuit, coupled to the signal processing circuit, the first filter circuit, and the second filter circuit, is used to update the first filter coefficient and the second filter coefficient according to the first input signal, the feedback signal, the first multiplier, and the second multiplier.

5. The noise cancellation circuit as described in claim 4, characterized in that, The signal processing circuit includes: The third filtering circuit is used to filter the audio signal to generate a third filtered signal. as well as The third adder circuit, coupled to the third filter circuit, is used to subtract the third filter signal from the second input signal to generate the feedback signal.

6. The noise cancellation circuit as described in claim 5, characterized in that, The noise cancellation circuit further includes: A first downsampling frequency sampler is used to downsample the first filtered signal to generate a first downsampled signal; The fourth filtering circuit, coupled to the first downsampled frequency sampler, is used to filter the first downsampled signal to generate the fourth filtered signal. The second downsampling frequency sampler is used to downsample the second filtered signal to generate a second downsampled signal. The fifth filter circuit, coupled to the second downsampled frequency sampler, is used to filter the second downsampled signal to generate the fifth filter signal; A third downsampling frequency sampler is used to downsample the feedback signal to generate a third downsampled signal; The sixth filter circuit, coupled to the third downsampling frequency sampler, is used to filter the third downsampling signal to generate the sixth filter signal; The fourth downsampling frequency sampler is used to downsample the first input signal to generate a fourth downsampled signal; The seventh filter circuit, coupled to the fourth downsampling frequency sampler, is used to filter the fourth downsampling signal to generate the seventh filter signal. A control circuit, coupled to the fourth filter circuit, the fifth filter circuit, the third downsampling frequency sampler, the sixth filter circuit, and the seventh filter circuit, is configured to generate a first downsampling ratio and a second downsampling ratio based on the fourth filter signal, the fifth filter signal, and the third downsampling signal; and to generate a first downsampling filter coefficient and a second downsampling filter coefficient based on the sixth filter signal, the seventh filter signal, the third downsampling signal, the first downsampling ratio, and the second downsampling ratio. A conversion circuit, coupled to the control circuit, is used to convert the first downsampling factor, the second downsampling factor, the first downsampling filter coefficient, and the second downsampling filter coefficient into the first factor, the second factor, the first filter coefficient, and the second filter coefficient, respectively.

7. The noise cancellation circuit as described in claim 4, characterized in that, The signal processing circuit includes: The third filtering circuit is used to filter the audio signal to generate a third filtered signal. The third adder circuit, coupled to the third filter circuit, is used to subtract the third filter signal from the second input signal to generate a third intermediate signal. The fourth filtering circuit is used to filter the noise cancellation signal to generate the fourth filtered signal; as well as The fourth adder circuit, coupled to the second filter circuit, the third adder circuit, and the fourth filter circuit, is used to subtract the fourth filter signal from the third intermediate signal to generate the feedback signal.

8. The noise cancellation circuit as described in claim 4, characterized in that, The sum of the first multiplier and the second multiplier equals 1.

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