Display panel

By introducing a shielding protective layer into the display panel to shield the grating gaps, the ghosting problem between the shading layer, gate layer, and source and drain layer is solved, the display effect is improved and the preparation cost is reduced.

CN114914279BActive Publication Date: 2025-09-12SHENZHEN CHINA STAR OPTOELECTRONICS SEMICON DISPLAY TECH CO LTD
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Patent Information

Application Number
CN202210430436.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-04-22
Publication Date
2025-09-12
Estimated Expiration
2042-04-22

AI Technical Summary

Technical Problem

In existing display panels, grating gaps between the light shielding layer, the gate layer, and the source and drain layers cause ghosting, which affects the display effect.

Method used

A shielding protection layer is introduced into the display panel, comprising a main body portion and an extension portion. The extension portion covers the grating gaps, shields the grating gaps, and alleviates the ghosting phenomenon.

Benefits of technology

By designing the shielding protective layer, the diffraction effect of the grating gap is reduced, the display effect is improved, the occurrence of ghosting is reduced, the preparation process is simplified and the cost is reduced.

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Abstract

An embodiment of the present application discloses a display panel, which includes a substrate, a light-shielding layer, a gate layer, a source-drain layer, and a shielding protection layer. A plurality of grating gaps are formed between the light-shielding layer, the gate layer, and the source-drain layer. The shielding protection layer includes a main body and an extension portion connected to the main body, wherein the extension portion covers at least one grating gap setting. The main body is extended to form an extension portion covering at least one grating gap setting, and the grating gaps are shielded by the extension portion to prevent the grating gaps from generating a grating effect and reduce ghosting.
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Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel. Background Art

[0002] See also Figure 1 、 Figure 2 In existing display panels, especially those with dual-sided or transparent displays, pixels are typically divided into a transparent portion and a non-transparent portion. The non-transparent portion includes the light shielding layer, gate layer, source / drain layer, and body wiring, while the transparent portion includes the active layer, capacitor, and anode.

[0003] At the same time, small transparent areas are formed between the light shielding layer 20, the gate layer 60, and the source and drain layer 80. These small transparent areas form grating gaps 6, which are prone to diffraction effects, resulting in ghosting of objects seen through the transparent display panel.

[0004] Therefore, the existing display panel has the technical problem of ghosting. Summary of the Invention

[0005] The embodiments of the present application provide a display panel that can alleviate the technical problem of ghosting in existing display panels.

[0006] An embodiment of the present application provides a display panel, comprising:

[0007] substrate;

[0008] A TFT device, the TFT device being disposed above the substrate, the TFT device comprising a light shielding layer disposed above the substrate, a gate layer disposed on a side of the light shielding layer away from the substrate, a source-drain electrode layer, and a passivation layer disposed on the source-drain electrode layer, the source-drain electrode layer comprising a source electrode and a drain electrode, the source-drain electrode layer being disposed on a side of the gate layer and the light shielding layer away from the substrate;

[0009] a planar layer, the planar layer being disposed on the passivation layer;

[0010] a light-emitting device, the light-emitting device comprising an anode, the anode being disposed on the planar layer, a via hole penetrating the planar layer and the passivation layer being disposed on a side of the source electrode away from the substrate, the anode being electrically connected to the source electrode through the via hole; and

[0011] a shielding protective layer, the shielding protective layer comprising a main body portion and an extension portion connected to the main body portion, the main body portion being disposed in the via hole and covering the source electrode, and the shielding protective layer being made of a light-shielding material;

[0012] Wherein, in the thickness direction of the display panel, a plurality of grating gaps are formed between the light shielding layer, the gate layer, and the source and drain electrode layers, and the extension portion at least covers one of the grating gaps.

[0013] Optionally, in some embodiments of the present application, the display panel further includes data lines arranged along the first direction and scan lines arranged along the second direction, and the width of the main body along the second direction is the same as the width of the extension portion along the second direction.

[0014] Optionally, in some embodiments of the present application, the orthographic projection of the shielding protection layer on the substrate covers the orthographic projection of the TFT device on the substrate.

[0015] Optionally, in some embodiments of the present application, an orthographic projection of the extension portion on the substrate and an orthographic projection of the data line or the scan line on the substrate have an overlapping area.

[0016] Optionally, in some embodiments of the present application, the TFT device and the light-emitting device are staggered, and the light-emitting device further includes a light-emitting layer arranged on the side of the anode away from the substrate, and a cathode arranged on the side of the light-emitting layer away from the substrate, and the materials for preparing the anode and the cathode are both transparent materials.

[0017] Optionally, in some embodiments of the present application, the TFT device further includes an active layer, the active layer is arranged on the substrate, and the light-shielding layer is away from the substrate side, and the active layer is made of a transparent indium gallium zinc oxide material.

[0018] Optionally, in some embodiments of the present application, the shielding protection layer is provided on the same layer as the anode.

[0019] Optionally, in some embodiments of the present application, the shielding protection layer is disposed on a surface of the passivation layer that is away from the substrate.

[0020] Optionally, in some embodiments of the present application, the shielding protective layer is made of at least one of molybdenum, aluminum, and titanium.

[0021] Optionally, in some embodiments of the present application, the thickness of the shielding protection layer ranges from 20 nanometers to 200 nanometers.

[0022] Beneficial effect: By setting a shielding protective layer, the shielding protective layer includes a main body part and an extension part formed by extending the main body part. The extension part covers at least one grating gap and shields the grating gap, thereby alleviating the technical problem of ghosting in existing display panels. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0024] Figure 1 is a schematic top view of an existing display panel;

[0025] Figure 2 is a schematic cross-sectional view of the display panel at AA;

[0026] Figure 3 is a schematic top view of a display panel provided in this application;

[0027] Figure 4 is a schematic cross-sectional view of the display panel at position BB provided in this application;

[0028] Figure 5 is another cross-sectional schematic diagram of the display panel provided by the present application;

[0029] Figure 6 It is a flow chart of the display panel manufacturing method provided in this application.

[0030] Description of reference numerals:

[0031] DETAILED DESCRIPTION

[0032] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application. In addition, it should be understood that the specific implementation methods described herein are only used to illustrate and explain the present application, and are not used to limit the present application. In the present application, unless otherwise specified, the directional words used, such as "upper" and "lower", generally refer to the upper and lower parts of the device in actual use or working state, specifically the drawing direction in the accompanying drawings; and "inside" and "outside" refer to the outline of the device.

[0033] See also Figure 3 、 Figure 4The display panel provided in the present application includes a substrate 10, a TFT device 5, a flat layer 100, a light-emitting device, and a shielding protective layer 110. The TFT device 5 is arranged above the substrate 10. The TFT device 5 includes a light-shielding layer 20 arranged above the substrate 10, a gate layer 60 arranged on the side of the light-shielding layer 20 away from the substrate, a source-drain layer 80, and a passivation layer 90 arranged on the source-drain layer 80. The source-drain layer 80 includes a source electrode 801 and a drain electrode 802. The source-drain layer 80 is arranged on the side of the gate layer 60 and the light-shielding layer 20 away from the substrate. The flat layer 100 is arranged on the passivation layer 90. The light-emitting device includes an anode 120. The anode 120 is arranged on the flat layer 100, and a via hole penetrating the flat layer 100 and the passivation layer 90 is arranged on the side of the source 801 away from the substrate. The shielding protection layer 110 includes a main body 1101 and an extension portion 1102 connected to the main body 1101. The main body 1101 is arranged in the via hole, and the main body 1101 covers the source 801. The shielding protection layer 110 is made of a light-shielding material, wherein, in the thickness direction of the display panel, a plurality of grating gaps 6 are formed between the light-shielding layer 20, the gate layer 60, and the source and drain layer 80, and the extension portion 1102 covers at least one of the grating gaps 6.

[0034] In which, the anode 120 and the source 801 can be electrically connected through the via; further, the main body 1101 is provided on the surface of the source 801 away from the substrate 10, one end of the main body 1101 is connected to the anode 120, and the other end of the main body 1101 is connected to the source 801.

[0035] A plurality of grating gaps 6 are formed between the light shielding layer 20 , the gate layer 60 , and the source / drain layer 80 . The grating gaps 6 are prone to ghosting.

[0036] The extension portion 1102 is provided to further increase the coverage area of ​​the grating gap 6 , thereby reducing diffraction at the grating gap 6 between the light shielding layer 20 , the gate layer 60 , and the metal wiring of the source and drain layer 80 , thereby improving the display effect.

[0037] Among them, the TFT device 5 also includes a buffer layer 30, a gate insulating layer 50, and an interlayer insulating layer 70. The buffer layer 30 is arranged on the substrate 10 and the light-shielding layer 20, the gate insulating layer 50 is arranged on the active layer 40, and the interlayer insulating layer 70 is arranged on the gate layer 60 and the buffer layer 30.

[0038] A pixel definition layer 160 is further disposed on the planar layer 100 .

[0039] It can be understood that the occurrence of ghosting can be effectively alleviated by blocking the grating slits 6; further, the main body 1101 is arranged in the via hole and covers the source 801. By extending the main body 1101 to the grating slits 6 and blocking at least one grating slit 6, the occurrence of ghosting can be reduced.

[0040] In the present application, the main body 1101 is extended to form an extension portion 1102 , and the extension portion 1102 at least covers a grating slit 6 , shielding the grating slit 6 , thereby alleviating the technical problem of ghosting in existing display panels.

[0041] The technical solution of this application is now described in conjunction with specific embodiments.

[0042] In one embodiment, the shielding protection layer 110 may be disposed on the source electrode 801 and the passivation layer 90 .

[0043] In another embodiment, see Figure 2 The shielding protection layer 110 can also be arranged on the source 801 and the planar layer 100.

[0044] In one embodiment, the display panel further includes data lines 4 arranged along the first direction and scan lines 3 arranged along the second direction, and the width of the main body 1101 along the second direction is the same as the width of the extension portion 1102 along the second direction.

[0045] The display panel includes a plurality of regularly arranged pixel units, and any of the pixel units is disposed between adjacent data lines 4 and adjacent scan lines 3 .

[0046] In the first direction, the length of the extension portion 1102 may be the same as the length of the main body portion 1101 .

[0047] The pixel unit includes three sub-pixel units of different colors, each sub-pixel unit includes a light-emitting area 1 , and adjacent sub-pixel units include a spacing area 2 .

[0048] Wherein, along the second direction, the width of the light emitting region 1 may be 51.5 micrometers, and the width of the spacing region 2 may be 14 micrometers.

[0049] It can be understood that the extension portion 1102 is equivalent to the main body portion 1101 extending toward the first direction with the width remaining unchanged.

[0050] In this embodiment, the width or length of the extension portion 1102 is made the same as that of the main body 1101 , which simplifies the manufacturing process of the extension portion 1102 and reduces the cost.

[0051] In one embodiment, see Figure 4 The shielding protection layer 110 is disposed on a surface of the passivation layer 90 that is away from the substrate 10 .

[0052] In one embodiment, see Figure 5 The orthographic projection of the shielding protection layer 110 on the substrate 10 covers the orthographic projection of the TFT device 5 on the substrate 10 .

[0053] The orthographic projection of the shielding protection layer 110 on the substrate 10 may completely overlap with the orthographic projection of the TFT device 5 on the substrate 10 .

[0054] It can be understood that there are multiple grating gaps 6 between the metal wiring of the light shielding layer 20, the gate layer 60, and the source and drain layer 80 of the TFT device 5. If the TFT device 5 is completely covered, all the grating gaps 6 existing in the TFT device 5 are completely shielded, further improving the effect of reducing the ghosting phenomenon.

[0055] In this embodiment, the shielding protection layer 110 is arranged to cover the TFT device 5 along the thickness direction of the display panel, completely shielding the grating gaps 6 in the TFT device 5 and reducing the ghosting phenomenon.

[0056] In one embodiment, see Figure 5 The shielding protection layer 110 and the anode 120 are arranged on the same layer.

[0057] In one embodiment, an orthographic projection of the extension portion 1102 on the substrate 10 and an orthographic projection of the data line 4 or the scan line 3 on the substrate 10 have an overlapping area.

[0058] There are also grating gaps 6 between the data lines 4 and the scanning lines 3 and the metal wiring.

[0059] It is understandable that the main body 1101 and the extension portion 1102 may extend not only along the first direction but also along the second direction, thereby destroying the periodic structure of the longitudinal wiring and weakening the grating effect.

[0060] In this embodiment, the extension portion 1102 is further extended in the first direction and the second direction so that the extension portion 1102 covers part of the data line 4 and the scan line 3, further shielding the grating gaps 6 around the data line 4 and the scan line 3, thereby weakening the grating effect.

[0061] In one embodiment, the TFT device 5 is staggered with the light-emitting device, and the light-emitting device further includes a light-emitting layer 130 arranged on the side of the anode 120 away from the substrate, and a cathode 140 arranged on the side of the light-emitting layer 130 away from the substrate. The anode 120 and the cathode 140 are both made of transparent materials.

[0062] The anode 120 is a single-layer structure, and the anode 120 may be made of indium tin oxide.

[0063] Wherein, the display panel may be a double-sided display panel.

[0064] Wherein, no reflective layer or semi-reflective and semi-transmissive layer is provided on the side of the light-emitting device away from the substrate and on both sides below.

[0065] It is understandable that the TFT device 5 and the light emitting device are staggered, and the TFT device 5 will not block the light emitted from the substrate 10 side of the light emitting device.

[0066] In this embodiment, the grating effect of the double-sided display panel is more serious than that of the single-sided display panel. The structural design of the shielding protection layer 110 reduces the grating effect and further reduces the ghosting phenomenon of the transparent display.

[0067] In one embodiment, the TFT device 5 further includes an active layer 40 , which is disposed on the substrate 10 and the side of the light shielding layer 20 away from the substrate. The active layer 40 is made of a transparent indium gallium zinc oxide material.

[0068] In one embodiment, the light shielding layer 20 , the gate layer 60 , and the source / drain electrode layer 80 are all made of light shielding materials.

[0069] In one embodiment, the shielding protection layer 110 is made of the same material as the source / drain electrode layer 80 .

[0070] The shielding protection layer 110 can be prepared in the same process as the source / drain electrode layer 80 .

[0071] In this embodiment, the manufacturing process of the shielding protection layer 110 can be simplified, thereby reducing the manufacturing cost of the display panel.

[0072] In one embodiment, the shielding protection layer 110 is made of at least one of molybdenum, aluminum, and titanium.

[0073] The shielding protection layer 110 may also include other opaque metal materials.

[0074] The electrical conductivity of the main body portion 1101 may be greater than that of the extension portion 1102 .

[0075] It is understandable that the main body 1101 needs to ensure a certain conductivity. Therefore, the conductivity of the main body 1101 may be greater than the conductivity of the source 801 or the anode 120 .

[0076] In this embodiment, by limiting the material for preparing the shielding protection layer 110 , the shielding protection layer 110 has both light shielding performance and certain electrical conductivity, thereby improving the stability of the display panel.

[0077] In one embodiment, the shielding protection layer 110 has a thickness ranging from 20 nanometers to 200 nanometers.

[0078] In one embodiment, the extension portion 1102 has a grid-like structure.

[0079] The extension portion 1102 may include a light-blocking portion and a hollow portion.

[0080] The light-blocking portion is arranged corresponding to the grating slit 6 ; further, in the thickness direction of the display panel, the light-blocking portion covers the grating slit 6 .

[0081] The hollow portion may be arranged to correspond to the metal traces of the light shielding layer 20 , the gate layer 60 , and the source / drain layer 80 .

[0082] It should be noted that the range of the positive projection of the grating slits 6 covered by the light-blocking portion on the substrate 10 is extremely small, and has little effect on the transmittance of the display panel.

[0083] In this embodiment, by setting the extension portion 1102 as a grid structure, it not only has the technical effect of shielding the grating gaps 6 and thus reducing the ghosting phenomenon; at the same time, the setting of the hollow portion also reduces the impact on the transmittance of the display panel.

[0084] In one embodiment, the display panel further includes a surface cathode 140 overlapping region, where the cathode 140 is disposed in contact with the shielding protection layer 110 .

[0085] Specifically, the shielding protection layer further includes an auxiliary electrode portion located in the surface cathode overlapping region, the auxiliary electrode portion is spaced apart from the main body portion and the extension portion, and the auxiliary electrode portion is used to overlap the cathode, thereby reducing cathode impedance.

[0086] The cathode 140 and the shielding protection layer 110 may be arranged in surface contact.

[0087] It is understandable that the shielding protection layer 110 and the cathode 140 are arranged in parallel, which can reduce the resistance of the cathode 140, further reduce the signal transmission loss of the display panel cathode 140, and improve the stability of the display panel.

[0088] In one embodiment, the shielding protection layer 110 may be provided in a special-shaped structure in the overlapping area of ​​the surface cathode 140 .

[0089] In this embodiment, the special-shaped structure can increase the contact area with the cathode 140 , reduce contact impedance, and further reduce the resistance of the cathode 140 .

[0090] See also Figure 6 The display panel manufacturing method disclosed in this application includes:

[0091] S1: providing an array substrate, wherein the array substrate comprises a source-drain electrode layer 80 and a passivation layer 90 disposed on the source-drain electrode layer 80;

[0092] S2: preparing a planar layer 100 on the array substrate, and forming a via hole penetrating the planar layer 100 and the passivation layer 90;

[0093] S3: preparing a shielding protection layer 110 on a side of the passivation layer 90 away from the substrate 10 , wherein the shielding protection layer 110 at least covers one grating slit 6 ;

[0094] S4: An anode 120 , a light-emitting layer 130 , a cathode 140 , and an encapsulation layer 150 are prepared on a side of the planar layer 100 away from the substrate.

[0095] The array substrate includes a light shielding layer 20 , a gate layer 60 , and a source-drain electrode layer 80 . A plurality of grating gaps 6 are formed between the metal traces of the light shielding layer 20 , the gate layer 60 , and the source-drain electrode layer 80 .

[0096] The shielding protection layer 110 includes a main body 1101 and an extension 1102 . The main body 1101 is located in the via hole and covers the source 801 . The extension 1102 is connected to the main body 1101 . The shielding protection layer 110 at least covers a grating gap 6 .

[0097] The array substrate includes a source-drain electrode layer 80 and a passivation layer 90 disposed on the source-drain electrode layer 80 .

[0098] The via hole is located on a side of the source 801 away from the substrate.

[0099] The present application also proposes a display device and a display module. Both the display module and the display device include the above-mentioned display panel, which will not be described in detail here.

[0100] The display panel provided in this embodiment includes a substrate, a TFT device, a flat layer, a light-emitting device, and a shielding protection layer. The TFT device is arranged above the substrate. The TFT device includes a light-shielding layer arranged above the substrate, a gate layer arranged on the side of the light-shielding layer away from the substrate, a source-drain layer, and a passivation layer arranged on the source-drain layer. The source-drain layer includes a source electrode and a drain electrode. The source-drain electrode layer is arranged on the side of the gate layer and the light-shielding layer away from the substrate. The flat layer is arranged on the passivation layer. The light-emitting device includes an anode, which is arranged on the flat layer. A gate electrode is provided on the side of the source electrode away from the substrate, which penetrates the flat layer and the drain electrode. The via hole of the passivation layer, the anode and the source are electrically connected through the via hole, the shielding protection layer includes a main body and an extension portion connected to the main body, the main body is arranged in the via hole, and the main body covers the source setting, the shielding protection layer is prepared from a light-shielding material, wherein, in the thickness direction of the display panel, a plurality of grating gaps are formed between the light-shielding layer, the gate layer, and the source and drain layer, and the extension portion covers at least one of the grating gap settings; the extension portion is formed by extending the main body, and the extension portion covers at least one grating gap setting, thereby shielding the grating gap, thereby alleviating the technical problem of ghosting phenomenon in the existing display panel.

[0101] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0102] The above is a detailed introduction to a display panel and a method for preparing a display panel provided in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for technical personnel in this field, based on the ideas of the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A display panel, characterized in that: include: substrate; A TFT device, the TFT device being disposed above the substrate, the TFT device comprising a light shielding layer disposed above the substrate, a gate layer disposed on a side of the light shielding layer away from the substrate, a source-drain electrode layer, and a passivation layer disposed on the source-drain electrode layer, the source-drain electrode layer comprising a source electrode and a drain electrode, the source-drain electrode layer being disposed on a side of the gate layer and the light shielding layer away from the substrate; a planar layer, the planar layer being disposed on the passivation layer; A light-emitting device, comprising an anode, the anode being disposed on the planar layer, a via hole penetrating the planar layer and the passivation layer being disposed on a side of the source electrode away from the substrate, the anode being electrically connected to the source electrode through the via hole; as well as a shielding protection layer, the shielding protection layer comprising a main body portion and an extension portion connected to the main body portion, the main body portion being disposed in the via hole and covering the source electrode; The display panel is a double-sided display panel or a transparent display panel. In the thickness direction of the display panel, a plurality of grating gaps are formed between the light shielding layer, the gate layer, and the source and drain layer. The extension portion covers at least one of the grating gaps.

2. The display panel according to claim 1, wherein The display panel further includes data lines arranged along a first direction and scan lines arranged along a second direction. The width of the main body portion is the same as the width of the extension portion.

3. The display panel according to claim 2, wherein: The orthographic projection of the shielding protection layer on the substrate covers the orthographic projection of the TFT device on the substrate.

4. The display panel according to claim 3, wherein: An orthographic projection of the extension portion on the substrate and an orthographic projection of the data line or the scan line on the substrate have an overlapping area.

5. The display panel according to claim 1, wherein The TFT device and the light-emitting device are staggered. The light-emitting device further includes a light-emitting layer arranged on the side of the anode away from the substrate and a cathode arranged on the side of the light-emitting layer away from the substrate. The anode and the cathode are both made of transparent materials.

6. The display panel according to claim 5, wherein: The TFT device further includes an active layer, which is arranged on the substrate and on a side of the light shielding layer away from the substrate. The active layer is made of a transparent indium gallium zinc oxide material.

7. The display panel according to claim 1, wherein: The anode is arranged above the shielding protection layer.

8. The display panel according to claim 7, wherein: The shielding protection layer is arranged on a surface of the passivation layer that is away from the substrate.

9. The display panel according to claim 8, wherein: The shielding protective layer is made of at least one of molybdenum, aluminum and titanium.

10. The display panel according to claim 1, wherein The thickness of the shielding protection layer ranges from 20 nanometers to 200 nanometers.

Citation Information

Patent Citations

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    CN109273497A