Reservoir elements and operational circuits

Abstract

The reserve tank element of the present invention has a plurality of units, and the units constituting the plurality of units are respectively connected to at least one other unit, and the plurality of units respectively include: an input terminal for inputting a first signal and a resistor connected to the input terminal; a capacitor connected to the side of the resistor opposite to the input terminal and located between the resistor and a reference potential; a switching element connected to the capacitor; and an output terminal connected to the switching element, and the RC time constant of at least one of the plurality of units is different from that of the other units.

Description

Technical Field

[0001] The present invention relates to a reservoir element and an operation circuit. Background Art

[0002] Neuromorphic devices are components that mimic the human brain through neural networks. Neuromorphic devices artificially mimic the relationships between neurons and synapses in the human brain.

[0003] Neuromorphic devices, for example, consist of chips arranged in layers (like neurons in the brain) and the transmission units (synapses) that connect them. Neuromorphic devices learn through these transmission units (synapses), improving the accuracy of their responses to questions. Learning involves finding future knowledge from information, and neuromorphic devices weight the input data.

[0004] As one of the neural networks, a recurrent neural network is known. A recurrent neural network can process time series data by including recursive coupling internally. Time series data is data whose value changes over time, and stock prices are an example. A recurrent neural network can also have a nonlinear activation unit internally. In this case, the processing in the activation unit can be mathematically regarded as a projection into a nonlinear multidimensional space. In this way, the characteristics of the complex signal changes possessed by the time series signal can be extracted. The recursive structure can be realized by returning the processing results of the neurons in the subsequent layer to the neurons in the previous layer, thereby being able to process time series data.

[0005] Reservoir computing is a type of recurrent neural network that includes recursive coupling and nonlinear activation functions. Reservoir computing is a neural network developed as a method for implementing liquid state machines.

[0006] Reservoir computing can be broadly divided into a reservoir body and a recognition layer coupled to the output layer of the reservoir body. The reservoir body is formed as a graph structure containing multiple nonlinear nodes and recursive coupling between nodes, while the recognition layer is often composed of a single layer of perceptrons. Thus, the neuronal coupling in the human brain can be viewed as a reservoir, and its state can be represented as a transition in the reservoir's interference state.

[0007] A characteristic of reservoir computing is that the main reservoir is not involved in the learning process, but only the recognition layer is used for learning. Reservoir computing is attracting attention as a system for processing time series signals at the IoT or edge, where hardware resources are limited due to the limited computer resources required for learning.

[0008] Furthermore, based on fundamental research related to theory and mathematical models, recent research has also explored applications such as the realization of a reservoir body as a physical device, such as by causing signals to interact with physical devices that perform recursive processing. Reservoir computing, for example, mimics the actions of the cerebellum and can perform recursive data processing, nonlinear data transformations (e.g., coordinate transformations), and so on. Patent Document 1 discloses a reservoir element using spin conduction as an example of a physical device. Non-Patent Document 1 describes a reservoir element utilizing spin waves as an example of physical device research.

[0009] Prior art literature

[0010] Patent Literature

[0011] Patent Document 1: Japanese Patent No. 6620915

[0012] Non-patent literature

[0013] Non-Patent Literature 1: Ryosho Nakane, Gouhei Tanaka, and Akira Hirose, IEEE Access Vol. 6, 2018, pp. 4462-4469. Summary of the Invention

[0014] Problems to be solved by the invention

[0015] The reservoir element described in Patent Document 1 utilizes a physical principle based on a magnetic film, and thus has problems in being stably manufactured using a general CMOS process.

[0016] The reservoir element described in Non-Patent Document 1 utilizes spin waves. However, the reservoir element utilizing spin waves faces many challenges in industrialization.

[0017] The present invention has been made in view of the above circumstances, and provides a reservoir element and an arithmetic circuit that are easily put into practical use.

[0018] Methods for solving problems

[0019] (1) The reserve tank element of the first mode has a plurality of units, and the units constituting the plurality of units are respectively connected to at least one other unit, and the plurality of units respectively include: an input terminal to which the first signal is input; a resistor connected to the input terminal; a capacitor connected to the opposite side of the input terminal of the resistor and located between the resistor and a reference potential; a switching element connected to the capacitor; and an output terminal connected to the switching element, and the RC time constant of at least one unit among the plurality of units is different from that of the other units.

[0020] (2) In the reserve cell element of the above aspect, the resistance value of the resistor in at least one of the plurality of cells may be different.

[0021] (3) In the reserve cell element of the above aspect, the capacitance of the capacitor of at least one of the plurality of cells may be different.

[0022] (4) In the reserve cell element of the above aspect, the resistor may be a two-terminal variable resistor having a variable resistance value.

[0023] (5) In the reservoir element of the above aspect, the resistor may be capable of selecting three or more resistance states.

[0024] (6) In the reservoir element of the above aspect, the output terminal of a first unit among the plurality of units may be connected to an input terminal of a second unit different from the first unit.

[0025] (7) In the reservoir element of the above aspect, an output terminal of a first unit among the plurality of units and an output terminal of a second unit different from the first unit may be connected to the same wiring.

[0026] (8) In the reserve cell element of the above aspect, a second signal may be input to the switching element.

[0027] (9) In the reserve cell element of the above aspect, the capacitor may be shared by two or more units.

[0028] (10) In the reservoir element of the above embodiment, the resistor may be any one of a phase change element, a resistance change memory, a magnetoresistive change element, a ferroelectric memory, and a carbon nanotube element.

[0029] (11) The reserve tank element of the above-mentioned method may also have an external connection unit connected to at least one unit among the multiple units and the outside, and the external connection unit includes: an input terminal to which the first signal is input; a resistor connected to the input terminal; a capacitor connected to the opposite side of the input terminal of the resistor and located between the resistor and a reference potential; a switching element connected to the capacitor; and an output terminal connected to the other end of the switching element.

[0030] (12) In the reservoir element of the above embodiment, the resistor in the external connection unit may be a resistance variable element.

[0031] (13) The operational circuit of the second embodiment provides an operational circuit, which is one of a plurality of units having different RC time constants of at least one unit, and the operational circuit has: an input terminal to which a first signal is input; a resistor connected to the input terminal; a capacitor connected to the side of the resistor opposite to the input terminal and located between the resistor and a reference potential; a switching element connected to the capacitor; and an output terminal connected to the switching element.

[0032] Effects of the Invention

[0033] According to the present invention, a reservoir cell element and an arithmetic circuit that are easily put into practical use can be provided. More specifically, a reservoir cell element that can be easily manufactured using a wiring layer of a CMOS process can be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 This is a conceptual diagram of reserve pool calculation.

[0035] Figure 2 This is a circuit diagram of the reservoir element according to the first embodiment.

[0036] Figure 3 This is an enlarged view of one unit of the reservoir element according to the first embodiment.

[0037] Figure 4 This is a cross-sectional view showing the element structure of one unit of the reservoir element according to the first embodiment.

[0038] Figure 5 This is a circuit diagram of the characteristic portion of the reservoir element of the first variant.

[0039] Figure 6 This is a circuit diagram of the characteristic portion of the reservoir element of the second variant.

[0040] Figure 7 This is a circuit diagram of the characteristic portion of the reservoir element of the third variant.

[0041] Figure 8 This is a circuit diagram of the characteristic portion of the reserve tank element of the fourth variant. DETAILED DESCRIPTION

[0042] The present embodiment will be described in detail below with reference to the accompanying drawings as appropriate. In the drawings used in the following description, for ease of understanding, portions of the features may be enlarged for convenience, and the dimensional ratios of the various components may differ from actual dimensions. The materials, dimensions, and other aspects illustrated in the following description are merely examples, and the present invention is not limited thereto. Applicable embodiments may be implemented with appropriate modifications within the scope of achieving the effects of the present invention.

[0043] Figure 1This is a conceptual diagram of a neural network simulated by the reservoir element of the first embodiment. Figure 1 The neural network NN shown is a conceptual diagram of reservoir computing. Figure 1 The neural network NN shown has an input layer L in , reservoir Rv and output layer L out Input layer L in and the output layer L out Connected to the reserve tank Rv.

[0044] Input layer L in The signal input from the outside is passed to the reservoir Rv. Input layer L in For example, it contains multiple neurons n1. From external input to the input layer L in The input signals of each neuron n1 are delivered to the reserve pool Rv.

[0045] The reserve pool Rv stores the in The input signal is received and converted into another signal. The reservoir Rv is connected to multiple neurons n2. No learning occurs between neurons n2 within the reservoir Rv. The reservoir Rv projects the input signal onto a multidimensional nonlinear space. Within the reservoir Rv, the input signal changes nonlinearly. That is, the input signal is replaced by another signal while retaining the original information. As the input signals interact within the reservoir Rv, the state of the system within the reservoir Rv changes over time.

[0046] Output layer L out Output the signal from the reservoir Rv. From the output layer L out The output signal has the information of the input signal and is replaced by another signal. As an example of this conversion, we can cite the replacement from the orthogonal coordinate system (x, y, z) to the spherical coordinate system (r, θ, φ). Output layer L out For example, it contains multiple neurons n3. When reaching the output layer L from the reserve pool Rv out When learning is performed, the output layer L out Sometimes called the recognition layer. Learning is done by connecting the individual neurons n2 of the reservoir Rv with the output layer L out The output layer L out For example, by learning to identify the signal of the reservoir Rv as the class of the target.

[0047] The reservoir computation mimics the actions of the cerebellum. The reservoir computation is performed by combining only the reservoir Rv and the output layer L out To learn, thus preventing the amount of calculation from increasing.

[0048] <Reservoir Element Circuit Structure>

[0049] Figure 2 This is a circuit diagram of the reservoir element 1 of the first embodiment. The reservoir element 1 is an element that realizes the concept of reservoir calculation through physical elements. The reservoir element 1 has a plurality of units U1 to Un (n is a constant). Each unit (for example, the first unit U1) constituting the plurality of units U1 to Un is connected to another unit (for example, the second unit U2). Figure 2 In the shown reservoir element 1 , the output terminal t2 of the first unit U1 is connected to the input terminal t1 of the second unit U2 .

[0050] At least one of the multiple units U1-Un has an RC time constant that differs from the other units. For example, the RC time constants of the individual units U1-Un may vary. The variations in RC time constants may be, for example, normal, Poisson, or binomial distributions. If these variations occur in the RC time constants of the individual units U1-Un, the individual units may have different frequency characteristics, resulting in nonlinear conversion of the input signal.

[0051] The RC time constant is determined by the resistance value of the resistor R and the capacitance of the capacitor C in each unit U1 to Un. For example, the resistance value of the resistor R of at least one of the multiple units U1 to Un may be different from that of the other units. The resistance value of the resistor R of each unit U1 to Un may, for example, vary. In addition, for example, the capacitance of the capacitor C of at least one of the multiple units U1 to Un may be different from that of the other units. The capacitance of the capacitor C of each unit U1 to Un may, for example, vary. When at least one of the resistance value of the resistor R and the capacitance of the capacitor C varies, the RC time constant of each unit U1 to Un varies.

[0052] Figure 3 This is an enlarged view of one unit of the reserve cell element 1 according to the first embodiment. Each of the plurality of units U1 to Un includes an input terminal t1, a resistor R, a capacitor C, a switching element SW, an output terminal t2, and a control terminal t3.

[0053] The input terminal t1 is a terminal for inputting a signal to the cell. The signal input to the input terminal t1 is called, for example, a first signal. The input terminal t1 is connected to the first end of the resistor R.

[0054] The resistor R is connected to the input terminal t1 and the capacitor C. The first end of the resistor R is connected to the input terminal t1, and the second end is connected to the capacitor C. The resistor R is, for example, a two-terminal variable resistor with a variable resistance value. The resistor R is preferably capable of selecting three or more resistance states, and preferably performs simulated resistance changes. The resistor R is, for example, a phase change memory (PCM), a resistance variable RAM (ReRAM), a magnetoresistive RAM (MRAM), a ferroelectric RAM (FeRAM), or a carbon nanotube (CNT) element.

[0055] If resistor R is a variable resistor, its resistance value can be adjusted. For example, by optimizing the variation in resistance value between units U1 to Un, the number of units required to convert the input signal into a nonlinear state is reduced. This reduction in the number of required units leads to a reduction in the size of the reservoir element 1. Furthermore, while reservoir calculations typically present an industrial challenge in that output is significantly affected by variations in the connection or structure of the reservoir body, the use of variable resistance elements allows these variations to be suppressed and adjusted.

[0056] Capacitor C is connected to resistor R and a reference potential. One plate of capacitor C is connected to the second end of resistor R, and the other plate is connected to the reference potential. The reference potential is, for example, ground. Charge corresponding to the resistance value of resistor R and the pulse width and peak value of the first signal is accumulated between the plates of capacitor C.

[0057] The switching element SW controls the flow of current. When the switching element is in the on state, it is energized and electrically connected. When the switching element is in the off state, it is disconnected and electrically disconnected. Examples of switching elements include field-effect transistors, bipolar transistors, and bidirectional threshold switches. The following description uses an example of a field-effect transistor as the switching element.

[0058] The source of the switching element SW is connected to the capacitor C. The drain of the switching element SW is connected to the output terminal t2. The gate of the switching element SW is connected to the control terminal t3. The control terminal t3 is a terminal that controls the on / off state of the switching element SW. The control terminal t3 is connected to a control unit, for example.

[0059] <Reservoir Component Structure>

[0060] Figure 4 1 is a cross-sectional view showing the element structure of one unit of the reservoir element 1 according to the first embodiment. Figure 4 In the diagram, one direction on the surface of the substrate Sub is defined as the X direction, a direction perpendicular to the X direction is defined as the Y direction, and a direction away from the substrate Sub is defined as the Z direction.

[0061] The reservoir element 1 is divided into multiple layers in the Z direction. Resistors R, capacitors C, and switches SW are located on each layer. Each component on each layer is connected by vias V and wires W1-W5. Via wires V extend in the Z direction. Wires W1-W5 extend in any direction within the XY plane. Each component on each layer is insulated by an interlayer insulating film LI.

[0062] The interlayer insulating film LI is made of, for example, silicon oxide (SiO x), silicon nitride (SiN x ), silicon carbide (SiC), chromium nitride, silicon carbonitride (SiCN), silicon oxynitride (SiON), aluminum oxide (Al2O3), zirconium oxide (ZrO x )wait.

[0063] The switching element SW is, for example, located on a substrate Sub. The switching element SW is, for example, a field effect transistor and includes a gate G, a gate insulating film GI, and a source S and a drain D formed in the substrate Sub. The substrate Sub is, for example, a semiconductor substrate.

[0064] The source S of the switching element SW is electrically connected to the resistor R via a through-hole wiring V. The resistor R is sandwiched between, for example, an upper electrode UE and a lower electrode LE. The upper electrode UE corresponds to the input terminal t1 in the circuit diagram. The input terminal t1 is connected to the wiring W1.

[0065] The drain D of the switching element SW is electrically connected to the wiring W2 via the through-hole wiring V. The wiring W2 is connected to the output terminal t2 in the circuit diagram.

[0066] The gate G of the switching element SW is electrically connected to the wiring W3 via the through-hole wiring V. The wiring W3 is connected to the control terminal t3 in the circuit diagram.

[0067] The through-hole wiring V connecting the source S of the switching element SW and the resistor R is connected to the wiring W4 midway in the Z direction. The wiring W4 also serves as the plate P1 of the capacitor C. The capacitor C is composed of two plates P1 and P2, and an insulating layer I1 sandwiched between them. The plate P2 of the capacitor C is electrically connected to the wiring W5 via the through-hole wiring V. The wiring W5 is grounded to, for example, the ground GR.

[0068] <Operation of the reservoir element>

[0069] Next, the operation of the reservoir element of the first embodiment will be described. First, the output operation of a signal from one unit will be described.

[0070] First, the switching element SW is turned off via control terminal t3. In this state, an input signal is input from input terminal t1. The input signal reaches capacitor C via resistor R, charging capacitor C. The amount of charge stored in capacitor C is determined by the resistance of resistor R, the pulse width and peak of the input signal, and the capacitance of capacitor C.

[0071] After sufficient charge accumulates in capacitor C, switching element SW is turned on. When switching element SW turns on, the charge accumulated in capacitor C is discharged. A signal corresponding to the discharge current is output from capacitor C. The signal reaches output terminal t2. The signal output from the capacitor is a spike signal. Each unit U1 to Un also functions as a node in the spike neural network.

[0072] The signal output from the capacitor varies depending on the resistance value of the resistor R, the pulse width and peak value of the input signal, and the capacitance of the capacitor C. In other words, the signal output from the output terminal t2 varies depending on the resistance value of the resistor R, the pulse width and peak value of the input signal, and the capacitance of the capacitor C.

[0073] Next, the propagation of signals between different units will be described. Figure 2 In the illustrated reservoir element 1, the output terminal t2 and input terminal t1 of adjacent cells are connected. The output terminal t2 of the first cell U1 is connected to the input terminal t1 of the second cell U2. The output signal of the first cell U1 is input to the input terminal t1 of the second cell U2. The output signal of the first cell U1 is a signal obtained by converting the input signal of the first cell U1. A signal containing information about the input signal of the first cell U1 is input to the second cell U2.

[0074] The signal input to unit 1 U1 propagates between units. The RC time constants of units U1 to Un vary. Different RC time constants lead to different amounts of charge stored in capacitor C. The signal input to unit 1 U1 undergoes nonlinear transformation during inter-unit propagation. Variations in the RC time constants impart nonlinearity to the signal. Meanwhile, the propagating signal incorporates information about the signal input to the previous unit, storing the signal conversion results from the previous unit. In other words, reservoir element 1 exhibits both nonlinearity and a memory effect, functioning as a reservoir calculation.

[0075] As described above, by causing the RC time constants of the individual cells to vary, the reservoir element 1 functions as a reservoir calculation.

[0076] Furthermore, if the resistor R is a variable resistor, the degree of variation in the RC time constant can be easily adjusted. By optimizing the variation in the RC time constants of each cell, the number of cells required to convert the input signal into a nonlinear state is reduced. This reduction in the number of cells required leads to a reduction in the size of the reservoir element 1. Furthermore, the use of a variable resistance element can suppress and adjust the output variation of the reservoir element.

[0077] Furthermore, when the resistor body R is a two-terminal type, it is easy to manufacture and the manufacturing process can be simplified. In addition, when the resistor body R is a two-terminal type, the number of layers can be reduced, and it can be manufactured at a low cost.

[0078] While the embodiments of the present invention have been described in detail with reference to the drawings, each structure and combination thereof in each embodiment is merely an example, and additions, omissions, substitutions, and other modifications to the structure are possible without departing from the spirit of the present invention.

[0079] <First Modification>

[0080] Figure 5 This is a circuit diagram of the enlarged characteristic portion of the reservoir element 2 of the first variant. Figure 2 The difference of the reservoir element 1 shown is that the two units U1 , U2 , and U3 share a capacitor C. The structure other than that described below is the same as that of the reservoir element 1 of the first embodiment.

[0081] The reservoir element 2 of the first variation is shared by two or more units. Capacitors C are located between resistors R and switching elements SW in each of the first unit U1, second unit U2, and third unit U3. A diode Di is preferably provided between resistors R and switching elements SW to prevent reverse flow of charge. The timing of charge accumulation in capacitor C can be adjusted by the timing of the operation of control terminals t3 of the first unit U1, second unit U2, and third unit U3.

[0082] The reservoir element 2 of the first modified example has the same effects as the reservoir element of the first embodiment, and functions as a reservoir calculation.

[0083] <Second Modification>

[0084] Figure 6 This is a circuit diagram of the enlarged characteristic portion of the reservoir element 3 of the second modified example. Figure 2 The difference of the reservoir element 1 shown is that another signal is input from the control terminal t3. The structure other than that described below is the same as that of the reservoir element 1 of the first embodiment.

[0085] A first signal S1 is input to input terminal t1 of each unit U1 to Un of the reservoir element 3. A second signal S2 is input to control terminal t3 of each unit U1 to Un of the reservoir element 3. The second signal S2 is, for example, an input signal different from the first signal S1.

[0086] The second signal S2 controls, for example, the opening and closing timing of the switching element SW. The output signal from the output terminal t2 varies according to the opening and closing timing of the switching element SW. As described above, even when the opening and closing timing of the switching element SW is constant, the output signal varies depending on the resistance value of the resistor R, the pulse width and peak value of the input signal, and the capacitance of the capacitor C. As the opening and closing timing of the switching element SW changes, the parameters that cause the output signal to vary increase.

[0087] The reservoir element 3 of the second modified example has the same effect as the reservoir element of the first embodiment and functions as a reservoir calculation. In addition, by adding a parameter that changes the output signal, the nonlinearity of the converted signal is improved.

[0088] <Third Modification>

[0089] Figure 7 This is a circuit diagram showing the enlarged characteristic portion of the reservoir element 4 of the third modified example. Figure 2 The reservoir element 1 shown is different. The structure other than that described below is the same as that of the reservoir element 1 of the first embodiment.

[0090] In the reservoir element 4, the output terminals t2 of the first, second, and third units U1 to U3 of the plurality of units U1 to Un are connected to the same common wiring CW, while the input terminals t1 of the respective units U1 to Un are connected to different input circuits.

[0091] The signals input to each unit U1-Un are converted individually and then merged on the common wiring CW. When these signals merge, they interact with each other. The signals input to the common wiring CW exhibit variations. The nonlinearly converted signals merge on the common wiring CW, causing them to interact with each other.

[0092] Therefore, the reserve cell element 4 of the third modified example has the same effect as the reserve cell element 1 of the first embodiment, and functions as a reserve cell calculation.

[0093] <Fourth Modification>

[0094] Figure 8 This is a circuit diagram of an enlarged portion of the characteristic portion of the reservoir element 5 of the fourth modified example. Figure 2 The reservoir element 1 shown is different in that it further includes an external connection unit EU. The structure other than that described below is the same as that of the reservoir element 1 of the first embodiment.

[0095] The external connection unit EU is connected to at least one of the above-mentioned units U1 to Un and the outside. For example, the external connection unit EU is connected to the terminals of the mutually connected units U1 to Un.

[0096] The external connection unit EU includes an input terminal t1, a resistor R, a capacitor C, a switching element SW, an output terminal t2, and a control terminal t3. The output terminal t2 of the external connection unit EU is connected to the outside. The element structure of the external connection unit EU is identical to that of each of the units U1 to Un. Therefore, the external connection unit EU can be manufactured using the same process as units U1 to Un.

[0097] The resistor R of the external connection unit EU is, for example, a variable resistance element. The external connection unit EU can perform learning by changing the resistance value of the resistor R according to the weight of the data. The external connection unit EU corresponds to the output layer and the recognition layer described above.

[0098] The reservoir element 5 of the fourth variation has the same effects as the reservoir element 1 of the first embodiment and functions as a reservoir calculation. While much research has focused on the deviceization of the reservoir body as a physical device for the reservoir element, the deviceization of the subsequent identification layer has not received sufficient attention. The reservoir element 5 includes an external connection unit EU, which is deviceized, including the identification layer.

[0099] Furthermore, the external connection unit EU of the fourth modified example may be connected to the units U1 to Un of the first to third modified examples.

[0100] Description of Reference Numerals

[0101] 1, 2, 3, 4 reservoir elements

[0102] C capacitor

[0103] R resistor

[0104] Rv reserve pool

[0105] S1 signal 1

[0106] S2 2nd signal

[0107] SW switch element

[0108] t1 input terminal

[0109] t2 output terminal

[0110] T3 control terminal

[0111] U1~Un multiple units

[0112] U1 Unit 1

[0113] U2 Unit 2

[0114] EU external connection unit.

Claims

1. A reservoir element, wherein: With multiple units, Each unit constituting the plurality of units is connected to at least one other unit. Each of the plurality of units comprises: an input terminal to which a first signal is input; a resistor having one end connected to the input terminal; a capacitor connected between the other end of the resistor and a reference potential; a switching element having one end connected to the other end of the resistor; and an output terminal connected to the other end of the switching element, At least one of the plurality of cells has an RC time constant that is different from the other cells, The resistance value of the resistor of at least one of the plurality of cells is different, or the capacitance of the capacitor of at least one of the plurality of cells is different.

2. The reservoir element of claim 1, wherein: The resistor is a two-terminal variable resistor with a variable resistance value.

3. The reservoir element of claim 2, wherein: The resistor can select three or more resistance states.

4. The reservoir element according to claim 1 or 2, wherein: An output terminal of a first cell among the plurality of cells is connected to an input terminal of a second cell that is different from the first cell.

5. The reservoir element according to claim 1 or 2, wherein: An output terminal of a first unit among the plurality of units and an output terminal of a second unit different from the first unit are connected to the same wiring.

6. The reservoir element according to claim 1 or 2, wherein: A second signal is input to the switching element.

7. The reservoir element according to claim 1 or 2, wherein: The capacitor is shared by two or more units.

8. The reservoir element according to claim 1 or 2, wherein: The resistor is any one of a phase change element, a resistance change memory, a magnetoresistive element, a ferroelectric memory, and a carbon nanotube element.

9. The reservoir element according to claim 1 or 2, wherein: The reservoir element further includes an external connection unit connected to at least one unit of the plurality of units and the outside. The external connection unit includes: an input terminal to which a first signal is input; a resistor having one end connected to the input terminal; a capacitor connected between the other end of the resistor and a reference potential; a switching element having one end connected to the other end of the resistor; and An output terminal is connected to the other end of the switching element.

10. The reservoir element according to claim 9, wherein: The resistor in the external connection unit is a resistance change element.

11. An arithmetic circuit, wherein: is one of a plurality of units having at least one unit having a different RC time constant, The operation circuit includes: an input terminal to which a first signal is input; a resistor connected to the input terminal; a capacitor connected to the side of the resistor opposite to the input terminal and located between the resistor and a reference potential; a switching element connected to the capacitor; and an output terminal connected to the switching element, The resistance value of the resistor of at least one of the plurality of units is different, or Alternatively, the capacitance of the capacitor of at least one of the plurality of units is different.

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