Communication device, industrial machinery, and communication quality determination method

Abstract

The present invention provides a communication device, industrial machinery and communication quality determination method that are helpful for accurate evaluation of communication quality. The communication device (100A) comprises: a transmitting unit (108) that transmits a serial signal (D1); a first phase difference determination unit (114) that determines a first phase difference (TPD1-TPD4) between a first reference clock signal (REFTCLK) having the same period as a 1-bit period (ΔT1) of a serial signal transmitted from the transmitting unit and an edge of the serial transmission signal transmitted from the transmitting unit; and a determination unit (116) that determines that an abnormality exists in the serial transmission signal transmitted from the transmitting unit when the first phase difference exceeds a first phase difference threshold (PTH1).

Description

Technical Field

[0001] The present invention relates to a communication device, an industrial machine and a communication quality determination method. Background Art

[0002] Japanese Patent Application Laid-Open No. 2003-265810 discloses that a noise detector provided on a main board detects a noise level in a serial communication line, and a determination unit determines the noise level of the serial communication line based on the degree of the noise level detected by the noise detector. Summary of the invention

[0003] However, a technology that contributes to more accurate evaluation of communication quality is desired.

[0004] An object of the present invention is to provide a communication device, an industrial machine, and a communication quality determination method that contribute to accurate evaluation of communication quality.

[0005] A communication device according to one embodiment of the present invention comprises: a transmitting unit that transmits a serial signal; a first phase difference determining unit that determines a phase difference, i.e., a first phase difference, between a first reference clock signal having the same period as a 1-bit period of the serial signal transmitted from the transmitting unit, i.e., a serial transmission signal, and an edge of the serial transmission signal transmitted from the transmitting unit; and a determining unit that determines that an abnormality exists in the serial transmission signal transmitted from the transmitting unit when the first phase difference exceeds a first phase difference threshold.

[0006] An industrial machine according to another aspect of the present invention includes the above-described communication device.

[0007] A communication quality determination method according to another aspect of the present invention comprises: a sending step of sending a serial signal from a sending unit; a first phase difference determination step of determining a phase difference, i.e., a first phase difference, between a first reference clock signal having the same period as a 1-bit period of the serial signal sent in the sending step, i.e., a serial transmission signal, and an edge of the serial transmission signal sent from the sending unit; and a determination step of determining that an abnormality exists in the serial transmission signal sent in the sending step when the first phase difference exceeds a first phase difference threshold.

[0008] According to the present invention, it is possible to provide a communication device, an industrial machine, and a communication quality determination method that contribute to accurate evaluation of communication quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 It is a block diagram showing the industrial machine according to the first embodiment.

[0010] Figure 2 This is a block diagram showing a communication device according to the first embodiment.

[0011] Figure 3 It is a timing diagram showing an example of a serial signal and a clock signal.

[0012] Figure 4 This is a flowchart showing an example of the operation of the communication device according to the first embodiment.

[0013] Figure 5 This is a flowchart showing an example of the operation of the communication device according to the first embodiment.

[0014] Figure 6 This is a flowchart showing an example of the operation of the communication device according to the first embodiment.

[0015] Figure 7 It is a block diagram showing a communication device according to the second embodiment.

[0016] Figure 8 It is a timing diagram showing an example of a serial signal and a clock signal.

[0017] Fig. 9 This is a flowchart showing an example of the operation of the communication device according to the second embodiment.

[0018] Fig.10 This is a flowchart showing an example of the operation of the communication device according to the second embodiment.

[0019] Fig.11 This is a flowchart showing an example of the operation of the communication device according to the second embodiment.

[0020] Fig.12 This is a flowchart showing an example of the operation of the communication device according to the second embodiment. DETAILED DESCRIPTION

[0021] Hereinafter, preferred embodiments will be listed and the communication device, industrial machine, and communication quality determination method of the present invention will be described in detail with reference to the accompanying drawings.

[0022] [First embodiment]

[0023] use Figure 1 to Figure 6 A communication device, an industrial machine, and a communication quality determination method according to a first embodiment will be described. Figure 1 1 is a block diagram showing an industrial machine according to the present embodiment. Examples of the industrial machine 10 according to the present embodiment include a machine tool, a robot, etc., but the present invention is not limited thereto.

[0024] like Figure 1As shown, the industrial machine 10 has a control device 12. The control device 12 has: a servo amplifier 18, a control unit 20, a storage unit 22, and a display control unit 23. In addition, the control device 12 also has components other than these components, but in order to simplify the description, the components other than these components are omitted. In addition, here, the case where the industrial machine 10 has a servo amplifier 18 is used as an example for description, but it is not limited to this. For example, when a spindle motor is used as a drive motor, a spindle amplifier or the like can also be used instead of the servo amplifier 18.

[0025] The control unit 20 is responsible for overall control of the industrial machine 10. The control unit 20 can be constituted by, for example, a CPU (Central Processing Unit) or the like, but is not limited thereto.

[0026] The storage unit 22 includes, for example, a volatile memory (not shown) and a nonvolatile memory (not shown). Examples of the volatile memory include RAM (Random Access Memory). Examples of the nonvolatile memory include ROM (Read Only Memory) and flash memory. Programs, data, and the like can be stored in the storage unit 22.

[0027] The display control unit 23 can perform display control on the display unit 24 described later. The display control unit 23 can display information provided from the control unit 20 on the display screen of the display unit 24.

[0028] The industrial machine 10 further includes a servo motor 14. The servo motor 14 can be driven by a drive current supplied from a servo amplifier 18. Figure 1 1 servo motor 14 is shown in the figure, but the industrial machine 10 can have a plurality of servo motors 14. In addition, the industrial machine 10 is described here by taking the case where the servo motor 14 is used as a drive motor as an example, but it is not limited to this. For example, a spindle motor or the like can be used instead of the servo motor 14.

[0029] The servo motor 14 has an encoder (absolute encoder) 16. The encoder 16 can detect the rotational position of the output shaft of the servo motor 14. The encoder 16 has a communication device 100B for communicating with the communication device 100A of the servo amplifier 18. The communication device 100B can output a signal indicating the rotational position of the output shaft of the servo motor 14 to the communication device 100A. The servo motor 14 can perform feedback control based on the signal output from the encoder 16, that is, the signal output from the communication device 100B. In addition, here, the case of using an absolute encoder as the encoder 16 is described as an example, but it is not limited to this. For example, an incremental encoder can also be used as the encoder 16.

[0030] The servo amplifier (servo driver) 18 can supply a driving current for rotationally driving the servo motor 14 to the servo motor 14. The servo amplifier 18 has a communication device 100A for communicating with a communication device 100B. Serial communication can be performed between the communication device 100A and the communication device 100B. As a standard for the serial communication, for example, RS-485 can be cited, but it is not limited to this.

[0031] The control device 12 can be connected to a display unit (display device) 24 and an operation unit 26. On a display screen (not shown) of the display unit 24, an operation screen for inputting operation to the industrial machine 10 can be displayed. In addition, on the display screen of the display unit 24, a display screen showing a determination unit 116 (see Figure 2 ) The display unit 24 may be a liquid crystal display device, but is not limited thereto.

[0032] The user can perform operation input to the industrial machine 10 by operating the operation unit 26. A mouse or the like can be used as the operation unit 26, but the present invention is not limited thereto. When the display unit 24 has a touch panel, the touch panel can function as the operation unit 26.

[0033] The industrial machine 10 further includes components other than the components described above. However, for simplicity of description, description of components other than the components described above will be omitted here.

[0034] Figure 2 This is a block diagram showing a communication device according to this embodiment.

[0035] As described above, the communication device 100A is provided in the servo amplifier 18. As described above, the communication device 100B is provided in the encoder 16. In addition, here, the communication device 100A is provided in the servo amplifier 18, and the communication device 100B is provided in the encoder 16. In this example, the communication device 100A is provided in the servo amplifier 18, and the communication device 100B is provided in the encoder 16, but the present invention is not limited to this.

[0036] The communication device 100B includes a receiving unit (receiving circuit) 102 and a transmitting unit (transmitting circuit) 104. The receiving unit 102 and the transmitting unit 104 constitute a transceiver 106. The communication device 100B also includes components other than these components, but Figure 2 In order to simplify the description, components other than these components are omitted.

[0037] The communication device 100A includes a transmission unit (transmission circuit) 108 and a reception unit (reception circuit) 110. The transmission unit 108 and the reception unit 110 constitute a transceiver 112. The transmission unit 108 can transmit a serial signal (serial transmission signal) D1, that is, serial data, to the reception unit 102 included in the communication device 100B. The reception unit 110 can receive a serial signal (serial reception signal) D2, that is, serial data, transmitted from the transmission unit 104 included in the communication device 100B.

[0038] The communication device 100A further includes a clock signal generating unit (clock signal generating circuit) 109. Figure 3 As shown, the clock signal generating unit 109 can generate a plurality of clock signals TCLK1 to TCLK8 . Figure 3 is a timing diagram showing an example of a serial signal and a clock signal. Figure 3 , which is a serial signal D1 output from the transmitting unit 108, more specifically, a serial signal D1 input to the first phase difference determination unit 114 described later. The periods of the plurality of clock signals TCLK1 to TCLK8 are set to be equal to each other. The periods of the clock signals TCLK1 to TCLK8 are set to be equal to the period ΔT1 of 1 bit of the serial signal D1. The timing of the rising edges of the plurality of clock signals TCLK1 to TCLK8 is shifted by a time ΔT2 each time. That is, the plurality of clock signals TCLK1 to TCLK8 have a phase difference corresponding to the time ΔT2 with respect to each other. The period ΔT1 of 1 bit of the serial signal D1 is an integer multiple of the time ΔT2 corresponding to the phase difference between the plurality of clock signals TCLK1 to TCLK8. Here, the period ΔT1 of 1 bit of the serial signal D1 is 8 times the time ΔT2 corresponding to the phase difference between the plurality of clock signals TCLK1 to TCLK8. In this way, the plurality of clock signals TCLK1 to TCLK8 have a phase difference corresponding to a time ΔT2 shorter than a period ΔT1 of one bit of the serial signal D1 .

[0039] The clock signal TCLK1 can be generated, for example, using a crystal oscillator not shown in the figure. The clock signals (phase-shifted clock signals) TCLK2 to TCLK8 can be generated, for example, from the clock signal TCLK1 using a phase-shift circuit (clock phase-shift circuit) not shown in the figure. When describing a clock signal in general, the symbol TCLK is used, and when describing each clock signal, the symbols TCLK1 to TCLK8 are used. Here, the case where eight clock signals TCLK are generated by the clock signal generating unit 109 is described as an example, but the number of clock signals TCLK generated by the clock signal generating unit 109 is not limited to eight.

[0040] The transmission unit 108 transmits the serial signal D1, for example, according to the clock signal TCLK1. For example, according to the rising edge of the clock signal TCLK1, the serial signal D1 is output from the transmission unit 108. As described above, the serial signal D1 output from the transmission unit 108 is received by the receiving unit 102 included in the communication device 100B. In addition, the serial signal D1 output from the transmission unit 108 is input to the first phase difference determination unit 114, which will be described later, included in the communication device 100A. More specifically, the serial signal D1 output from the transmission unit 108 is input to the first phase difference determination unit 114 via a receiving circuit, etc., which is not shown.

[0041] from Figure 3 It can be seen that there is a certain degree of delay time between the timing of the rising edge of the clock signal TCLK1 and the timing of the edge of the serial signal D1 input to the first phase difference determination unit 114. This delay time is not a uniform value in all mass-produced communication devices 100A. In addition, this delay time can also change due to changes in ambient temperature, etc. Therefore, as described later, an appropriate clock signal TCLK among the multiple clock signals TCLK1 to TCLK8 that have phase differences with each other is determined as the first reference clock signal REFTCLK. And, as described later, based on the phase difference between the edge of the serial signal D1 input to the first phase difference determination unit 114 and the first reference clock signal REFTCLK, it is determined whether the serial signal D1 sent from the transmission unit 108 is abnormal. In addition, the edge of the serial signal D1 has a rising edge and a falling edge.

[0042] The communication device 100A further includes a first determination unit (first determination circuit) 111. The first determination unit 111, the first phase difference determination unit 114 described later, and the determination unit 116 described later can be composed of one or more processors (microprocessors), but are not limited thereto. As the processor, for example, a CPU, a DSP (Digital Signal Processor), etc. can be used. As described above, there is a certain degree of delay time between the timing of the rising edge of the clock signal TCLK1 and the timing of the edge of the serial signal D1 input to the first phase difference determination unit 114. In order to accurately determine whether the serial signal D1 output from the transmission unit 108 is abnormal, the first determination unit 111 determines the appropriate clock signal TCLK among the multiple clock signals TCLK1 to TCLK8 as the first reference clock signal REFTCLK. The first determination unit 111 can, for example, determine the clock signal TCLK located immediately before or after the edge of the serial signal D1 as the first reference clock signal REFTCLK. The first reference clock signal REFTCLK is used to determine whether there is an abnormality in the serial signal D1 output from the transmission unit 108. Here, the case where the clock signal TCLK immediately after the edge of the serial signal D1 is determined as the first reference clock signal REFTCLK is described as an example. Figure 3 In the example shown, the clock signal TCLK immediately following the edge of the serial signal D1 is the clock signal TCLK4. Figure 3 In the example shown, the clock signal TCLK4 can be determined as the first reference clock signal REFTCLK.

[0043] The clock signal TCLK located immediately after the edge of the serial signal D1 can vary due to jitter or the like. Therefore, when determining the first reference clock signal REFTCLK, it is preferred that the clock signal TCLK located immediately after the edge of the serial signal D1 and having a sufficiently high frequency be determined as the first reference clock signal REFTCLK. More specifically, it is preferred that the clock signal TCLK whose frequency is greater than or equal to a frequency threshold be determined as the first reference clock signal REFTCLK. The frequency threshold can be set to, for example, about 80%, but is not limited thereto. For example, the clock signal TCLK located immediately after the nth edge of the serial signal D1 is the clock signal TCLK4. The clock signal TCLK located immediately after the n+1th edge of the serial signal D1 is the clock signal TCLK4. The clock signal TCLK located immediately after the n+2th edge of the serial signal D1 is the clock signal TCLK5. The clock signal TCLK located immediately after the n+3th edge of the serial signal D1 is the clock signal TCLK4. The clock signal TCLK immediately after the n+4th edge of the serial signal D1 is the clock signal TCLK4. When the frequency threshold is 80%, the clock signal TCLK that is greater than the frequency threshold is the clock signal TCLK4. In this case, the first decision unit 111 can decide the clock signal TCLK4 as the first reference clock signal REFTCLK.

[0044] In addition, in the above description, the case where the clock signal TCLK with a frequency greater than or equal to the frequency threshold immediately after the edge of the serial signal D1 is determined as the first reference clock signal REFTCLK is described as an example, but the present invention is not limited thereto. The clock signal TCLK with the highest frequency immediately after the edge of the serial signal D1 may also be determined as the first reference clock signal REFTCLK.

[0045] As described above, the period of the clock signal TCLK is set to be equal to the period ΔT1 of 1 bit of the serial signal D1. Therefore, it is not necessary to frequently change the first reference clock signal REFTCLK. However, the delay time between the timing of the rising edge of the clock signal TCLK and the timing of the edge of the serial signal D1 input to the first phase difference determination unit 114 can vary due to temperature changes, etc. Therefore, it is possible to produce a situation where a clock signal TCLK different from the clock signal TCLK determined as the first reference clock REFTCLK in the past is located immediately after the edge of the serial signal D1. In such a case, the clock signal TCLK located immediately after the edge of the serial signal D1 is re-determined as the first reference clock signal REFTCLK. Such a change in the first reference clock REFTCLK can occur with a certain degree of frequency.

[0046] The communication device 100A also has a first phase difference determination unit (first phase difference determination circuit) 114. The first phase difference determination unit 114 can determine the phase difference between the edge of the serial signal D1 sent from the transmission unit 108 and the first reference clock signal REFTCLK, that is, the first phase difference TPD1~TPD4. Here, the case of determining the phase difference between the edge of the serial signal D1 and the rising edge of the first reference clock signal REFTCLK is described as an example, but it is not limited to this. The phase difference between the edge of the serial signal D1 and the falling edge of the first reference clock signal REFTCLK can also be determined. When the first phase difference is generally described, the symbol TPD is used, and when each first phase difference is described, the symbols TPD1~TPD4 are used. The first phase difference determination unit 114 can supply the first phase difference TPD obtained by the determination to the determination unit 116 described later.

[0047] The communication device 100A further includes a determination unit (determination circuit) 116. When the first phase difference TPD exceeds the first phase difference threshold value PTH1, the determination unit 116 can determine that there is an abnormality in the serial signal D1 transmitted from the transmission unit 108. The determination unit 116 can supply information indicating whether there is an abnormality in the serial signal D1 transmitted from the transmission unit 108 to the control unit 20.

[0048] The determination unit 116 can determine the degree of abnormality in communication based on the number of times the first phase difference TPD exceeds the first phase difference threshold value PTH1 within a predetermined time. The determination unit 116 can supply information indicating the degree of abnormality in communication to the control unit 20 .

[0049] The first phase difference threshold value PTH1 is variable. The first phase difference threshold value PTH1 can be adjusted by a user. The user can adjust the first phase difference threshold value PTH1 via the operation unit 26 .

[0050] The serial signal D1 output from the transmitting unit 108, that is, the serial signal D1 input to the first phase difference determining unit 114 is as follows: Figure 3 In the case of the above-mentioned changes, the determination unit 116 performs the following determination.

[0051] Timing t1 indicates the timing of the rising edge of the serial signal D1. That is, at timing t1, the serial signal D1 changes from a low level to a high level.

[0052] Timing t2 indicates the timing of the rising edge of the first reference clock signal REFTCLK. More specifically, timing t2 indicates the timing of the rising edge of the first reference clock signal REFTCLK closest to timing t1. At timing t2, the first reference clock signal REFTCLK changes from a low level to a high level.

[0053] exist Figure 3In the example shown, the phase difference between the timing t1 of the rising edge of the serial signal D1 and the timing t2 of the rising edge of the first reference clock signal REFTCLK, that is, the first phase difference TPD1 is smaller than the first phase difference threshold PTH1. When the first phase difference TPD is smaller than the first phase difference threshold PTH1, the determination unit 116 determines that the serial signal D1 transmitted from the transmission unit 108 has no abnormality.

[0054] Timing t3 indicates the timing of the falling edge of the serial signal D1. That is, at timing t3, the serial signal D1 changes from a high level to a low level.

[0055] Timing t4 indicates the timing of the rising edge of the first reference clock signal REFTCLK. More specifically, timing t4 indicates the timing of the rising edge of the first reference clock signal REFTCLK closest to timing t3. At timing t4, the first reference clock signal REFTCLK changes from a low level to a high level.

[0056] exist Figure 3 In the example shown, the phase difference between the timing t3 of the falling edge of the serial signal D1 and the timing t4 of the rising edge of the first reference clock signal REFTCLK, that is, the first phase difference TPD2 is smaller than the first phase difference threshold PTH1. As described above, when the first phase difference TPD is smaller than the first phase difference threshold PTH1, the determination unit 116 determines that the serial signal D1 transmitted from the transmission unit 108 has no abnormality.

[0057] Timing t5 indicates the timing of the rising edge of the serial signal D1. That is, at timing t5, the serial signal D1 changes from a low level to a high level.

[0058] Timing t6 indicates the timing of the rising edge of the first reference clock signal REFTCLK. More specifically, timing t6 indicates the timing of the rising edge of the first reference clock signal REFTCLK closest to timing t5. At timing t6, the first reference clock signal REFTCLK changes from a low level to a high level.

[0059] exist Figure 3 In the example shown, the phase difference between the timing t5 of the rising edge of the serial signal D1 and the timing t6 of the rising edge of the first reference clock signal REFTCLK, that is, the first phase difference TPD3 is smaller than the first phase difference threshold PTH1. As described above, when the first phase difference TPD is smaller than the first phase difference threshold PTH1, the determination unit 116 determines that the serial signal D1 transmitted from the transmission unit 108 has no abnormality.

[0060] Timing t7 indicates the timing of the falling edge of the serial signal D1. That is, at timing t7, the serial signal D1 changes from a high level to a low level.

[0061] The timing of the rising edge of the first reference clock signal REFTCLK closest to the timing t7 of the falling edge of the serial signal D1 is t6. Figure 3 In the example shown, the phase difference between the timing t7 of the falling edge of the serial signal D1 and the timing t6 of the rising edge of the first reference clock signal REFTCLK, that is, the first phase difference TPD4 is greater than the first phase difference threshold PTH1. Figure 3 In the example shown, the first phase difference TPD4 is greater than or equal to the first phase difference threshold value PTH1 because the transmission path between the transmission unit 108 and the reception unit 102 is affected by interference noise, and a reversal 200 is generated in the serial signal D1 transmitted from the transmission unit 108. When the first phase difference TPD is greater than or equal to the first phase difference threshold value PTH1, the determination unit 116 determines that the serial signal D1 transmitted from the transmission unit 108 has an abnormality.

[0062] use Figure 4 An example of the operation of the communication device according to this embodiment will be described. Figure 4 FIG. 1 is a flowchart showing an example of the operation of the communication device according to the present embodiment. Figure 4 2 shows an operation for determining the first reference clock signal REFTCLK.

[0063] In step S1, the transmission unit 108 transmits the serial signal D1. Thereafter, the process moves to step S2.

[0064] In step S2, the first decision unit 111 decides the clock signal TCLK located immediately after the edge of the serial signal D1 among the plurality of clock signals TCLK as the first reference clock signal REFTCLK. The clock signal TCLK located immediately after the edge of the serial signal D1 and having a frequency greater than or equal to the frequency threshold can be decided as the first reference clock signal REFTCLK, but the present invention is not limited thereto. The clock signal TCLK located immediately after the edge of the serial signal D1 and having the highest frequency can also be decided as the first reference clock signal REFTCLK.

[0065] Next, use Figure 5 The operation of the communication device according to this embodiment will be described. Figure 5 FIG. 1 is a flowchart showing an example of the operation of the communication device according to the present embodiment. Figure 5 2 shows an example of determining whether or not there is an abnormality in the serial signal D1 transmitted from the transmission unit 108 . Figure 5 The actions shown are repeated.

[0066] In step S11 , the transmission unit 108 transmits the serial signal D1 .

[0067] In step S12 , the first phase difference determination unit 114 determines a first phase difference TPD between the timing of the rising edge of the clock signal TCLK and the timing of the edge of the serial signal D1 .

[0068] In step S13, the determination unit 116 determines whether the first phase difference TPD exceeds the first phase difference threshold value PTH1. If the first phase difference TPD exceeds the first phase difference threshold value PTH1 (Yes in step S13), the process proceeds to step S14. If the first phase difference TPD is less than the first phase difference threshold value PTH1 (No in step S13), the process proceeds to step S15.

[0069] In step S14 , the determination unit 116 determines that the serial signal D1 transmitted from the transmission unit 108 has an abnormality.

[0070] In step S15, the determination unit 116 determines that there is no abnormality in the serial signal D1 transmitted from the transmission unit 108. Figure 5 Processing shown.

[0071] Next, use Figure 6 An example of the operation of the communication device according to this embodiment will be described. Figure 6 FIG. 1 is a flowchart showing an example of the operation of the communication device according to the present embodiment. Figure 6 2 shows an example of determining the degree of abnormality of communication based on the number of times the first phase difference TPD exceeds the first phase difference threshold PTH1 within a predetermined time. In addition, here, the case where the degree of abnormality of communication is divided into three levels of large, medium, and small is described as an example, but the present invention is not limited to this.

[0072] In step S21 , the determination unit 116 counts the number of times the first phase difference TPD exceeds the first phase difference threshold value PTH1 within a predetermined time.

[0073] In step S22, the determination unit 116 determines whether the number of times the first phase difference TPD exceeds the first phase difference threshold value PTH1 within the predetermined time exceeds the first number threshold value NTH1. If the number of times the first phase difference TPD exceeds the first phase difference threshold value PTH1 within the predetermined time exceeds the first number threshold value NTH1 (yes in step S22), the process proceeds to step S24. If the number of times the first phase difference TPD exceeds the first phase difference threshold value PTH1 within the predetermined time is less than the first number threshold value NTH1 (no in step S22), the process proceeds to step S23.

[0074] In step S23, the determination unit 116 determines whether the number of times the first phase difference TPD exceeds the first phase difference threshold value PTH1 within the predetermined time exceeds the second number threshold value NTH2. The second number threshold value NTH2 is less than the first number threshold value NTH1. If the number of times the first phase difference TPD exceeds the first phase difference threshold value PTH1 within the predetermined time exceeds the second number threshold value NTH2 (yes in step S23), the process proceeds to step S25. If the number of times the first phase difference TPD exceeds the first phase difference threshold value PTH1 within the predetermined time is less than or equal to the second number threshold value NTH2 (no in step S23), the process proceeds to step S26.

[0075] In step S24 , the determination unit 116 determines that the degree of abnormality in communication is large.

[0076] In step S25 , the determination unit 116 determines that the degree of abnormality in communication is medium.

[0077] In step S26 , the determination unit 116 determines that the degree of abnormality in communication is small.

[0078] so, Figure 6 The indicated processing is completed.

[0079] Thus, according to the present embodiment, when the phase difference between the edge of the serial signal D1 transmitted from the transmission unit 108 and the clock signal TCLK, i.e., the first phase difference TPD, exceeds the first phase difference threshold value PTH1, it is determined that there is an abnormality in the serial signal D1 transmitted from the transmission unit 108. According to the present embodiment, it is possible to contribute to accurate evaluation of communication quality.

[0080] [Second Embodiment]

[0081] use Figure 7 to Figure 12 A communication device, an industrial machine, and a communication quality determination method according to a second embodiment will be described. Figure 7 FIG. 1 is a block diagram showing a communication device according to the present embodiment. Figures 1 to 6 The same components as the communication device and the like in the first embodiment are denoted by the same reference numerals, and the description thereof will be omitted or simplified.

[0082] The communication device 100A of this embodiment further determines whether the phase difference between the serial signal D2 received by the receiving unit 110 and the second reference clock REFRCLK, that is, the second phase difference RPD1 to RPD4, exceeds the second phase difference threshold PTH2. The symbol RPD is used when describing the second phase difference in general, and the symbols RPD1 to RPD4 are used when describing each second phase difference.

[0083] like Figure 7 As shown in FIG. 1 , the communication device 100A further includes a clock signal generating unit (clock signal generating circuit) 117. Figure 8 As shown, the clock signal generating unit 117 can generate a plurality of clock signals RCLK1 to RCLK8 . Figure 8 is a timing diagram showing an example of a serial signal and a clock signal. Figure 8 Serial signal D2 input to receiving unit 110 is shown in FIG. The periods of multiple clock signals RCLK1 to RCLK8 are set to be equal to each other. The periods of clock signals RCLK1 to RCLK8 are set to be equal to the period ΔT3 of 1 bit of serial signal D2. The timing of the rising edges of multiple clock signals RCLK1 to RCLK8 is shifted by time ΔT4 each time. That is, multiple clock signals RCLK1 to RCLK8 have a phase difference corresponding to time ΔT4 with respect to each other. The period ΔT3 of 1 bit of serial signal D2 is an integer multiple of the time ΔT4 corresponding to the phase difference between multiple clock signals RCLK1 to RCLK8. Here, the period ΔT3 of 1 bit of serial signal D2 is 8 times the time ΔT4 corresponding to the phase difference between multiple clock signals RCLK1 to RCLK8. In this way, multiple clock signals RCLK1 to RCLK8 have a phase difference corresponding to time ΔT4 shorter than the period ΔT3 of 1 bit of serial signal D2 with respect to each other.

[0084] The clock signal RCLK1 can be generated, for example, using a crystal oscillator not shown in the figure. The clock signals (phase-shifted clock signals) RCLK2 to RCLK8 can be generated, for example, from the clock signal RCLK1 using a phase shift circuit (clock phase shift circuit) not shown in the figure. When describing a clock signal in general, the symbol RCLK is used, and when describing each clock signal, the symbols RCLK1 to RCLK8 are used. Here, the case where eight clock signals RCLK are generated by the clock signal generating unit 117 is described as an example, but the number of clock signals RCLK generated by the clock signal generating unit 117 is not limited to eight.

[0085] The plurality of clock signals RCLK are not synchronized with the serial signal D2 supplied from the transmission unit 104 included in the communication device 100B. The period of the clock signal RCLK is set to be equal to the period ΔT3 of one bit of the serial signal D2.

[0086] The communication device 100A also has a second determination unit (determination circuit) 118. The first determination unit 111, the first phase difference determination unit 114, the determination unit 116, the second determination unit 118, and the second phase difference determination unit 120 described later can be composed of one or more processors, but are not limited to this. As the processor, for example, a CPU, a DSP, etc. can be used. The second determination unit 118 can determine the clock signal RCLK located immediately before or immediately after the edge of the serial signal D2 among the multiple clock signals RCLK as the second reference clock signal REFRCLK. The second reference clock signal REFRCLK is used to determine the second phase difference RPD of the serial signal D2. As described above, the multiple clock signals RCLK generated by the clock signal generation unit 117 are phase-shifted with each other and are not synchronized with the serial signal D2. In order to accurately determine the second phase difference RPD of the serial signal D2, the second determination unit 118 determines the clock signal RCLK located immediately before or immediately after the edge of the serial signal D2 as the second reference clock signal REFRCLK. Figure 8 In the example shown, the clock signal RCLK immediately before or after the edge of the serial signal D2 is the clock signal RCLK7. Figure 8 In the example shown, the clock signal RCLK7 can be determined as the second reference clock signal REFRCLK. In addition, the serial signal D2 has a rising edge and a falling edge.

[0087] The clock signal RCLK located immediately after the edge of the serial signal D2 can vary due to jitter or the like. Therefore, when determining the second reference clock signal REFRCLK, it is preferred that the clock signal RCLK located immediately after the edge of the serial signal D2 and having a sufficiently high frequency be determined as the second reference clock signal REFRCLK. More specifically, it is preferred that the clock signal RCLK whose frequency is greater than or equal to a frequency threshold be determined as the second reference clock signal REFRCLK. The frequency threshold can be set to, for example, about 80%, but is not limited thereto. For example, the clock signal RCLK located immediately after the nth edge of the serial signal D2 is the clock signal RCLK7. The clock signal RCLK located immediately after the n+1th edge of the serial signal D2 is the clock signal RCLK7. The clock signal RCLK located immediately after the n+2th edge of the serial signal D2 is the clock signal RCLK8. The clock signal RCLK located immediately after the n+3th edge of the serial signal D2 is the clock signal RCLK7. The clock signal RCLK immediately after the n+4th edge of the serial signal D2 is the clock signal RCLK7. When the frequency threshold is 80%, the clock signal RCLK that is greater than the frequency threshold is the clock signal RCLK7. In this case, the second decision unit 118 can decide the clock signal RCLK7 as the second reference clock signal REFRCLK.

[0088] In addition, in the above description, the case where the clock signal RCLK with a frequency greater than or equal to the frequency threshold immediately after the edge of the serial signal D2 is determined as the second reference clock signal REFRCLK is described as an example, but the present invention is not limited thereto. The clock signal RCLK with the highest frequency immediately after the edge of the serial signal D2 may also be determined as the second reference clock signal REFRCLK.

[0089] As described above, the period of the clock signal RCLK is set to be equal to the period ΔT3 of 1 bit of the serial signal D2. Therefore, it is not necessary to frequently change the second reference clock signal REFRCLK. However, some errors may occur between the period of the clock signal RCLK and the period of 1 bit of the serial signal D2. Therefore, it is possible to produce a situation where the second reference clock signal REFRCLK previously determined by the second determination unit 118 is no longer located immediately before or immediately after the edge of the serial signal D2. In such a case, the clock signal RCLK located immediately after the edge of the serial signal D2 is re-determined as the second reference clock signal REFRCLK. Such a change of the second reference clock REFRCLK can be performed with a certain degree of frequency.

[0090] The communication device 100A further includes a second phase difference determination unit (second phase difference determination circuit) 120. The second phase difference determination unit 120 can determine whether an edge of the serial signal D2 received by the receiving unit 110 is in conflict with the clock signal RCLK (see Figure 8 The second phase difference determination unit 120 can supply the second phase difference RPD obtained by the determination to the determination unit 116.

[0091] When the second phase difference RPD exceeds the second phase difference threshold PTH2, the determination unit 116 can determine that the serial signal D2 received by the receiving unit 110 has an abnormality. The determination unit 116 can supply information indicating whether the serial signal D2 received by the receiving unit 110 has an abnormality to the control unit 20.

[0092] When the serial signal D2 input to the receiving unit 110 is Figure 8 In the case of the above-mentioned changes, the determination unit 116 performs the following determination.

[0093] Timing t11 indicates the timing of the rising edge of the serial signal D2. That is, at timing t11, the serial signal D2 changes from a low level to a high level.

[0094] Timing t12 indicates the timing of the rising edge of the second reference clock signal REFRCLK. More specifically, timing t12 indicates the timing of the rising edge of the second reference clock signal REFRCLK closest to timing t11. At timing t12, the second reference clock signal REFRCLK changes from a low level to a high level. In addition, at Figure 8 2 shows an example in which the clock signal RCLK7 is determined as the second reference clock REFRCLK.

[0095] exist Figure 8 In the example shown, the phase difference between the timing t11 of the rising edge of the serial signal D2 and the timing t12 of the rising edge of the second reference clock signal REFRCLK, that is, the second phase difference RPD1 is smaller than the second phase difference threshold PTH2. When the second phase difference RPD is smaller than the second phase difference threshold PTH2, the determination unit 116 determines that the serial signal D2 received by the receiving unit 110 has no abnormality.

[0096] Timing t13 indicates the timing of the falling edge of the serial signal D2. That is, at timing t13, the serial signal D2 changes from a high level to a low level.

[0097] Timing t14 indicates the timing of the rising edge of the second reference clock signal REFRCLK. More specifically, timing t14 indicates the timing of the rising edge of the second reference clock signal REFRCLK closest to timing t13. At timing t14, the second reference clock signal REFRCLK changes from the low level to the high level.

[0098] exist Figure 8 In the example shown, the phase difference between the timing t13 of the falling edge of the serial signal D2 and the timing t14 of the rising edge of the second reference clock signal REFRCLK, that is, the second phase difference RPD2 is smaller than the second phase difference threshold PTH2. As described above, when the second phase difference RPD is smaller than the second phase difference threshold PTH2, the determination unit 116 determines that the serial signal D2 received by the receiving unit 110 has no abnormality.

[0099] Timing t15 indicates the timing of the rising edge of the serial signal D2. That is, at timing t15, the serial signal D2 changes from a low level to a high level.

[0100] Timing t16 indicates the timing of the rising edge of the second reference clock signal REFRCLK. More specifically, timing t16 indicates the timing of the rising edge of the second reference clock signal REFRCLK closest to timing t15. At timing t16, the second reference clock signal REFRCLK changes from the low level to the high level.

[0101] exist Figure 8In the example shown, the phase difference between the timing t15 of the rising edge of the serial signal D2 and the timing t16 of the rising edge of the second reference clock signal REFRCLK, that is, the second phase difference RPD3 is smaller than the second phase difference threshold PTH2. As described above, when the second phase difference RPD is smaller than the second phase difference threshold PTH2, the determination unit 116 determines that the serial signal D2 received by the receiving unit 110 has no abnormality.

[0102] Timing t17 indicates the timing of the falling edge of the serial signal D2. That is, at timing t17, the serial signal D2 changes from a high level to a low level.

[0103] The timing of the rising edge of the second reference clock signal REFRCLK closest to the timing t17 of the falling edge of the serial signal D2 is t16. Figure 8 In the example shown, the phase difference between the timing t16 of the rising edge of the second reference clock signal REFRCLK and the timing t17 of the falling edge of the serial signal D2, that is, the second phase difference RPD4 is greater than the second phase difference threshold PTH2. Figure 8 In the example shown, the second phase difference RPD4 is greater than or equal to the second phase difference threshold value PTH2 because the transmission path between the receiving unit 110 and the transmitting unit 104 is affected by interference noise, and the serial signal D2 received by the receiving unit 110 is inverted 202. When the second phase difference RPD is greater than or equal to the second phase difference threshold value PTH2, the determination unit 116 determines that the serial signal D2 received by the receiving unit 110 is abnormal.

[0104] The determination unit 116 can determine the degree of abnormality in communication based on the number of times the second phase difference RPD exceeds the second phase difference threshold value PTH2 within a predetermined time. The determination unit 116 can supply information indicating the degree of abnormality in communication to the control unit 20 .

[0105] The second phase difference threshold value PTH2 is variable. The second phase difference threshold value PTH2 can be adjusted by a user. The user can adjust the second phase difference threshold value PTH2 via the operation unit 26 .

[0106] The determination unit 116 can determine the cause of the abnormality in communication based on the determination result of the first phase difference determination unit 114 and the determination result of the second phase difference determination unit 120. When the first phase difference TPD exceeds the first phase difference threshold value PTH1 and the second phase difference RPD exceeds the second phase difference threshold value PTH2, the determination unit 116 can determine that the cause of the abnormality in communication includes interference noise. When the first phase difference TPD does not exceed the first phase difference threshold value PTH1 and the second phase difference RPD exceeds the second phase difference threshold value PTH2, the determination unit 116 can determine that the cause of the abnormality in communication is jitter.

[0107] use Fig. 9 An example of the operation of the communication device according to this embodiment will be described. Fig. 9 FIG. 1 is a flowchart showing an example of the operation of the communication device according to the present embodiment. Fig. 9 2 shows an operation for determining the second reference clock signal REFRCLK.

[0108] In step S31, the receiving unit 110 receives the serial signal D2, and then moves to step S32.

[0109] In step S32, the second decision unit 118 decides the clock signal RCLK located immediately after the edge of the serial signal D2 among the plurality of clock signals RCLK as the second reference clock signal REFRCLK. The clock signal RCLK located immediately after the edge of the serial signal D2 and having a frequency greater than or equal to the frequency threshold can be decided as the second reference clock signal REFRCLK, but the present invention is not limited thereto. The clock signal RCLK located immediately after the edge of the serial signal D2 and having the highest frequency can also be decided as the second reference clock signal REFRCLK.

[0110] Next, use Fig.10 The operation of the communication device according to this embodiment will be described. Fig.10 FIG. 1 is a flowchart showing an example of the operation of the communication device according to the present embodiment. Fig.10 2 shows an example of determining whether or not the serial signal D2 received by the receiving unit 110 has an abnormality. Fig.10 The actions shown are repeated.

[0111] In step S41 , the receiving unit 110 receives the serial signal D2 .

[0112] In step S42 , the second phase difference determination section 120 determines a second phase difference RPD between the timing of the rising edge of the second reference clock signal REFRCLK and the timing of the edge of the serial signal D2 .

[0113] In step S43, the determination unit 116 determines whether the second phase difference RPD exceeds the second phase difference threshold value PTH2. If the second phase difference RPD exceeds the second phase difference threshold value PTH2 (yes in step S43), the process proceeds to step S44. If the second phase difference RPD is less than the second phase difference threshold value PTH2 (no in step S43), the process proceeds to step S45.

[0114] In step S44 , the determination unit 116 determines that the serial signal D2 received by the reception unit 110 has an abnormality.

[0115] In step S45, the determination unit 116 determines that there is no abnormality in the serial signal D2 received by the receiving unit 110. Fig.10 Processing shown.

[0116] Next, use Fig.11 An example of the operation of the communication device according to this embodiment will be described. Fig.11 FIG. 1 is a flowchart showing an example of the operation of the communication device according to the present embodiment. Fig.11 2 shows an example of determining the abnormality of communication based on the number of times the second phase difference RPD exceeds the second phase difference threshold PTH2 within a predetermined time. In addition, here, the abnormality of communication is divided into three levels: large, medium, and small, but the present invention is not limited thereto.

[0117] In step S51 , the determination unit 116 counts the number of times the second phase difference RPD exceeds the second phase difference threshold value PTH2 within a predetermined time.

[0118] In step S52, the determination unit 116 determines whether the number of times the second phase difference RPD exceeds the second phase difference threshold value PTH2 within the predetermined time exceeds the third number threshold value NTH3. If the number of times the second phase difference RPD exceeds the second phase difference threshold value PTH2 within the predetermined time exceeds the third number threshold value NTH3 (yes in step S52), the process proceeds to step S54. If the number of times the second phase difference RPD exceeds the second phase difference threshold value PTH2 within the predetermined time is less than or equal to the third number threshold value NTH3 (no in step S52), the process proceeds to step S53.

[0119] In step S53, the determination unit 116 determines whether the number of times the second phase difference RPD exceeds the second phase difference threshold value PTH2 within the predetermined time exceeds the fourth number threshold value NTH4. The fourth number threshold value NTH4 is less than the third number threshold value NTH3. If the number of times the second phase difference RPD exceeds the second phase difference threshold value PTH2 within the predetermined time exceeds the fourth number threshold value NTH4 (yes in step S53), the process proceeds to step S55. If the number of times the second phase difference RPD exceeds the second phase difference threshold value PTH2 within the predetermined time is less than or equal to the fourth number threshold value NTH4 (no in step S53), the process proceeds to step S56.

[0120] In step S54 , the determination unit 116 determines that the degree of abnormality in communication is large.

[0121] In step S55 , the determination unit 116 determines that the degree of abnormality in communication is medium.

[0122] In step S56 , the determination unit 116 determines that the degree of abnormality in communication is small.

[0123] so, Fig.11 The indicated processing is completed.

[0124] Next, use Fig.12 An example of the operation of the communication device according to this embodiment will be described. Fig.12 FIG. 1 is a flowchart showing an example of the operation of the communication device according to the present embodiment. Fig.12 2 shows an example of a case where the cause of abnormality in communication is determined based on the determination result of the first phase difference determination unit 114 and the determination result of the second phase difference determination unit 120 .

[0125] In step S61, the determination unit 116 determines whether the second phase difference RPD exceeds the second phase difference threshold value PTH2. If the second phase difference RPD exceeds the second phase difference threshold value PTH2 (yes in step S61), the process proceeds to step S62. If the second phase difference RPD is less than the second phase difference threshold value PTH2 (no in step S61), Fig.12 The indicated processing is completed.

[0126] In step S62, the determination unit 116 determines whether the first phase difference TPD exceeds the first phase difference threshold value PTH1. If the first phase difference TPD exceeds the first phase difference threshold value PTH1 (Yes in step S62), the process proceeds to step S63. If the first phase difference TPD is less than the first phase difference threshold value PTH1 (No in step S62), the process proceeds to step S64.

[0127] In step S63 , the determination unit 116 determines that the cause of abnormality in communication includes interference noise.

[0128] In step S64, the determination unit 116 determines that the cause of the abnormality in communication is jitter. Fig.12 The indicated processing is completed.

[0129] Thus, according to the present embodiment, it is further determined whether the second phase difference RPD in the serial signal D2 received by the receiving unit 110 exceeds the second phase difference threshold value PTH2. In the case where the abnormal cause of communication includes interference noise, not only the first phase difference TPD can exceed the first phase difference threshold value PTH1, but the second phase difference RPD can also exceed the second phase difference threshold value PTH2. In the case where the abnormal cause of communication is jitter, the second phase difference RPD can exceed the second phase difference threshold value PTH2, but the first phase difference TPD does not exceed the first phase difference threshold value PTH1. Thus, according to the present embodiment, the abnormal cause of communication can also be grasped. Thus, according to the present embodiment, it can contribute to a more accurate evaluation of communication quality.

[0130] As mentioned above, although the preferred embodiment of the present invention was described, the present invention is not limited to the above-mentioned embodiment, and various changes can be made without departing from the scope of the present invention.

[0131] For example, in the second embodiment, the case where the clock signal generating unit 109 and the clock signal generating unit 117 are provided separately is described as an example, but the present invention is not limited thereto. When the period ΔT1 of one bit of the serial signal D1 transmitted from the transmitting unit 108 is the same as the period ΔT3 of one bit of the serial signal D2 received by the receiving unit 110, the following can be performed. That is, the clock signals TCLK1 to TCLK8 generated by the clock signal generating unit 109 can be used as the clock signals RCLK1 to RCLK8. In this case, the clock signal generating unit 109 can also serve as the clock signal generating unit 117.

[0132] The above-described embodiments are summarized as follows.

[0133] The communication device 100A includes: a transmitting unit 108 that transmits a serial signal D1; a first phase difference determination unit 114 that determines the phase difference between a first reference clock signal REFTCLK having the same period as the period ΔT1 of 1 bit of the serial signal transmitted from the transmitting unit, i.e., the serial transmission signal, and the edge of the serial transmission signal transmitted from the transmitting unit, i.e., the first phase difference TPD1 to TPD4; and a determination unit 116 that determines that the serial transmission signal transmitted from the transmitting unit has an abnormality when the first phase difference exceeds a first phase difference threshold value PTH1. According to such a configuration, when the phase difference between the first reference clock signal and the edge of the serial transmission signal exceeds the first phase difference threshold value, it is determined that the serial transmission signal has an abnormality, thereby being able to contribute to accurate evaluation of communication quality.

[0134] The device may further include a first determination unit 111 that determines any one of a plurality of clock signals TCLK1 to TCLK8 having a phase difference corresponding to a time ΔT2 shorter than a 1-bit period of the serial transmission signal and having equal periods as the first reference clock signal.

[0135] The first determination unit may determine, as the first reference clock signal, a clock signal located immediately before or immediately after an edge of the serial transmission signal among the plurality of clock signals.

[0136] The determination unit may determine the degree of abnormality in communication based on the number of times the first phase difference exceeds the first phase difference threshold within a predetermined time. According to such a configuration, the degree of abnormality in communication can be more accurately determined.

[0137] Alternatively, the first phase difference threshold may be variable.

[0138] Alternatively, the system further comprises: a receiving unit 110 that receives a serial signal D2; and a second phase difference determination unit 120 that determines a phase difference between a second reference clock signal REFRCLK having the same period as the period ΔT3 of one bit of the serial signal received by the receiving unit, i.e., a serial reception signal, and an edge of the serial reception signal received by the receiving unit, i.e., a second phase difference RPD1 to RPD4, wherein the determination unit determines that the serial reception signal received by the receiving unit is abnormal when the second phase difference exceeds a second phase difference threshold value PTH2. Such a structure can contribute to a more accurate evaluation of communication quality.

[0139] The device may further include a second determination unit 118 that determines any one of a plurality of clock signals RCLK1 to RCLK8 having a phase difference corresponding to a time ΔT4 shorter than a 1-bit period of the serial reception signal and having equal periods as the second reference clock signal.

[0140] The second determination unit may determine, as the second reference clock signal, a clock signal located immediately before or immediately after an edge of the serial reception signal among the plurality of clock signals.

[0141] The determination unit may determine the cause of the abnormality in communication based on the determination result of the first phase difference determination unit and the determination result of the second phase difference determination unit. According to such a configuration, the cause of the abnormality in communication can be grasped more accurately.

[0142] The determination unit may determine that the abnormality cause includes disturbance noise when the first phase difference exceeds the first phase difference threshold and the second phase difference exceeds the second phase difference threshold.

[0143] The determination unit may determine that the abnormality cause is chattering when the first phase difference does not exceed the first phase difference threshold and the second phase difference exceeds the second phase difference threshold.

[0144] Alternatively, the second phase difference threshold may be variable.

[0145] The determination unit may determine the degree of abnormality in communication based on the number of times the second phase difference exceeds the second phase difference threshold within a predetermined time.

[0146] The industrial machine 10 includes the communication device as described above.

[0147] The communication quality determination method comprises: a sending step S11, sending a serial signal from a sending unit; a first phase difference determination step S12, determining a phase difference, i.e., a first phase difference, between a first reference clock signal having the same period as the 1-bit period of the serial signal sent in the sending step, i.e., a serial transmission signal, and an edge of the serial transmission signal sent from the sending unit; and determination steps S13 and S14, determining that the serial transmission signal sent in the sending step has an abnormality when the first phase difference exceeds a first phase difference threshold.

[0148] Alternatively, the method further comprises: a receiving step S41, in which a receiving unit receives a serial signal; and a second phase difference determination step S42, in which a phase difference, i.e., a second phase difference, is determined between a second reference clock signal having the same period as a 1-bit period of the serial signal received in the receiving step, i.e., a serial reception signal, and an edge of the serial reception signal received by the receiving unit. In the determination steps S43 and S44, when the second phase difference exceeds a second phase difference threshold, it is determined that an abnormality exists in the serial reception signal received by the receiving unit.

[0149] Alternatively, in the determination steps S43 and S44, the cause of the abnormality in communication may be determined based on the determination result in the first phase difference determination step and the determination result in the second phase difference determination step.

Claims

1. A communication device (100A), characterized in that: have: A transmitting unit (108) that transmits a serial signal (D1); a first phase difference determination unit (114) for determining a first phase difference (TPD1-TPD4) between a first reference clock signal (REFTCLK) and an edge of a serial transmission signal transmitted from the transmission unit, wherein the first reference clock signal has the same period as a period (ΔT1) of one bit of the serial signal transmitted from the transmission unit, namely, the serial transmission signal; a determination unit (116) for determining that an abnormality exists in the serial transmission signal transmitted from the transmission unit when the first phase difference exceeds a first phase difference threshold value (PTH1); as well as A first determination unit (111) determines, as the first reference clock signal, a clock signal having a frequency greater than a frequency threshold and located immediately before or after an edge of the serial transmission signal, from among a plurality of clock signals (TCLK1 to TCLK8) having a phase difference corresponding to a time (ΔT2) shorter than a one-bit period of the serial transmission signal and having equal periods.

2. The communication device according to claim 1, characterized in that The determination unit determines the degree of abnormality in communication based on the number of times the first phase difference exceeds the first phase difference threshold within a predetermined time.

3. The communication device according to claim 1, characterized in that The first phase difference threshold is variable.

4. The communication device according to claim 1, characterized in that: The communication device also has: a receiving unit (110) that receives a serial signal (D2); and a second phase difference determination unit (120) for determining a second phase difference (RPD1-RPD4) which is a phase difference between an edge of a second reference clock signal (REFRCLK) and a serial reception signal received by the receiving unit, wherein the second reference clock signal has the same period as a period (ΔT3) of one bit of the serial signal received by the receiving unit, namely, the serial reception signal; When the second phase difference exceeds a second phase difference threshold value (PTH2), the determination unit determines that an abnormality exists in the serial reception signal received by the reception unit.

5. The communication device according to claim 4, characterized in that: The communication device further comprises: a second determination unit (118) which determines, as the second reference clock signal, a clock signal located immediately before or after an edge of the serial reception signal among a plurality of clock signals (RCLK1 to RCLK8) having a phase difference corresponding to a time (ΔT4) shorter than a 1-bit period of the serial reception signal and having equal periods.

6. The communication device according to claim 4 or 5, characterized in that: The determination unit determines a cause of abnormality in communication based on a determination result of the first phase difference determination unit and a determination result of the second phase difference determination unit.

7. The communication device according to claim 6, characterized in that: When the first phase difference exceeds the first phase difference threshold and the second phase difference exceeds the second phase difference threshold, the determination unit determines that the abnormality cause includes disturbance noise.

8. The communication device according to claim 6, characterized in that: When the first phase difference does not exceed the first phase difference threshold and the second phase difference exceeds the second phase difference threshold, the determination unit determines that the abnormality cause is chattering.

9. The communication device according to claim 4, characterized in that: The second phase difference threshold is variable.

10. The communication device according to claim 4, characterized in that: The determination unit determines the degree of abnormality in communication based on the number of times the second phase difference exceeds the second phase difference threshold within a predetermined time.

11. An industrial machine (10), characterized in that have: The communication device according to any one of claims 1 to 10.

12. A method for determining communication quality, characterized in that: have: a sending step (S11), sending a serial signal from a sending unit of the communication device; a first phase difference determination step (S12), in which a first phase difference determination unit of the communication device determines a first phase difference between a first reference clock signal and an edge of a serial transmission signal transmitted from the transmission unit, wherein the first reference clock signal has the same period as a period of 1 bit of the serial signal transmitted in the transmission step, i.e., the serial transmission signal; a determination step (S13, S14), in which, when the first phase difference exceeds a first phase difference threshold, a determination unit provided in the communication device determines that an abnormality exists in the serial transmission signal transmitted in the transmission step; as well as In a determination step (S2), a clock signal having a frequency greater than a frequency threshold and located immediately before or after an edge of the serial transmission signal among a plurality of clock signals (TCLK1 to TCLK8) having a phase difference corresponding to a time (ΔT2) shorter than a 1-bit period of the serial transmission signal and having equal periods is determined as the first reference clock signal.

13. The communication quality determination method according to claim 12, characterized in that: The communication quality determination method further comprises: A receiving step (S41), receiving a serial signal by a receiving unit of the communication device; as well as a second phase difference determination step (S42), in which a second phase difference determination unit provided in the communication device determines a second phase difference between a second reference clock signal and an edge of the serial reception signal received by the reception unit, wherein the second reference clock signal has the same period as a period of 1 bit of the serial signal received in the reception step, i.e., the serial reception signal; In the determination step ( S43 , S44 ), when the second phase difference exceeds a second phase difference threshold, the determination unit determines that an abnormality exists in the serial reception signal received by the reception unit.

14. The communication quality determination method according to claim 13, characterized in that: In the determination step (S43, S44), the determination unit determines the cause of abnormality in communication based on the determination result in the first phase difference determination step and the determination result in the second phase difference determination step.

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