A method and system for testing the dynamic on-resistance of a power device

Abstract

The present invention discloses a method and system for testing the dynamic on-resistance of a power device. The testing method includes: setting the power device to be tested in different test environments; in different test environments, connecting the power device to be tested to a dynamic on-resistance test circuit; determining the dynamic on-voltage and dynamic on-current of the power device to be tested in the on-state based on the dynamic on-resistance test circuit; and calculating and determining the dynamic on-resistance in different test environments based on the dynamically measured on-voltage and on-current each time. Signal interference is reduced through isolated driving, the on-voltage drop of the device is measured using a high-precision clamping circuit, and then the change in the dynamic resistance of the device during the on-process is accurately obtained through a formula. The test results have higher accuracy and stronger anti-interference ability, and are worthy of popularization and application. In addition, the present invention adds test environment factors, and accurately calculates the dynamic on-resistance of the power device to be tested under different test environments.

Description

Technical Field

[0001] The present invention relates to the technical field of power device measurement, and particularly relates to a method and system for testing the dynamic on-resistance of a power device. Background Art

[0002] Power devices refer to electronic components with relatively large output power. In the prior art, only the on-resistance value of power devices can be measured statically, and the accuracy of the test results obtained is relatively low, and the change of the on-resistance during the switching process of the power device cannot be fed back in real time. Moreover, the prior test does not stipulate the test environment, which may cause the on-resistance of the power device to change in a special environment, affecting the parameter setting of other devices connected. Summary of the Invention

[0003] The present invention provides a method and system for testing the dynamic on-resistance of a power device to solve the above problems existing in the prior art.

[0004] The present invention provides a method for testing the dynamic on-resistance of a power device, and the test method includes:

[0005] S100, setting the power device to be tested in different test environments;

[0006] S200, connecting the power device to be tested to a dynamic on-resistance test circuit under different test environments;

[0007] S300, determining the dynamic on-voltage and dynamic on-current of the power device to be tested in the on-state based on the dynamic on-resistance test circuit;

[0008] S400, calculating and determining the dynamic on-resistance under different test environments based on the dynamic on-voltage and dynamic on-current measured each time.

[0009] Preferably, the S200 includes:

[0010] S201, connecting a pulse width modulation signal driven by an isolation driver to the gate of the power device to be tested to drive the power device to be tested;

[0011] S202, connecting a clamping circuit between the drain and source of the power device to be tested, and the clamping circuit includes: a diode D4 connected to the drain, a diode D7 connected to the source, and a voltage stabilizing and filtering circuit, and the voltage stabilizing and filtering circuit is used to shorten the reverse recovery time of the diode D7 in the clamping circuit;

[0012] S203, when the power device to be tested is turned on, measuring the positive voltage between the anodes of the diodes D4 during the conduction process, and determining the dynamic on-voltage of the power device to be tested based on the positive voltage and the conduction voltage drop of the diode D4;

[0013] S204. Connect an inductive circuit between the drain of the power device under test and the high-voltage input terminal. When the power device under test is in the conducting state, based on the increase in the current in the circuit due to the connection of the inductive circuit, detect the dynamic conduction current passing through the power device under test.

[0014] S205. Determine the dynamic on-resistance of the power device under test based on the ratio of the dynamic on-voltage to the dynamic on-current.

[0015] Preferably, S202 includes:

[0016] S2021. Connect a first resistor in parallel across the two ends of the diode D7 for discharging.

[0017] S2022. Connect a series of a first zener diode and a second zener diode in parallel with the diode D7.

[0018] S2023. Connect a series of a second resistor and a first capacitor in parallel with the diode D7.

[0019] S2024. Form a voltage stabilizing and filtering circuit with the first resistor, the first zener diode, the second zener diode, the second resistor, and the first capacitor.

[0020] Preferably, after S400, it includes:

[0021] S500. For each test environment, determine the parameters of the test environment; under test environments with the same parameters, perform multiple detections of the dynamic on-voltage and the dynamic on-current to determine the dynamic on-resistance, and based on the multiple detections, determine the error range of the dynamic on-resistance in the test environment with the same parameters.

[0022] S600. Record the parameters of the test environment, the corresponding dynamic on-resistance, and the error range of the dynamic on-resistance in a database, and the database is recorded and stored according to different parameters of the test environment.

[0023] S700. Build a dynamic on-resistance prediction model based on the database; detect the actual parameters of the actual environment where the power device is located, retrieve and query the corresponding dynamic on-resistance and the error range of the dynamic on-resistance from the dynamic on-resistance prediction model based on the actual parameters, predict the actual on-resistance of the power device connected to the device based on the dynamic on-resistance and the error range of the dynamic on-resistance, and adjust the parameters of the device matched with the power device based on the predicted value.

[0024] Preferably, determining the error range of the dynamic on-resistance in S500 includes:

[0025] S501. Under a test environment with the same parameters, after multiple detections, multiple sets of dynamic on-resistances are obtained; each value of the dynamic on-resistance corresponds to a frequency input to the power device under test.

[0026] S502. Calculate the average value of the multiple sets of dynamic on-resistances, and use the average value of the multiple sets of dynamic on-resistances as the final dynamic on-resistance under this test environment.

[0027] S503. Calculate the differences between the multiple sets of dynamic on-resistances and the final dynamic on-resistance, and form the error range of the dynamic on-resistance with the maximum difference and the minimum difference.

[0028] The present invention provides a test system for the dynamic on-resistance of a power device. The test system includes:

[0029] A test environment setting module for setting different test environments.

[0030] A dynamic on-resistance test module for connecting the power device under test to a dynamic on-resistance test circuit under different test environments.

[0031] A dynamic on-state voltage and dynamic on-state current test module for determining the dynamic on-state voltage and dynamic on-state current of the power device under test in the on-state based on the dynamic on-resistance test circuit.

[0032] A dynamic on-resistance calculation module for calculating and determining the dynamic on-resistance under different test environments based on the dynamic on-state voltage and dynamic on-state current measured each time.

[0033] Preferably, the dynamic on-resistance test module includes:

[0034] A clamping circuit for measuring the dynamic on-state voltage of the power device under test in the on-state. The clamping circuit includes a voltage stabilizing and filtering circuit for shortening the reverse recovery time of diode D7 in the clamping circuit; the clamping circuit is connected between the drain and source of the power device under test, with diode D4 connected to the drain and diode D7 connected to the source; when the power device under test is on, measure the positive voltage between the anodes of diodes D4 during the conduction process, and determine the dynamic on-state voltage of the power device under test based on the positive voltage and the conduction voltage drop of diode D4.

[0035] A high-voltage input circuit for inputting the Vds voltage of the power device under test and setting the voltage range required by the power device under test; adjusting the dynamic on-resistance of the power device under test at different voltages; the dynamic on-resistance refers to the change in the on-resistance of the power device under test at different frequencies.

[0036] Inductive circuit, a current-limiting resistor is connected to the output end of the high-voltage input circuit, and an inductive circuit is connected between the current-limiting resistor and the drain of the power device under test. The inductive circuit includes a diode and an inductor in a parallel relationship; during the conduction process of the power device under test, the Ids current rises through the inductance of the inductive circuit.

[0037] Control signal input and drive circuit. After the pulse-width modulated double-pulse signal is filtered, an isolation driver is used to drive the gate of the power device under test; the isolation driver uses a set dedicated isolation driver; and an isolated power supply is used to supply power to the isolation driver chip, and the output voltage of the isolated power supply is low-voltage direct current.

[0038] The oscilloscope current probe measures the dynamic conduction current passing through the power device under test, and determines the dynamic on-resistance based on the dynamic on-voltage and the dynamic on-current.

[0039] Preferably, the clamping circuit includes:

[0040] The LDO inputs low-voltage direct current. When the power device under test is turned off, VD_off = VD is high voltage, and the diode D4 is reverse cut-off; when the power device under test is turned on, VD is low voltage, the diode D4 is turned on, Vs = Vds(on) + VD4, and the Vs voltage can be measured during the conduction process. VD4 is the conduction voltage drop of the diode, which is a fixed value; based on the measured Vs and VD4, the dynamic on-voltage Vds(on) is determined.

[0041] The oscilloscope current probe measures the dynamic conduction current passing through the power device under test. The dynamic conduction current Ids is the current passing through the detection resistor R10; and the Ids current range required by the power device under test is set.

[0042] Discharge through the first resistor R12, and then through the voltage-regulating diodes: the first voltage-regulating diode D5 and the second voltage-regulating diode D8, and the second resistor R11 and the first capacitor C13 voltage-regulating and filtering circuit to reduce the reverse recovery time of D7.

[0043] Based on the ratio of the dynamic on-voltage and the dynamic on-current, the dynamic on-resistance is calculated.

[0044] Preferably, it further includes:

[0045] Dynamic on-resistance error range determination module. For each test environment, determine the parameters of the test environment; under the test environment with the same parameters, perform multiple detections of the dynamic on-voltage and the dynamic on-current to determine the dynamic on-resistance, and based on the multiple detections, determine the error range of the dynamic on-resistance under the test environment with the same parameters.

[0046] A database storage module for recording the parameters of the test environment, the corresponding dynamic on-resistance, and the error range of the dynamic on-resistance in a database, where the database is recorded and stored according to different parameters of the test environment;

[0047] A prediction module for constructing a dynamic on-resistance prediction model based on the database; detecting the actual parameters of the actual environment where the power device is located, retrieving the corresponding dynamic on-resistance and the error range of the dynamic on-resistance from the dynamic on-resistance prediction model based on the actual parameters, predicting the actual on-resistance of the power device of the access device based on the dynamic on-resistance and the error range of the dynamic on-resistance, and adjusting the parameters of the device matching the power device based on the predicted value.

[0048] Preferably, the error range determination module of the dynamic on-resistance includes:

[0049] Multiple groups of dynamic on-resistance acquisition sub-modules for obtaining multiple groups of dynamic on-resistances through multiple detections in a test environment with the same parameters;

[0050] A final dynamic on-resistance calculation sub-module for calculating the average value of multiple groups of dynamic on-resistances and taking the average value of multiple groups of dynamic on-resistances as the final dynamic on-resistance in this test environment;

[0051] An error range calculation sub-module for calculating the difference between multiple groups of dynamic on-resistances and the final dynamic on-resistance, and forming the error range of the dynamic on-resistance with the maximum difference and the minimum difference.

[0052] Compared with the prior art, the present invention has the following advantages:

[0053] The present invention provides a method and system for testing the dynamic on-resistance of a power device. The testing method includes: setting the power device to be tested in different test environments; connecting the power device to be tested to a dynamic on-resistance test circuit in different test environments; determining the dynamic on-voltage and dynamic on-current of the power device to be tested in the on-state based on the dynamic on-resistance test circuit; calculating and determining the dynamic on-resistance in different test environments based on the dynamically measured on-voltage and on-current each time. Signal interference is reduced through isolation drive, the on-voltage drop of the device is measured using a high-precision clamping circuit, and then the change in the dynamic resistance of the device during the conduction process is accurately obtained through a formula. The test results have higher accuracy and stronger anti-interference ability, and are worthy of popularization and application. In addition, this embodiment adds test environment factors, and accurately calculates the dynamic on-resistance of the power device to be tested in different test environments.

[0054] Other features and advantages of the present invention will be set forth in the following description, and in part will be obvious from the description, or may be learned by practice of the present invention. The objectives and other advantages of the present invention may be realized and attained by the structure particularly pointed out in the written description, claims, as well as the drawings.

[0055] The technical solution of the present invention will be further described in detail below with reference to the drawings and embodiments. Description of the Drawings

[0056] The drawings are used to provide a further understanding of the present invention, and constitute a part of the description. Together with the embodiments of the present invention, they are used to explain the present invention, but do not constitute a limitation to the present invention. In the drawings:

[0057] Figure 1 It is a flowchart of a method for testing the dynamic on-resistance of a power device in an embodiment of the present invention;

[0058] Figure 2 It is a test circuit diagram of the dynamic on-resistance of a power device in an embodiment of the present invention;

[0059] Figure 3 It is a schematic diagram of a power supply circuit of an isolation driver in an embodiment of the present invention;

[0060] Figure 4 It is a schematic diagram of a clamping circuit in an embodiment of the present invention;

[0061] Figure 5 It is a schematic diagram of the structure of a test system for the dynamic on-resistance of a power device in an embodiment of the present invention. Detailed Embodiments

[0062] The following describes the preferred embodiments of the present invention with reference to the drawings. It should be understood that the preferred embodiments described herein are only for explaining and illustrating the present invention, and are not used to limit the present invention.

[0063] An embodiment of the present invention provides a method for testing the dynamic on-resistance of a power device. Please refer to Figure 1 , and the test method includes the following steps:

[0064] S100, setting the power device to be tested in different test environments;

[0065] S200, connecting the power device to be tested to a dynamic on-resistance test circuit under different test environments;

[0066] S300, determining the dynamic on-voltage and dynamic on-current of the power device to be tested in the on-state based on the dynamic on-resistance test circuit;

[0067] The S400 calculates and determines the dynamic on-resistance under different test environments based on the dynamic on-voltage and dynamic on-current measured each time.

[0068] The working principle of the above technical solution is as follows: The solution adopted in this embodiment is to place the power device to be tested in different test environments; in different test environments, the power device to be tested is connected to the dynamic on-resistance test circuit; based on the dynamic on-resistance test circuit, the dynamic on-voltage and dynamic on-current of the power device to be tested in the on-state are determined; based on the dynamic on-voltage and dynamic on-current measured each time, the dynamic on-resistance under different test environments is calculated and determined.

[0069] The parameters involved in the test environment include: temperature and humidity. In specific cases, it may happen that the power device is set in the outdoor low temperature environment. At this temperature, it is also necessary to predict the resistance change of the power device.

[0070] Therefore, this embodiment can test the change of the dynamic on-resistance value of the power device at different switching frequencies, and the measured resistance value has higher accuracy, and the anti-interference ability is further improved.

[0071] Specifically, this embodiment mainly involves five modules. Module ① is the input of the Vds voltage of the power device to be tested, which can adjust the on-resistance of the device under different voltages. Module ② is an inductor, which is connected to the Vds voltage input and adjusts the magnitude of the Ids current of the device through the inductance value. Module ③ is the power device to be tested; Module ④ is the input of the PWM signal, and by inputting the Gate Driver (gate drive) signal at different frequencies, the on-resistance of the device at different frequencies can be tested. Module ⑤ is the voltage clamping circuit when the power device to be tested is conducting.

[0072] The test principle of this embodiment is as follows: Different Vds voltage conditions are input by Module ①, and a double-pulse signal is input by the Gate Driver (gate drive) of Module ④. During the conduction process of the power device to be tested, the Ids current rises through the inductance of ②. The Vds voltage difference is accurately measured through the clamping circuit ⑤, and the change of the dynamic resistance Ron when the power device to be tested is conducting is obtained through the formula Ron = Vds / Ids.

[0073] Please refer to Figures 2 to 4 As shown, the circuit of Module ① is as Figure 2 As shown, the range of the high-voltage direct current required to be input to the power device to be tested can be set, and then it is filtered through the fuse F1, EC1, C1, C2, C3, C4, C5. The filtering magnitude depends on the size of the device.

[0074] Module ④ is the input of the PWM control signal, and the circuit is as Figure 2As shown, the input signal is input through the adapter PWM_IN1. After filtering by R2 and C8, the U1 isolation driver is used. This isolation driver is a dedicated isolation driver to drive the power device under test.

[0075] Figure 3 The circuit for supplying power to the IC uses the U3 isolation power supply to supply power to the U1 isolation driver. Specifically, the output low-voltage direct current powers U1.

[0076] The clamping circuit of Module ⑤ is as Figure 4 shown. The principle of the clamping circuit is as follows:

[0077] 1. The LDO inputs a low DC voltage. When the power device under test is turned off, VD_off = VDD is a high voltage, and D4 is reverse cut-off; when the power device under test is turned on, VDD is a low voltage, D4 conducts, and Vs = Vds(on) + VD4. The voltage Vs can be measured during the conduction process. VD4 is the conduction voltage drop of the diode, which is a fixed value.

[0078] 2. Ids is the current passing through the detection resistor R10 (the current range required for the power device under test can be set), and it can be obtained by testing with an oscilloscope current probe.

[0079] 3. Use the formula: where R ds(on) is the on-resistance value, V ds(on) is the on-voltage, V s is the value that can be measured during the conduction process, VD4 is the conduction voltage drop of the diode, and Ids is the current passing through the detection resistor R10, which is obtained by testing with an oscilloscope current probe. Therefore, the dynamic on-resistance value of the device can be obtained using the above formula.

[0080] 4. Discharge through the resistor R12, and then through the voltage regulator diode D5 and D8, R11, C13 voltage regulator and filtering circuit to further reduce the reverse recovery time of D7 and minimize the capacitance interference, which can shorten the delay time of measuring valid data.

[0081] The beneficial effects of the above technical solutions are as follows: By using the solution provided in this embodiment, signal interference is reduced through isolation drive. The on-voltage drop of the device is measured using a high-precision clamping circuit, and then the change in the dynamic resistance of the device during the conduction process is accurately obtained through the formula. The test results have higher accuracy and stronger anti-interference ability, and are worthy of popularization and application. In addition, this embodiment takes into account the test environment factors, and accurately calculates the dynamic on-resistance of the power device under test in different test environments.

[0082] In another embodiment, the S200 includes:

[0083] S201, Apply a pulse-width modulation signal driven by an isolation driver to the gate of the power device under test to drive the power device under test;

[0084] S202, Connect a clamping circuit between the drain and source of the power device under test. The clamping circuit includes: a diode D4 connected to the drain, a diode D7 connected to the source, and a voltage stabilizing and filtering circuit. The voltage stabilizing and filtering circuit is used to shorten the reverse recovery time of the diode D7 in the clamping circuit;

[0085] S203, When the power device under test is conducting, measure the positive voltage between the anodes of the diodes D4 during the conduction process. Based on the positive voltage and the conduction voltage drop of the diode D4, determine the dynamic conduction voltage of the power device under test;

[0086] S204, Connect an inductive circuit between the drain of the power device under test and the high-voltage input terminal. In the state where the power device under test is conducting, detect the dynamic conduction current passing through the power device under test based on the increase in the current in the circuit when the inductive circuit is connected;

[0087] S205, Determine the dynamic conduction resistance of the power device under test based on the ratio of the dynamic conduction voltage to the dynamic conduction current.

[0088] The working principle of the above technical solution is as follows: The solution adopted in this embodiment is to apply a pulse-width modulation signal driven by an isolation driver to the gate of the power device under test to drive the power device under test; connect a clamping circuit between the drain and source of the power device under test. The clamping circuit includes: a diode D4 connected to the drain, a diode D7 connected to the source, and a voltage stabilizing and filtering circuit. The voltage stabilizing and filtering circuit is used to shorten the reverse recovery time of the diode D7 in the clamping circuit; when the power device under test is conducting, measure the positive voltage between the anodes of the diodes D4 during the conduction process. Based on the positive voltage and the conduction voltage drop of the diode D4, determine the dynamic conduction voltage of the power device under test; connect an inductive circuit between the drain of the power device under test and the high-voltage input terminal. In the state where the power device under test is conducting, detect the dynamic conduction current passing through the power device under test based on the increase in the current in the circuit when the inductive circuit is connected; determine the dynamic conduction resistance of the power device under test based on the ratio of the dynamic conduction voltage to the dynamic conduction current.

[0089] The beneficial effects of the above technical solution are as follows: The solution provided in this embodiment reduces signal interference through isolation drive, measures the device conduction voltage drop using a high-precision clamping circuit, and then accurately obtains the change in the dynamic resistance of the device during the conduction process through a formula. The test results have higher accuracy and stronger anti-interference ability, and are worthy of popularization and application. In addition, this embodiment adds test environment factors, and accurately calculates the dynamic conduction resistance of the power device under test in different test environments.

[0090] In another embodiment, S202 includes:

[0091] S2021, a first resistor is connected in parallel across both ends of the diode D7 for discharging;

[0092] S2022, a series-connected first zener diode and second zener diode are connected in parallel with the diode D7;

[0093] S2023, a series-connected second resistor and first capacitor are connected in parallel with the diode D7;

[0094] S2024, the first resistor, first zener diode, second zener diode, second resistor, and first capacitor form a voltage stabilizing and filtering circuit.

[0095] The working principle of the above technical solution is as follows: The solution adopted in this embodiment is to connect a first resistor in parallel across both ends of the diode D7 for discharging; a series-connected first zener diode and second zener diode are connected in parallel with the diode D7; a series-connected second resistor and first capacitor are connected in parallel with the diode D7; the first resistor, first zener diode, second zener diode, second resistor, and first capacitor form a voltage stabilizing and filtering circuit.

[0096] Specifically, reference can be made to Figure 4 , a resistor R12 is connected in parallel across both ends of the diode D7 for discharging; a series-connected zener diode D5 and zener diode D8 are connected in parallel with the diode D7; a series-connected resistor R11 and capacitor C13 are connected in parallel with the diode D7; the resistor R12, zener diode D5, zener diode D8, resistor R11, and capacitor C13 form a voltage stabilizing and filtering circuit.

[0097] The beneficial effects of the above technical solution are as follows: By adopting the solution provided in this embodiment, discharging is carried out through the resistor R12, and then through the D5, D8 (zener diodes), R11, C13 voltage stabilizing and filtering circuit, the reverse recovery time of D7 is further reduced, the capacitance interference is minimized, and the delay time of measuring valid data can be shortened. The anti-interference performance of this embodiment is improved, and the accuracy of measurement and calculation is improved.

[0098] In another embodiment, after S400, it includes:

[0099] S500, for each test environment, determine the parameters of the test environment; under test environments with the same parameters, perform multiple detections of the dynamic conduction voltage and dynamic conduction current to determine the dynamic conduction resistance, and based on multiple detections, determine the error range of the dynamic conduction resistance under test environments with the same parameters;

[0100] S600, record the parameters of the test environment, the corresponding dynamic on-resistance, and the error range of the dynamic on-resistance in a database, where the database stores records based on different parameters of the test environment;

[0101] S700, construct a dynamic on-resistance prediction model based on the database; detect the actual parameters of the actual environment where the power device is located, retrieve the corresponding dynamic on-resistance and the error range of the dynamic on-resistance from the dynamic on-resistance prediction model based on the actual parameters, predict the actual on-resistance of the power device of the access device based on the dynamic on-resistance and the error range of the dynamic on-resistance, and adjust the parameters of the device matched with the power device based on the predicted value.

[0102] The working principle of the above technical solution is as follows: The solution adopted in this embodiment is to determine the parameters of the test environment for each test environment; under the test environment with the same parameters, perform multiple detections of the dynamic on-voltage and dynamic on-current to determine the dynamic on-resistance. Based on multiple detections, determine the error range of the dynamic on-resistance under the test environment with the same parameters; record the parameters of the test environment, the corresponding dynamic on-resistance, and the error range of the dynamic on-resistance in a database, where the database stores records based on different parameters of the test environment; construct a dynamic on-resistance prediction model based on the database; detect the actual parameters of the actual environment where the power device is located, retrieve the corresponding dynamic on-resistance and the error range of the dynamic on-resistance from the dynamic on-resistance prediction model based on the actual parameters, predict the actual on-resistance of the power device of the access device based on the dynamic on-resistance and the error range of the dynamic on-resistance, and adjust the parameters of the device matched with the power device based on the predicted value.

[0103] The beneficial effect of the above technical solution is: By adopting the solution provided in this embodiment, a dynamic on-resistance prediction model including the error range of the dynamic on-resistance is constructed, so as to realize the prediction of the dynamic on-resistance of the power device in actual measurement in the actual environment, which is convenient for setting the matching of the parameters of the access device in advance by using the prediction of the power device when the power device is connected to certain devices in a specific environment.

[0104] In another embodiment, determining the error range of the dynamic on-resistance in S500 includes:

[0105] S501, under the test environment with the same parameters, after multiple detections, obtain multiple sets of dynamic on-resistances; the value of each dynamic on-resistance corresponds to a frequency input to the power device to be tested;

[0106] S502, perform mean calculation on multiple sets of dynamic on-resistances, and use the mean of multiple sets of dynamic on-resistances as the final dynamic on-resistance under this test environment;

[0107] S503 calculates the differences between multiple sets of dynamic on-resistances and the final dynamic on-resistance, and forms the error range of the dynamic on-resistance with the maximum difference and the minimum difference.

[0108] The S600 includes: the change value of the dynamic on-resistance formed by adjusting the input frequency, forming a change curve based on the change value, and storing the change curve corresponding to the parameters of the corresponding test environment in the database.

[0109] The working principle of the above technical solution is as follows: The solution adopted in this embodiment to determine the error range of the dynamic on-resistance includes: under the test environment with the same parameters, through multiple detections, multiple sets of dynamic on-resistances are obtained; the value of each dynamic on-resistance corresponds to a frequency input to the power device under test; calculating the average value of multiple sets of dynamic on-resistances, and taking the average value of multiple sets of dynamic on-resistances as the final dynamic on-resistance in this test environment; calculating the differences between multiple sets of dynamic on-resistances and the final dynamic on-resistance, and forming the error range of the dynamic on-resistance with the maximum difference and the minimum difference; in addition, the change value of the dynamic on-resistance formed by adjusting the input frequency, forming a change curve based on the change value, and storing the change curve corresponding to the parameters of the corresponding test environment in the database.

[0110] The beneficial effects of the above technical solution are as follows: The solution provided in this embodiment directly determines the final dynamic on-resistance through average value calculation based on the existing measurement data, and at the same time directly calculates the difference between the value calculated according to multiple sets of test data and the final dynamic on-resistance, and the difference result forms the error range. Therefore, in this embodiment, without increasing the number of tests, the error range is obtained by calculating the test data, and the fluctuation range is determined based on the error range.

[0111] In another embodiment, a test system for the dynamic on-resistance of a power device is also provided. Please refer to Figure 5 and this test system includes:

[0112] A test environment setting module for setting different test environments;

[0113] A dynamic on-resistance test module for connecting the power device under test to the dynamic on-resistance test circuit under different test environments;

[0114] A dynamic on-voltage and dynamic on-current test module for determining the dynamic on-voltage and dynamic on-current of the power device under test in the on-state based on the dynamic on-resistance test circuit;

[0115] A dynamic on-resistance calculation module for calculating and determining the dynamic on-resistance under different test environments based on the dynamic on-voltage and dynamic on-current measured each time.

[0116] The working principle of the above technical solution is as follows: The solution adopted in this embodiment is a test environment setting module for setting different test environments; a dynamic on-resistance test module for connecting the power device under test to a dynamic on-resistance test circuit under different test environments; a dynamic on-state voltage and dynamic on-state current test module for determining the dynamic on-state voltage and dynamic on-state current of the power device under test in the on state based on the dynamic on-resistance test circuit; and a dynamic on-resistance calculation module for calculating and determining the dynamic on-resistance under different test environments based on the dynamically measured on-state voltage and on-state current each time.

[0117] Specifically, this embodiment mainly involves five modules. Module ① is the input of the Vds voltage of the power device under test, which can adjust the on-resistance of the device at different voltages. Module ② is an inductor connected to the Vds voltage input, and the magnitude of the inductor is used to adjust the magnitude of the Ids current of the device through the controller. Module ③ is the power device under test. Module ④ is the input of the PWM signal. By inputting Gate Driver signals at different frequencies, the on-resistance of the device at different frequencies can be tested. Module ⑤ is the voltage clamping circuit when the power device under test is conducting.

[0118] The test principle of this embodiment is as follows: Different Vds voltage conditions are input by Module ①, and a double-pulse signal is input by the Gate Driver of Module ④. During the conduction process of the power device under test, the Ids current rises through the inductance of ②. The voltage difference of the Vds voltage is accurately measured through the clamping circuit ⑤, and the change in the dynamic resistance Ron when the power device under test is conducting is obtained through the formula Ron = Vds / Ids.

[0119] Please refer to Figures 2 to 4 As shown, the circuit of Module ① is as Figure 2 shown, and the range of the high-voltage direct current required to be input to the power device under test can be set. Then, it passes through the fuse F1, EC1, C1, C2, C3, C4, C5 for filtering, and the filtering magnitude depends on the size of the device.

[0120] Module ④ is the input of the PWM control signal, and the circuit is as Figure 2 shown. The input signal is input through the adapter PWM_IN1, and after filtering by R2 and C8, a U1 isolation driver is used. This isolation driver is a dedicated isolation driver to drive the power device under test.

[0121] Figure 3 This is the power supply circuit for the IC. A U3 isolation power supply is used to supply power to the U1 isolation driver. Specifically, a low-voltage direct current is output to supply power to U1.

[0122] The clamping circuit of Module ⑤ is as Figure 4 shown, and the principle of the clamping circuit is as follows:

[0123] 1. The LDO has a low DC input voltage. When the power device under test is turned off, VD_off = VDD is a high voltage and D4 is reverse cutoff; when the power device under test is turned on, VDD is a low voltage, D4 is turned on, and Vs = Vds(on) + VD4. The voltage Vs can be measured during the conduction process. VD4 is the conduction voltage drop of the diode, which is a fixed value.

[0124] 2. Ids is the current passing through the detection resistor R10 (the current range required for the power device under test can be set), and it can be obtained by testing with an oscilloscope current probe.

[0125] 3. Using the formula: where R ds(on) is the on-resistance value, V ds(on) is the on-voltage, V s is the value that can be measured during the conduction process, VD4 is the conduction voltage drop of the diode, and Ids is the current passing through the detection resistor R10, which is obtained by testing with an oscilloscope current probe. Therefore, the dynamic on-resistance value of the device can be obtained using the above formula.

[0126] 4. Discharge through the resistor R12, and then through the voltage stabilizing and filtering circuit of the zener diode D5, D8, R11, and C13 to further reduce the reverse recovery time of D7 and minimize the capacitance interference, which can shorten the delay time of measuring valid data.

[0127] The beneficial effects of the above technical solutions are as follows: The scheme provided in this embodiment reduces signal interference through isolation drive, measures the conduction voltage drop of the device using a high-precision clamping circuit, and then accurately obtains the change in the dynamic resistance of the device during the conduction process through the formula. The test results have higher accuracy and stronger anti-interference ability, and are worthy of popularization and application. In addition, this embodiment adds test environment factors to accurately calculate the dynamic on-resistance of the power device under test in different test environments.

[0128] In another embodiment, the dynamic on-resistance test module includes:

[0129] A clamping circuit for measuring the dynamic on-voltage of the power device under test in the on state. The clamping circuit includes a voltage stabilizing and filtering circuit for shortening the reverse recovery time of the diode D7 in the clamping circuit; the clamping circuit is connected between the drain and source of the power device under test, with a diode D4 connected to the drain and a diode D7 connected to the source; when the power device under test is turned on, measure the positive voltage between the diodes D4 during the conduction process, and based on the positive voltage and the conduction voltage drop of the diode D4, determine the dynamic on-voltage of the power device under test.

[0130] The high-voltage input circuit is for the input of the Vds voltage of the power device under test, setting the voltage range required for the power device under test; adjusting the dynamic on-resistance of the power device under test at different voltages; the dynamic on-resistance refers to the change in the on-resistance of the power device under test at different frequencies;

[0131] Inductor circuit: Connect a current-limiting resistor at the output end of the high-voltage input circuit, and connect an inductor circuit between the current-limiting resistor and the drain of the power device under test. The inductor circuit includes a diode and an inductor in a parallel relationship; during the conduction process of the power device under test, the Ids current rises through the inductance of the inductor circuit;

[0132] Control signal input and drive circuit: After the pulse-width modulated double-pulse signal is filtered, a dedicated isolation driver is used to drive the gate of the power device under test; the isolation driver uses a dedicated isolation driver; and an isolated power supply is used to supply power to the isolation driver chip, and the output of the isolated power supply is low-voltage direct current;

[0133] The oscilloscope current probe measures the dynamic on-current passing through the power device under test, and determines the dynamic on-resistance based on the dynamic on-voltage and the dynamic on-current.

[0134] The beneficial effects of the above technical solutions are as follows: By using the solution provided in this embodiment, signal interference is reduced through isolation drive, the device conduction voltage drop is measured using a high-precision clamping circuit, and then the change in the device dynamic resistance during the conduction process is accurately obtained through a formula. The test results have higher accuracy and stronger anti-interference ability, and are worthy of popularization and application. In addition, this embodiment adds test environmental factors, and accurately calculates the dynamic on-resistance of the power device under test in different test environments.

[0135] In another embodiment, the clamping circuit includes:

[0136] LDO inputs low-voltage direct current. When the power device under test is turned off, VD_off = VDD is high voltage, and diode D4 is reverse cut-off; when the power device under test is turned on, VDD is low voltage, diode D4 conducts, and Vs = Vds(on) + VD4. The Vs voltage can be measured during the conduction process. VD4 is the conduction voltage drop of the diode, which is a fixed value; based on the measured Vs and VD4, the dynamic on-voltage Vds(on) is determined;

[0137] The oscilloscope current probe measures the dynamic on-current passing through the power device under test. The dynamic on-current Ids is the current passing through the detection resistor R10; set the current range required for the power device under test;

[0138] Discharge through resistor R12, and then through the voltage regulator diodes D5 and D8, and the voltage regulator and filter circuit of R11 and C13 to reduce the reverse recovery time of D7;

[0139] Based on the ratio of the dynamic on - voltage and the dynamic on - current, the dynamic on - resistance is calculated.

[0140] The working principle of the above - mentioned technical solution is as follows: The solution adopted in this embodiment can refer to Figure 4 , a resistor R12 is connected in parallel across both ends of the diode D7 for discharging; the series - connected zener diodes D5 and D8 are connected in parallel with the diode D7; the series - connected resistor R11 and capacitor C13 are connected in parallel with the diode D7; the resistor R12, zener diodes D5, D8, resistor R11, and capacitor C13 form a voltage - stabilizing and filtering circuit.

[0141] The beneficial effects of the above - mentioned technical solution are as follows: By adopting the solution provided in this embodiment, discharging is carried out through the resistor R12, and then through the voltage - stabilizing and filtering circuit of D5, D8 (zener diodes), R11, and C13, the reverse recovery time of D7 is further reduced, the capacitance interference is minimized to the greatest extent, and the delay time of measuring valid data can be shortened. The anti - interference ability of this embodiment is improved, and the accuracy of measurement and calculation is improved.

[0142] In another embodiment, it further includes:

[0143] A dynamic on - resistance error range determination module, which determines the parameters of the test environment for each test environment; under the test environment with the same parameters, perform multiple detections of the dynamic on - voltage and the dynamic on - current to determine the dynamic on - resistance, and based on the multiple detections, determine the error range of the dynamic on - resistance under the test environment with the same parameters;

[0144] A database storage module, which is used to record the parameters of the test environment, the corresponding dynamic on - resistance, and the error range of the dynamic on - resistance in the database. The database is recorded and stored according to different parameters of the test environment;

[0145] A prediction module, which is used to construct a dynamic on - resistance prediction model based on the database; detect the actual parameters of the actual environment where the power device is located, retrieve and query the corresponding dynamic on - resistance and the error range of the dynamic on - resistance from the dynamic on - resistance prediction model based on the actual parameters, predict the actual on - resistance of the power device of the connected device based on the dynamic on - resistance and the error range of the dynamic on - resistance, and adjust the parameters of the device matching the power device based on the predicted value.

[0146] The beneficial effects of the above technical solution are as follows: By adopting the solution provided in this embodiment, a dynamic on-resistance prediction model including the error range of the dynamic on-resistance is constructed, so as to realize the prediction of the dynamic on-resistance of the power device in actual measurement in the actual environment, so that when the power device is connected to certain devices in a specific environment, the parameters of the connected devices can be set in advance by using the prediction of the power device.

[0147] It should be noted that fitting operations can be performed on all predicted values and actual measured values. Through the fitting operation, the error between the predicted value and the actual measured value can be reduced.

[0148] The specific implementation method is as follows:

[0149] Set the strong learner through the following formula:

[0150]

[0151] where A M (t) is the final predicted value of the strong learner, A 0 (t) is the predicted value of the first weak learner, A i-1 (t) is the predicted value of the i-1th learner, arg is the argument, and the variable taking the minimum value, B j is the best fitting value of the jth leaf node, j = 1, 2, 3... N, N is the total number of leaf nodes, i = 1, 2, 3... M, M is the number of classification regression trees, and I is the weighting coefficient of each leaf node.

[0152] Based on the learning and training of the strong learner, the fitting error and deviation are reduced, the error between the predicted value and the actual measured value is ensured to be reduced, and the accuracy of the predicted value is ensured.

[0153] In another embodiment, the error range determination module of the dynamic on-resistance includes:

[0154] A plurality of groups of dynamic on-resistance acquisition sub-modules, which are used to obtain a plurality of groups of dynamic on-resistances through multiple detections in a test environment with the same parameters;

[0155] The final dynamic on-resistance calculation sub-module is used to calculate the mean value of the plurality of groups of dynamic on-resistances, and take the mean value of the plurality of groups of dynamic on-resistances as the final dynamic on-resistance in this test environment;

[0156] The error range calculation sub-module is used to calculate the difference between the plurality of groups of dynamic on-resistances and the final dynamic on-resistance, and form the error range of the dynamic on-resistance with the maximum difference and the minimum difference.

[0157] The beneficial effects of the above technical solution are as follows: By adopting the solution provided in this embodiment, based on the existing measurement data, the final dynamic on-resistance is directly determined through mean calculation, and at the same time, the value calculated from multiple groups of test data is directly subtracted from the final dynamic on-resistance, and the difference result forms an error range. Therefore, in this embodiment, without increasing the number of tests, the error range is obtained by calculating the test data, and the fluctuation range is determined based on the error range.

[0158] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention is also intended to include these changes and modifications.

Claims

1. A test method for the dynamic on-resistance of a power device, characterized in that, it includes: S100, setting the power device to be tested in different test environments; S200, connecting the power device to be tested to a dynamic on-resistance test circuit under different test environments; S300, determining the dynamic on-voltage and dynamic on-current of the power device to be tested in the on-state based on the dynamic on-resistance test circuit; S400, calculating and determining the dynamic on-resistance under different test environments based on the dynamically measured on-voltage and on-current; The S200 includes: S201, connecting a pulse width modulation signal driven by an isolation driver to the gate of the power device to be tested to drive the power device to be tested; S202, connecting a clamping circuit between the drain and source of the power device to be tested, the clamping circuit including: a diode D4 connected to the drain, a diode D7 connected to the source, and a voltage stabilizing and filtering circuit, the voltage stabilizing and filtering circuit being used to shorten the reverse recovery time of the diode D7 in the clamping circuit; S203, when the power device to be tested is turned on, measuring the positive voltage between the anodes of the diodes D4 during the conduction process, and determining the dynamic on-voltage of the power device to be tested based on the positive voltage and the conduction voltage drop of the diode D4; S204, connecting an inductive circuit between the drain of the power device to be tested and the high-voltage input terminal, and detecting the dynamic on-current passing through the power device to be tested based on the increase in the current in the inductive circuit connected to the circuit when the power device to be tested is in the on-state; S205, determining the dynamic on-resistance of the power device to be tested based on the ratio of the dynamic on-voltage to the dynamic on-current.

2. The test method for the dynamic on-resistance of a power device according to claim 1, characterized in that, The S202 includes: S2021, connecting a first resistor in parallel across the two ends of the diode D7 for discharging; S2022, connecting a series of a first zener diode and a second zener diode in parallel with the diode D7; S2023, connecting a series of a second resistor and a first capacitor in parallel with the diode D7; S2024, forming a voltage stabilizing and filtering circuit with the first resistor, the first zener diode, the second zener diode, the second resistor, and the first capacitor.

3. The test method for the dynamic on-resistance of a power device according to claim 1, characterized in that, After the S400 includes: S500, for each test environment, determining the parameters of the test environment; under test environments with the same parameters, performing multiple detections of the dynamic on-voltage and dynamic on-current to determine the dynamic on-resistance, and based on the multiple detections, determining the error range of the dynamic on-resistance under test environments with the same parameters; S600, recording the parameters of the test environment, the corresponding dynamic on-resistance, and the error range of the dynamic on-resistance in a database, the database being recorded and stored according to different parameters of the test environment; S700. Build a dynamic on-resistance prediction model based on the database; detect the actual parameters of the actual environment where the power device is located, retrieve the corresponding dynamic on-resistance and the error range of the dynamic on-resistance from the dynamic on-resistance prediction model based on the actual parameters, predict the actual on-resistance of the power device of the access device based on the dynamic on-resistance and the error range of the dynamic on-resistance, and adjust the parameters of the device matching the power device based on the predicted value.

4. The method for testing the dynamic on-resistance of a power device according to claim 3, wherein, the determination of the error range of the dynamic on-resistance in S500 includes: S501. Under a test environment with the same parameters, after multiple detections, obtain multiple sets of dynamic on-resistances; the value of each dynamic on-resistance corresponds to a frequency input to the power device to be tested; S502. Calculate the average value of the multiple sets of dynamic on-resistances, and use the average value of the multiple sets of dynamic on-resistances as the final dynamic on-resistance in this test environment; S503. Calculate the difference between the multiple sets of dynamic on-resistances and the final dynamic on-resistance, and form the error range of the dynamic on-resistance with the maximum difference and the minimum difference; S600 includes: forming a change value of the dynamic on-resistance by adjusting the input frequency, forming a change curve based on the change value, and storing the change curve corresponding to the parameters of the corresponding test environment in the database.

5. A test system for the dynamic on-resistance of a power device, wherein, it includes: a test environment setting module for setting different test environments; a dynamic on-resistance test module for connecting the power device to be tested to a dynamic on-resistance test circuit under different test environments; a dynamic on-state voltage and dynamic on-state current test module for determining the dynamic on-state voltage and dynamic on-state current of the power device to be tested in the on-state based on the dynamic on-resistance test circuit; a dynamic on-resistance calculation module for calculating and determining the dynamic on-resistance under different test environments based on the dynamically measured on-state voltage and on-state current each time; the dynamic on-resistance test module includes: a clamping circuit for measuring the dynamic on-state voltage of the power device to be tested in the on-state. The clamping circuit includes a voltage stabilizing and filtering circuit for shortening the reverse recovery time of diode D7 in the clamping circuit; the clamping circuit is connected between the drain and source of the power device to be tested, diode D4 is connected to the drain, and diode D7 is connected to the source; when the power device to be tested is conducting, measure the positive voltage between the anodes of diode D4 during the conduction process, and determine the dynamic on-state voltage of the power device to be tested based on the positive voltage and the conduction voltage drop of diode D4; a high-voltage input circuit for inputting the Vds voltage of the power device to be tested and setting the required voltage range of the power device to be tested; adjusting the dynamic on-resistance of the power device to be tested at different voltages; the dynamic on-resistance refers to the change in the on-resistance of the power device to be tested at different frequencies. Inductive circuit, a current-limiting resistor is connected to the output end of the high-voltage input circuit, and an inductive circuit is connected between the current-limiting resistor and the drain of the power device to be tested. The inductive circuit includes a diode and an inductor in a parallel relationship; during the conduction process of the power device to be tested, the Ids current rises through the inductance of the inductive circuit; Control signal input and drive circuit, after the pulse-width modulated double-pulse signal is filtered, an isolation driver is used to drive the gate of the power device to be tested; the isolation driver uses a set dedicated isolation driver; and an isolated power supply is used to supply power to the isolation driver chip, and the output voltage of the isolated power supply is low-voltage direct current; the oscilloscope current probe tests to obtain the dynamic conduction current passing through the power device to be tested, and the dynamic on-resistance is determined based on the dynamic on-voltage and the dynamic on-current.

6. The test system for the dynamic on-resistance of a power device according to claim 5, characterized in that the clamping circuit includes: an LDO inputs low-voltage direct current. When the power device to be tested is turned off, VD_off = VDD is high voltage, and the diode D4 is reverse cut-off; when the power device to be tested is turned on, VDD is low voltage, the diode D4 is turned on, and Vs = Vds(on) + VD4. During the conduction process, the Vs voltage can be measured. VD4 is the conduction voltage drop of the diode, which is a fixed value; based on the measured Vs and VD4, the dynamic on-voltage Vds(on) is determined; the oscilloscope current probe tests to obtain the dynamic conduction current passing through the power device to be tested, and the dynamic conduction current Ids is the current passing through the detection resistor R10; and the Ids current range required for the power device to be tested is set; discharging through the first resistor R12, and then through the voltage-regulating diodes: the first voltage-regulating diode D5 and the second voltage-regulating diode D8, and the second resistor R11, the first capacitor C13 voltage-regulating and filtering circuit to reduce the reverse recovery time of D7; Based on the ratio of the dynamic on-voltage and the dynamic on-current, the dynamic on-resistance is calculated.

7. The test system for the dynamic on-resistance of a power device according to claim 5, characterized in that it further includes: a dynamic on-resistance error range determination module, which determines the parameters of the test environment for each test environment; Under the test environment with the same parameters, perform multiple detections of the dynamic on-voltage and the dynamic on-current to determine the dynamic on-resistance, and based on the multiple detections, determine the error range of the dynamic on-resistance under the test environment with the same parameters; a database storage module, which is used to record the parameters of the test environment, the corresponding dynamic on-resistance, and the error range of the dynamic on-resistance in the database. The database is recorded and stored according to different parameters of the test environment. A prediction module, configured to build a dynamic on-resistance prediction model based on the database; detect actual parameters of the actual environment where the power device is located, retrieve a corresponding dynamic on-resistance and an error range of the dynamic on-resistance from the dynamic on-resistance prediction model based on the actual parameters, predict the actual on-resistance of the power device of the access device based on the dynamic on-resistance and the error range of the dynamic on-resistance, and adjust parameters of the device matched with the power device based on the predicted value.

8. The test system for the dynamic on-resistance of a power device according to claim 7, wherein, the error range determination module of the dynamic on-resistance includes: a plurality of groups of dynamic on-resistance acquisition sub-modules, configured to obtain a plurality of groups of dynamic on-resistances through multiple detections in a test environment with the same parameters; a final dynamic on-resistance calculation sub-module, configured to calculate the average value of the plurality of groups of dynamic on-resistances and use the average value of the plurality of groups of dynamic on-resistances as the final dynamic on-resistance in this test environment; an error range calculation sub-module, configured to calculate the difference between the plurality of groups of dynamic on-resistances and the final dynamic on-resistance, and form an error range of the dynamic on-resistance with the maximum difference and the minimum difference.

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