An optical switch array driving control system

Abstract

The application discloses an optical switch array driving control system in the field of optical switches, and relates to the technical field of optical switch array driving control systems.The optical switch array comprises a plurality of optical switch units, and the system comprises an upper computer, a control circuit, a digital-to-analog conversion circuit array, a buffer driving circuit array and a high-speed analog switch array.The upper computer is connected with the control circuit, the output end of the control circuit is connected with the digital-to-analog conversion circuit array, and the digital-to-analog conversion circuit array, the buffer driving circuit array, the high-speed analog switch array and the optical switch array are sequentially connected.The application can realize the rapid control of thousands of optical switch units, the rising edge and the falling edge of the output control signal are both not greater than 2ns, the technical problem that the optical switch unit is fast and the control circuit is slow is solved, each control channel is independently controllable, and the voltage regulation precision can reach 0.01V.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of optical switch, and particularly relates to an optical switch array driving control system. BACKGROUND

[0002] With the rapid development of the Internet, technologies such as big data, cloud computing, the Internet of Things, quantum communication and artificial intelligence are constantly penetrating, crossing and fusing, the transmission volume of data is rapidly increasing, and the transmission of massive data often involves the selection of transmission paths and the switching of routes. Traditional electronic switching technology has the disadvantages of small data capacity, long switching delay, high power consumption and large size. The optical interconnection technology based on optical switch directly completes the exchange of information among multiple optical channels in the optical domain, and has the advantages of high speed, wide bandwidth, transparency, low power consumption and potential low cost.

[0003] On the one hand, the optical switch control and driving circuit is an important factor affecting the performance of the optical switch. On the other hand, the transmission of massive data requires the optical switch to have a large number of ports, and a large-scale optical switch array generally has thousands of optical switch units, each of which has an electrical interface and needs independent control of high-speed optical switches to realize flexible selection and switching of data. Therefore, it is an urgent technical problem to realize rapid control of thousands of optical switches. SUMMARY

[0004] The present application aims to provide an optical switch array driving control system to solve the problems in the background art.

[0005] To achieve the above object, the present application provides the following technical scheme:

[0006] An optical switch array driving control system, the optical switch array comprising a plurality of optical switch units, the system comprising a host computer, a control circuit, a digital-to-analog conversion circuit array comprising a plurality of digital-to-analog conversion circuits, a buffer driving circuit array comprising a plurality of buffer driving circuits, and a high-speed analog switch array comprising a plurality of high-speed analog switches; the host computer is connected to the control circuit, the output end of the control circuit is connected to the digital-to-analog conversion circuit array, the digital-to-analog conversion circuits in the digital-to-analog conversion circuit array are connected to the buffer driving circuits of the buffer driving circuit array one by one, the output ends of every two buffer driving circuits are connected to the input end of one high-speed analog switch, and the output end of the high-speed analog switch is connected to the optical switch unit one by one.

[0007] In some embodiments, the optical switch array, the digital-to-analog conversion circuit array, the buffer driving circuit array, and the high-speed analog switch array are arranged on a circuit board, the optical switch array is arranged in the center of the circuit board, the control circuit, the digital-to-analog conversion circuit array, the buffer driving circuit array, and the high-speed analog switch array are arranged in layers from the outside to the inside, and the optical switch array is arranged in the center of the circuit board and electrically connected to the high-speed analog switch array through the electrical interface area arranged on both sides of the optical switch array.

[0008] In some embodiments, the host computer is configured to issue external instructions, and the control circuit is connected to the host computer through the interface conversion circuit.

[0009] In some embodiments, the interface conversion circuit is configured as an RS232 interface circuit or an RS422 interface circuit.

[0010] In some embodiments, the model of the high-speed analog switch is SN74LVC1G3157DTBR.

[0011] Beneficial effects: The application can realize the rapid control of thousands of optical switch units, the rising edge and the falling edge of the output control signal are not greater than 2ns, and the technical problem of the fast speed of the optical switch unit and the slow speed of the control circuit is solved, and each control channel is independently controllable, the voltage regulation accuracy can reach 0.01V, the application adopts a super large scale packaging chip and a circuit control technology, and has important significance and practical value for the realization of large capacity, low delay transmission of massive data and low power consumption and small size of optical switching equipment. BRIEF DESCRIPTION OF DRAWINGS

[0012] Figure 1 is a structural block diagram of the application;

[0013] Figure 2 is a circuit layout diagram of the application. DETAILED DESCRIPTION

[0014] The technical solutions in the embodiments of the application will be clearly and completely described below with reference to the drawings in the embodiments of the application. Obviously, the described embodiments are only part of the embodiments of the application, rather than all the embodiments of the application. Based on the embodiments in the application, all other embodiments obtained by those skilled in the art without creative labor fall within the protection scope of the application.

[0015] Reference is made to Figure 1The application relates to an optical switch array driving control system, which comprises a host computer, a control circuit, a digital-analog conversion circuit array 4 composed of a plurality of digital-analog conversion circuits, a buffer driving circuit array 5 composed of a plurality of buffer driving circuits and a high-speed analog switch array 6 composed of a plurality of high-speed analog switches. The number of the high-speed analog switches is the same as that of the optical switch units, and the number of the digital-analog conversion circuits and the buffer driving circuits is twice that of the optical switch units.

[0016] The large-scale optical switch array 7 generally has thousands of optical switch units, so that the digital-analog conversion circuit array 4, the buffer driving circuit array 5 and the high-speed analog switch array 6 respectively contain at least thousands of digital-analog conversion circuits, buffer driving circuits and high-speed analog switches, and the circuits can realize signal transmission of thousands of channels and have the advantage of large capacity.

[0017] Since the thousands of channel unit circuits need to work independently and require low-delay signal transmission, the whole control circuit system cannot be too large and the interconnection transmission line cannot be too long, so that the components are required to be arranged compactly and the wiring density is required to be very high. Generally, the signal conductors close to each other have mutual inductance and capacitance, which can cause coupling noise or crosstalk. In view of the technical problem of anti-interference among large-scale channels, the circuit board is arranged as shown in the application. Figure 2 Specifically, the optical switch array, the digital-analog conversion circuit array, the buffer driving circuit array and the high-speed analog switch array are arranged on the circuit board, the optical switch array is arranged in the center of the circuit board, the control circuit, the digital-analog conversion circuit array, the buffer driving circuit array and the high-speed analog switch array are arranged layer by layer from the outside to the inside, and the optical switch array is electrically connected with the high-speed analog switch array through the electrical interface areas arranged on both sides of the optical switch array. The layout can ensure the realization of the whole circuit function, make the lines affecting the switch signal as short as possible, thereby accelerating the signal transmission speed and realizing the rapid jump of the rising edge / falling edge of the signal.

[0018] In addition, on the basis of large-scale system-in-a-package circuit simulation design, the high-speed signal circuit is designed by adopting a differential transmission line and through high-speed signal impedance matching design, and the high-speed signal circuit can be designed through impedance matching simulation software. The crosstalk between the transmission lines can be solved by separately arranging the digital circuit and the analog circuit, separately arranging the digital power supply and the analog power supply and increasing the ground layer. The crosstalk and noise interference can be further reduced by capacitors and inductors for strengthening filtering, so as to ensure that the whole control circuit system can work reliably and effectively. Since the signal impedance matching and the method for reducing transmission line interference are disclosed in the prior art, they will not be described in detail here.

[0019] In view of the problem of data selection and switching not being timely in a large optical switching array, the host computer in the application is connected to the control circuit through an interface conversion circuit 1, which is configured as an RS232 interface circuit or an RS422 interface circuit. The output end of the control circuit is connected to a digital-to-analog conversion circuit array 4, the output end of each digital-to-analog conversion circuit is connected to the input end of a buffer driving circuit one by one, the output end of each two buffer driving circuits is commonly connected to the input end of a high-speed analog switch, and the output end of each high-speed analog switch is connected to a corresponding optical switch unit.

[0020] In some embodiments, the control circuit includes an MCU 2 and an FPGA 3, wherein the MCU 2 can be an STM32F103RCT6 model, and the FPGA 3 can be an EP4CE40F29C6N model. In other embodiments, other models capable of achieving the same function can also be selected.

[0021] In operation, the host computer interface conversion circuit 1 sends a control instruction for each optical switch unit to the MCU 2, the MCU 2 receives the instruction, analyzes and sends it to the FPGA 3. Specifically, one optical switch unit corresponds to the number of channels of four FPGAs, and the FPGA 3 sends the control instruction to the corresponding digital-to-analog conversion circuit according to the received control instruction, and controls the output of the digital-to-analog conversion circuit array to be a high or low drive level.

[0022] When the FPGA 3 sends the control instruction, since the output amplitude of each digital-to-analog conversion circuit is determined by the value of the amplitude register, the FPGA 3 writes the value of the amplitude register into the corresponding register of the digital-to-analog conversion circuit through the SPI port, so that the high and low levels can be independently adjusted. Generally, the high level range is configured as 2-3V, and the low level range is configured as 0-1V, and the specific value can be determined by the on-off level of the optical switch unit.

[0023] Suppose that the digital-to-analog conversion circuit one is connected to the buffer driving circuit one, and the digital-to-analog conversion circuit two is connected to the buffer driving circuit two. If the MCU reads the value of the corresponding register in the FPGA 3 and knows that the current optical switch unit is at a low level, and requires the optical switch unit to switch to a high level, the digital-to-analog conversion circuit one outputs a high-level analog drive signal to the connected buffer driving circuit one, and then the switching high-speed analog switch control signal can be realized. Conversely, if it is known that the current optical switch unit is at a high level and requires the optical switch unit to switch to a low level, the digital-to-analog conversion circuit two outputs a low-level analog drive signal to the buffer driving circuit two, and then the high-speed analog switch control signal can be realized by flipping. The buffer driving circuit is used to enhance the driving ability of the signal, and generally has a built-in amplifier. The corresponding model can be selected in the prior art, and will not be described here.

[0024] The high / low analog driving signal amplified by the buffer driving circuit one or two is output to the commonly connected high-speed analog switch, the model of the high-speed analog switch can be configured as SN74LVC1G3157DTBR, and the switching speed of 0.5ns can be realized, so that the use requirement of the optical switch unit is met. In other embodiments, other models that can meet the use condition can also be selected, and are not limited. The control pin of the high-speed analog switch outputs the high-speed 01 flip signal after the high / low analog driving signal output by the buffer driving circuit one or two, so that the rising edge and the falling edge of the output control signal are not greater than 2ns, and the high-speed control of the optical switch unit is also realized.

[0025] In the application, the buffer driving circuit array 5 is arranged at the input side of the high-speed analog switch, so that the speed requirement of the operational amplifier in the circuit is greatly reduced, and the driving capacity of the operational amplifier can be improved. The speed requirement of the operational amplifier in the circuit is greatly reduced, and the driving capacity of the operational amplifier can be improved.

[0026] The high-precision voltage regulation can also be realized by setting the number of bits of the digital-to-analog conversion circuit. For example, if 5V voltage is required to be output, the voltage regulation precision requirement is 10mV, 5V / 10mV=500, and for a 10-bit DAC, 2^10=1024, so that the amplitude regulation precision requirement is met.

[0027] The optical switch array driving control system of the application can realize large capacity, low power consumption and multi-channel output, and can also realize high-density integration and small size by using multi-layer height boards and dense wiring. The high and low level adjustment range of each channel output is wide, and each channel output can be independently controlled, the rising edge and the falling edge of the output control signal are not greater than 2ns, and the technical problem that the speed of the optical switch is fast and the speed of the control circuit is slow can be solved.

[0028] Although the present specification is described in terms of embodiments, not every embodiment contains only one independent technical solution, and the description manner of the specification is only for the sake of clarity, and those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can be combined to form other embodiments that can be understood by those skilled in the art.

[0029] Therefore, the above description is only the preferred embodiment of the application, and is not used to limit the implementation scope of the application; that is, various equivalent transformations made within the scope of the claims of the application are all within the protection scope of the claims of the application.

Claims

1. An optical switch array drive control system, the optical switch array comprising a plurality of optical switch cells, characterized by, The system comprises a host computer, a control circuit, a digital-to-analog conversion circuit array composed of a plurality of digital-to-analog conversion circuits, a buffer driving circuit array composed of a plurality of buffer driving circuits, and a high-speed analog switch array composed of a plurality of high-speed analog switches. The host computer is connected to the control circuit, the output end of the control circuit is connected to the digital-to-analog conversion circuit array, the digital-to-analog conversion circuits in the digital-to-analog conversion circuit array are connected to the buffer driving circuits in the buffer driving circuit array one by one, the output ends of every two buffer driving circuits are connected to the input end of one high-speed analog switch, and the output end of the high-speed analog switch is connected to the optical switch unit one by one. The optical switch array, the digital-to-analog conversion circuit array, the buffer driving circuit array, and the high-speed analog switch array are arranged on a circuit board, the optical switch array is arranged in the center of the circuit board, the control circuit, the digital-to-analog conversion circuit array, the buffer driving circuit array, and the high-speed analog switch array are arranged layer by layer from the outside to the inside, the optical switch array is arranged in the center of the circuit board, and the optical switch array is electrically connected to the high-speed analog switch array through the electrical interface areas arranged on both sides of the optical switch array. If the current optical switch unit is at a low level, the digital-to-analog conversion circuit outputs a high-level analog driving signal to the connected buffer driving circuit, and then switches the high-speed analog switch control signal to switch the optical switch unit to a high level; if the current optical switch unit is at a high level, the digital-to-analog conversion circuit outputs a low-level analog driving signal to the connected buffer driving circuit, and then flips the high-speed analog switch control signal to switch the optical switch unit to a low level. After the two buffer driving circuits amplify the high-level analog driving signal or the low-level analog driving signal, the amplified signal is output to the connected high-speed analog switch, and the control pin of the high-speed analog switch outputs a high-speed 01 flip signal after receiving the high-level analog driving signal or the low-level analog driving signal, so that the rising edge and the falling edge of the output control signal are not greater than 2 ns.

2. The optical switch array driving control system according to claim 1, wherein The host computer is used to issue external instructions and is connected to the control circuit through an interface conversion circuit.

3. The optical switch array drive control system of claim 2, wherein, The interface conversion circuit is configured as an RS232 interface circuit or an RS422 interface circuit.

4. The optical switch array drive control system of claim 1, wherein, The model of the high-speed analog switch is SN74LVC1G3157DTBR.

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