Method of data organization using persistent memory and memory storage system

Abstract

A method of data grooming using persistent memory and a memory storage system. The method includes enabling a persistent memory in a host system, storing a management table maintained by a memory device into the persistent memory in a state that a connection between the host system and the memory device is established, and in a process that the memory device performs a data grooming operation, the memory device updates the management table in the persistent memory via the connection and stores target data from at least one first type of physical unit to at least one second type of physical unit according to an update result.

Description

TECHNICAL FIELD

[0001] The present application relates to a memory management technique, and particularly relates to a data grooming method using persistent memory and a memory storage system. BACKGROUND

[0002] With the volume of memory storage devices becoming smaller and smaller and the cost considerations of manufacturers, reducing the capacity and volume of dynamic random access memory (DRAM) in memory storage devices has gradually become one of the design choices. Generally speaking, in a memory storage device lacking DRAM (DRAM-less), the lack of DRAM in the memory storage device itself can be made up by sharing memory with a host system (also known as a host system memory buffer (HMB)). However, based on the current standard specifications, the memory provided by the host system is volatile memory (such as DRAM), which will cause data loss when unexpected power failure occurs. Therefore, the memory storage device generally does not store important data in the HMB to avoid the loss of important data that cannot be remedied due to sudden power failure. Restricted by this, when the DRAM-less memory storage device performs internal data grooming (such as data migration), the memory storage device can only use its internal buffer with smaller capacity (the capacity may be only 2-8 MB) to perform data grooming, resulting in a significant decrease in running efficiency. SUMMARY

[0003] The present application provides a data grooming method using persistent memory and a memory storage system, which can use the persistent memory of the host system side to improve the efficiency of the memory storage device in performing internal data grooming.

[0004] Embodiments of the present application provide a data grooming method using persistent memory, which includes: enabling persistent memory in a host system; storing a management table maintained by a memory device into the persistent memory in a state where a connection between the host system and the memory device has been established; and in the process of the memory device performing a data grooming operation, the memory device updates the management table in the persistent memory via the connection, and according to the update result, copies target data from at least one first type of physical unit in the memory device to at least one second type of physical unit in the memory device for storage.

[0005] Embodiments of the present application provide a memory storage system using persistent memory, which includes a host system and a memory device. The host system is configured with persistent memory. The memory device is coupled to the host system. The host system is configured to enable the persistent memory. In a state that a connection between the host system and the memory device is established, a memory controller of the memory device stores a management table maintained by the memory device into the persistent memory. In a process that the memory device performs a data grooming operation, the memory controller updates the management table in the persistent memory via the connection and stores target data from at least one first type of physical unit in the memory device to at least one second type of physical unit in the memory device according to an update result.

[0006] Based on the above, the host system can enable the persistent memory inside. In a state that a connection between the host system and the memory device is established, a management table maintained by the memory device can be stored into the persistent memory. Then, in a process that the memory device performs a data grooming operation, the memory device can update the management table in the persistent memory via the connection and store target data from at least one first type of physical unit in the memory device to at least one second type of physical unit according to an update result. In this way, the efficiency of the memory storage device performing internal data grooming can be effectively improved. BRIEF DESCRIPTION OF DRAWINGS

[0007] Figure 1 is a schematic diagram of a memory storage system according to an embodiment of the present application.

[0008] Figure 2 is a flowchart of a data grooming method using persistent memory according to an embodiment of the present application.

[0009] wherein:

[0010] 10: memory storage system;

[0011] 11: host system;

[0012] 111: processor;

[0013] 112: persistent memory;

[0014] 12: memory device;

[0015] 121: memory controller;

[0016] 122: non-volatile memory module;

[0017] 1221, 1222: storage area;

[0018] S201-S203: Steps. DETAILED DESCRIPTION

[0019] Figure 1 is a schematic diagram of a memory storage system according to an embodiment of the present application. Referring to Figure 1 , the memory storage system 10 includes a host system 11 and a memory device 12. The interface specification between the host system 11 and the memory device 12 complies with the NVM Express (NVMe) interface standard. The memory storage system 10 is also referred to as an NVMe storage system.

[0020] The host system 11 is coupled to the memory device 12 and can store data into or read data from the memory device 12. For example, the host system 11 is any system that can substantially cooperate with the memory device 12 to store data, such as a computer system, a digital camera, a camcorder, a communication device, an audio player, a video player, or a tablet computer, and the memory device 12 can be any type of non-volatile memory storage device, such as a flash memory disk, a memory card, a solid state drive (SSD), a secure digital (SD) card, a compact flash (CF) card, or an embedded storage device.

[0021] The host system 11 includes a processor 111 and a persistent memory 112. The processor 111 is coupled to the persistent memory 112. The processor 111 can run an operating system (such as Windows or iOS) and can be responsible for part or all of the operation of the host system 11. For example, the processor 111 can include a central processing unit (CPU), or other programmable general purpose or special purpose microprocessors, digital signal processors (DSPs), programmable controllers, application specific integrated circuits (ASICs), programmable logic devices (PLDs), or other similar devices, or a combination of any of these devices.

[0022] The persistent memory 112 is configured in the host system 11 and is used to store data. The persistent memory 112 can be positioned in a storage medium at various levels between a conventional DRAM and a solid state disk (SSD). That is, the data access speed of the persistent memory 112 is slightly slower than that of the DRAM, but the storage capacity of the persistent memory 112 can be close to that of a general SSD. For example, assuming that the storage capacity of a conventional DRAM is between 4 GB and 32 GB, the storage capacity of the persistent memory 112 can be between 128 GB and 512 GB or more. In addition, the data access speed of the persistent memory 112 can be, for example, more than 6 times that of a conventional SSD.

[0023] The persistent memory 112 can be selectively operated in a volatile mode and a persistent mode. In the volatile mode, data stored in the persistent memory 112 is lost due to (sudden) power failure of the host system 11. That is, in the volatile mode, the persistent memory 112 is used like a conventional DRAM, which can volatilize data. In an embodiment, the persistent memory 112 operated in the volatile mode can also be used to replace or expand a conventional DRAM.

[0024] In the persistent mode, data stored in the persistent memory 112 is not lost due to (sudden) power failure of the host system 11. That is, in the persistent mode, the persistent memory 112 is used like an SSD and can persistently store data. However, compared with the SSD using a NAND package model, the persistent memory 112 uses a Dual In-line Memory Module (DIMM) package. Therefore, the persistent memory 112 can be compatible with a bus or channel conventionally used by a DRAM.

[0025] In an embodiment, the host system 11 can further include other storage media (e.g., a DRAM and / or an SSD, etc.), a power supply circuit (e.g., a battery, etc.), and various input / output devices (e.g., a screen, a keyboard, a mouse, a touchpad, a speaker, a microphone, and / or a network interface card, etc.), which are not limited by the present disclosure.

[0026] The memory device 12 includes a memory controller (also referred to as a flash memory controller) 121 and a non-volatile memory module 122. The memory controller 121 can be used to control the non-volatile memory module 122. For example, the memory controller 121 can control the non-volatile memory module 122 to perform reading, writing, and erasing of data.

[0027] The non-volatile memory module 122 is used to non-volatile store data. For example, the non-volatile memory module 122 can include a plurality of physical units. Each physical unit can include a plurality of memory cells. Each memory cell can store data by a change of threshold voltage. It is noted that the plurality of memory cells in the same physical unit can be programmed (e.g., a write voltage is applied) simultaneously to store data. For example, one physical unit can be one physical block, physical page, or other physical management unit.

[0028] The non-volatile memory module 122 can include a single level cell (SLC) NAND type flash memory module (i.e., a memory cell can store 1 bit of flash memory module), a multi level cell (MLC) NAND type flash memory module (i.e., a memory cell can store 2 bits of flash memory module), a triple level cell (TLC) NAND type flash memory module (i.e., a memory cell can store 3 bits of flash memory module), a quad level cell (QLC) NAND type flash memory module (i.e., a memory cell can store 4 bits of flash memory module), and / or other types of flash memory module.

[0029] The non-volatile memory module 122 includes a storage area (also referred to as a cache area) 1221 and a storage area 1222. Each physical unit in the storage area 1221 is also referred to as a first type of physical unit. Each physical unit in the storage area 1222 is also referred to as a second type of physical unit. A single physical unit in the storage area 1221 is used to store n bits. A single physical unit in the storage area 1222 is used to store m bits. m and n are both positive integers, and m is greater than n. In one embodiment, n can be 1 and m can be 2, 3, or 4.

[0030] In one embodiment, each physical unit in the storage area 1221 can be programmed based on a virtual SLC (pSLC) mode. Thus, a single memory cell programmed in the storage area 1221 can store 1 bit. In one embodiment, each physical unit in the storage area 1222 can be programmed based on a TLC or QLC mode. Thus, a single memory cell programmed in the storage area 1222 can store 3 or 4 bits.

[0031] In one embodiment, the memory device 12 can not have DRAM, and thus the memory device 12 can also be referred to as a DRAM-less memory device. In one embodiment, the memory controller 121 and / or the non-volatile memory module 122 can have static random access memory (SRAM). For example, the SRAM in the memory controller 121 and / or the non-volatile memory module 122 can have a storage space of about 2 to 8 MB or more.

[0032] In one embodiment, the processor 111 of the host system 11 can enable the persistent memory 112. For example, the processor 111 can update an indication value indicating a usage state of the persistent memory 112 from a bit "0" (disabled) to a bit "1" (enabled). In addition, the processor 111 can set a capacity of a storage space in the persistent memory 112 that is allowed to be provided for use by the memory device 12. For example, the processor 111 can set that 500 MB of the storage space in the persistent memory 112 can be used by the memory device 12.

[0033] In one embodiment, the host system 11 can perform a handshake procedure with the memory device 12. For example, in the handshake procedure, the host system 11 and the memory device 12 can exchange one or more signals with each other to authenticate each other. This handshake procedure can be used to establish a connection between the host system 11 and the memory device 12. This connection can also comply with the NVMe interface standard.

[0034] In one embodiment, in a state where the connection between the host system 11 and the memory device 12 has been established, the memory controller 121 of the memory device 12 can store one or more management tables maintained by the memory device 12 into the persistent memory 112 of the host system 11. For example, the management tables can include a logical-to-physical mapping table that was originally stored in the non-volatile memory module 122. This logical-to-physical mapping table can record logical-to-physical mapping information related to certain physical units in the non-volatile memory module 122. For example, this logical-to-physical mapping information can include mapping information between a certain physical unit in the non-volatile memory module 122 and a certain logical unit. Here, a logical unit can refer to one or more logical addresses.

[0035] In one embodiment, the memory controller 121 can perform a data grooming operation. The data grooming operation can copy valid data (also referred to as target data) stored in the storage area 1221 to the storage area 1222 for centralized storage. The valid data refers to data that is currently mapped by a logical unit. For example, in the data grooming operation, valid data stored in m (e.g., 3 or 4) first type physical units in the storage area 1221 can be copied to n (e.g., 1) second type physical units in the storage area 1222 for centralized storage. Thereafter, the first type physical units in the storage area 1221 from which the valid data has been copied can be associated to a free pool and can be erased before next use, so as to release available space in the storage area 1221.

[0036] In one embodiment, during the data grooming operation, the memory controller 121 can update the management table in the persistent storage 112 via the connection between the host system 11 and the memory device 12, and copy the target data from the m (e.g., 3 or 4) first type physical units in the storage area 1221 to the n (e.g., 1) second type physical units in the storage area 1222 for storage according to the update result.

[0037] In one embodiment, the memory controller 121 can update the management table in the persistent storage 112 according to new logical-to-physical mapping information related to the target data. For example, assume that the management table (i.e., logical-to-physical mapping table) read from the non-volatile memory module 122 originally records old logical-to-physical mapping information related to the target data. The old logical-to-physical mapping information can reflect an old mapping relationship between old physical units (i.e., first type physical units) originally used to store the target data and the logical unit to which the target data belongs.

[0038] After storing the management table in the persistent storage 112, the memory controller 121 can modify and update information in the management table in the persistent storage 112. For example, the memory controller 121 can update, in the persistent storage 112, the old logical-to-physical mapping information related to the target data to new logical-to-physical mapping information related to the target data. The new logical-to-physical mapping information can reflect a new mapping relationship between new physical units (i.e., second type physical units) used to store the target data in the data grooming operation and the logical unit to which the target data belongs. That is, the updated management table in the persistent storage 112 can reflect a new mapping relationship between the physical units (i.e., second type physical units) finally used to store the target data in the data grooming operation and the logical unit to which the target data belongs.

[0039] In one embodiment, after the data grooming operation is completed, the memory controller 121 can read back the updated management table from the persistent memory 112 and store it back into the non-volatile memory module 122. Thereafter, when the target data is to be accessed, the memory controller 121 can determine the physical location currently storing the target data according to the management table.

[0040] In one embodiment, the processor 111 of the host system 11 can also configure the storage space in the persistent memory 112 allowed to be provided to the memory device 12 for use in the persistent mode. In the persistent mode, the management table stored in the persistent memory 112 will not be lost due to unexpected power loss of the host system 11. In this way, the reliability of the memory device 12 performing the data grooming operation can be improved.

[0041] In one embodiment, if the memory device 12 is a DRAM-less memory device (i.e., the memory device 12 does not have DRAM or has insufficient storage space for DRAM), the memory device 12 can only use the SRAM in the memory controller 121 and / or the non-volatile memory module 122 to store the management table without using the persistent memory 112 (or only using volatile memory such as DRAM) in the host system 11. If the amount of data of the management table is greater than the capacity of the SRAM, the management table needs to be stored in the SRAM in batches for querying and modifying during the execution of the data grooming operation, which results in reduced efficiency of the data grooming operation.

[0042] In one embodiment, it is assumed that the memory device 12 is a DRAM-less memory device (i.e., the memory device 12 does not have DRAM or has insufficient storage space for DRAM). However, under the condition that the persistent memory 112 in the host system 11 can be used (and the storage space in the persistent memory 112 that can be used is operated in the persistent mode), storing the management table by the large-capacity and data-persistent persistent memory 112 can effectively improve the efficiency of the data grooming operation.

[0043] In one embodiment, regardless of whether the memory device 12 has sufficient DRAM storage space, during execution of the garbage collection operation, the management table required for execution of the garbage collection operation can be transmitted to the persistent storage 112 of the host system 11 in one time for storage, query and update, so as to improve the execution efficiency of the garbage collection operation. After completion of the garbage collection operation, the updated management table in the persistent storage 112 can be stored back to the non-volatile storage module 122 of the memory device 12 for subsequent use.

[0044] Figure 2 is a flowchart of a garbage collection method using a persistent storage according to one embodiment of the present application. Please refer to Figure 2 In step S201, the persistent storage in the host system is enabled. In step S202, the management table maintained by the memory device is stored in the persistent storage in a state that the connection between the host system and the memory device is established. In step S203, during execution of the garbage collection operation by the memory device, the management table in the persistent storage is updated by the memory device via the connection, and target data is copied from at least one first type of physical unit in the memory device to at least one second type of physical unit in the memory device for storage according to the update result.

[0045] However, Figure 2 The steps in the above method have been described in detail in the above, and thus will not be repeated here. It is worth noting that, Figure 2 The steps in the above method can be implemented as a plurality of program codes or circuits, and the present application is not limited thereto. In addition, Figure 2 The method of the above embodiment can be used in combination with the above example embodiments, or can be used alone, and the present application is not limited thereto.

[0046] In summary, the embodiments of the present application can use the persistent storage with data persistence of the host system to store the management table required for execution of the garbage collection operation when the memory device performs the internal garbage collection operation. In this way, the operation efficiency of the internal garbage collection of the memory storage device can be effectively improved.

[0047] Although the present application has been disclosed with the above embodiments, it is not intended to limit the present application, and any person of ordinary skill in the art can make some changes and modifications without departing from the spirit and scope of the present application, and thus the protection scope of the present application shall be subject to the definition of the claims.

Claims

1. A method for data grooming using persistent memory, comprising: enabling a persistent memory in a host system; wherein the persistent memory is operable in a volatile mode in which data stored in the persistent memory is lost due to power-off of the host system and a persistent mode in which the data stored in the persistent memory is not lost due to power-off of the host system; storing a management table maintained by a memory device into the persistent memory in a state that a connection between the host system and the memory device is established; wherein at least a portion of storage space of the persistent memory is configured to operate in the persistent mode, and the management table is stored in the at least a portion of storage space operating in the persistent mode; in a process that the memory device performs a data grooming operation, the memory device updates the management table in the persistent memory via the connection, and stores a target data from at least a first type of physical unit in the memory device to at least a second type of physical unit in the memory device according to an update result.

2. The method of claim 1, wherein, The at least a first type of physical unit and the at least a second type of physical unit are both included in a non-volatile memory module of the memory device, a single memory cell in the at least a first type of physical unit is used to store n bits, a single memory cell in the at least a second type of physical unit is used to store m bits, m and n are both positive integers, and m is greater than n.

3. The method of claim 1, wherein, The management table comprises a logical-to-physical mapping table. 4.A memory storage system using persistent memory, comprising: a host system configured with a persistent memory; wherein the persistent memory is operable in a volatile mode in which data stored in the persistent memory is lost due to power-off of the host system and a persistent mode in which the data stored in the persistent memory is not lost due to power-off of the host system; a memory device coupled to the host system, characterized in that the host system is configured to enable the persistent memory, in a state that a connection between the host system and the memory device is established, a memory controller of the memory device stores a management table maintained by the memory device into the persistent memory; wherein the host system is further configured to configure at least a portion of storage space of the persistent memory to operate in the persistent mode, and the management table is stored in the at least a portion of storage space operating in the persistent mode; in a process that the memory device performs a data grooming operation, the memory controller updates the management table in the persistent memory via the connection, and stores a target data from at least a first type of physical unit in the memory device to at least a second type of physical unit in the memory device according to an update result.

5. The memory storage system using persistent memory as recited in claim 4, wherein, The at least one first type of entity unit and the at least one second type of entity unit are included in a non-volatile memory module of the memory device, a single memory cell in the at least one first type of entity unit is used to store n bits, a single memory cell in the at least one second type of entity unit is used to store m bits, m and n are both positive integers, and m is greater than n.

6. The memory storage system using persistent memory as recited in claim 4, wherein, The management table includes a logical-to-physical mapping table.

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