Method of manufacturing a semiconductor device
By using polymer and spin-coated carbon layer protection techniques in semiconductor manufacturing, combined with fine patterning of photoresist layers, the problem of narrow photolithography process windows has been solved, improving the yield and quality of the device and enabling the manufacturing of smaller semiconductors.
Patent Information
- Application Number
- CN202110842368.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2021-04-23
- Filing Date
- 2021-07-26
- Publication Date
- 2026-02-13
- Estimated Expiration
- 2042-01-09
AI Technical Summary
As semiconductor devices shrink in size, the process window for photolithography becomes increasingly narrow, making it difficult to maintain the device's shrinkage capability, leading to a decline in yield and quality.
By employing a protective layer composed of polymer components and a spin-coated carbon layer, combined with selective exposure and development techniques for photoresist layers, a finely patterned structure is formed, filling narrow gaps and protecting critical features, thus avoiding damage during wet processing.
It improves the yield and quality of semiconductor devices, reduces damage and defects, enhances gap-filling capabilities in narrow gaps, and supports the manufacturing of smaller semiconductors.
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Figure CN114975086B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present disclosure relates to a method of manufacturing a semiconductor device. BACKGROUND
[0002] As consumer devices become smaller according to consumer demand, the size of the individual components of these devices also needs to become smaller. Semiconductor devices, which are the main components of devices such as cell phones, computers, and the like, are under pressure to become smaller, while the individual devices in the semiconductor devices, such as transistors, resistors, capacitors, and the like, are also under corresponding pressure to shrink in size.
[0003] One possible technique for the manufacturing process of semiconductor devices is the use of photoresist materials. Such materials are applied to the surface of a layer to be patterned, and then exposed to energy that is itself patterned. Such exposure modifies the chemical and physical properties of the exposed regions of the photoresist material. With the unexposed regions of the photoresist material lacking modification, the modification of the exposed regions can be utilized to remove one region from the other.
[0004] However, as the size of the individual devices shrinks, the process window of the photoresist process becomes narrower and narrower. Therefore, advantages in the field of photoresist processes are needed to maintain the ability to shrink devices, and further improvements are needed to achieve the desired design standards so that the process of making components smaller and smaller can continue. SUMMARY
[0005] According to embodiments of the present disclosure, a method of manufacturing a semiconductor device is provided, including forming a protective layer over a substrate, the substrate having a plurality of protrusions and recesses, wherein the protective layer includes a polymeric component, the polymeric component including a polymer having a plurality of repeating units, the repeating units being one or more of:
[0006] wherein a, b, c, d, e, f, g, h, and i are each independently H, -OH, -ROH, -R(OH)2, -NH2, -NHR, -NR2, -SH, -RSH, or -R(SH)2, wherein at least one of a, b, c, d, e, f, g, h, and i on each of the repeating units is not H, wherein R, R1, and R2 are each independently C1 to C10 alkyl, C3 to C10 cycloalkyl, C1 to C10 hydroxyalkyl, C2 to C10 alkoxy, C2 to C10 alkoxyalkyl, C2 to C10 acetyl, C3 to C10 acetylalkyl, C1 to C10 carboxyl, C2 to C10 alkylcarboxyl, or C4 to C10 cycloalkylcarboxyl, and n is between 2 and 1000. The method further includes forming a resist layer over the protective layer, and patterning the resist layer.
[0007] According to embodiments of the present disclosure, a method of manufacturing a semiconductor device is provided, including forming a polymer layer over a plurality of features disposed over a substrate, wherein a distance Dl separating the features is less than 50 nm, and a gap separating two adjacent ones of the features has a depth D2 that is greater than 10 nm from a top surface of the features, wherein the polymer layer fills the gap and extends over the top surface of the features. The method further includes forming a photoresist layer over the polymer layer, selectively exposing the photoresist layer to actinic radiation, and developing the selectively exposed photoresist layer to form a photoresist pattern.
[0008] According to embodiments of the present disclosure, a method of manufacturing a semiconductor device is provided, including forming a spin-on carbon layer including a spin-on carbon composition over a substrate having a topography including a plurality of protrusions separated from one another, the protrusions having an upper surface, wherein a distance separating a first protrusion and a second protrusion is in a range of 1 nm to less than 50 nm, and a depth of a gap between the first protrusion and the second protrusion is in a range of 10 nm to 300 nm from the upper surface, wherein the spin-on carbon composition includes a polymer including a plurality of repeating units, the repeating units including one or more functional groups selected from -OH, -ROH, -R(OH)2, -NH2, -NHR, -NR2, -SH, -RSH, or -R(SH)2, wherein R is a C1 to C10 alkyl, a C3 to C10 cycloalkyl, a C1 to C10 hydroxyalkyl, a C2 to C10 alkoxy, a C2 to C10 alkoxyalkyl, a C2 to C10 acetyl, a C3 to C10 acetyalkyl, a C1 to C10 carboxyl, a C2 to C10 alkylcarboxyl, or a C4 to C10 cycloalkylcarboxyl. The method further includes forming a photoresist layer over the spin-on carbon layer, patterning the photoresist layer, and developing the photoresist layer to form a pattern in the photoresist layer. BRIEF DESCRIPTION OF DRAWINGS
[0009] Aspects of the disclosure can best be understood with reference to the following detailed description when read in conjunction with the accompanying drawings. It should be noted that the various features are not necessarily drawn to scale and that the disclosure can admit to any arrangement or combination of features that are represented in the drawings or otherwise described herein. In fact, the dimensions of the various features can be arbitrarily increased or decreased for clarity of discussion.
[0010] Figure 1 Process flow diagrams illustrating the fabrication of semiconductor devices according to embodiments of the present disclosure;
[0011] Figure 2 Process stages showing sequential operations according to embodiments of the present disclosure;
[0012] Figure 3A and Figure 3B Process stages showing sequential operations according to embodiments of the present disclosure;
[0013] Figure 4Process stages showing sequential operations according to embodiments of the present disclosure;
[0014] Figure 5 Process stages showing sequential operations according to embodiments of the present disclosure;
[0015] Figure 6 Process stages showing sequential operations according to embodiments of the present disclosure;
[0016] Figure 7 Process stages showing sequential operations according to embodiments of the present disclosure;
[0017] Figure 8 Process stages showing sequential operations according to embodiments of the present disclosure;
[0018] Figure 9 Polymer for protective layer composition according to embodiments of the present disclosure;
[0019] Figure 10A , Figure 10B and Figure 10C Polymer for protective layer composition according to embodiments of the present disclosure;
[0020] Figure 11 Process stages showing sequential operations according to embodiments of the present disclosure;
[0021] Figure 12A , Figure 12B and Figure 12C Process stages showing sequential operations according to embodiments of the present disclosure;
[0022] Figure 13A , Figure 13B and Figure 13C Process stages showing sequential operations according to embodiments of the present disclosure;
[0023] Figure 14 Semiconductor device manufactured according to embodiments of the present disclosure;
[0024] Figure 15A , Figure 15B , Figure 15C , Figure 15D , Figure 15E , Figure 15F , Figure 15G , Figure 15H , Figure 15I , Figure 15J , Figure 15K , Figure 15L , Figure 15M , Figure 15N , Figure 15O , Figure 15P , Figure 15Q and Figure 15RSequential operations according to embodiments of the present disclosure are shown;
[0025] Figure 16 Process stages of sequential operations according to embodiments of the present disclosure are shown;
[0026] Wherein the symbols are explained:
[0027] 10: substrate 120: photoresist layer
[0028] 15: resist layer 125a: resist layer
[0029] 20: target layer 125b: three-layer resist
[0030] 30: mask 130, 130': opening
[0031] 35: pattern 135: protrusion
[0032] 40: mask substrate 140: recess
[0033] 45: radiation 145, 145': opening
[0034] 50, 52: region 150: conductive contact
[0035] 55, 55': opening 200: WFM layer
[0036] 57: developer 205: photoresist layer
[0037] 62: dispenser 210: interface layer
[0038] 65: mask 215: second photoresist layer
[0039] 70: substrate 225: third photoresist layer
[0040] 75: reflective multilayer 230: gate dielectric layer
[0041] 80: capping layer 235: first conductive layer
[0042] 85: absorbing layer 245: second conductive layer
[0043] 90: backside conductive layer 250: third conductive layer
[0044] 95: extreme ultraviolet radiation 260: protective layer
[0045] 97: radiation 265: second protective layer
[0046] 100: process flow 270: third protective layer
[0047] 105: conductive layer 280, 285: WFM layer
[0048] 110: protective layer 290: adhesive layer
[0049] 115: intermediate layer 295: main gate electrode layer
[0050] D1, D3: distance N3: third n-type field effect transistor
[0051] D2, D4: depth P1: first p-type field effect transistor
[0052] N1: first n-type field effect transistor P2: second p-type field effect transistor
[0053] N2: second n-type field effect transistor P3: third p-type field effect transistor
[0054] S105, S110, S115, S120, S125, S130, S135, S140, S145, S150, S155, S160, S165, S170: step DETAILED DESCRIPTION
[0055] To implement different features of the subject matter mentioned, the following disclosure provides many different embodiments or examples. Specific examples of components, configurations, etc. are described below to simplify the present disclosure. Of course, these are merely examples and are not limiting in any way. For example, the sizes of the elements do not limit the scope or value of the present disclosure, and can be adjusted according to process conditions and / or desired properties of the device. In addition, in the following description, forming a first feature on or over a second feature can include embodiments in which the first feature and the second feature are formed to be in direct contact, and can also include embodiments in which an additional feature is formed between the first feature and the second feature, so that the first feature and the second feature can not be in direct contact. For simple and clear description, multiple features can be abstractly drawn in different sizes.
[0056] In addition, spatial relative terms, such as "below", "lower", "bottom", "above", "upper", and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatial relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device can be otherwise oriented (rotated 90 degrees or at other orientations) and the spatial relative descriptors used herein interpreted accordingly. In addition, the term "formed by" can mean "including" or "comprising" either meaning.
[0057] As the pattern features of semiconductor devices become smaller and the spaces between the features shrink, the gap fill between the pattern features becomes more important. As a result, the use of metal gate technology is increasing. A metal layer that forms a metal gate is defined using photolithography, wet cleaning, and etching steps. During the wet process steps, such as wet etching and wet cleaning, a protective layer, such as a bottom anti-reflective coating (BARC) or a spin-on carbon coating, is used to protect the semiconductor device features, such as the metal gate. It is desirable to completely fill the narrow gaps between the pattern features of the semiconductor device, thereby avoiding damage to the semiconductor device features during the wet process steps. Embodiments of the present disclosure include methods that provide improved gap fill, reduced damage and defects, and improved semiconductor device yield.
[0058] According to embodiments of the present disclosure, Figure 1 A process flow 100 for fabricating a semiconductor device is illustrated. In step S105, a resist layer 15 is formed by applying a resist (resist) composition over a layer or target layer 20 to be patterned on a substrate 10, in some embodiments as shown in Figure 2 In some embodiments, the resist layer 15 is a photoresist layer. In some embodiments, the resist layer 15 is then subjected to a first bake step S110 (or a pre-bake step) to evaporate the solvent in the resist composition. The resist layer 15 is baked at a temperature and for a time sufficient to cure and dry the resist layer 15. In some embodiments, the resist layer 15 is heated at a temperature of about 40 °C and 120 °C for about 10 seconds to about 10 minutes.
[0059] The substrate 10 can include one or more buffer layers (not shown) in a surface region thereof. The buffer layers can be used to grade the lattice constant, changing from the lattice constant of the substrate to the lattice constant of the subsequently formed source / drain regions. The buffer layers can be formed of epitaxially grown single crystalline semiconductor materials, such as, but not limited to, Si, Ge, GeSn, SiGe, GaAs, InSb, GaP, GaSb, InAlAs, InGaAs, GaSbP, GaAsSb, GaN, GaP, and InP. In one embodiment, a silicon germanium (SiGe) buffer layer is epitaxially grown on the silicon substrate 10. The germanium concentration of the SiGe buffer layer can increase from 30 atomic percent in the bottommost buffer layer to 70 atomic percent in the topmost buffer layer.
[0060] In some embodiments, the substrate 10 includes one or more layers of at least one metal, metal alloy, and metal nitride / sulfide / oxide / silicide having a chemical formula MXa a where M is a metal and X is N, S, Se, O, Si, and a is from about 0.4 to about 2.5. In some embodiments, the substrate 10 includes titanium, aluminum, cobalt, ruthenium, titanium nitride, tungsten nitride, tantalum nitride, and combinations thereof.
[0061] In some embodiments, the substrate 10 includes a dielectric having at least silicon or a metal oxide or nitride of the formula MXb, where M is a metal or Si, X is N or O, and b ranges from about 0.4 to about 2.5. In some embodiments, the substrate 10 includes silicon dioxide, silicon nitride, aluminum oxide, hafnium oxide, lanthanum oxide, and combinations thereof. b In some embodiments, the substrate 10 includes a dielectric having at least silicon or a metal oxide or nitride of the formula MXb, where M is a metal or Si, X is N or O, and b ranges from about 0.4 to about 2.5. In some embodiments, the substrate 10 includes silicon dioxide, silicon nitride, aluminum oxide, hafnium oxide, lanthanum oxide, and combinations thereof.
[0062] In some embodiments, the substrate 10 includes a single-crystalline semiconductor layer at least on a surface portion thereof. The substrate 10 can include a single-crystalline semiconductor material such as, but not limited to, Si, Ge, SiGe, GaAs, InSb, GaP, GaSb, InAlAs, InGaAs, GaSbP, GaAsSb, and InP. In some embodiments, the substrate 10 is a silicon layer of a silicon-on-insulator (SOI) substrate. In particular embodiments, the substrate 10 is formed of crystalline Si.
[0063] In some embodiments, the target layer 20 is a semiconductor layer, a metallization layer, or a dielectric layer (e.g., a passivation layer) disposed above the metallization layer. In some embodiments, the target layer 20 is formed of a semiconductor material, such as silicon. In embodiments where the target layer 20 is a metallization layer, the target layer 20 is formed of a conductive material using metallization processes and metal deposition techniques, including chemical vapor deposition (CVD), atomic layer deposition (ALD), and physical vapor deposition (PVD) (sputtering). Similarly, if the target layer 20 is a dielectric layer, the target layer 20 is formed of a dielectric layer formation technique, including thermal oxidation, chemical vapor deposition, atomic layer deposition, and physical vapor deposition.
[0064] In some embodiments, after the first (or pre-) bake step S110 of the resist layer 15, the resist layer 15 is selectively exposed to actinic radiation 45 (see Figure 3A and Figure 3B ) in step S115. In some embodiments, the resist layer 15 is selectively exposed to ultraviolet radiation. In some embodiments, the ultraviolet radiation is deep ultraviolet (DUV) radiation. In some embodiments, the ultraviolet radiation is extreme ultraviolet (EUV) radiation. In some embodiments, the actinic radiation is an electron beam.
[0065] As Figure 3A and Figure 3BIn some embodiments, the radiation 45 for exposure passes through a mask 30 before illuminating the resist layer 15. In some embodiments, the mask 30 has a pattern that is replicated into the resist layer 15. In some embodiments, the pattern is formed by an opaque pattern 35 on a mask substrate 40. The opaque pattern 35 can be formed of a material that is opaque to the radiation (e.g., chromium), while the mask substrate 40 is formed of a material that is transparent to the radiation (e.g., quartz glass).
[0066] The areas 50 of the photoresist layer exposed to the radiation 45 undergo a chemical reaction that changes the solubility of the areas 50 to a subsequent developer applied to the photoresist layer relative to areas 52 of the photoresist layer that are not exposed to the radiation 45. In some embodiments, the areas 50 of the photoresist layer exposed to the radiation 45 undergo a crosslinking reaction. Figure 3A A selective exposure of a positive photoresist is depicted, and Figure 3B A selective exposure of a negative photoresist is depicted.
[0067] In some embodiments, the resist layer 15 is a photosensitive layer that is patterned by exposure to actinic radiation. Generally, the chemical properties of the areas of the photoresist that are struck by the incident radiation change depending on the type of photoresist used. The resist layer 15 is either a positive resist or a negative resist. A positive resist represents a photoresist material that becomes soluble in a developer upon exposure to radiation (e.g., ultraviolet light), while the unexposed (or less exposed) areas of the photoresist are not soluble in the developer. On the other hand, a negative resist represents a photoresist material that becomes insoluble in a developer upon exposure to radiation, while the unexposed (or less exposed) areas of the photoresist are soluble in the developer. The areas of the negative resist that become insoluble as a result of exposure to radiation can become insoluble as a result of a crosslinking reaction caused by exposure to the radiation.
[0068] The resist is positive or negative depending on the type of developer used to develop the resist. For example, some positive photoresists provide a positive pattern (i.e., the exposed areas are removed by the developer) when the developer is an aqueous developer (e.g., a tetramethylammonium hydroxide (TMAH) solution). On the other hand, the same photoresist provides a negative pattern (i.e., the unexposed areas are removed by the developer) when the developer is an organic solvent. Further, some negative photoresists are developed using a TMAH solution, the TMAH removes the unexposed areas of the photoresist, and the exposed areas of the photoresist that undergo crosslinking upon exposure to actinic radiation remain on the substrate after development.
[0069] In some embodiments, the resist composition (e.g., photoresist) according to embodiments of the present disclosure includes a polymer or a polymerizable monomer or oligomer, along with one or more photoactive compounds (PACs). In some embodiments, the concentration of the polymer, monomer, or oligomer is in the range of about 1 wt% to about 75 wt% based on the total weight of the resist composition. In other embodiments, the concentration of the polymer, monomer, or oligomer is in the range of about 5 wt% to about 50 wt%. When the concentration of the polymer, monomer, or oligomer is below the disclosed range, the polymer, monomer, or oligomer has a negligible effect on resist performance. When the concentration is above the disclosed range, there is no substantial improvement in resist performance or degradation in forming a consistent resist layer.
[0070] In some embodiments, the polymerizable monomer or oligomer includes an acrylic acid, an acrylic ester, a hydroxystyrene, or an alkylene. In some embodiments, the polymer includes a carbon-hydrogen structure (e.g., an alicyclic carbon-hydrogen structure) containing one or more groups, where the group will decompose (e.g., an acid labile group) or otherwise react when mixed with an acid, base, or radical generated by the PAC (further described below). In some embodiments, the carbon-hydrogen structure includes a repeating unit that forms the skeletal backbone of the polymer resin. These repeating units can include an acrylic ester, a methacrylic ester, a crotonic ester, a vinyl ester, a maleic diester, a fumaric diester, an itaconic diester, a (meth)acrylonitrile, a methacrylamide, a styrene, a vinyl ether, a combination of the above, or the like.
[0071] In some embodiments, the specific structure used by the repeating unit of the hydrocarbon structure includes one or more methyl acrylate, ethyl acrylate, n-propyl acrylate, isopropyl acrylate, n-butyl acrylate, isobutyl acrylate, tertiary butyl acrylate, n-hexyl acrylate, 2-ethylhexyl acrylate, acetoxyethyl acrylate, phenyl acrylate, 2-hydroxyethyl acrylate, 2-methoxyethyl acrylate, 2-ethoxyethyl acrylate, 2-(2-methoxyethoxy)ethyl acrylate, cyclohexyl acrylate, benzyl acrylate, 2-alkyl-2-adamantyl (meth)acrylate, or dialkyl(1-adamantyl)methyl(meth)acrylate, methyl methacrylate, ethyl methacrylate, n-propyl methacrylate, isopropyl methacrylate, n-butyl methacrylate, isobutyl methacrylate, tertiary butyl methacrylate, n-hexyl methacrylate, 2-ethylhexyl methacrylate, acetoxyethyl methacrylate, phenyl methacrylate, 2-hydroxyethyl methacrylate, 2-methoxyethyl methacrylate, 2-ethoxyethyl methacrylate, 2-(2-methoxyethoxy)ethyl methacrylate, cyclohexyl methacrylate, benzyl methacrylate, 3-chloro-2-hydroxypropyl methacrylate, 3-acetoxy-2-hydroxypropyl methacrylate, 3-chloroacetyl-2-hydroxypropyl methacrylate, butyl crotonate, hexyl crotonate, or the like.Examples of vinyl esters include vinyl acetate, vinyl propionate, vinyl butyrate, vinyl methoxyacetate, vinyl benzoate, dimethyl maleate, diethyl maleate, dibutyl maleate, dimethyl fumarate, diethyl fumarate, dibutyl fumarate, dimethyl itaconate, diethyl itaconate, dibutyl itaconate, acrylamide, methylacrylamide, ethylacrylamide, propylacrylamide, n-butylacrylamide, t-butylacrylamide, cyclohexylacrylamide, 2-methoxyethylacrylamide, dimethylacrylamide, diethylacrylamide, phenylacrylamide, benzylacrylamide, methacrylamide, methylmethacrylamide, ethylmethacrylamide, propylmethacrylamide, n-butylmethacrylamide, t-butylmethacrylamide, cyclohexylmethacrylamide, 2-methoxyethylmethacrylamide, dimethylmethacrylamide, diethylmethacrylamide, phenylmethacrylamide, benzylmethacrylamide, methyl vinyl ether, butyl vinyl ether, hexyl vinyl ether, methoxyethyl vinyl ether, dimethylaminoethyl vinyl ether, or the like. Examples of styrenes include styrene, methylstyrene, dimethylstyrene, trimethylstyrene, ethylstyrene, isopropylstyrene, butylstyrene, methoxystyrene, butoxystyrene, acetoxy styrene, hydroxystyrene, chlorostyrene, dichlorostyrene, bromostyrene, methyl vinylbenzoate, alpha-methylstyrene, maleimide, vinylpyridine, vinylpyrrolidone, vinylcarbazole, combinations of the foregoing, or the like.
[0072] In some embodiments, the polymer is a polyhydroxystyrene, a polymethylmethacrylate, or a polyhydroxystyrene-tert-butylacrylate, for example
[0073] In some embodiments, the repeating unit of the hydrocarbon structure also has either a monocyclic or polycyclic hydrocarbon structure substituted therein, or the monocyclic or polycyclic hydrocarbon structure is the repeating unit, thereby forming an alicyclic hydrocarbon structure. In some embodiments, specific examples of monocyclic structures include bicycloalkanes, tricycloalkanes, tetracycloalkanes, cyclopentane, cyclohexane, or the like. In some embodiments, specific examples of polycyclic structures include adamantane, norbornane, isobornane, tricyclodecane, tetracyclododecane, or the like.
[0074] In some embodiments, the decomposing group is a carboxylic acid group, a fluorinated alcohol group, a phenolic alcohol group, a sulfo group, a sulfonamide group, a sulfonylimido group, a (alkylsulfonyl)(alkylcarbonyl) methylene group, a (alkylsulfonyl)(alkylcarbonyl) imido group, a di(alkylcarbonyl) methylene group, a di(alkylcarbonyl) imido group, a di(alkylsulfonyl) methylene group, a di(alkylsulfonyl) imido group, a tri(alkylcarbonyl) methylene group, a tri(alkylsulfonyl) methylene group, a combination thereof, or the like. In some embodiments, specific groups for the fluorinated alcohol group include fluorohydroxyalkyl groups, such as hexafluoroisopropyl alcohol groups. Specific groups for the carboxylic acid group include acrylic acid groups, methacrylic acid groups, or the like.
[0075] In some embodiments, the polymer also includes other groups attached to the hydrocarbon structure that help improve various properties of the polymerizable resin. For example, including lactone groups in the hydrocarbon structure can help reduce the degree of line edge roughness after developing the photoresist, thereby helping to reduce the number of defects created during development. In some embodiments, the lactone groups include five- to seven-membered rings, although the lactone groups can alternatively use any suitable lactone structure.
[0076] In some embodiments, the polymer includes groups that can help increase the adhesion of the resist layer 15 to an underlying structure, such as the target layer 20. Polar groups can be used to help increase the adhesion. Suitable polar groups include hydroxyl groups, nitrile groups, or the like, although any suitable polar group can alternatively be used.
[0077] Alternatively, in some embodiments, the polymer includes one or more alicyclic hydrocarbon structures that do not have groups that will decompose. In some embodiments, the hydrocarbon structures that do not have groups that will decompose include structures such as 1-adamantyl methacrylate, tricyclodecanyl methacrylate, cyclohexyl methacrylate, combinations of the foregoing, or the like.
[0078] In some embodiments, for example when EUV radiation is used, the photoresist composition according to the present disclosure is a metal-containing resist. The metal-containing resist includes a metallic core complexed in a solvent with one or more ligands. In some embodiments, the resist includes metal particles. In some embodiments, the metal particles are nanoparticles. As used herein, a nanoparticle is a particle having an average particle size between about 1 nm and about 20 nm. In some embodiments, a metallic core including from 1 to about 18 metal particles is complexed in a solvent with one or more organic ligands. In some embodiments, the metallic core includes 3, 6, 9, or more metal nanoparticles complexed in a solvent with one or more organic ligands.
[0079] In some embodiments, the metal particles are one or more titanium (Ti), zinc (Zn), zirconium (Zr), nickel (Ni), cobalt (Co), manganese (Mn), copper (Cu), iron (Fe), strontium (Sr), tungsten (W), vanadium (V), chromium (Cr), tin (Sn), hafnium (Hf), indium (In), cadmium (Cd), molybdenum (Mo), tantalum (Ta), niobium (Nb), aluminum (Al), cesium (Cs), barium (Ba), lanthanum (La), cerium (Ce), silver (Ag), antimony (Sb), combinations of the foregoing, or oxides of the foregoing. In some embodiments, the metal particles include one or more selected from the group consisting of Ce, Ba, La, Ce, In, Sn, Ag, Sb, or oxides thereof.
[0080] In some embodiments, the metal nanoparticles have an average particle size between about 2 nm and about 5 nm. In some embodiments, the amount of metal nanoparticles in the resist composition is in the range from about 0.5 wt% to about 15 wt% based on the weight of the nanoparticles and the solvent. In some embodiments, the amount of nanoparticles in the resist composition is in the range of about 5 wt% to about 10 wt% based on the weight of the nanoparticles and the solvent. In some embodiments, the concentration of metal particles is in the range from 1 wt% to 7 wt% based on the weight of the solvent and the metal particles. Below about 0.5 wt% of metal nanoparticles results in a resist coating that is too thin. Above about 15 wt% of metal nanoparticles results in a resist coating that is too thick and viscous.
[0081] In some embodiments, the metal core and the ligand are complexed, where the ligand comprises a branched or unbranched, cyclic or acyclic, saturated organic group, including a Ci to C7alkyl group or a Ci to C7fluoroalkyl group. The Ci to C7alkyl group or the Ci to C7fluoroalkyl group includes one or more substituents selected from the group consisting of -CF3, -SH, -OH, =0, -S-, -P-, -P02, -C(=0)SH, -C(=0)OH, -C(=0)0-, -0-, -N-, -C(=0)NH, -S02OH, -S02SH, -SOH, and -S02-. In some embodiments, the ligand includes one or more substituents selected from the group consisting of -CF3, -OH, -SH, and -C(=0)OH substituents.
[0082] In some embodiments, the ligand is a carboxylic acid or sulfonic acid ligand. For example, in some embodiments, the ligand is methacrylic acid. In some embodiments, the metal particles are nanoparticles, and the metal nanoparticles and the ligand including an aliphatic or aromatic group are complexed. The aliphatic or aromatic group can be a branched or unbranched, cyclic or acyclic, saturated pendant group having 1 to 9 carbons, including alkyl, alkenyl, and phenyl groups. The branched group can further include substitution of oxygen or halogen. In some embodiments, each metal particle is complexed by 1 to 25 ligand units. In some embodiments, each metal particle is complexed by 3 to 18 ligand units.
[0083] In some embodiments, the resist composition includes about 0.1 wt% to about 20 wt% of the ligand based on the total weight of the resist composition. In some embodiments, the resist includes about 1 wt% to about 10 wt% of the ligand. In some embodiments, the concentration of the ligand is about 10 wt% to about 40 wt% based on the weight of the metal particles and the weight of the ligand. Less than about 10 wt% of the ligand results in poor performance of the organometallic photoresist. Greater than about 40 wt% of the ligand results in difficulty in forming a uniform photoresist layer. In some embodiments, the ligand dissolved in the coating solvent is in a weight range of about 5 wt% to about 10 wt% based on the weight of the ligand and the solvent, such as propylene glycol methylether acetate (PGMEA).
[0084] In some embodiments, the copolymer and the PAC are added to the solvent for their mode of application along with any desired additives or other chemicals. Once added, the mixture is then mixed to ensure that there are no defects caused by uneven mixing or non-homogeneous composition of the photoresist. Once mixed together, the photoresist can be stored prior to use or used immediately in either manner.
[0085] The solvent can be any suitable solvent. In some embodiments, the solvent is one or more solvents selected from propylene glycol methyl ether acetate, propylene glycol monomethyl ether (PGME), propylene glycol ethyl ether (PGEE), gamma-butyrolactone (GBL), cyclohexanone (CHN), ethyl lactate (EL), methanol, ethanol, propanol, n-butanol, acetone, dimethylformamide (DMF), isopropanol (IPA), tetrahydrofuran (THF), methyl isobutyl carbinol (MIBC), n-butyl acetate (nBA), and methyl amyl ketone (MAK).
[0086] Some embodiments of photoresist include one or more photoactive compounds (PACs). PACs are photoactive compositions such as photoacid generators (PAGs), photobase generators (PBGs), photo decomposable bases (PDBs), radical generators, or the like. PACs can be positive-acting or negative-acting. In some embodiments where the PAC is a photoacid generator, the PAC includes a halogenated triazine, an onium salt, a diazonium salt, an aromatic diazonium salt, a phosphonium salt, a sulfonium salt, an iodonium salt, an imide sulfonate, an oxime sulfonate, a diazodisulfone, a disulfone, an o-nitrobenzylsulfonate, a sulfonate ester, a halogenated sulfonyloxy dicarboximide, a diazodisulfone, an a-cyanooxyamine-sulfonate, an imide sulfonate, a ketodiazosulfone, a sulfonyldiazoester, a 1,2-di(arylsulfonyl)hydrazine, a nitrobenzyl ester, and an s-triazine derivative, combinations of the foregoing, or the like.
[0087] Specific examples of photoacid generators include a-(trifluoromethylsulfonyloxy)- bicyclo[2.2.1]hept-5-ene-2,3-dicarb-o-ximide (MDT), N-hydroxy-naphthalimide (DDSN), benzoin tosylate, t-butylphenyl-a-(p-toluenesulfonyloxy)-acetate and t-butyl-a-(p- toluenesulfonyloxy)-acetate, triarylsulfonium and diaryliodonium hexafluoroantimonate, hexafluoroarsenate, trifluoromethanesulfonate, iodonium perfluorooctanesulfonate, N-camphorsulfonyloxynaphthalimide, N-pentafluorophenylsulfonyloxynaphthalimide, ionic iodonium sulfonates such as diaryliodonium (alkyl or aryl) sulfonates and (di-t-butylphenyl)iodonium camphanylsulfonate, perfluoroalkanesulfonates such as perfluoropentanesulfonate, perfluorooctanesulfonate and perfluoromethanesulfonate, aryl (e.g., phenyl or benzyl) triflates such as triphenylsulfonium triflate or bis-(t-butylphenyl)iodonium triflate;pyrogallol derivatives (e.g., trisulfonate esters of pyrogallol), trifluoromethanesulfonate esters of hydroxyimides, α,α'-bis-sulfonyl-diazomethane, sulfonic acid esters of nitrogen-substituted benzyl alcohols, naphthoquinone-4-diazide, alkyl disulfones, or the like.
[0088] In some embodiments where the PAC is a free radical generator, the PAC includes n-phenylglycine; aromatic ketones including benzophenone, N,N'-tetramethyl-4,4'-diaminobenzophenone, N,N'-tetraethyl-4,4'-diaminobenzophenone, 4-methoxy-4'-dimethylaminobenzo-phenone, 3,3'-dimethyl-4-methoxybenzophenone, p,p'-bis(dimethylamino)benzo-phenone, p,p'-bis(diethylamino)-benzophenone; anthraquinones including 2-ethylanthraquinone, naphthaquinone, and phenanthraquinone; benzoin including benzoinmethylether, benzoinisopropylether, benzoin-n-butylether, benzoin-phenylether, methylbenzoin, and ethylbenzoin; benzyl derivatives including benzyl diphenyl disulfide, benzyl dimethyl ketal; acridine derivatives including 9-phenylacridine and 1,7-bis(9-acridinyl)heptane;thioxanthones including 2-chlorothioxanthone, 2-methylthioxanthone, 2,4-diethylthioxanthone, 2,4-dimethylthioxanthone, and 2-isopropylthioxanthone; acetophenones including 1,1-dichloroacetophenone, p-t-butyldichloro-acetophenone, 2,2-diethoxyacetophenone, 2,2-dimethoxy-2-phenylacetophenone, and 2,2-dichloro-4-phenoxyacetophenone; 2,4,5-triarylimidazole dimers including 2-(o-chlorophenyl)-4,5-diphenylimidazole dimer, 2-(o-chlorophenyl)-4,5-di-(m-methoxyphenyl)imidazole dimer, 2-(o-fluorophenyl)-4,5-diphenylimidazole dimer, 2-(o-methoxyphenyl)-4,5-diphenylimidazole dimer, 2-(p-methoxyphenyl)-4,5-diphenylimidazole dimer, 2,4-di(p-methoxyphenyl)-5-phenylimidazole dimer, 2-(2,4-dimethoxyphenyl)-4,5-diphenylimidazole dimer, and 2-(p-methylmercaptophenyl)-4,5-diphenyl imidazole dimer;combinations or the like.
[0089] Those skilled in the art will appreciate that the chemical compounds listed herein are merely intended to illustrate examples of PACs, and are not intended to limit the embodiments to only those PACs specifically described. Rather, any suitable PAC can be used, and all such PACs are contemplated to be within the scope of the embodiments.
[0090] In some embodiments, a crosslinking agent is added to the photoresist. The crosslinking agent reacts with one group of one of the carbon-hydrogen structures in the polymer resin, and also reacts with a second group of a separate one of the carbon-hydrogen structures, thereby crosslinking and bonding the two carbon-hydrogen structures together. Such bonding and crosslinking increases the molecular weight of the polymer product of the crosslinking reaction, and increases the overall tie density of the photoresist. Such increases in density and tie density help improve the resist pattern.
[0091] In some embodiments, the crosslinking agent has the following structure:
[0092] In other embodiments, the crosslinking agent has the following structure:
[0093] where C is carbon, n is in the range of 1 to 15; A and B independently include a hydrogen atom, a hydroxyl group, a halogenated group, an aromatic carbocyclic ring, or a straight chain or cyclic alkyl group having a number of carbons in the range of 1 to 12, an alkoxy group, a fluorinated group, an alkyl group, a fluoroalkoxy group, and each carbon C includes A and B; a first terminal carbon C at a first end of the carbon chain includes X, and a second terminal carbon C at a second end of the carbon chain includes Y, where X and Y independently include an amine group, a thiol group, a hydroxyl group, an isopropanol group, or an isopropylamine group, except that when n = 1, X and Y are bonded to the same carbon C. Specific examples of materials that can be used as crosslinking agents include the following:
[0094]
[0095] Alternatively, in addition to or instead of a crosslinking agent added to the photoresist composition, in some embodiments a coupling reagent is added, where the coupling reagent is added in addition to the crosslinking agent. The coupling reagent helps the crosslinking reaction by reacting with a group on a carbon-hydrogen structure of the polymer resin prior to the crosslinking agent, allowing the reaction energy of the crosslinking reaction to be reduced and the reaction rate to be increased. The coupling reagent on the bond then reacts with the crosslinking agent, thereby coupling the crosslinking agent to the polymer resin.
[0096] Alternatively, in some embodiments where a photoresist composition is added with a coupling agent and without a crosslinking agent, the coupling agent is used to couple one group of one of the carbon-hydrogen structures in the polymer resin to a second group of the other carbon-hydrogen structure, thereby crosslinking and bonding the two polymers together. However, in such embodiments the coupling agent is different from the crosslinking agent, the coupling agent does not remain as part of the polymer, and only assists in directly bonding one carbon-hydrogen structure to the other carbon-hydrogen structure.
[0097] In some embodiments, the coupling agent has the following structure:
[0098] where R is a carbon atom, a nitrogen atom, a sulfur atom, or an oxygen atom; M includes a chlorine atom, a bromine atom, an iodine atom, -N02, -S03", -H-, -CN, -NCO, -OCN, -C02", -OH, -OR*, -OC(0)CR*, -SR, -S02N(R*)2, -S02R*, SOR, -OC(0)R*, -C(0)OR*, -C(0)R*, -Si(OR*)3, -Si(R*)3, an epoxy group, or the like; and R* is a substituted or unsubstituted C1to C12alkyl, C1to C12aromatic, C1to C12aralkyl, or the like. In some embodiments, specific examples of materials that can be used as coupling agents include the following:
[0099]
[0100] The separate components of the photoresist are added in a solvent to help mix and dispense the photoresist. To help mix and dispense the photoresist, the solvent is chosen based at least in part on the materials chosen for the polymer resin and the PAC. In some embodiments, the solvent is chosen such that the polymer resin and the PAC can be uniformly dissolved in the solvent and dispensed on the layer to be patterned.
[0101] In some embodiments, a quencher is added to the photoresist to inhibit the diffusion of the acid / base / free radical generated in the photoresist. The quencher improves the resist pattern configuration and the stability of the photoresist over time.
[0102] In some embodiments, another additive added to the photoresist is a stabilizer that helps prevent unintended diffusion of the acid generated during exposure of the photoresist.
[0103] In some embodiments, another additive added to the photoresist is a dissolution inhibitor to help control the dissolution of the photoresist during development.
[0104] In some embodiments of photoresist, a coloring agent is another additive added to the photoresist. The coloring agent provides a viewpoint to inspect the photoresist and identify any defects that may need to be remedied before further processing.
[0105] In some embodiments, a surface leveling agent is added to the photoresist to help smooth the top surface of the photoresist so that the impacting light is not adversely altered by an uneven surface.
[0106] In some embodiments, for applicability, a polymer resin and PAC are added to the solvent along with any desired additives or other reagents. Once added, to achieve homogeneous composition throughout the photoresist, the mixture is then mixed to ensure there are no defects caused by uneven mixing or non-homogeneous components of the photoresist. Once mixed together, the photoresist can be stored before use or used immediately.
[0107] Once preparations are complete, such as Figure 2 As shown, photoresist is applied to the target layer 20 to form a resist layer 15. In some embodiments, the photoresist is applied using processes such as spin coating, dip coating, air-knife coating, curtain coating, wire-bar coating, gravure coating, lamination, extrusion coating, combinations thereof, or similar processes. In some embodiments, the thickness of the resist layer 15 is in the range of about 10 nm to about 300 nm.
[0108] Figure 3A and Figure 3B The diagram illustrates selectively exposing a resist layer 15 to form exposed regions 50 and unexposed regions 52. In some embodiments, radiation exposure is performed by placing a substrate coated with photoresist in a photolithography tool. The photolithography tool includes a mask 30 (or...) Figure 16 The mask 65), optical elements, and exposure radiation source to provide radiation 45 (or Figure 16 Radiation 97 in the exposure, and a movable platform for supporting and moving the substrate under exposure radiation.
[0109] In some embodiments, to initiate a reaction of the PAC, a radiation source (not shown) provides radiation 45 (e.g., ultraviolet light) to the resist layer 15, where the PAC then reacts with the polymer resin to chemically alter the photoresist layer regions impacted by the radiation 45. In some embodiments, the radiation 45 is electromagnetic radiation, such as g-line (wavelength of about 436 nm), i-line (wavelength of about 365 nm), ultraviolet radiation, deep ultraviolet radiation, extreme ultraviolet, electron beam, or the like. In some embodiments, the radiation source is selected from the group consisting of mercury lamp, xenon lamp, carbon arc lamp, KrF excimer laser light (wavelength 248 nm), ArF excimer laser light (wavelength 193 nm), F2 excimer laser light (wavelength 157 nm), or CO2 laser excited Sn plasma (extreme ultraviolet, wavelength 13.5 nm).
[0110] In some embodiments, optical elements (not shown) are used in the lithography tool to expand, reflect, or otherwise control the radiation before or after the mask 30 patterns the radiation 45. In some embodiments, the optical elements include one or more lenses, mirrors, filters, and combinations thereof to control the radiation 45 along its path.
[0111] Next, in step S120, the resist layer 15 undergoes a first post-exposure bake (PEB). In some embodiments, the resist layer 15 is heated at a temperature of about 50°C to 160°C for about 20 seconds to about 120 seconds. The post-exposure bake can be used to help generate, distribute, and react the acid / base / free radical generated during the exposure of the resist layer 15 due to the impact of the radiation 45. These aids help to create or enhance the chemical reaction that creates the chemical difference between the exposed regions 50 and the unexposed regions 52 in the photoresist layer.
[0112] In a first development step S125, the selectively exposed photoresist layer is then developed by applying a developer to the selectively exposed photoresist layer. As shown in FIG. 1C, the developer 57 is provided from a dispenser 62 to the resist layer 15. When the photoresist layer is a positive photoresist, the exposed regions 50 of the photoresist layer are removed by the developer 57, forming a pattern of openings 55 in the resist layer 15 to expose the target layer 20, as shown in FIG. 1D. On the other hand, when the photoresist layer is a negative photoresist, the unexposed regions 52 of the photoresist layer are removed by the developer 57, forming a pattern of openings 55 in the resist layer 15 to expose the target layer 20, as shown in FIG. 1E. Figure 4 Figure 5 Figure 5
[0113] In some embodiments, the photoresist developer 57 includes a solvent and an acid or a base. In some embodiments, the concentration of the solvent is between about 60 wt% and about 99 wt% based on the total weight of the photoresist developer 57. The concentration of the acid or base is between about 0.001 wt% and about 20 wt% based on the total weight of the photoresist developer 57. In particular embodiments, the concentration of the acid or base in the developer 57 is between about 0.01 wt% and about 15 wt% based on the total weight of the photoresist developer 57.
[0114] In some embodiments, the developer 57 is applied to the resist layer 15 using a spin coating process. In a spin coating process, the developer 57 is applied to the resist layer 15 from above the resist layer 15 as the substrate 10 is spun, as shown in FIG. 3. Figure 4 In some embodiments, the developer 57 is provided at a rate between about 5 ml / min and about 800 ml / min when the substrate 10 is spun at a rate between about 100 rpm and about 2000 rpm. In some embodiments, the temperature of the developer 57 is between about 10 °C and about 80 °C. In some embodiments, the developing step lasts between about 30 seconds and about 10 minutes.
[0115] While the spin coating step is one suitable method for developing the exposed resist layer 15, it is intended to be illustrative and not intended to limit the embodiments. Relatively, any suitable developing step can be used in place, including dip coating processes, puddle processes, and spray-on methods. All of these developing steps are included within the scope of the embodiments.
[0116] In some embodiments, the photoresist developer 57 includes a solvent and an acid or a base. In some embodiments, the concentration of the solvent is between about 60 wt% and about 99 wt% based on the total weight of the photoresist developer 57. The concentration of the acid or base is between about 0.001 wt% and about 20 wt% based on the total weight of the photoresist developer 57. In particular embodiments, the concentration of the acid or base in the developer 57 is between about 0.01 wt% and about 15 wt% based on the total weight of the photoresist developer 57.
[0117] In some embodiments, the developer 57 is an aqueous solution, such as an aqueous solution of tetramethylammonium hydroxide. In other embodiments, the developer 57 is an organic solvent. The organic solvent can be any suitable solvent. In some embodiments, the solvent is one or more selected from propylene glycol methyl ether acetate, propylene glycol monomethyl ether, propylene glycol ethyl ether, gamma-butyrolactone, cyclohexanone, ethyl lactate, methanol, ethanol, propanol, n-butanol, 4-methyl-2-pentanol, acetone, butanone, dimethylformamide, isopropyl alcohol, tetrahydrofuran, methyl isobutyl carbino (MIBC), n-butyl acetate, and methyl n-amyl ketone, tetrahydrofuran, and dioxane.
[0118] In some embodiments, in step S130, semiconductor device features are subsequently formed. In some embodiments, forming semiconductor device features includes extending the pattern of the opening 55 in the resist layer 15 into the target layer 20 to create the pattern of the opening 55' in the substrate 10, thereby transferring the pattern in the resist layer 15 into the target layer 20, such as... Figure 6 As shown in the figure. Using one or more suitable etchants, the pattern is extended into the target layer by etching. In some embodiments, the etching step removes a portion of the pattern layered between the photoresist pattern feature regions 50. In some embodiments, at least a portion of the photoresist layer pattern region 50 is removed during the etching step. In other embodiments, after etching the target layer, residual patterned resist layer 15 is removed using a suitable photoresist stripping solvent or photoresist ashing step. In some embodiments, the patterned features in the target layer 20 include a plurality of spaced protrusions (or projections) 135, separated by a distance D1. In some embodiments, the target layer 20 is a semiconductor material (e.g., silicon), and the protrusions 135 include fin structures. In some embodiments, field-effect transistors (FETs) are formed on the fin structures.
[0119] In some embodiments, the distance D1 separating the first protrusion 135 and the second protrusion 135 is in the range of about 1 nm to less than about 50 nm. In some embodiments, the depth D2 of the gap or groove 140 between the first protrusion 135 and the second protrusion 135 from the upper surface of the protrusion 135 is in the range of about 10 nm to about 300 nm. In some embodiments, the aspect ratio (distance D1 / depth D2) of the width (distance D1) and depth D2 of the gap or groove 140 is in the range of about 0.017 to about 2. In other embodiments, the aspect ratio (distance D1 / depth D2) is in the range of about 0.067 to about 0.5.
[0120] In some embodiments, step S130 of forming device features includes additional operations, such as forming a conductive layer 105 over the patterned target layer 20, as... Figure 7 As shown in the figure. In some embodiments, the conductive layer 105 is a metal layer. In some embodiments, the metal layer is formed of one or more metals selected from tungsten, copper, nickel, titanium, tantalum, aluminum, and alloys thereof.
[0121] In some embodiments, the conductive layer 105 is formed by chemical vapor deposition, atomic layer deposition, and physical vapor deposition, including sputtering. In some embodiments, the conductive layer 105 is conformally formed over the patterned features. In some embodiments, the conductive layer 105 has a thickness in a range from about 0.5 nm to about 20 nm. In some embodiments, adjacent patterned features are separated by a distance D3. In some embodiments, the distance D3 is in a range from about 1 nm to less than about 50 nm. In some embodiments, a depth D4 of the gap or recess 140 between adjacent features is in a range from about 10 nm to about 300 nm.
[0122] In some embodiments, at step S135, a protective layer composition is applied over the surface of the patterned target layer 20 to form a protective layer 110, as shown in Figure 8 In some embodiments, the protective layer 110 is a bottom anti-reflective coating or a planarization layer. In some embodiments, the protective layer 110 is a spin-on carbon layer. In some embodiments, the protective layer 110 has a thickness in a range from about 10 nm to about 2000 nm. In some embodiments, the thickness of the protective layer 110 is in a range from about 200 nm to about 1500 nm. A thickness of the protective layer 110 less than the disclosed range can not provide sufficient protection for the semiconductor device features in subsequent wet process steps. A thickness of the protective layer 110 greater than the disclosed range can have an unnecessary thickness and can not provide any significant protection for the underlying device features.
[0123] In some embodiments, the protective layer 110 is then subjected to a curing step S140 to evaporate solvents or crosslink the protective layer composition. The temperature and time of baking the protective layer 110 is sufficient to cure and dry the protective layer 110. In some embodiments, the protective layer 110 is heated at a temperature in a range from about 200 °C to about 400 °C for about 10 seconds to about 10 minutes. In other embodiments, the protective layer 110 is heated at a temperature in a range from about 250 °C to about 350 °C. A temperature of heating the protective layer 110 less than the disclosed range can result in insufficient crosslinking, while heating the protective layer 110 at a temperature greater than the disclosed range can result in damage to the protective layer and the underlying device features. In some embodiments, the curing step S140 is performed by exposing the protective layer 110 to actinic radiation. In some embodiments, the actinic radiation is ultraviolet radiation. In some embodiments, the ultraviolet radiation has a wavelength in a range from about 100 nm to less than about 300 nm.
[0124] In some embodiments, capillary forces between the protective layer composition and the target layer 20 or the conductive layer 105 enhance gap filling of the protective layer composition. Polar groups in the polymers of the protective layer composition can interact with the conductive layer 105 or the target layer 20, which can enhance gap filling.
[0125] In some embodiments, the protective layer, BARC, planarization layer, or spin-coated carbon layer is formed of a polymer component, which includes one or more [components / components]. Figure 9 Polymers of repeating units 1 to 12. Figure 9 In this context, a, b, c, d, e, f, g, h, and i each independently represent H, -OH, -ROH, -R(OH)2, -NH2, -NHR, -NR2, -SH, -RSH, or -R(SH)2, wherein at least one of a, b, c, d, e, f, g, h, and i on each repeating unit 1 to 12 is not H. R, R1, and R2 each independently represent C1 to C10 alkyl, C3 to C10 cycloalkyl, C1 to C10 hydroxyalkyl, C2 to C10 alkoxy, C2 to C10 alkoxyalkyl, C2 to C10 acetyl, C3 to C10 acetylalkyl, C1 to C10 carboxyl, C2 to C10 alkyl carboxyl, or C4 to C10 cycloalkyl carboxyl, and n is 2 to 1000. By heating or exposing to photochemical radiation, cross-linking can be achieved. Figure 9 The polymer formed by repeating units 1 to 12. In some embodiments, the protective layer component includes one or more crosslinking agents or coupling agents. When heated or exposed to photochemical radiation, the crosslinking agent crosslinks the protective layer component. According to embodiments of this disclosure, Figure 10A , Figure 10B and Figure 10C Examples of repeating units 1 to 12 are shown. In some embodiments, each repeating unit includes two or more functional groups.
[0126] In some embodiments, the polymer comprises repeating units having one or more hydroxyl, amino, or thiol groups. In some embodiments, each repeating unit comprises at least two functional groups selected from one or more -OH, -ROH, -R(OH)2, -NH2, -NHR, -NR2, -SH, -RSH, or -R(SH)2, wherein R is a C1 to C10 alkyl, C3 to C10 cycloalkyl, C1 to C10 hydroxyalkyl, C2 to C10 alkoxy, C2 to C10 alkoxyalkyl, C2 to C10 acetyl, C3 to C10 acetylalkyl, C1 to C10 carboxyl, C2 to C10 alkylcarboxyl, or C4 to C10 cycloalkylcarboxyl.
[0127] In some embodiments, the components disclosed herein include those having one or more Figure 9 to Figure 10Cpolymers of the disclosed repeat units. In some embodiments, at least one repeat unit includes three or more -OH, -ROH, -R(OH)2, -NH2, -NHR, -NR2, -SH, -RSH, or -R(SH)2. In some embodiments, the polymer includes at least one repeat unit having three or more -OH groups.
[0128] In some embodiments, the crosslinking agent has the following structure:
[0129] In other embodiments, the crosslinking agent has the following structure:
[0130] where C is carbon, n is in the range of 1 to 15; A and B independently include a hydrogen atom, a hydroxyl group, a halogenated group, an aromatic carbocyclic ring, or a straight chain or cyclic alkyl group having a number of carbons in the range of 1 to 12, an alkoxy group, a fluorinated group, an alkyl group, a fluorinated alkoxy group, and each carbon C includes A and B; a first terminal carbon C at a first end of the carbon chain includes X, and a second terminal carbon C at a second end of the carbon chain includes Y, where X and Y independently include an amine group, a thiol group, a hydroxyl group, an isopropyl alcohol group, or an isopropyl amine group, except when n = 1, X and Y are bonded to the same carbon C. Specific examples of materials that can be used as crosslinking agents include the following:
[0131]
[0132] Alternatively, in some embodiments, a coupling agent is added in addition to or instead of a crosslinking agent added to the protective layer composition. The coupling agent aids the crosslinking reaction by reacting with a group on a carbon-hydrogen structure on the polymer prior to the crosslinking agent, allowing the reaction energy of the crosslinking reaction to be reduced and the reaction rate to be increased. The coupling agent on the bond then reacts with the crosslinking agent, coupling the crosslinking agent to the polymer.
[0133] Alternatively, in some embodiments where a coupling agent is added to the protective layer composition without a crosslinking agent, the coupling agent is used to couple a group of one of the carbon-hydrogen structures in the polymer to a second group of a separate carbon-hydrogen structure, crosslinking and bonding the two polymers together. However, in such embodiments the coupling agent is different from the crosslinking agent, the coupling agent is not retained as part of the polymer, and only aids in directly bonding one carbon-hydrogen structure to another carbon-hydrogen structure.
[0134] In some embodiments, the coupling agent has the following structure:
[0135] Wherein R is a carbon atom, nitrogen atom, sulfur atom, or oxygen atom; M includes chlorine atom, bromine atom, iodine atom, --NO2, --SO3-, --H--, --CN, --NCO, --OCN, --CO2-, --OH, --OR*, --OC(O)CR*, --SR, --SO2N(R*)2, --SO2R*, SOR, --OC(O)R*, --C(O)OR*, --C(O)R*, --Si(OR*)3, --Si(R*)3, epoxy group, or the like; and R* is a substituted or unsubstituted C1 to C12 alkyl, C1 to C12 aromatic, C1 to C12 aralkyl, or the like. In some embodiments, specific examples of materials that can be used as coupling agents include the following:
[0136]
[0137] In some embodiments, a protective layer 110 is formed by preparing a protective coating component of a polymer and a selective crosslinking agent or coupling agent in a solvent. The solvent can be any suitable solvent for dissolving the polymer. The protective coating component is applied over the target layer 20, for example by spin coating. The protective coating component is then baked to dry the protective layer and the crosslinked polymer, as described herein.
[0138] In some embodiments, in step S145, a resist layer component is then applied over the protective layer 110 to form a resist layer 125a, such as... Figure 11 As shown in the figure. In some embodiments, the resist layer 125 includes an intermediate layer 115 and a photoresist layer 120 disposed above the intermediate layer 115. In some embodiments, the intermediate layer 115 is a silicon-containing layer. In some embodiments, the protective layer 110 is the bottom layer of a three-layer resist 125b, wherein the three-layer resist 125b is formed by the protective layer 110 (bottom layer), the intermediate layer 115, and the photoresist layer 120. In some embodiments, before curing the protective layer 110, the resist layer components are coated on the protective layer 110, and the resist layer 125a and the protective layer 110 are baked together in a single curing step to remove solvents in the layers and to cause crosslinking of the protective layer.
[0139] Photoresist layer 120 can be disclosed in this paper Figure 2 It is formed by any photoresist component of the resist layer 15.
[0140] The middle layer 115 of the three-layer resist 125b structure can have a composition that provides antireflective properties for the lithography step and / or hardmask properties. In some embodiments, the middle layer 115 includes a silicon-containing layer, such as a silicon hardmask material. The middle layer 115 can include a silicon-containing inorganic polymer. In other embodiments, the middle layer 115 includes a siloxane polymer. In other embodiments, the middle layer 115 includes silicon oxide (e.g., spin-on glass (SOG)), silicon nitride, silicon oxynitride, polysilicon, a metal-containing organic polymer material including a metal (e.g., titanium, titanium nitride, aluminum, and / or tantalum), and / or other suitable materials. The middle layer 115 can be bonded to adjacent layers, such as by covalent bonds, hydrogen bonds, or hydrophilic-hydrophilic forces.
[0141] Accordingly, the middle layer 115 can include a composition that allows for the formation of covalent bonds between the middle layer 115 and an overlying photoresist layer 120 after an exposure process and / or a subsequent bake process. In some embodiments, the middle layer 115 includes an additive compound or a composition with a photo-base generator. The photo-base generator generates a base that interacts with the exposure photoresist and provides covalent bonds between the composition of the middle layer 115 and the overlying photoresist layer 120. In some embodiments, the middle layer 115 includes a siloxane polymer and a photo-base generator.
[0142] In some embodiments, after the photoresist layer 120 is formed, a pre-exposure bake (pre-bake) of the photoresist layer is performed in step S150 to cure and dry the photoresist prior to exposure to radiation (as shown in FIG. 1B). The pre-exposure bake conditions are the same as step S110 disclosed herein. Figure 1
[0143] In some embodiments, the photoresist layer 120 is then selectively or patternwise exposed to actinic radiation in step S155, followed by a post-exposure bake in step S160 and development in step S165 (refer to FIG. 1C) to form openings 130 or a pattern in the photoresist layer 120, as shown in FIG. 1D. Figure 1 Figure 12A The selective or patternwise exposure is performed under the same conditions and parameters disclosed for step S115 and Figure 3A and Figure 3B The post-exposure bake is performed under the same conditions and parameters disclosed for step S120 herein, and the development is performed under the same conditions and parameters disclosed for step S125 herein.
[0144] In some embodiments, additional semiconductor device fabrication steps S170 (refer to FIG. 1E) are then performed. Figure 1 In some embodiments, using a suitable etchant selectively applied to each corresponding layer, the opening 130 or pattern in the photoresist layer 120 is extended through an optional intermediate layer 115 and a protective layer 110 to form an extended opening 130' or pattern. In some embodiments, the exposed portion of the conductive layer 105 in the extended opening 130' or pattern is removed using a suitable etching step, such as... Figure 12B As shown in the figure. The photoresist layer 120 and the protective layer 110 are subsequently removed using suitable photoresist stripping, etching, or plasma ashing steps, as shown. Figure 12C As shown in the image.
[0145] In other embodiments, the additional manufacturing step S170 includes forming openings or patterns in the photoresist layer 120, such as Figure 13A As shown in the diagram, an opening 145 or pattern extends through an optional intermediate layer 115 and a protective layer 110 to form an extended opening 145' or through-hole, as shown in the diagram. Figure 13B As shown, the underlying semiconductor device features (e.g., conductive layer 105) are exposed. The photoresist layer 120 is removed using a suitable photoresist stripping or plasma ashing step, and the extended openings 145' or vias are filled using a suitable deposition technique, subsequently forming conductive contacts 150 connected to the conductive layer 105, as shown. Figure 13C As shown in the figure. In some embodiments, the deposition technique includes CVD, PVD, or ALD techniques. In some embodiments, the conductive contact 150 is formed of one or more metals selected from tungsten, copper, nickel, titanium, tantalum, aluminum, and alloys thereof. In some embodiments, a planarization step (e.g., chemical mechanical polishing or etching back) is performed to remove metal deposited on the upper surface of the retained resist layer, such as intermediate layer 115.
[0146] In some embodiments, the protective layer disclosed herein is used in the fabrication of semiconductor devices, such as the gate structure of a field-effect transistor. For example, the embodiments disclosed herein are generally applicable not only to planar FETs, but also to fin FETs, dual-gate FETs, gate-all-around FETs, omega-gate FETs, or gate-all-around (GAA) FETs, and / or nanowire transistors, or any suitable device having one or more layers of work function adjustment material (WFM) in the gate structure.
[0147] In FET structures, multiple devices with different threshold voltages (Vt) are formed, and the composition and thickness of the metal gate layer plays an important role in defining Vt. By adjusting the material and / or thickness of one or more work function adjusting material layers disposed between the gate dielectric layer and the bulk metal gate electrode layer (e.g., W layer), multiple FETs with different threshold voltages can be achieved. However, when the WFM layer proceeds to etching and cleaning steps, the etchant or cleaning solution can damage the WFM layer in the portions that are not subjected to etching or cleaning, which affects the work function of the WFM layer, and thus affects the threshold voltage and degrades device performance.
[0148] In the following embodiments, methods of protecting the WFM layer from damage during etching and cleaning steps are disclosed.
[0149] According to embodiments of the present disclosure, Figure 14 A cross-sectional view of a gate structure of FETs with different threshold voltages is shown. In some embodiments, the semiconductor device includes a first n-type field effect transistor N1, a second n-type field effect transistor N2, a third n-type field effect transistor N3, a first p-type field effect transistor P1, a second p-type field effect transistor P2, and a third p-type field effect transistor P3. The absolute value of the threshold voltage of the first n-type field effect transistor N1 is less than the absolute value of the threshold voltage of the second n-type field effect transistor N2, and the absolute value of the threshold voltage of the second n-type field effect transistor N2 is less than the absolute value of the threshold voltage of the third n-type field effect transistor N3. Similarly, the absolute value of the threshold voltage of the first p-type field effect transistor P1 is less than the absolute value of the threshold voltage of the second p-type field effect transistor P2, and the absolute value of the threshold voltage of the second p-type field effect transistor P2 is less than the absolute value of the threshold voltage of the third p-type field effect transistor P3.
[0150] According to embodiments of the present disclosure, Figure 15A to Figure 15R A cross-sectional view of a gate structure of FETs with different threshold voltages is shown. In some embodiments, the semiconductor device includes a first n-type field effect transistor N1, a second n-type field effect transistor N2, a third n-type field effect transistor N3, a first p-type field effect transistor P1, a second p-type field effect transistor P2, and a third p-type field effect transistor P3. The absolute value of the threshold voltage of the first n-type field effect transistor N1 is less than the absolute value of the threshold voltage of the second n-type field effect transistor N2, and the absolute value of the threshold voltage of the second n-type field effect transistor N2 is less than the absolute value of the threshold voltage of the third n-type field effect transistor N3. Similarly, the absolute value of the threshold voltage of the first p-type field effect transistor P1 is less than the absolute value of the threshold voltage of the second p-type field effect transistor P2, and the absolute value of the threshold voltage of the second p-type field effect transistor P2 is less than the absolute value of the threshold voltage of the third p-type field effect transistor P3. Figure 14 A cross-sectional view of a gate structure of FETs with different threshold voltages is shown. In some embodiments, the semiconductor device includes a first n-type field effect transistor N1, a second n-type field effect transistor N2, a third n-type field effect transistor N3, a first p-type field effect transistor P1, a second p-type field effect transistor P2, and a third p-type field effect transistor P3. The absolute value of the threshold voltage of the first n-type field effect transistor N1 is less than the absolute value of the threshold voltage of the second n-type field effect transistor N2, and the absolute value of the threshold voltage of the second n-type field effect transistor N2 is less than the absolute value of the threshold voltage of the third n-type field effect transistor N3. Similarly, the absolute value of the threshold voltage of the first p-type field effect transistor P1 is less than the absolute value of the threshold voltage of the second p-type field effect transistor P2, and the absolute value of the threshold voltage of the second p-type field effect transistor P2 is less than the absolute value of the threshold voltage of the third p-type field effect transistor P3. Figure 15A to Figure 15R One or more additional steps can be provided before, during, and after the stages shown, and some of the steps described below can be replaced or eliminated for other embodiments of the method. The order of the operations / processes can be interchanged. Thus, depending on the structure of the semiconductor device, some of the steps shown can be omitted or replaced by another step Figure 15A to Figure 15R One or more steps shown.
[0151] Figure 15AThe diagram illustrates multiple channel regions, namely a first n-type field-effect transistor N1, a second n-type field-effect transistor N2, a third n-type field-effect transistor N3, a first p-type field-effect transistor P1, a second p-type field-effect transistor P2, and a third p-type field-effect transistor P3. An interface layer 210 is formed above each channel region. A gate dielectric layer (e.g., a high-dielectric-constant gate dielectric layer) 230 is formed above each interface layer 210. A first conductive layer 235 (as a capping layer) is formed above each gate dielectric layer 230.
[0152] In some embodiments, the interface layer 210 is formed using chemical oxidation. In some embodiments, the interface layer 210 comprises one of silicon oxide, silicon nitride, and a mixture of silicon oxide and germanium. In some embodiments, the thickness of the interface layer 210 is in the range of about 0.2 nm to about 6 nm. In some embodiments, the gate dielectric layer 230 comprises one or more layers of dielectric material, such as silicon oxide, silicon nitride, or a high-dielectric-constant dielectric material, other suitable dielectric materials, and / or combinations thereof. Examples of high-dielectric-constant dielectric materials include HfO2, HfSiO, HfSiON, HfTaO, HfTiO, HfZrO, zirconium oxide, aluminum oxide, titanium oxide, hafnium dioxide-alumina (HfO2-Al2O3) alloy, La2O3, HfO2-La2O3, Y2O3, or other suitable high-dielectric-constant dielectric materials, and / or combinations thereof. The gate dielectric layer 230 can be formed by CVD, ALD, or any suitable method. In one embodiment, to ensure that the formed gate dielectric layer 230 has a uniform thickness surrounding the respective channel layers, the gate dielectric layer 230 is formed using a highly conformal deposition process such as ALD. In some embodiments, the thickness of the gate dielectric layer 230 is in the range of about 1 nm to about 100 nm. In some embodiments, the first conductive layer 235 is a TiN or TiSiN layer formed using CVD, ALD, or any suitable method.
[0153] In some embodiments, a second conductive layer 245 (as a first barrier layer) is formed on the first conductive layer 235, such as Figure 15B As shown in the figure. In some embodiments, the first conductive layer 235 is removed after the annealing step and the second conductive layer 245 is not formed. In some embodiments, the second conductive layer 245 comprises a metal nitride, such as WN, TaN, TiN, and TiSiN. In some embodiments, TaN is used. The thickness of the second conductive layer 245 is in the range of about 0.3 nm to about 30 nm, and in other embodiments, it is in the range of about 0.5 nm to about 25 nm. In some embodiments, the second conductive layer 245 serves as a barrier layer or an etch stop layer. In some embodiments, the second conductive layer 245 is thinner than the first conductive layer 235.
[0154] In some embodiments, such asFigure 15C As shown in FIG. 2, a WFM layer 200 is formed. In some embodiments, the WFM layer 200 is an n-type WFM layer. In some embodiments, the WFM layer 200 is formed of a conductive material, such as a single layer of TiN, WN, TaAlC, TiC, TaAl, TaC, Co, Al, TiAl, or TiAlC, or a multilayer of two or more of the above materials. In some embodiments, an aluminum-containing layer (e.g., TiAl, TiAlC, TaAl, and / or TaAlC) is used as the n-type WFM layer 200 for n-type FETs, and one or more of TaN, TiN, WN, TiC, WCN, MoN, and / or Co is used as the p-type WFM layer for p-type FETs. In some embodiments, the n-type WFM layer is composed of a material having a low work function in the range of about 2.5 eV to about 4.4 eV and / or having a low electronegativity. In some embodiments, the p-type WFM layer is composed of a material having a high work function in the range of about 4.3 eV to about 5.8 eV and / or having a high electronegativity. In some embodiments, the n-type WFM layer 200 has a thickness in the range of about 0.6 nm to about 40 nm, and in other embodiments in the range of about 1 nm to about 20 nm.
[0155] A first patterning step is performed to remove the n-type WFM layer 200 from the regions of the first p-type field effect transistor PI, the second p-type field effect transistor P2, and the third p-type field effect transistor P3. In some embodiments, the n-type WFM layer 200 is removed by one or more etching steps, such as a dry etching step, a wet etching step, or a combination thereof. In some embodiments, the n-type WFM layer 200 is removed by a dry etching step using a gas including N2and H2, a gas including O2 / Cl2, or O2 gas. Figure 9 to Figure 10C A protective layer 260 formed of a protective layer composition disclosed herein is formed over each n-type WFM layer 200, and is patterned to expose the n-type WFM layer 200 in the regions of the p-type FETs, as shown in FIG. 3. In some embodiments, the protective layer 260 is formed by a deposition step, such as a physical vapor deposition (PVD) step, a chemical vapor deposition (CVD) step, an atomic layer deposition (ALD) step, or a combination thereof. Figure 2 A photoresist layer 205 formed of a photoresist composition disclosed herein is formed over each protective layer 260, as shown in FIG. 4. In some embodiments, the photoresist layer 205 is formed by a deposition step, such as a PVD step, a CVD step, an ALD step, or a combination thereof. Figure 15D As shown in FIG. 5, the photoresist layer 205 is patterned to expose the protective layer 260 in the regions of the p-type FETs by using one or more photolithography steps. Then, the exposed protective layer 260 is removed using one or more etching steps to expose the n-type WFM layer 200 in the regions of the p-type FETs, as shown in FIG. 6. In some embodiments, the protective layer 260 is removed by a dry etching step using a gas including N2and H2, a gas including O2 / Cl2, or O2 gas. Figure 15E
[0156] Then, the n-type WFM layer 200 in the regions of the p-type FETs is removed using a suitable etching step, as shown in FIG. 7. In some embodiments, the n-type WFM layer 200 is removed by a dry etching step using a gas including N2and H2, a gas including O2 / Cl2, or O2 gas. Figure 15F In some embodiments, the etching step includes a wet etching step. In some embodiments, the etching solution (etchant) includes an aqueous solution of HC1 and H2O2, an aqueous solution of NH4OH and H2O2 mixed, an aqueous solution of HC1 and NH4OH and H2O2 mixed, an aqueous solution of HF and NH4OH and H2O2 mixed, and / or an aqueous solution of H3PO4 and H2O2. The wet etching substantially stops at the first barrier layer (second conductive layer 245), so it can serve as an etch stop layer. In some embodiments, the gate dielectric layer 230 replaces the first barrier layer as the etch stop layer. Because the protective layer 260 is disposed over the first n-type WFM layer 200 above the n-type FET region, the wet etching step is prevented from damaging the first n-type WFM layer 200 above the n-type FET.
[0157] After the etching step, the photoresist layer 205 and the protective layer 260 are removed, as shown in FIG. 2D. Figure 15G In some embodiments, a plasma ashing step using an oxygen-containing gas is performed to remove the organic photoresist layer 205 and the protective layer 260. In some embodiments, the plasma ashing step uses an N2 / H2-based plasma or a CF4-based plasma.
[0158] In some embodiments, a third conductive layer 250 (as a second barrier layer) is formed over the n-type WFM layer 200 of the n-type FET and the second conductive layer 245 (first barrier layer) of the p-type FET region, as shown in FIG. 2E. Figure 15H In some embodiments, a blanket layer of the third conductive layer 250 (second barrier layer) is formed over the regions of the n-type and p-type FETs. In some embodiments, TaN is used as the third conductive layer 250. In some embodiments, the thickness of the third conductive layer 250 is in a range from about 0.3 nm to about 30 nm, and in other embodiments, in a range from about 0.5 nm to about 25 nm.
[0159] A blanket layer of the first p-type WFM layer 280 is formed over the third conductive layer 250 of each n-type and p-type FET region, as shown in FIG. 2F. Figure 15I In some embodiments, the thickness of the first p-type WFM layer 280 is in a range from about 0.5 nm to about 20 nm, and in other embodiments, in a range from about 1 nm to about 10 nm.
[0160] Next, a second patterning step is performed to remove the first p-type WFM layer 280 from the regions of the first n-type field effect transistor N1 and the second n-type field effect transistor N2, the second p-type field effect transistor P2 and the third p-type field effect transistor P3. A second protective layer 265 formed from the protective layer composition disclosed herein with reference to Figure 9 to Figure 10C A second protective layer 265 formed from the protective layer composition disclosed herein with reference to Figure 2A second photoresist layer 215 formed of any photoresist composition is formed over the second protective layer 265, as shown in Figure 15J FIG. 6B. The second photoresist layer 215 is patterned to expose the second protective layer 265 of the first n-type field effect transistor Nl and second n-type field effect transistor N2, second p-type field effect transistor P2 and third p-type field effect transistor P3 regions by using one or more photolithography steps. Then, the exposed second protective layer 265 is removed to expose the first p-type WFM layer 280 of the first n-type field effect transistor Nl and second n-type field effect transistor N2, second p-type field effect transistor P2 and third p-type field effect transistor P3 regions by using one or more plasma etching steps, as shown in Figure 15K FIG. 6C. The plasma etching uses a gas including N2and H2, a gas including O2 / Cl2, or O2 gas.
[0161] Then, the first p-type WFM layer 280 in the first n-type field effect transistor Nl and second n-type field effect transistor N2, second p-type field effect transistor P2 and third p-type field effect transistor P3 regions is removed by using a suitable etching step, as shown in Figure 15L FIG. 6D. In some embodiments, the etching step includes a wet etching step. In some embodiments, the etching solution (etchant) includes an aqueous solution of H3PO4and H2O2, an aqueous solution of HCl and NH4OH mixed with H2O2. The wet etching substantially stops at the second barrier layer (third conductive layer 250), so it can serve as an etching stop layer. Because the second protective layer 265 is disposed over the third n-type field effect transistor N3 and first p-type field effect transistor Pl, the wet etching step is prevented from damaging the n-type WFM layer 200 and first p-type WFM layer 280 over the third n-type field effect transistor N3.
[0162] After the etching step, the second photoresist layer 215 and second protective layer 265 are removed, as shown in Figure 15M FIG. 6E. In some embodiments, a plasma ashing step using an oxygen-containing gas is performed to remove the organic second photoresist layer 215 and second protective layer 265. In some embodiments, the plasma ashing step uses a N2 / H2-based plasma or a CF4-based plasma.
[0163] In some embodiments, a blanket layer of the second p-type WFM layer 285 is formed over the third conductive layer 250 of the first n-type field effect transistor Nl and second n-type field effect transistor N2, second p-type field effect transistor P2 and third p-type field effect transistor P3 regions, and over the first p-type WFM layer 280 of the third n-type field effect transistor N3 and first p-type field effect transistor Pl regions, as shown in Figure 15NAs shown in the figure. In some embodiments, the thickness of the second p-type WFM layer 285 is in the range of about 0.5 nm to about 20 nm, and in other embodiments it is in the range of about 1 nm to about 10 nm.
[0164] Next, a third patterning step is performed to remove the second p-type WFM layer 285 from the regions of the first n-type field-effect transistor N1 and the third p-type field-effect transistor P3. In some embodiments, as referenced herein... Figure 9 to Figure 10C The third protective layer 270, formed by the exposed protective layer composition, is formed above each of the second p-type WFM layers 285, and is referenced herein. Figure 2 Any photoresist components exposed form a third photoresist layer 225 that is formed above the third protective layer 270, such as Figure 15O As shown in the diagram. A third photoresist layer 225 is patterned using one or more photolithography steps to expose a third protective layer 270 for the regions of the first n-type field-effect transistor N1 and the third p-type field-effect transistor P3. Next, the exposed third protective layer 270 is removed using one or more plasma etching steps to expose a second p-type WFM layer 285 for the regions of the first n-type field-effect transistor N1 and the third p-type field-effect transistor P3, as shown in the diagram. Figure 15P As shown in the diagram. Plasma etching uses gases including N2 and H2, gases including O2 / Cl2, or O2 gas.
[0165] Next, using appropriate etching steps, the second p-type WFM layer 285 in the regions of the first n-type field-effect transistor N1 and the third p-type field-effect transistor P3 is removed, as follows: Figure 15Q As shown in the figure. In some embodiments, the etching step includes a wet etching step. In some embodiments, the etching solution (etchant) includes an aqueous solution of H3PO4 and H2O2, or an aqueous solution of a mixture of HCl and NH4OH and H2O2. Wet etching substantially stops at the second barrier layer (third conductive layer 250), thus serving as an etching stop layer. Because the third protective layer 270 is disposed above the second n-type field-effect transistor N2, the third n-type field-effect transistor N3, the first p-type field-effect transistor P1, and the second p-type field-effect transistor P2, it prevents the wet etching step from damaging the n-type WFM layer 200 above the second n-type field-effect transistor N2 and the third n-type field-effect transistor N3, and the second p-type WFM layer 285 above the first p-type field-effect transistor P1 and the second p-type field-effect transistor P2.
[0166] After the etching step, the third photoresist layer 225 and the third protective layer 270 are removed, as follows: Figure 15RIn some embodiments, a plasma ashing step using an oxygen-containing gas is performed to remove the organic third photoresist layer 225 and the third protective layer 270. In some embodiments, the plasma ashing step uses a N2 / H2-based plasma or a CF4-based plasma.
[0167] In some embodiments, an adhesive layer 290 is then formed over the third conductive layer 250 of the first n-type field effect transistor N1 and third p-type field effect transistor P3 regions, over the second p-type WFM layer 285 of the second n-type field effect transistor N2 and third n-type field effect transistor N3 and first p-type field effect transistor P1 and second p-type field effect transistor P2 regions, and a bulk gate electrode layer 295 is formed over the adhesive layer 290 to provide Figure 14 A semiconductor device is shown in FIG. 1.
[0168] In some embodiments, the adhesive layer 290 is formed of TiN, Ti, or Co. In some embodiments, the bulk gate electrode layer 295 includes one or more layers of conductive material, such as polysilicon, aluminum, copper, titanium, tantalum, tungsten, cobalt, molybdenum, tantalum nitride, nickel silicide, cobalt silicide, TiN, WN, TiAl, TiAlN, TaCN, TaC, TaSiN, metal alloys, other suitable materials, and / or combinations thereof.
[0169] In some embodiments, the selective exposure resist layer 15 (or resist layer 125a) is performed using extreme ultraviolet lithography to form the exposed regions 50 and unexposed regions 52. In some embodiments, in the extreme ultraviolet lithography step, a reflective mask 65 is used to form a patterned exposure light, as shown in FIG. 2. The reflective mask 65 includes a low thermal expansion glass substrate 70 with a reflective multilayer 75 of Si and Mo formed thereon. A capping layer 80 and an absorbing layer 85 are formed on the reflective multilayer 75. A backside conductive layer 90 is formed on the backside of the low thermal expansion glass substrate 70. In the extreme ultraviolet lithography, extreme ultraviolet radiation 95 is directed at the reflective mask 65 at an incident angle of about 6°. The reflective multilayer 75 of Si / Mo reflects a portion of the extreme ultraviolet radiation 95 as reflected radiation 97 toward the photoresist-coated substrate 10, while a portion of the extreme ultraviolet radiation 95 that is incident to the absorbing layer 85 is absorbed by the mask 65. In some embodiments, additional optical elements (including mirrors) are between the reflective mask 65 and the photoresist-coated substrate 10. Figure 16
[0170] Other embodiments include other steps before, during, or after the above steps. In some embodiments, the disclosed methods include forming a semiconductor device (including a fin field effect transistor structure). In some embodiments, a plurality of active fins are formed on a semiconductor substrate. Such embodiments further include etching the substrate through openings in a patterned hardmask to form trenches in the substrate; filling the trenches with a dielectric material; performing a chemical mechanical polishing (CMP) process to form a shallow trench isolation (STI) feature; and epitaxially growing or recessing the STI feature to form a fin-shaped active region. In some embodiments, one or more gate electrodes are formed on the substrate. Some embodiments include forming gate spacers, doped source / drain regions, contacts to gate / source / drain features, etc. In other embodiments, a target pattern is formed as a metal line in a multilayer interconnect structure. For example, a metal line can be formed in an inter-layer dielectric (ILD) layer of a substrate, which is etched to form a plurality of trenches. The trenches can be filled with a conductive material (e.g., metal), and the conductive material can be polished using a process such as chemical mechanical planarization to expose the patterned ILD layer, thereby forming a metal line in the ILD layer. The above are non-limiting examples of devices / structures that can be fabricated and / or improved using the methods described herein.
[0171] According to embodiments of the present disclosure, active components, such as diodes, field effect transistors, metal-oxide semiconductor field effect transistors (MOSFETs), complementary metal-oxide semiconductor (CMOS) transistors, bipolar transistors, high voltage transistors, high frequency transistors, fin FETs, other three-dimensional (3D) FETs, other memory cells, and combinations thereof, are formed in some embodiments.
[0172] The novel protective layer compositions and semiconductor device fabrication methods according to the present disclosure provide high yields of semiconductor device features. The protective layers of the present disclosure provide improved protection of underlying semiconductor device features from damage and defects caused by wet cleaning and wet etching steps.
[0173] One embodiment of the present disclosure is a method of fabricating a semiconductor device, comprising forming a protective layer over a substrate having a plurality of protrusions and recesses. The protective layer comprises a polymeric composition, the polymeric composition comprising a polymer having recurring units, the recurring units comprising one or more of:
[0174]
[0175] wherein a, b, c, d, e, f, g, h, and i each independently represent H, -OH, -ROH, -R(OH)2, -NH2, -NHR, -NR2, -SH, -RSH, or -R(SH)2, wherein at least one of a, b, c, d, e, f, g, h, and i on each repeat unit is not H. R, R1, and R2each independently represent C1to C10alkyl, C3to C10cycloalkyl, C1to C10hydroxyalkyl, C2to C10alkoxy, C2to C10alkoxyalkyl, C2to C10acetyl, C3to C10acetylalkyl, C1to C10carboxyl, C2to C10alkylcarboxyl, or C4to C10cycloalkylcarboxyl, and n is 2 to 1000. A resist layer is formed over the protective layer, and the patterned resist layer. In one embodiment, the polymer comprises one or more repeat units selected from the group consisting of the following structures:
[0176]
[0177]
[0178] In one embodiment, the method comprises heating the protective layer at a temperature in the range of 200 °C to 400 °C prior to forming the resist layer. In one embodiment, the method comprises forming a conductive layer over the protrusions and in the recesses prior to forming the protective layer. In one embodiment, the method comprises removing portions of the conductive layer after patterning the resist layer. In one embodiment, the method comprises forming a conductive contact over the conductive layer. In one embodiment, the conductive layer is a conformal metal layer. In one embodiment, the resist layer comprises a silicon-containing intermediate layer formed over the protective layer and a photoresist layer formed over the intermediate layer. In one embodiment, the protective layer is a bottom antireflective coating.
[0179] Another embodiment of the present disclosure is a method of manufacturing a semiconductor device, including forming a polymer layer over a plurality of features disposed over a substrate, wherein the plurality of features are separated by a distance Dl of less than 50 nm, and two adjacent features are separated by a gap having a depth D2 from a top surface of the features of greater than 10 nm. The polymer layer fills the gap and extends over the top surface of the features. A photoresist layer is formed over the polymer layer. The photoresist layer is selectively exposed to actinic radiation. Developing the selectively exposed photoresist layer forms a photoresist pattern. In an embodiment, the method includes crosslinking the polymer layer prior to forming the photoresist layer. In an embodiment, the plurality of features include a metal layer disposed over a plurality of protrusions extending from the substrate. In an embodiment, the method includes etching the metal layer after developing the selectively exposed photoresist layer. In an embodiment, the method includes forming a conductive contact contacting the metal layer after developing the selectively exposed photoresist layer. In an embodiment, the polymer includes repeating units having one or more hydroxyl, amine, or thiol groups. In an embodiment, the distance Dl / depth D2 is in a range of 0.017 to 2.
[0180] Another embodiment of the present disclosure is a method of manufacturing a semiconductor device, including forming a spin-on carbon layer including a spin-on carbon composition over a substrate having a topography including a plurality of protrusions separated from each other, the protrusions having an upper surface. A first protrusion and a second protrusion are separated by a distance Dl in a range of 1 nm to less than 50 nm, and a depth D2 of a gap between the first protrusion and the second protrusion from the upper surface is in a range of 10 nm to 300 nm. The spin-on carbon composition includes a polymer including repeating units having one or more functional groups selected from -OH, -ROH, -R(OH)2, -NH2, -NHR, -NR2, -SH, -RSH, or -R(SH)2, where R is a C1 to C10 alkyl, C3 to C10 cycloalkyl, C1 to C10 hydroxyalkyl, C2 to C10 alkoxy, C2 to C10 alkoxyalkyl, C2 to C10 acetyl, C3 to C10 acetyalkyl, C1 to C10 carboxyl, C2 to C10 alkylcarboxyl, or C4 to C10 cycloalkylcarboxyl. A photoresist layer is formed over the spin-on carbon layer. The photoresist layer is patternwise imaged, and the photoresist layer is developed to form a pattern in the photoresist layer. In an embodiment, the spin-on carbon composition includes a crosslinking agent. In an embodiment, the method includes heating the spin-on carbon layer at a temperature in a range of 200 °C to 400 °C prior to forming the photoresist layer. In an embodiment, the method includes crosslinking the spin-on carbon layer by exposing the spin-on carbon layer to ultraviolet radiation having a wavelength less than 300 nm prior to forming the photoresist layer. In an embodiment, the spin-on carbon layer has a thickness in a range of 10 nm to 2000 nm. In an embodiment, the distance Dl / depth D2 is in a range of 0.017 to 2.
[0181] Another embodiment of the present disclosure is a method of manufacturing a semiconductor device, comprising forming a planarization layer over a first feature and a second feature disposed over a substrate, the planarization layer comprising a planarization layer composition. The first feature and the second feature protrude from the substrate and are separated by a first distance. The planarization layer composition comprises a polymer having one or more repeat units selected from:
[0182]
[0183] wherein a, b, c, d, e, f, g, h, and i each independently represent H, -OH, -ROH, -R(OH)2, -NH2, -NHR, -NR2, -SH, -RSH, or -R(SH)2, and each repeating unit includes at least one of -OH, -ROH, -R(OH)2, -NH2, -NHR, -NR2, -SH, -RSH, or -R(SH)2. R, R1, and R2 each independently represent C1 to C10 alkyl, C3 to C10 cycloalkyl, C1 to C10 hydroxyalkyl, C2 to C10 alkoxy, C2 to C10 alkoxyalkyl, C2 to C10 acetyl, C3 to C10 acetyalkyl, C1 to C10 carboxyl, C2 to C10 alkylcarboxyl, or C4 to C10 cycloalkylcarboxyl, and n is 2 to 1000. A photoresist layer is formed over the planarization layer. The photoresist layer is selectively exposed to actinic radiation. The selectively exposed photoresist layer is developed to form a pattern in the photoresist layer. In one embodiment, the method includes forming a silicon-containing intermediate layer over the planarization layer prior to forming the photoresist layer. In one embodiment, the first feature and the second feature include a surface metal layer having a thickness in a range of 0.5 nm to 20 nm. In one embodiment, the method includes crosslinking the planarization layer prior to forming the photoresist layer. In one embodiment, the planarization layer composition further includes a crosslinking agent. In one embodiment, the method includes heating the planarization layer at a temperature in a range of 200 °C to 400 °C prior to forming the photoresist layer. In one embodiment, the method includes exposing the planarization layer to ultraviolet radiation having a wavelength in a range of 100 nm to 300 nm prior to forming the photoresist layer. In one embodiment, the method includes removing a portion of the first feature or the second feature after patterning the photoresist layer. In one embodiment, the method includes filling a via in the pattern with a conductive material. In one embodiment, each repeating unit includes at least two functional groups selected from one or more of -OH, -ROH, -R(OH)2, -NH2, -NHR, -NR2, -SH, -RSH, or -R(SH)2, wherein R is C1 to C10 alkyl, C3 to C10 cycloalkyl, C1 to C10 hydroxyalkyl, C2 to C10 alkoxy, C2 to C10 alkoxyalkyl, C2 to C10 acetyl, C3 to C10 acetyalkyl, C1 to C10 carboxyl, C2 to C10 alkylcarboxyl, or C4 to C10 cycloalkylcarboxyl. In one embodiment, the first distance is in a range of 1 nm to 50 nm.
[0184] Another embodiment of the present disclosure is a composition including a polymer having one or more repeating units selected from the group consisting of the following structures:
[0185]
[0186] wherein each of a, b, c, d, e, f, g, h, and i independently represents H, -OH, -ROH, -R(OH)2, -NH2, -NHR, -NR2, -SH, -RSH, or -R(SH)2, and each repeat unit includes three or more -OH, -ROH, -R(OH)2, -NH2, -NHR, -NR2, -SH, -RSH, or -R(SH)2 groups, wherein each of R, R1, and R2 independently represents C1 to C10 alkyl, C3 to C10 cycloalkyl, C1 to C10 hydroxyalkyl, C2 to C10 alkoxy, C2 to C10 alkoxyalkyl, C2 to C10 acetyl, C3 to C10 acetyalkyl, C1 to C10 carboxyl, C2 to C10 alkylcarboxyl, or C4 to C10 cycloalkylcarboxyl, and n is 2 to 1000. In one embodiment, at least one repeat unit includes three or more -OH groups. In one embodiment, at least one repeat unit is selected from the group consisting of the following structures:
[0187]
[0188] Another embodiment of the present disclosure is a polymer having one or more repeat units selected from the group consisting of the following structures:
[0189]
[0190] wherein each of a, b, c, d, e, f, g, h, and i independently represents H, -OH, -ROH, -R(OH)2, -NH2, -NHR, -NR2, -SH, -RSH, or -R(SH)2, and each repeat unit includes at least one -OH, -ROH, -R(OH)2, -NH2, -NHR, -NR2, -SH, -RSH, or -R(SH)2 group, and at least one repeat unit includes three or more -OH, -ROH, -R(OH)2, -NH2, -NHR, -NR2, -SH, -RSH, or -R(SH)2 groups; wherein each of R, R1, and R2 independently represents C1 to C10 alkyl, C3 to C10 cycloalkyl, C1 to C10 hydroxyalkyl, C2 to C10 alkoxy, C2 to C10 alkoxyalkyl, C2 to C10 acetyl, C3 to C10 acetyalkyl, C1 to C10 carboxyl, C2 to C10 alkylcarboxyl, or C4 to C10 cycloalkylcarboxyl, and n is 2 to 1000. In one embodiment, at least one repeat unit includes three or more -OH groups. In one embodiment, at least one repeat unit is selected from the group consisting of the following structures:
[0191]
[0192] The foregoing summary of some embodiments has been presented with the purpose of providing those skilled in the art with a better understanding of the concepts of the present disclosure. Those skilled in the art will readily appreciate that they can readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and / or achieving the same advantages of the embodiments introduced herein without departing from the spirit and scope of the present disclosure. Those skilled in the art will also readily appreciate that they can readily use for these purposes the present disclosure as a basis for the design or modification of other processes and structures for carrying out the same purposes and / or achieving the same advantages of the embodiments introduced herein without departing from the spirit and scope of the present disclosure. Various changes, substitutions and alterations can be made to the embodiments disclosed herein without departing from the spirit and scope of the present disclosure.
Claims
1. A method of manufacturing a semiconductor device, characterized by, comprising: forming a conductive layer over a substrate having a plurality of protrusions and a plurality of recesses, wherein the conductive layer is formed over the protrusions and in the recesses; forming a protective layer over the conductive layer, wherein the protective layer comprises a polymeric component comprising a polymer having a plurality of repeat units, the repeat units being one or more of: wherein a, b, c, d, e, f, g, h, and i are each independently H, -OH, -ROH, -R(OH)2, -NH2, -NHR, -NR2, -SH, -RSH, or -R(SH)2, wherein at least one of a, b, c, d, e, f, g, h, and i on each of the repeat units is not H, wherein R, R1, and R2 are each independently C1 to C10 alkyl, C3 to C10 cycloalkyl, C1 to C10 hydroxyalkyl, C2 to C10 alkoxy, C2 to C10 alkoxyalkyl, C2 to C10 acetyl, C3 to C10 acetyalkyl, C1 to C10 carboxyl, C2 to C10 alkylcarboxyl, or C4 to C10 cycloalkylcarboxyl, and n is between 2 and 1000; forming a resist layer over the protective layer; patterning the resist layer; and forming a conductive contact over the conductive layer.
2. The method of claim 1, wherein the polymer comprises one or more of the repeat units selected from:
3. The method of claim 1, further comprising heating the protective layer at a temperature in a range from 200 °C to 400 °C prior to forming the resist layer.
4. The method of claim 1, wherein the protrusions are separated by a distance less than 50 nm.
5. The method of claim 1, further comprising removing portions of the conductive layer after patterning the resist layer.
6. The method of claim 1, further comprising crosslinking the protective layer prior to forming the resist layer.
7. The method of claim 1, wherein the conductive layer is a conformal metal layer.
8. The method of claim 1, wherein the resist layer comprises a silicon-containing intermediate layer formed over the protective layer and a photoresist layer formed over the intermediate layer.
9. The method of claim 1, wherein the protective layer is a bottom antireflective coating.
10. A method of manufacturing a semiconductor device, characterized by, comprising: forming a polymer layer over a plurality of features disposed over a substrate, wherein the features are separated by a distance D1 less than 50 nm, and adjacent two of the features are separated by a gap having a depth D2 greater than 10 nm from a top surface of the features, wherein the features comprise a metal layer disposed over a plurality of protrusions extending from the substrate; and wherein the polymer layer fills the gap and extends over the top surface of the features; forming a photoresist layer over the polymer layer; selectively exposing the photoresist layer to actinic radiation; developing the selectively exposed photoresist layer to form a photoresist pattern; and forming a conductive contact to the metal layer after developing the selectively exposed photoresist layer.
11. The method of claim 10, further comprising crosslinking the polymer layer prior to forming the photoresist layer.
12. The method of claim 10, wherein the metal layer is selected from the group consisting of tungsten, copper, nickel, titanium, tantalum, aluminum, and alloys thereof.
13. The method of claim 10, further comprising etching the metal layer after developing the photoresist layer after the selective exposure.
14. The method of claim 10, further comprising forming a silicon-containing intermediate layer over the polymer layer prior to forming the photoresist layer.
15. The method of claim 10, wherein the polymer comprises repeat units having one or more hydroxyl, amine, or thiol groups.
16. The method of claim 10, wherein the distance Dl / the depth D2 is in the range of 0.017 to 2.
17. A method of manufacturing a semiconductor device, characterized by, comprising a conductive layer over a substrate having a topography comprising a plurality of protrusions separated from one another, the protrusions having an upper surface, wherein a first protrusion and a second protrusion are separated by a distance in the range of 1 nm to less than 50 nm, and a gap between the first protrusion and the second protrusion has a depth in the range of 10 nm to 300 nm from the upper surface; forming a spin-on carbon layer comprising a spin-on carbon composition over the conductive layer, wherein the spin-on carbon composition comprises a polymer, the polymer comprising repeat units comprising one or more functional groups selected from -OH, -ROH, -R(OH)2, -NH2, -NHR, -NR2, -SH, -RSH, or -R(SH)2, wherein R is C1 to C10 alkyl, C3 to C10 cycloalkyl, C1 to C10 hydroxyalkyl, C2 to C10 alkoxy, C2 to C10 alkoxyalkyl, C2 to C10 acetyl, C3 to C10 acetyalkyl, C1 to C10 carboxyl, C2 to C10 alkylcarboxyl, or C4 to C10 cycloalkylcarboxyl; forming a photoresist layer over the spin-on carbon layer; patterning the photoresist layer; developing the photoresist layer to form a pattern in the photoresist layer; and forming a conductive contact over the conductive layer after developing the photoresist layer.
18. The method of claim 17, wherein the spin-on carbon composition further comprises a crosslinking agent.
19. The method of claim 17, further comprising heating the spin-on carbon layer at a temperature in the range of 200 °C to 400 °C prior to forming the photoresist layer.
20. The method of claim 17, further comprising crosslinking the spin-on carbon layer by exposing the spin-on carbon layer to an ultraviolet radiation having a wavelength less than 300 nm prior to forming the photoresist layer.
Citation Information
Patent Citations
Method for forming organic film and method for manufacturing substrate for semiconductor apparatus
US20170309493A1