Method for manufacturing display panel, display panel

Abstract

The application provides a display panel and a preparation method thereof. Each sub-pixel comprises a first electrode, a second electrode, a main light-emitting layer and an auxiliary light-emitting layer which are arranged between the first electrode and the second electrode. The main light-emitting layer and the auxiliary light-emitting layer of the same sub-pixel have a first interval. The auxiliary light-emitting layer of at least one sub-pixel and the main light-emitting layer of a sub-pixel in the same row and adjacent to the at least one sub-pixel have a second interval. The sum of the first interval and the second interval is less than 17 microns, i.e. the sum of the first interval and the second interval is less than the interval between two adjacent sub-pixels in the prior art, so that the aperture ratio of the display panel can be improved. In the preparation method of the display panel, the main light-emitting layer and the auxiliary light-emitting layer are prepared in steps, so that the color mixing problem between the main light-emitting layer and the auxiliary light-emitting layer can be avoided, the color mixing problem of two adjacent sub-pixels during preparation of the main light-emitting layer or the auxiliary light-emitting layer can be improved, and the aperture ratio of the display panel can be improved.

Description

Technical Field

[0001] This invention relates to the field of display technology, and specifically to a method for manufacturing a display panel and a display panel itself. Background Technology

[0002] In existing display panels, to avoid color mixing problems, a large gap is set between subpixels. The large gap reduces the space available for designing subpixels, resulting in a smaller aperture ratio for the display panel. Summary of the Invention

[0003] This invention provides a method for manufacturing a display panel and a display panel that can improve the aperture ratio of the display panel.

[0004] This invention provides a method for manufacturing a display panel, the display panel comprising a plurality of sub-pixels, the method comprising the following steps:

[0005] Step S100: Provide a substrate and prepare a first electrode layer on the substrate; wherein the first electrode layer includes a plurality of first electrodes spaced apart.

[0006] Step S200: A pixel definition layer is prepared on the first electrode layer, and a portion of the pixel definition layer is removed to form a plurality of first grooves; wherein each first groove exposes a portion of the corresponding first electrode.

[0007] Step S300: Prepare the main light-emitting layer in the first groove.

[0008] Step S400: A first encapsulation structure is prepared on the main light-emitting layer and the pixel definition layer, and a portion of the first encapsulation structure and a portion of the pixel definition layer are removed to form a plurality of second grooves; wherein each second groove exposes a portion of the corresponding first electrode, and the plurality of second grooves are located on the same side of the plurality of first grooves.

[0009] Step S500: After preparing the auxiliary light-emitting layer in the second groove, at least a portion of the first encapsulation structure is removed to expose the main light-emitting layer; wherein, the plurality of auxiliary light-emitting layers are located on the same side of the plurality of main light-emitting layers;

[0010] Step S600: A second electrode is fabricated on the pixel definition layer, the main light-emitting layer, and the auxiliary light-emitting layer; wherein each sub-pixel includes the first electrode, the second electrode, the main light-emitting layer, and the auxiliary light-emitting layer, the main light-emitting layer and the auxiliary light-emitting layer of the same sub-pixel have a first spacing, the auxiliary light-emitting layer of at least one sub-pixel has a second spacing with the main light-emitting layer of an adjacent sub-pixel in the same row, and the sum of the first spacing and the second spacing is less than 17 micrometers.

[0011] Optionally, in some embodiments of the present invention, after step S500, the main light-emitting layer and the auxiliary light-emitting layer are spaced apart.

[0012] Optionally, in some embodiments of the present invention, after step S500, the first spacing is less than or equal to the second spacing.

[0013] Optionally, in some embodiments of the present invention, the second spacing is greater than or equal to 3 micrometers and less than or equal to 5 micrometers.

[0014] Optionally, in some embodiments of the present invention, the first spacing is greater than or equal to 0 micrometers and less than or equal to 5 micrometers.

[0015] Optionally, in some embodiments of the present invention, after step S200, the first groove has a first width; after step S400, the second groove has a second width; wherein the second width is less than or equal to the first width.

[0016] Optionally, in some embodiments of the present invention, the second width is greater than 0 micrometers and less than or equal to 14 micrometers.

[0017] Optionally, in some embodiments of the present invention, before step S300, the following step is further included:

[0018] A main hole injection layer is prepared within the first groove;

[0019] A main hole transport layer is prepared on the main hole injection layer; wherein the main light emission layer is located on the main hole transport layer.

[0020] Before step S500, the method further includes:

[0021] An auxiliary hole injection layer is prepared within the second groove;

[0022] An auxiliary hole transport layer is fabricated on the auxiliary hole injection layer; wherein, the auxiliary light emission layer is located on the auxiliary hole transport layer.

[0023] Optionally, in some embodiments of the present invention, before step S600, the following step is further included:

[0024] An electron transport layer is fabricated; wherein the electron transport layer comprises a main electron transport layer located on the main light-emitting layer and an auxiliary electron transport layer located on the auxiliary light-emitting layer;

[0025] An electron injection layer is fabricated on the electron transport layer; wherein the electron injection layer includes a main electron injection layer located on the main electron transport layer and an auxiliary electron injection layer located on the auxiliary electron transport layer, and the second electrode is located on the electron injection layer.

[0026] After step S600, the method further includes: preparing a capping layer on the second electrode.

[0027] Embodiments of the present invention also provide a display panel, the display panel including a plurality of sub-pixels, each sub-pixel including a first electrode, a second electrode, and a main light-emitting layer and an auxiliary light-emitting layer disposed between the first electrode and the second electrode and spaced apart; wherein, the plurality of auxiliary light-emitting layers are located on the same side of the plurality of main light-emitting layers, the main light-emitting layer and the auxiliary light-emitting layer of the same sub-pixel have a first spacing, and the auxiliary light-emitting layer of at least one sub-pixel has a second spacing with the main light-emitting layer of an adjacent sub-pixel in the same row, the sum of the first spacing and the second spacing being less than 17 micrometers.

[0028] Optionally, in some embodiments of the present invention, the first spacing is less than or equal to the second spacing.

[0029] Optionally, in some embodiments of the present invention, the second spacing is greater than or equal to 3 micrometers and less than or equal to 5 micrometers.

[0030] Optionally, in some embodiments of the present invention, the first spacing is greater than or equal to 0 micrometers and less than or equal to 5 micrometers.

[0031] Optionally, in some embodiments of the present invention, the light-emitting area of ​​the auxiliary light-emitting layer is less than or equal to the light-emitting area of ​​the main light-emitting layer.

[0032] Optionally, in some embodiments of the present invention, the length of the main light-emitting layer is equal to the length of the auxiliary light-emitting layer, and the width of the main light-emitting layer is greater than the width of the auxiliary light-emitting layer.

[0033] Optionally, in some embodiments of the present invention, the width of the main light-emitting layer is greater than or equal to 14 micrometers and less than or equal to 50 micrometers.

[0034] Optionally, in some embodiments of the present invention, the width of the auxiliary light-emitting layer is greater than 0 micrometers and less than or equal to 14 micrometers.

[0035] This invention provides a method for fabricating a display panel and a display panel itself. The display panel includes multiple sub-pixels. Each sub-pixel includes a first electrode, a second electrode, and a main light-emitting layer and an auxiliary light-emitting layer disposed between the first electrode and the second electrode and spaced apart. A first spacing exists between the main light-emitting layer and the auxiliary light-emitting layer of the same sub-pixel. A second spacing exists between the auxiliary light-emitting layer of at least one sub-pixel and the main light-emitting layer of an adjacent sub-pixel in the same row. The sum of the first spacing and the second spacing is less than 17 micrometers. By making the sum of the first spacing and the second spacing smaller than the spacing between two adjacent sub-pixels in the prior art, the aperture ratio of the display panel can be improved. In the method for fabricating the display panel, by fabricating the main light-emitting layer and the auxiliary light-emitting layer in steps, the problem of poor color mixing between the main light-emitting layer and the auxiliary light-emitting layer can be avoided. Simultaneously, the problem of poor color mixing that occurs when fabricating the main light-emitting layer or the auxiliary light-emitting layer of two adjacent sub-pixels can be improved, and the aperture ratio of the display panel can also be increased. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figures 1A to 1D This is a flowchart illustrating the manufacturing process of the display panel provided in an embodiment of the present invention;

[0038] Figures 2A to 2F This is a schematic diagram of the manufacturing process of the display panel provided in an embodiment of the present invention;

[0039] Figures 3A-3B This is a schematic diagram of the structure of the display panel provided in an embodiment of the present invention. Detailed Implementation

[0040] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. Furthermore, it should be understood that the specific embodiments described herein are only for illustration and explanation of the present invention and are not intended to limit the present invention. In the present invention, unless otherwise stated, directional terms such as "upper" and "lower" generally refer to the upper and lower positions of the device in actual use or operation, specifically the drawing directions in the accompanying drawings; while "inner" and "outer" refer to the outline of the device.

[0041] Specifically, such as Figures 1A to 1DThis is a flowchart illustrating the manufacturing process of the display panel provided in an embodiment of the present invention, such as... Figures 2A to 2F This is a schematic diagram illustrating the fabrication process of a display panel according to an embodiment of the present invention. The embodiment of the present invention provides a method for fabricating a display panel, the display panel comprising a plurality of sub-pixels. The method for fabricating the display panel includes the following steps:

[0042] Step S100: Provide a substrate 100 and prepare a first electrode layer on the substrate 100.

[0043] Optionally, the substrate 100 includes a substrate 1001, an active layer 1002 on the substrate 1001, a first insulating layer 1003 on the active layer 1002, a first metal layer 1004 on the first insulating layer 1003, a second insulating layer 1005 on the first metal layer 1004, a second metal layer 1006 on the second insulating layer 1005, and a third insulating layer 1007 on the second metal layer 1006.

[0044] The substrate 1001 includes a rigid substrate and a flexible substrate. Optionally, the material of the substrate 1001 includes glass, quartz, polycarbonate, polyimide, polypropylene, or polymer materials.

[0045] The active layer 1002 comprises a silicon semiconductor material or an oxide semiconductor material. The silicon semiconductor material includes monocrystalline silicon, polycrystalline silicon, amorphous silicon, etc.; the oxide semiconductor material includes IGZO (InGaZnO), IGZTO (InGaZnSnO), and IGTO (InGaSnO), etc.

[0046] Optionally, in some embodiments, the substrate 100 includes a first active layer and a second active layer, wherein the first active layer includes a silicon semiconductor material and the second active layer includes an oxide semiconductor material.

[0047] The materials of the first insulating layer 1003, the second insulating layer 1005, and the third insulating layer 1007 include one or a combination of silicon oxide, silicon oxynitride, silicon nitride, aluminum oxide, resin, polymer, photoresist, etc.

[0048] The materials of the first metal layer 1004 and the second metal layer 1006 include metals, alloys, metal oxides, metal nitrides, or other electrode materials. Optionally, the first metal layer 1004 includes a gate disposed opposite to the active layer 1002, and the second metal layer 1006 includes a source and a drain electrically connected to the active layer 1002.

[0049] Accordingly, prior to step S100, the preparation method further includes the following steps:

[0050] Substrate 1001 is provided;

[0051] An active layer 1002 is fabricated on the substrate 1001;

[0052] A first insulating layer 1003 is prepared on the active layer 1002;

[0053] A first metal layer 1004 is prepared on the first insulating layer 1003;

[0054] A second insulating layer 1005 is prepared on the first metal layer 1004;

[0055] A second metal layer 1006 is prepared on the second insulating layer 1005; and,

[0056] A third insulating layer 1007 is prepared on the second metal layer 1006.

[0057] Optionally, the substrate 100 further includes a third metal layer and a fourth insulating layer; wherein the third metal layer is located on the second insulating layer 1005, the fourth insulating layer is located on the third metal layer, and the second metal layer 1006 is located on the fourth insulating layer. Optionally, the third metal layer includes an electrode portion disposed corresponding to the gate, and the gate and the electrode portion respectively form two electrodes of a capacitor. Accordingly, after the step of fabricating the second insulating layer 1005 on the first metal layer 1004, the fabrication method further includes: fabricating the third metal layer on the second insulating layer 1005; fabricating the fourth insulating layer on the third metal layer; and fabricating the second metal layer 1006 on the fourth insulating layer.

[0058] Please continue reading. Figure 1A and Figure 2A The first electrode layer includes a plurality of spaced-apart first electrodes 101. Optionally, the sub-pixel includes an anode and a cathode, and the first electrode 101 is either an anode or a cathode. Further, the first electrode 101 is an anode. Optionally, the material of the first electrode layer includes at least one of metal, alloy, metal oxide, metal nitride, or other electrode materials.

[0059] Please continue reading. Figure 1A and Figure 2B The fabrication method further includes step S200: fabricating a pixel definition layer 102 on the first electrode layer, and removing a portion of the pixel definition layer 102 to form a plurality of first grooves H1. Each first groove H1 exposes a portion of the corresponding first electrode 101.

[0060] Specifically, after step S100, at least one of the first electrodes 101 includes a first main electrode 1011 and a first auxiliary electrode 1012 connected to each other. In step S200, after a pixel definition layer 102 is formed on the first electrode layer, the portion of the pixel definition layer 102 corresponding to the first main electrode 1011 is removed to form the first groove H1 exposing the first main electrode 1011.

[0061] Optionally, the pixel definition layer 102 corresponding to the first main electrode 1011 can be removed by photolithography process to prepare the first groove H1 corresponding to the first main electrode 1011.

[0062] Optionally, the first electrode 101 corresponding to the sub-pixel including the first auxiliary electrode 1012 may be greater than or equal to the first electrode 101 corresponding to the sub-pixel excluding the first auxiliary electrode 1012. Further, the first electrode 101 corresponding to the sub-pixel including the first auxiliary electrode 1012 is greater than the first electrode 101 corresponding to the sub-pixel excluding the first auxiliary electrode 1012, so that when the first groove H1 is prepared in step S200, all the first electrodes 101 corresponding to the sub-pixels excluding the first auxiliary electrode 1012 are exposed by the first groove H1, thus laying the foundation for maximizing the aperture ratio of the sub-pixels excluding the first auxiliary electrode 1012.

[0063] Please continue reading. Figure 1A and Figure 2C The preparation method further includes step S300: preparing a main light-emitting layer 1031 in the first groove H1.

[0064] Optionally, the main light-emitting layer 1031 is fabricated using an inkjet printing process, and the thickness of the main light-emitting layer 1031 is greater than or equal to 30 nanometers and less than or equal to 150 nanometers. Optionally, the thickness of the main light-emitting layer 1031 for the sub-pixel corresponding to the red light-emitting color is greater than or equal to 80 nanometers and less than or equal to 150 nanometers, the thickness of the main light-emitting layer 1031 for the sub-pixel corresponding to the green light-emitting color is greater than or equal to 80 nanometers and less than or equal to 150 nanometers, and the thickness of the main light-emitting layer 1031 for the sub-pixel corresponding to the blue light-emitting color is greater than or equal to 30 nanometers and less than or equal to 150 nanometers. Optionally, the main light-emitting layer 1031 comprises an organic light-emitting material. Optionally, the main light-emitting layer 1031 comprises a fluorescent material, a quantum dot material, a perovskite material, etc.

[0065] Alternatively, please continue reading Figure 1B and Figure 2C Before step S300, the preparation method further includes:

[0066] A main hole injection layer is prepared within the first groove H1;

[0067] A main hole transport layer is fabricated on the main hole injection layer. The main light-emitting layer 1031 is located on the main hole transport layer.

[0068] Optionally, the main hole injection layer and the main hole transport layer can be fabricated within the first groove H1 using inkjet printing technology. Optionally, the thickness of the main hole injection layer is greater than or equal to 10 nanometers and less than or equal to 30 nanometers; the thickness of the main hole transport layer is greater than or equal to 10 nanometers and less than or equal to 30 nanometers.

[0069] Please continue reading. Figure 1A and Figure 2D The fabrication method further includes step S400: fabricating a first encapsulation structure 104 on the main light-emitting layer 1031 and the pixel definition layer 102, and removing a portion of the first encapsulation structure 104 and a portion of the pixel definition layer 102 to form a plurality of second grooves H2. Each second groove H2 exposes a portion of the corresponding first electrode 101, and the plurality of second grooves H2 are located on the same side of the plurality of first grooves H1.

[0070] Specifically, in step S400, after the first encapsulation structure 104 is prepared on the main light-emitting layer 1031 and the pixel definition layer 102, a photoresist is prepared on the first encapsulation structure 104, and the photoresist corresponding to the first auxiliary electrode 1012 is exposed and developed using a photolithography process. Then, the first encapsulation structure 104 corresponding to the first auxiliary electrode 1012 is etched using an etching process. After that, the remaining photoresist and the pixel definition layer 102 corresponding to the first auxiliary electrode 1012 are stripped to form the second groove H2 that exposes the first auxiliary electrode 1012.

[0071] Optionally, the first groove H1 and the second groove H2 may be spaced apart, or there may be no gap between the first groove H1 and the second groove H2.

[0072] Optionally, after step S200, the first groove H1 has a first width; after step S400, the second groove H2 has a second width; wherein the second width is less than or equal to the first width.

[0073] Optionally, the first width is greater than or equal to 14 micrometers and less than or equal to 50 micrometers. For example, the first width may be equal to 14 micrometers, 15 micrometers, 18 micrometers, 20 micrometers, 20.5 micrometers, 25 micrometers, 30 micrometers, 32 micrometers, 35 micrometers, 40 micrometers, 41 micrometers, 42 micrometers, 43 micrometers, 44 micrometers, 45 micrometers, 46 micrometers, 47 micrometers, 48 ​​micrometers, 49 micrometers, or 50 micrometers.

[0074] Optionally, the plurality of first grooves H1 may have different sizes of first width, so that the sub-pixels with different luminous colors in the display panel have different luminous areas.

[0075] Optionally, in a 65-inch 8K display panel, the first width is greater than or equal to 40 micrometers and less than or equal to 45 micrometers, to adopt the process dimensions in the prior art.

[0076] Optionally, the second width is greater than 0 micrometers and less than or equal to 14 micrometers. For example, the second width may be equal to 1 micrometer, 2 micrometers, 2.5 micrometers, 3 micrometers, 4 micrometers, 4.5 micrometers, 5 micrometers, 6 micrometers, 7 micrometers, 8 micrometers, 8.5 micrometers, 9 micrometers, 10 micrometers, 10.5 micrometers, 11 micrometers, 12 micrometers, 12.5 micrometers, 13 micrometers, or 14 micrometers. Further, the second width is greater than or equal to 8 micrometers and less than or equal to 12 micrometers.

[0077] Optionally, the plurality of second grooves H2 may have different sizes of second widths so that the sub-pixels with different luminous colors in the display panel have different luminous areas.

[0078] Optionally, in a 65-inch 8K resolution display panel, the second width is greater than or equal to 8 micrometers and less than or equal to 12 micrometers. It is understood that the first and second widths can be adjusted according to the size of the display panel, and will not be elaborated further here.

[0079] Optionally, the first encapsulation structure 104 may be a single-layer structure or a multi-layer structure. Optionally, the material of the first encapsulation structure 104 includes one or a combination of silicon oxide, silicon oxynitride, silicon nitride, aluminum oxide, resin, polymer, photoresist, etc. Optionally, the thickness of the first encapsulation structure 104 is greater than or equal to 10 nanometers and less than or equal to 200 nanometers. For example, the thickness of the first encapsulation structure 104 may be 10 nanometers, 20 nanometers, 25 nanometers, 50 nanometers, 80 nanometers, 100 nanometers, 130 nanometers, 150 nanometers, 170 nanometers, 180 nanometers, 190 nanometers, or 200 nanometers.

[0080] Please continue reading. Figure 1A and Figure 2EThe preparation method further includes step S500: after preparing the auxiliary light-emitting layer 1032 in the second groove H2, at least a portion of the first encapsulation structure 104 is removed to expose the main light-emitting layer 1031.

[0081] Optionally, in step S500, the first encapsulation structure 104 may be partially removed, that is, only the first encapsulation structure 104 corresponding to the main light-emitting layer 1031 may be removed; or the first encapsulation structure 104 may be completely removed.

[0082] Optionally, the auxiliary light-emitting layer 1032 is prepared using an inkjet printing process. Optionally, after step S500, the plurality of auxiliary light-emitting layers 1032 are located on the same side of the plurality of main light-emitting layers 1031. This is to avoid the problem of ink overflow and poor color mixing when the auxiliary light-emitting layers 1032 corresponding to the sub-pixels with different emission colors are arranged in sequence with intervals, so as to avoid the problem of small intervals between two adjacent auxiliary light-emitting layers 1032, which would lead to ink overflow and poor color mixing when preparing the auxiliary light-emitting layers 1032 corresponding to the sub-pixels with different emission colors.

[0083] Specifically, the plurality of sub-pixels include adjacent first sub-pixels PE1 and second sub-pixels PE2 with different emission colors. The auxiliary emission layer 1032 of the first sub-pixel PE1 is located on the first side FS1 of the main emission layer 1031 of the first sub-pixel PE1, and the auxiliary emission layer 1032 of the second sub-pixel PE2 is located on the first side FS2 of the main emission layer 1031 of the second sub-pixel PE2, such that the auxiliary emission layer 1032 of the first sub-pixel PE1 is located on the first side FS2 of the main emission layer 1031 of the first sub-pixel PE1 and the main emission layer 1031 of the second sub-pixel PE2. Between the light-emitting layers 1031, the auxiliary light-emitting layer 1032 of the second sub-pixel PE2 is located on the side of the main light-emitting layer 1031 of the second sub-pixel PE2 away from the auxiliary light-emitting layer 1032 of the first sub-pixel PE1, thereby creating a larger gap between the auxiliary light-emitting layer 1032 of the first sub-pixel PE1 and the auxiliary light-emitting layer 1032 of the second sub-pixel PE2. This reduces the probability of ink overflow during the fabrication of the auxiliary light-emitting layers 1032 of the first sub-pixel PE1 and the second sub-pixel PE2, which could lead to poor color mixing.

[0084] The main light-emitting layer 1031 and the auxiliary light-emitting layer 1032 of the same sub-pixel have a first spacing P1, and the auxiliary light-emitting layer 1032 of at least one sub-pixel has a second spacing P2 with the main light-emitting layer 1031 of the adjacent sub-pixel in the same row. The sum of the first spacing P1 and the second spacing P2 is less than the spacing between two adjacent sub-pixels in the prior art, that is, the sum of the first spacing P1 and the second spacing P2 is less than 17 micrometers.

[0085] Specifically, the plurality of sub-pixels include a first sub-pixel PE1 and a second sub-pixel PE2 that are adjacent and in the same row. The first sub-pixel PE1 has a first spacing P1 between its main light-emitting layer 1031 and its auxiliary light-emitting layer 1032, and the second sub-pixel PE2 has a second spacing P2 between its auxiliary light-emitting layer 1032 and its main light-emitting layer 1031. The sum of the first spacing P1 and the second spacing P2 is less than 17 micrometers.

[0086] Optionally, the first spacing P1 is less than or equal to the second spacing P2.

[0087] Optionally, based on the limitations of existing fabrication processes, the second spacing P2 is greater than or equal to 3 micrometers and less than or equal to 5 micrometers; for example, the second spacing P2 is equal to 3 micrometers, 3.5 micrometers, 4 micrometers, 4.5 micrometers, 4.8 micrometers, or 5 micrometers. It is understood that multiple sub-pixels may have multiple second spacings P2, and these multiple second spacings P2 may be different. It is also understood that as the limitations of fabrication processes are continuously overcome, the second spacing P2 may also be less than 3 micrometers.

[0088] Optionally, the first spacing P1 is greater than or equal to 0 micrometers and less than or equal to 5 micrometers. For example, the first spacing P1 can be 0 micrometers, 0.5 micrometers, 1 micrometer, 2 micrometers, 2.5 micrometers, 3 micrometers, 4 micrometers, 4.5 micrometers, or 5 micrometers. Further, when there is no gap between the first groove H1 and the second groove H2, the first spacing P1 is equal to 0 micrometers, such that the main light-emitting layer 1031 and the auxiliary light-emitting layer 1032 are connected. When there is a gap between the first groove H1 and the second groove H2, the first spacing P1 is greater than 0 micrometers, such that the main light-emitting layer 1031 and the auxiliary light-emitting layer 1032 are spaced apart.

[0089] Optionally, the main light-emitting layer 1031 and the auxiliary light-emitting layer 1032 of the same sub-pixel emit the same color, so that when the same sub-pixel is driven, the main light-emitting layer 1031 and the auxiliary light-emitting layer 1032 emit light of the same color simultaneously. It is understood that in some embodiments, since the main light-emitting layer 1031 and the auxiliary light-emitting layer 1032 are prepared in steps, the ink used to prepare the main light-emitting layer 1031 and the ink used to prepare the auxiliary light-emitting layer 1032 will not mix during the manufacturing process. Therefore, the main light-emitting layer 1031 and the auxiliary light-emitting layer 1032 can also emit different colors to meet different design requirements of the display panel.

[0090] Optionally, the light emission colors of the main light-emitting layer 1031 and the auxiliary light-emitting layer 1032 may include red, blue, green, yellow, white, etc.

[0091] Alternatively, please continue reading Figure 1C and Figure 2E Before step S500, the preparation method further includes:

[0092] An auxiliary hole injection layer is prepared within the second groove H2;

[0093] An auxiliary hole transport layer is fabricated on the auxiliary hole injection layer. The auxiliary light-emitting layer 1032 is located on the auxiliary hole transport layer.

[0094] Optionally, the auxiliary hole injection layer and the auxiliary hole transport layer can be fabricated within the second groove H2 using inkjet printing technology. Optionally, the thickness of the auxiliary hole injection layer is greater than or equal to 10 nanometers and less than or equal to 30 nanometers; the thickness of the auxiliary hole transport layer is greater than or equal to 10 nanometers and less than or equal to 30 nanometers.

[0095] Please continue reading. Figure 1A and Figure 2F The preparation method further includes step S600: preparing a second electrode 105 on the pixel definition layer 102, the main light-emitting layer 1031, and the auxiliary light-emitting layer 1032.

[0096] Optionally, the second electrode 105 is either an anode or a cathode. Further, the second electrode 105 is a cathode.

[0097] Optionally, the second electrode 105 can be prepared using a vacuum evaporation process. The material of the second electrode 105 includes metals, alloys, metal oxides, metal nitrides, or other electrode materials. Further, the material of the second electrode 105 includes silver. Optionally, the thickness of the second electrode 105 is greater than or equal to 10 nanometers and less than or equal to 20 nanometers; for example, the thickness of the second electrode 105 is 10 nanometers, 11 nanometers, 11.5 nanometers, 12 nanometers, 13 nanometers, 14 nanometers, 15 nanometers, 16 nanometers, 17 nanometers, 18 nanometers, 18.5 nanometers, 19 nanometers, or 20 nanometers.

[0098] Please continue reading. Figure 1D and Figure 2F Before step S600, the preparation method further includes:

[0099] An electron transport layer is prepared; wherein the electron transport layer includes a main electron transport layer located on the main light-emitting layer 1031 and an auxiliary electron transport layer located on the auxiliary light-emitting layer 1032; that is, the main electron transport layer located on the main light-emitting layer 1031 and the auxiliary electron transport layer located on the auxiliary light-emitting layer 1032 are prepared in the same layer.

[0100] An electron injection layer is fabricated on the electron transport layer. The electron injection layer comprises a main electron injection layer located on the main electron transport layer and an auxiliary electron injection layer located on the auxiliary electron transport layer; that is, the main electron injection layer on the main electron transport layer and the auxiliary electron injection layer on the auxiliary electron transport layer are fabricated in the same layer. The second electrode 105 is located on the electron injection layer.

[0101] Optionally, the electron transport layer and the electron injection layer are prepared using a vacuum evaporation process. Optionally, the electron transport layer is made of sodium fluoride / lithium fluoride, and its thickness is greater than or equal to 1 nanometer and less than or equal to 5 nanometers. The electron injection layer is made of organic Yb / Ba, and its thickness is greater than or equal to 10 nanometers and less than or equal to 50 nanometers.

[0102] Optionally, after step S600, the method further includes: preparing a capping layer on the second electrode 105, the capping layer being used to adjust the light extraction efficiency.

[0103] Optionally, the capping layer is prepared by vacuum evaporation / SPT, the material of the capping layer includes organic / IZO, and the thickness of the capping layer is greater than or equal to 30 nanometers and less than or equal to 80 nanometers.

[0104] It is understandable that the thickness of each film layer can be adjusted according to actual needs. The thickness of each film layer provided in the embodiments of the present invention is given only based on the optimal film thickness level of the inkjet printing technology device structure.

[0105] Optionally, at least one of the sub-pixels includes a main light-emitting portion and an auxiliary light-emitting portion. The main light-emitting portion includes a first main electrode 1011, a main light-emitting layer 1031, and a second electrode 105; the auxiliary light-emitting portion includes a first auxiliary electrode 1012, an auxiliary light-emitting layer 1032, and a second electrode 105. That is, the sub-pixel including the main light-emitting portion and the auxiliary light-emitting portion shares the same first electrode and the same second electrode.

[0106] Optionally, the main light-emitting part further includes the main hole injection layer, the main hole transport layer, the main electron transport layer, and the main electron injection layer; the auxiliary light-emitting part further includes the auxiliary hole injection layer, the auxiliary hole transport layer, the auxiliary electron transport layer, and the auxiliary electron injection layer.

[0107] Taking a 65-inch 8K resolution display panel as an example, the width of each pixel in existing display panels is 185 micrometers. If each pixel includes 3 sub-pixels, and the width of the light-emitting layer of each sub-pixel is 45 micrometers, then the width of the light-emitting layer of the 3 sub-pixels is 135 micrometers, and the spacing between sub-pixels is (185-135) / 3≈17 micrometers. The display panel prepared by the method provided in this invention has at least one sub-pixel whose light-emitting layer includes a main light-emitting layer 1031 and an auxiliary light-emitting layer 1032. If the width of each pixel remains 185 micrometers, each pixel still includes 3 sub-pixels, the main light-emitting layer 1031 of each sub-pixel maintains a width design standard of 45 micrometers, the spacing between two adjacent sub-pixels in the same row (i.e., the second spacing P2) is 5 micrometers, and the width of the auxiliary light-emitting layer 1032 of the sub-pixel is 10 micrometers, then the aperture ratio of a single sub-pixel can be increased by (10 / 45)*100%≈22%, thereby improving the aperture ratio of the display panel. Since the aperture ratio has increased by 22%, the lifespan of the sub-pixels has also increased by 22%, and the lifespan of the display panel has also been increased accordingly.

[0108] Embodiments of the present invention also provide a display panel, which is prepared using any of the above-described display panels.

[0109] like Figures 3A-3B This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention. The embodiment of the present invention also provides a display panel comprising a plurality of sub-pixels (PEs). Each sub-pixel (PE) includes a main light-emitting portion (PEM), and at least one sub-pixel (PE) includes an auxiliary light-emitting portion (PES).

[0110] Specifically, each sub-pixel PE includes a first electrode 301, a second electrode 302, and a light-emitting layer 303 located between the first electrode 301 and the second electrode 302. The first electrode 301 is one of an anode and a cathode; the second electrode 302 is the other of an anode and a cathode. Further, the first electrode 301 is an anode, and the second electrode 302 is a cathode.

[0111] The light-emitting layer 303 of the sub-pixel PE, including the auxiliary light-emitting part PES, includes a main light-emitting layer 3031 and an auxiliary light-emitting layer 3032. Optionally, the main light-emitting layer 3031 and the auxiliary light-emitting layer 3032 of the same sub-pixel PE emit the same color light, so that when the same sub-pixel PE is driven, the main light-emitting part PES and the auxiliary light-emitting part PE emit light of the same color simultaneously.

[0112] Optionally, the main light-emitting layer 3031 and the auxiliary light-emitting layer 3032 of the same sub-pixel PE can be disposed adjacently or spaced apart. That is, the main light-emitting layer 3031 and the auxiliary light-emitting layer 3032 of the same sub-pixel PE have a first interval P1, which is greater than or equal to 0 micrometers and less than or equal to 5 micrometers. For example, the first interval P1 is equal to 0 micrometers, 0.5 micrometers, 1 micrometer, 2 micrometers, 2.5 micrometers, 3 micrometers, 4 micrometers, 4.5 micrometers, or 5 micrometers.

[0113] Optionally, within the same sub-pixel PE, the light-emitting area of ​​the main light-emitting layer 3031 is greater than or equal to the light-emitting area of ​​the auxiliary light-emitting layer 3032. Further, within the same sub-pixel PE, the length of the main light-emitting layer 3031 is equal to the length of the auxiliary light-emitting layer 3032, and the width of the main light-emitting layer 3031 is greater than the width of the auxiliary light-emitting layer 3032.

[0114] Optionally, the width of the main light-emitting layer 3031 is greater than or equal to 14 micrometers and less than or equal to 50 micrometers. For example, the width of the main light-emitting layer 3031 can be equal to 14 micrometers, 15 micrometers, 18 micrometers, 20 micrometers, 20.5 micrometers, 25 micrometers, 30 micrometers, 32 micrometers, 35 micrometers, 40 micrometers, 41 micrometers, 42 micrometers, 43 micrometers, 44 micrometers, 45 micrometers, 46 micrometers, 47 micrometers, 48 ​​micrometers, 49 micrometers, or 50 micrometers. Optionally, in a 65-inch 8K display panel, the width of the main light-emitting layer 3031 is greater than or equal to 40 micrometers and less than or equal to 45 micrometers. Optionally, when multiple sub-pixels PE all include the main light-emitting part PEM and the auxiliary light-emitting part PES, the widths of the multiple main light-emitting layers 3031 included in the multiple main light-emitting parts PEM can be the same or different.

[0115] Optionally, the width of the auxiliary light-emitting layer 3032 is greater than 0 micrometers and less than or equal to 14 micrometers. For example, the width of the auxiliary light-emitting layer 3032 can be equal to 1 micrometer, 2 micrometers, 2.5 micrometers, 3 micrometers, 4 micrometers, 4.5 micrometers, 5 micrometers, 6 micrometers, 7 micrometers, 8 micrometers, 8.5 micrometers, 9 micrometers, 10 micrometers, 10.5 micrometers, 11 micrometers, 12 micrometers, 12.5 micrometers, 13 micrometers, or 14 micrometers. Optionally, when multiple sub-pixels PE all include the main light-emitting part PEM and the auxiliary light-emitting part PES, the widths of the multiple auxiliary light-emitting layers 3032 included in the multiple auxiliary light-emitting parts PES can be the same or different. Further, the width of the auxiliary light-emitting layer 3032 is greater than or equal to 8 micrometers and less than or equal to 12 micrometers.

[0116] Optionally, each of the multiple sub-pixels PE includes the main light-emitting part PEM and the auxiliary light-emitting part PES, wherein the multiple auxiliary light-emitting parts PES are located on the same side of the multiple main light-emitting parts PEM, and further, the multiple auxiliary light-emitting layers 3032 are located on the same side of the multiple main light-emitting layers 3031.

[0117] Specifically, taking a plurality of sub-pixels PE including a first sub-pixel PE1 and a second sub-pixel PE2 that are in the same row and adjacent as an example, both the first sub-pixel PE1 and the second sub-pixel PE2 include a main light-emitting part PEM and an auxiliary light-emitting part PES. The auxiliary light-emitting part PES of the first sub-pixel PE1 is located on a first side FS1 of the main light-emitting part PEM of the first sub-pixel PE1, and the auxiliary light-emitting part PES of the second sub-pixel PE2 is located on a first side FS2 of the main light-emitting part PEM of the second sub-pixel PE2, such that the auxiliary light-emitting part PES of the first sub-pixel PE1 is located between the main light-emitting part PEM of the first sub-pixel PE1 and the main light-emitting part PEM of the second sub-pixel PE2, and the auxiliary light-emitting part PES of the second sub-pixel PE2 is located on the side of the main light-emitting part PEM of the second sub-pixel PE2 that is away from the auxiliary light-emitting part PES of the first sub-pixel PE1. That is, the auxiliary light-emitting layer 3032 of the first sub-pixel PE1 is located on the first side FS1 of the main light-emitting layer 3031 of the first sub-pixel PE1, and the auxiliary light-emitting layer 3032 of the second sub-pixel PE2 is located on the first side FS2 of the main light-emitting layer 3031 of the second sub-pixel PE2, such that the auxiliary light-emitting layer 3032 of the first sub-pixel PE1 is located between the main light-emitting layer 3031 of the first sub-pixel PE1 and the main light-emitting layer 3031 of the second sub-pixel PE2, and the second sub-pixel PE2... The auxiliary light-emitting layer 3032 is located on the side of the main light-emitting layer 3031 of the second sub-pixel PE2 away from the auxiliary light-emitting layer 3032 of the first sub-pixel PE1, thereby creating a larger gap between the auxiliary light-emitting layer 3032 of the first sub-pixel PE1 and the auxiliary light-emitting layer 3032 of the second sub-pixel PE2. This reduces the probability of ink overflow and color mixing problems during the fabrication of the auxiliary light-emitting layer 3032 of the first sub-pixel PE1 and the auxiliary light-emitting layer 3032 of the second sub-pixel PE2.

[0118] Please continue reading. Figures 3A-3BThe main light-emitting layer 3031 and the auxiliary light-emitting layer 3032 of the same sub-pixel PE have a first spacing P1, and the auxiliary light-emitting layer 3032 of at least one sub-pixel PE has a second spacing P2 with the main light-emitting layer 3031 of the adjacent sub-pixel PE in the same row. The sum of the first spacing P1 and the second spacing P2 is less than 17 micrometers. In the prior art, in a 65-inch 8K resolution display panel, each pixel has a width of 185 micrometers, each pixel includes 3 sub-pixels, the light-emitting layer width of each sub-pixel is 45 micrometers, the width of the light-emitting layers of the 3 sub-pixels is 135 micrometers, and the spacing between sub-pixels is (185-135) / 3≈17 micrometers. In this invention, by making the sum of the first spacing P1 and the second spacing P2 less than the spacing between two adjacent sub-pixels in the prior art, the design area of ​​the sub-pixels can be increased, thereby increasing the aperture ratio of the display panel.

[0119] Optionally, the first spacing P1 is less than or equal to the second spacing P2.

[0120] Optionally, the second spacing P2 is greater than or equal to 3 micrometers and less than or equal to 5 micrometers; for example, the second spacing P2 is equal to 3 micrometers, 3.5 micrometers, 4 micrometers, 4.5 micrometers, 4.8 micrometers, or 5 micrometers. It is understood that multiple sub-pixels PE may have multiple second spacings P2, and these multiple second spacings P2 may be different.

[0121] Optionally, the first spacing P1 is greater than or equal to 0 micrometers and less than or equal to 5 micrometers. For example, the first spacing P1 can be 0 micrometers, 0.5 micrometers, 1 micrometer, 2 micrometers, 2.5 micrometers, 3 micrometers, 4 micrometers, 4.5 micrometers, or 5 micrometers. When the first spacing P1 is 0 micrometers, the main light-emitting part (PEM) and the auxiliary light-emitting part (PES) of the same sub-pixel PE are connected. When the first spacing P1 is greater than 0 micrometers, the main light-emitting part (PEM) and the auxiliary light-emitting part (PES) of the same sub-pixel PE are spaced apart.

[0122] In existing 65-inch 8K resolution display panels, the spacing between two adjacent sub-pixels in the same row is approximately 17 micrometers, and the sub-pixel width is 45 micrometers. However, in the display panel provided by the embodiments of the present invention, the second spacing P2 between two adjacent sub-pixels in the same row is at most 5 micrometers. The width of the sub-pixel PE, including the main light-emitting layer 3031 and the auxiliary light-emitting layer 3032, is greater than the width of the sub-pixels in existing display panels. Therefore, the aperture ratio of the display panel can be improved.

[0123] The display panel further includes an array substrate 304, which includes multiple pixel driving circuits. The multiple pixel driving circuits are electrically connected to multiple sub-pixels PE to drive the multiple sub-pixels to emit light.

[0124] The display panel further includes a pixel definition layer 305, which is located on the first electrode 301, and the light-emitting layer is located within the pixel definition area of ​​the pixel definition layer 305.

[0125] Optionally, the display panel includes multiple light-emitting devices, which form multiple sub-pixels (PEs). The light-emitting devices include organic light-emitting diodes, sub-millimeter light-emitting diodes, or micro light-emitting diodes, etc.

[0126] Understandably, the display panel also includes multiple data lines, multiple scan lines, and other components (not shown) electrically connected to the multiple pixel driving circuits. Optionally, the display panel also includes touch electrodes and other components (not shown).

[0127] Optionally, the display panel further includes sensing elements. These sensing elements may include a camera, a fingerprint sensor, a proximity sensor, a temperature sensor, etc.

[0128] The present invention also provides a display device, the display device including any of the above-mentioned display panels and a driving module, the driving module being electrically connected to the display panel to drive the display panel to realize the display function.

[0129] Understandably, the display device includes portable display devices (such as laptops, mobile phones, etc.), fixed terminals (such as desktop computers, televisions, etc.), measuring devices (such as fitness trackers, thermometers, etc.), etc.

[0130] This document uses specific examples to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A method for manufacturing a display panel, characterized by, The display panel comprises a plurality of sub-pixels, and a preparation method of the display panel comprises the following steps: Step S100: providing a substrate, and preparing a first electrode layer on the substrate; wherein the first electrode layer comprises a plurality of first electrodes arranged at intervals; Step S200: preparing a pixel definition layer on the first electrode layer, and removing part of the pixel definition layer to form a plurality of first grooves; wherein each first groove exposes a part of the corresponding first electrode; Step S300: preparing a main light-emitting layer in the first grooves; Step S400: preparing a first encapsulation structure on the main light-emitting layer and the pixel definition layer, and removing part of the first encapsulation structure and part of the pixel definition layer to form a plurality of second grooves; wherein each second groove exposes a part of the corresponding first electrode, and the plurality of second grooves are located on the same side of the plurality of first grooves; Step S500: after preparing an auxiliary light-emitting layer in the second grooves, removing at least part of the first encapsulation structure to expose the main light-emitting layer; wherein the plurality of auxiliary light-emitting layers are located on the same side of the plurality of main light-emitting layers; Step S600: preparing a second electrode on the pixel definition layer and the main light-emitting layer and the auxiliary light-emitting layer; wherein each sub-pixel comprises the first electrode, the second electrode, the main light-emitting layer and the auxiliary light-emitting layer, the main light-emitting layer and the auxiliary light-emitting layer of the same sub-pixel have a first interval, the auxiliary light-emitting layer of at least one sub-pixel and the main light-emitting layer of the same row and adjacent sub-pixel have a second interval, and the sum of the first interval and the second interval is less than 17 microns.

2. The production method according to claim 1, characterized by, After the step S500, The main light-emitting layer and the auxiliary light-emitting layer are arranged at intervals.

3. The production method according to claim 1, characterized by, After the step S500, The first interval is less than or equal to the second interval.

4. The production method according to claim 3, characterized by, The second interval is greater than or equal to 3 microns and less than or equal to 5 microns.

5. The preparation method according to claim 3, characterized in that, The first interval is greater than or equal to 0 microns and less than or equal to 5 microns.

6. The preparation method of claim 1, wherein, After the step S200, the first grooves have a first width; After the step S400, the second grooves have a second width; Wherein, the second width is less than or equal to the first width.

7. The production method according to claim 6, wherein The second width is greater than 0 microns and less than or equal to 14 microns.

8. The preparation method of claim 1, wherein, Before the step S300, further comprising: preparing a main hole injection layer in the first grooves; preparing a main hole transport layer on the main hole injection layer; wherein the main light-emitting layer is located on the main hole transport layer; Before the step S500, further comprising: preparing an auxiliary hole injection layer in the second grooves; preparing an auxiliary hole transport layer on the auxiliary hole injection layer; wherein the auxiliary light-emitting layer is located on the auxiliary hole transport layer.

9. The preparation method of claim 1, wherein, Before the step S600, further comprising: preparing an electron transport layer; wherein the electron transport layer comprises a main electron transport layer on the main light emitting layer and a sub electron transport layer on the sub light emitting layer; preparing an electron injection layer on the electron transport layer; wherein the electron injection layer comprises a main electron injection layer on the main electron transport layer and a sub electron injection layer on the sub electron transport layer, and the second electrode is on the electron injection layer; after the step S600, further comprising: preparing a capping layer on the second electrode.

10. A display panel, characterized by, comprising: a plurality of sub-pixels, each of the sub-pixels comprising a first electrode, a second electrode, a main light emitting layer and a sub light emitting layer arranged in between the first electrode and the second electrode; wherein a plurality of the sub light emitting layers are on the same side of a plurality of the main light emitting layers, the main light emitting layer and the sub light emitting layer of a same sub-pixel have a first pitch, the sub light emitting layer of at least one sub-pixel and the main light emitting layer of a same row and adjacent sub-pixel have a second pitch, and the sum of the first pitch and the second pitch is less than 17 microns; and a plurality of pixel driving circuits electrically connected to the plurality of sub-pixels and configured to drive the plurality of sub-pixels to emit light. at least one of the sub-pixels comprises a main light emitting part and a sub light emitting part, the main light emitting part comprises the main light emitting layer, and the sub light emitting part comprises the sub light emitting layer; the main light emitting part and the sub light emitting part of a same sub-pixel share the same first electrode and the same second electrode.

11. The display panel of claim 10, wherein, the first pitch is less than or equal to the second pitch.

12. The display panel of claim 11, wherein, the second pitch is greater than or equal to 3 microns and less than or equal to 5 microns.

13. The display panel of claim 11, wherein, the first pitch is greater than or equal to 0 microns and less than or equal to 5 microns.

14. The display panel of claim 10, wherein, the light emitting area of the sub light emitting layer is less than or equal to the light emitting area of the main light emitting layer.

15. The display panel of claim 14, wherein, the length of the main light emitting layer is equal to the length of the sub light emitting layer, and the width of the main light emitting layer is greater than the width of the sub light emitting layer.

16. The display panel of claim 15, wherein, the width of the main light emitting layer is greater than or equal to 14 microns and less than or equal to 50 microns.

17. The display panel of claim 15, wherein, the width of the sub light emitting layer is greater than 0 microns and less than or equal to 14 microns.

Images