An over-voltage and under-voltage protection circuit for a high-voltage bus power supply and distribution system used in aerospace

Abstract

A circuit for overvoltage and undervoltage protection of a high-voltage busbar power distribution system for aerospace applications implements undervoltage and overvoltage protection lockout functions for the input distribution MOS transistors of the high-voltage busbar. The circuit includes upper and lower voltage detection units, a distribution MOS transistor on-off unit, and a protection lockout unit. The upper and lower voltage detection units include a current-limiting resistor, a voltage regulator, and a diode, and can generate undervoltage and overvoltage protection signals for the busbar input and transmit them to the MOS transistor on-off unit. The MOS transistor on-off unit includes a PMOS transistor, a voltage divider resistor, and a drive transistor, which can enable the input busbar to be opened and closed. The protection lockout unit includes a pair of NPN and PNP transistors, which lock the distribution MOS transistors when a protection signal is issued and can only be unlocked after the undervoltage and overvoltage signals are released and power is re-applied. In the circuit of the present invention, undervoltage and overvoltage detection are implemented by the same circuit. When the distribution MOS transistor is turned off, the power supply will not be restarted, thus avoiding oscillation at the protection point. The simple structure facilitates miniaturization of the power supply and saves costs.

Description

Technical Field

[0001] The present invention belongs to the power supply and distribution of aerospace equipment, and relates to an over- and under-voltage protection circuit. Background Art

[0002] The power supply and distribution system of the aerospace main bus usually requires an input bus over- and under-voltage protection device to prevent damage to electrical equipment caused by abnormal bus conditions. The over- and under-voltage circuits used in aerospace generally consist of a comparator, a reference voltage, and a MOS switch. Both the comparator and the reference voltage require separate power supplies and cannot directly use the high-voltage bus, so the structure is complex and the cost is high. There are also some that use corresponding integrated circuits such as TL431 as the reference, but the prices of aerospace-grade integrated circuits are very high, which is not conducive to cost reduction. Chinese Patent Application No. 201510635693.6 lacks the under-voltage protection function. Patent Application No. 201610092535.5 uses the MOS transistor switch threshold voltage as the reference voltage for over- and under-voltage protection, but the MOS transistor switch threshold voltage is greatly affected by temperature and its consistency is difficult to guarantee. The cost of aerospace-grade radiation-resistant MOS transistors is too high, which is not conducive to cost reduction. Summary of the Invention

[0003] The technical problem solved by the present invention is: The present invention provides an over- and under-voltage protection circuit for the power supply and distribution system of the aerospace high-voltage bus, which can perform power-off protection on the over-voltage and under-voltage of the input bus of aerospace equipment, and the circuit is simple and the cost is low.

[0004] To solve the above problems, the technical solution adopted by the present invention is: An over- and under-voltage protection circuit for the power supply and distribution system of the aerospace high-voltage bus includes an upper and lower limit voltage detection unit, a power distribution MOS transistor switch unit, and a protection and locking unit; the upper and lower limit detection unit simultaneously judges the over-voltage and under-voltage signals of the bus input and generates a turn-off signal to the power distribution MOS transistor switch unit. After the power distribution MOS transistor is turned off, the protection and locking unit maintains the turned-off state of the power distribution MOS transistor switch unit. After the bus input voltage is restarted, the protection and locking function is released.

[0005] Further, the upper and lower limit detection unit includes a current-limiting resistor R1, a current-limiting voltage-dividing resistor R2, a voltage-dividing resistor R13, a Zener diode D1, a Zener diode D3, and a switching diode D2;

[0006] The cathode of the Zener diode D3 is connected to the bus input terminal through the current-limiting voltage-dividing resistor R2 and to the return line through the voltage-dividing resistor R13; the anode of the switching diode D2 is connected to the anode of the Zener diode D1, and the cathode is connected to the cathode of the Zener diode D3; the cathode of the Zener diode D1 is connected to the bus input terminal through the current-limiting resistor R1.

[0007] Further, the under-voltage protection limit value V of the over- and under-voltage protection circuit uDetermined by the current-limiting voltage-dividing resistor R2, the resistance value of the voltage-dividing resistor R13, and the breakdown voltage V of the Zener diode D3 ZD3 Determined by:

[0008] Furthermore, the overvoltage protection limit value V of the over- and under-voltage protection circuit o Is determined by the undervoltage protection limit value V u And the breakdown voltage V of the Zener diode D1 ZD1 Determined by: V o = V u + V ZD1 .

[0009] Furthermore, the power distribution MOS transistor switching unit includes a P-channel MOS transistor Q3, a diode D6, a voltage-dividing resistor R7, a voltage-dividing resistor R9, a driving resistor R8, a driving resistor R10, a delay capacitor C1, a protection diode D5, a PNP transistor Q1, and an NPN transistor Q4;

[0010] The P-channel MOS transistor Q3 is the power supply and distribution switching transistor; both the PNP transistor Q1 and the NPN transistor Q4 can control the on / off of the P-channel MOS transistor Q3; the emitter of the PNP transistor Q1 is connected to the source of the P-channel MOS transistor Q3 and the bus input terminal, the collector of the PNP transistor Q1 is connected to the anode of the diode D6, and the cathode of the diode D6 is connected to the driving resistor R8; one end of the voltage-dividing resistor R7 is connected to the bus input terminal, and the other end is connected to the cathode of the diode D6; the delay capacitor C1 is connected in parallel with the voltage-dividing resistor R7; the anode of the protection diode D5 is connected to the cathode of the diode D6, and the cathode of the protection diode D5 is connected to the bus input terminal; the gate of the P-channel MOS transistor Q3 is connected to the driving resistor R8, and the drain of the P-channel MOS transistor Q3 is connected to the bus output terminal; the emitter of the NPN transistor Q4 is connected to the power supply return line, the collector of the NPN transistor Q4 is connected to the common terminal of the voltage-dividing resistor R9 and the cathode of the diode D8, and the voltage-dividing resistor R9 is connected to the cathode of the diode D6; the base of the NPN transistor Q4 is connected to the anode of the Zener diode D3 through the current-limiting resistor R10.

[0011] Furthermore, the protection and locking unit includes a PNP transistor Q1, an NPN transistor Q2, current-limiting resistors R3 to R6, a voltage-dividing resistor R11, a decoupling capacitor C2, a capacitor C3, a current-limiting resistor R12, a Zener diode D9, a diode D4, a diode D7, and a diode D8 that are multiplexed with the power distribution MOS transistor switching unit;

[0012] The base of the PNP transistor Q1 is connected to the cathode of the Zener diode D1 through the current-limiting resistor R4; the collector of the NPN transistor Q2 is connected to the cathode of the Zener diode D1 through the current-limiting resistor R3, the base of the NPN transistor Q2 is connected to the cathode of the diode D7 through the current-limiting resistor R5, the anode of the diode D7 is connected to the anode of the Zener diode D9, and the cathode of the Zener diode D9 is connected to the bus output terminal through the current-limiting resistor R12; the anode of the diode D8 is connected to the anode of the Zener diode D9; the emitter of the NPN transistor Q2 is connected to the anode of the diode D4, and the cathode of the diode D4 is connected to the return line; the cathode of the diode D7 is connected to the return line through the voltage-dividing resistor R11, and the decoupling capacitor C2 is connected in parallel with the voltage-dividing resistor R11; one end of the capacitor C3 is connected to the return line, and the other end is connected to the anode of the diode D8. After any one of the PNP transistor Q1 or the NPN transistor Q2 has its collector-emitter conducting, the current will flow through the connected current-limiting resistor into the base of the other transistor, keeping it conducting and achieving the purpose of interlocking.

[0013] Further, when the bus input is within the normal input range, that is, higher than the undervoltage protection limit value V u and lower than the overvoltage protection limit value V o the Zener diode D1 is cut off, there is no voltage drop across the resistor R1, the voltages of the base and emitter of the PNP transistor Q1 are equal, and the PNP transistor Q1 remains cut off; the Zener diode D3 is reversely broken down, and the current flows through the resistor R10 into the NPN transistor Q4, and the collector-emitter of the NPN transistor Q4 conducts; the source-gate voltage of the P-channel MOS transistor Q3 exceeds the threshold voltage for turning on after being divided by the resistors R7 and R9 from the bus input voltage, and the P-channel MOS transistor Q3 conducts; at this time, the output bus voltage rises, reversely breaking down the Zener diode D9, and the breakdown current flows through the diode D8 and the NPN transistor Q4 into the return line, and there is no current in the base of the NPN transistor Q2, and the NPN transistor Q2 remains cut off.

[0014] Further, when the bus input voltage is lower than the undervoltage protection limit value V u the Zener diode D3 is cut off, there is no current in the resistor R10, the collector-emitter of the NPN transistor Q4 is cut off, and the P-channel MOS transistor Q3 is turned off; the residual voltage output by the bus reversely breaks down the Zener diode D9 through the current-limiting resistor R12, and the current flows through the diode D7 and the current-limiting resistor R5 into the base of the NPN transistor Q2, making the collector-emitter of the NPN transistor Q2 conduct, completing the interlock of the PNP transistor Q1 - NPN transistor Q2; when the bus recovers from undervoltage to the normal range, due to the interlock of the PNP transistor Q1 - NPN transistor Q2, the collector-emitter of the PNP transistor Q1 remains conducting, and the P-channel MOS transistor Q3 is still in the off state.

[0015] Further, when the bus input voltage is higher than the overvoltage protection limit value V oWhen the voltage is in a certain state, the Zener diodes D1 and D3 are reversely broken down. At this time, the base voltage of the PNP transistor Q1 is lower than the emitter voltage, and the collector-emitter of the PNP transistor Q1 conducts. The gate-source voltage of the P-channel MOS transistor Q3 is clamped at 0.7V, and the P-channel MOS transistor Q3 is turned off. The conduction of the collector-emitter of the PNP transistor Q1 completes the interlock between the PNP transistor Q1 and the NPN transistor Q2. When the bus voltage recovers from overvoltage to the normal range, due to the interlock between the PNP transistor Q1 and the NPN transistor Q2, the collector-emitter of the PNP transistor Q1 remains conducting, and the P-channel MOS transistor Q3 remains in the off state. When the bus is powered off, that is, the bus input voltage is 0, the potential difference between the emitter and the base of the PNP transistor Q1 returns to 0, and the PNP transistor Q1 and the NPN transistor Q2 return to the off state, and the mutual lock is released.

[0016] Furthermore, when the bus starts normally and the voltage rises from 0 to the normal range, when the input bus voltage is lower than the undervoltage protection value, the Zener diode D3 is cut off, the P-channel MOS transistor Q3 is turned off, and there is not enough voltage at the output to reversely break down the Zener diode D9, so that the NPN transistor Q2 cannot be turned on and locked, ensuring that the circuit will not be mislocked during startup.

[0017] The beneficial effects of the present invention compared with the prior art are as follows:

[0018] (1) The circuit used in the present invention uses components such as transistors and diodes except for the switching MOS transistors, and the price is relatively low. The undervoltage and overvoltage detection units are realized by the same circuit, and no additional power supply circuit is required. When the power distribution MOS is turned off, it will not cause the power supply to restart, avoiding oscillation at the protection point. The structure is simple, which is beneficial to the miniaturization of the power supply and saves costs.

[0019] (2) The present invention multiplexes the Zener diode D3 to detect overvoltage and undervoltage signals with the same circuit; the transistors Q1 and Q4 can be used for the on-off control of the power distribution MOS transistor, and can also form an interlock circuit together with Q2; the circuit will not automatically restart after entering the protection shutdown, avoiding oscillation of the circuit at the protection point. The circuit provided by the present invention can provide undervoltage and overvoltage protection for the high-voltage bus power supply and distribution system for aerospace use. Description of the Drawings

[0020] Figure 1 It is a schematic diagram of an over- and under-voltage protection circuit for a high-voltage bus power supply and distribution system for aerospace use;

[0021] Figure 2 It is a Saber simulation diagram of the output voltage when the input bus is undervoltage;

[0022] Figure 3 It is a Saber simulation diagram of the output voltage when the input bus is overvoltage. Detailed Embodiment

[0023] The present invention will be further described below in conjunction with the accompanying drawings.

[0024] As Figure 1 shown, the undervoltage and overvoltage protection circuit proposed by the present invention is composed of an upper and lower limit voltage detection unit, a MOS transistor switch, and a protection and locking unit.

[0025] The upper and lower limit detection unit consists of the same circuit, including resistor R1, resistor R2, resistor R13, Zener diode D1, Zener diode D3, and switching diode D2. The cathode of Zener diode D3 is connected to the bus input through the current-limiting voltage-dividing resistor R2 and to the return line through the voltage-dividing resistor R13. The anode of Zener diode D3 is connected to the base of MOS transistor driving triode Q4 through the current-limiting resistor R10. The cathode of Zener diode D1 is connected to the bus input, the collector of NPN triode Q2, and the base of PNP triode through the current-limiting resistors R1, R3, and R4 respectively. The anode of switching diode D2 is connected to the anode of Zener diode D1, and the cathode is connected to the cathode of Zener diode D3.

[0026] The undervoltage protection limit value V u is determined by the resistance values of R2 and R13 and the breakdown voltage V ZD3 of D3: The overvoltage protection limit value V o is determined by the undervoltage protection limit value V u and the breakdown voltage V ZD1 of D1: V o =V u +V ZD1 .

[0027] P-channel MOS transistor Q3 is the power supply and distribution switch transistor. Both PNP triode Q1 and NPN triode Q4 can control the on-off of PMOS Q3. The emitter of PNP Q1 is connected to the source of the MOS transistor, and the collector is connected to the gate drive resistor R8 of the MOS transistor through diode D6. The emitter of NPNQ4 is connected to the power supply return line, and the collector is connected to the common end of the voltage-dividing resistor R9 and diode D8.

[0028] The power distribution MOS transistor switch unit includes P-channel MOS transistor Q3, diode D6, voltage-dividing resistor R7, voltage-dividing resistor R9, drive resistor R8, drive resistor R10, delay capacitor C1, protection diode D5, PNP triode Q1, and NPN triode Q4;

[0029] P-channel MOS transistor Q3 is the power supply and distribution switch transistor; both PNP triode Q1 and NPN triode Q4 can control the on-off of P-channel MOS transistor Q3;

[0030] The emitter of the PNP transistor Q1 is connected to the source of the P-channel MOS transistor Q3 and the bus input terminal. The collector of the PNP transistor Q1 is connected to the anode of the diode D6, and the cathode of the diode D6 is connected to the driving resistor R8; one end of the voltage-dividing resistor R7 is connected to the bus input terminal, and the other end is connected to the cathode of the diode D6; the delay capacitor C1 is connected in parallel with the voltage-dividing resistor R7; the anode of the protection diode D5 is connected to the cathode of the diode D6, and the cathode of the protection diode D5 is connected to the bus input terminal;

[0031] The gate of the P-channel MOS transistor Q3 is connected to the driving resistor R8, and the drain of the P-channel MOS transistor Q3 is connected to the bus output terminal;

[0032] The emitter of the NPN transistor Q4 is connected to the power supply return line. The collector of the NPN transistor Q4 is connected to the common terminal of the voltage-dividing resistor R9 and the cathode of the diode D8, and the voltage-dividing resistor R9 is connected to the cathode of the diode D6; the base of the NPN transistor Q4 is connected to the anode of the Zener diode D3 through the current-limiting resistor R10.

[0033] The protection and locking unit includes the PNP transistor Q1, NPN transistor Q2, current-limiting resistors R3, R4, R5, R6, voltage-dividing resistor R11, decoupling capacitor C2, capacitor C3, current-limiting resistor R12, Zener diode D9, diodes D4, D7 and D8 which are multiplexed with the power distribution MOS transistor switching unit;

[0034] The base of the PNP transistor Q1 is connected to the cathode of the Zener diode D1 through the current-limiting resistor R4; the collector of the NPN transistor Q2 is connected to the cathode of the Zener diode D1 through the current-limiting resistor R3. The base of the NPN transistor Q2 is connected to the cathode of the diode D7 through the current-limiting resistor R5. The anode of the diode D7 is connected to the anode of the Zener diode D9. The cathode of the Zener diode D9 is connected to the bus output terminal through the current-limiting resistor R12; the anode of the diode D8 is connected to the anode of the Zener diode D9; the emitter of the NPN transistor Q2 is connected to the anode of the diode D4, and the cathode of the diode D4 is connected to the return line; the cathode of the diode D7 is connected to the return line through the voltage-dividing resistor R11, and the decoupling capacitor C2 is connected in parallel with the voltage-dividing resistor R11; one end of the capacitor C3 is connected to the return line, and the other end is connected to the anode of the diode D8.

[0035] The transistors Q1 and Q2 and the current-limiting resistors R3, R4, R5, and R6 form a locking circuit. After any one of the PNP transistor Q1 or NPN transistor Q2 is collector-emitter conducting, the current will flow through the connected current-limiting resistor into the base of the other transistor, keeping it conducting and achieving the purpose of interlocking.

[0036] When the bus input is within the normal input range, that is, higher than the undervoltage protection point (i.e., the undervoltage protection limit value V u ) and lower than the overvoltage protection point (i.e., the overvoltage protection limit value Vo ) When the Zener diode D1 is cut off, there is no voltage drop across the resistor R1. The base and emitter voltages of the PNP Q1 are equal, and Q1 remains cut off. The Zener diode D3 is reverse - broken down, and the current flows through the resistor R10 into the NPN Q4, and the collector - emitter of Q4 conducts. The source - gate voltage of the PMOS transistor Q3 exceeds the threshold voltage for turning on after being divided by the resistors R7 and R9 from the bus input voltage, and the PMOS Q3 conducts. At this time, the output bus voltage rises, reverse - breaking down the Zener diode D9, and the breakdown current flows through the diode D8 and Q4 into the return line. There is no current at the base of Q2, and Q2 remains cut off.

[0037] When the bus voltage drops from the normal range to below the undervoltage protection point, the Zener diode D3 is cut off, there is no current in the resistor R10, the collector - emitter of the NPN transistor Q4 is cut off, the P - channel MOS transistor Q3 is turned off, and the output voltage drops to 0. The residual voltage output from the bus reverse - breaks down the Zener diode D9 through the current - limiting resistor R12, and the current flows through the diode D7 and the current - limiting resistor R5 into the base of the NPN transistor Q2, making the collector - emitter of the NPN transistor Q2 conduct, completing the interlock between the PNP transistor Q1 and the NPN transistor Q2. When the bus recovers from undervoltage to the normal range, due to the interlock between the PNP transistor Q1 and the NPN transistor Q2, the collector - emitter of the PNP transistor Q1 remains conducting, the MOS transistor Q3 is still in the off state, and the output voltage remains 0.

[0038] When the bus input voltage is higher than the overvoltage protection point, the Zener diodes D1 and D3 are reverse - broken down. At this time, the base voltage of the PNP transistor Q1 is lower than the emitter voltage, and the collector - emitter conducts, clamping the gate - source voltage of the MOS transistor Q3 at 0.7V, and the MOS transistor Q3 is turned off, and the output voltage drops to 0. The conduction of the collector - emitter of the transistor Q1 can also complete the interlock between Q1 and Q2. When the bus recovers from overvoltage to the normal range, due to the interlock between the PNP transistor Q1 and the NPN transistor Q2, the collector - emitter of the PNP transistor Q1 remains conducting, the MOS transistor Q3 is still in the off state, and the output voltage remains 0.

[0039] When the bus starts normally and rises from 0 to the normal range, when it reaches the undervoltage protection point of the input bus, the Zener diode D3 is cut off, the MOS transistor Q3 is turned off, and there is not enough voltage at the output to reverse - break down the Zener diode D9, so that Q2 cannot be turned on and locked, ensuring that the circuit will not be mis - locked during the startup process.

[0040] When the bus is powered off, that is, the bus input voltage is 0. At this time, the potential difference between the emitter and the base of the transistor Q1 returns to 0, and the transistors Q1 and Q2 return to the off state, and the mutual lock is released.

[0041] Using Saber software according to Figure 1Build a simulation circuit, set the undervoltage and overvoltage protection points according to Table 1 and conduct simulations. The undervoltage and overvoltage protection simulation results are as follows Figure 2 , Figure 3 shown

[0042] Figure 2 is the undervoltage protection simulation result. When the input bus is turned on and the voltage rises from 0 to the normal range, when the input bus exceeds the undervoltage point, the power distribution MOS transistor turns on and the output bus starts to be established. When the input bus voltage drops from the rated value to the undervoltage protection point ( Figure 2 point 1 in Figure 2 ), the power distribution MOS transistor turns off and the output voltage drops to 0. When the bus voltage returns to the normal input range again ( Figure 2 point 2 in Figure 2 ), the output voltage remains 0, that is, the MOS transistor remains locked. Wait for the input bus voltage to be powered off ( Figure 2 point 3 in Figure 2 ), and then resume to the normal range ( Figure 2 point 4 in ), the output voltage recovers, that is, the lock is released.

[0043] Figure 3 is the overvoltage protection simulation result. When the input bus voltage rises to the overvoltage protection point ( Figure 3 point 1 in Figure 3 ), the output voltage drops to 0. When the bus voltage returns to the normal input range again ( Figure 3 point 2 in Figure 3 ), the output voltage remains 0, that is, the MOS transistor remains locked. Wait for the input bus voltage to be powered off ( Figure 3 point 3 in Figure 3 ), and then resume to the normal range ( Figure 3 point 4 in ), the output voltage recovers, that is, the lock is released.

[0044] Table 1 shows the simulation parameter settings and result data

[0045] Item Simulation protection point setting Simulation protection point result Under voltage 75V 75.4V Over voltage 125V 124.73V

[0046] Those skilled in the art of the present technology can understand that, unless otherwise defined, all terms (including technical terms and scientific terms) used here have the same meaning as the general understanding of those of ordinary skill in the art to which the present invention belongs. It should also be understood that terms defined in a general dictionary, such as those, should be understood to have a meaning consistent with the meaning in the context of the prior art, and will not be interpreted with an idealized or overly formal meaning unless defined as here.

[0047] The above-described specific embodiments have further detailed the purpose, technical solution and beneficial effects of the present invention. It should be understood that the above is only the specific embodiments of the present invention and is not used to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims

1. An over- and under-voltage protection circuit for a high-voltage bus power supply and distribution system for aerospace applications, characterized in that: It includes an upper and lower limit voltage detection unit, a power distribution MOS transistor switch unit, and a protection and locking unit; the upper and lower limit detection unit simultaneously judges the overvoltage and undervoltage signals of the bus input, and generates a turn-off signal to the power distribution MOS transistor switch unit. After the power distribution MOS transistor is turned off, the protection and locking unit maintains the off state of the power distribution MOS transistor switch unit. After the bus input voltage is restarted, the protection and locking function is released; The upper and lower limit detection unit includes a Zener diode D1; the protection and locking unit includes a PNP transistor Q1, an NPN transistor Q2, a current-limiting resistor R3, a current-limiting resistor R4, a current-limiting resistor R5, a current-limiting resistor R6, a voltage-dividing resistor R11, a decoupling capacitor C2, a capacitor C3, a current-limiting resistor R12, a Zener diode D9, a diode D4, a diode D7, and a diode D8 that are multiplexed with the power distribution MOS transistor switch unit; The base of the PNP transistor Q1 is connected to the cathode of the Zener diode D1 through the current-limiting resistor R4; the collector of the NPN transistor Q2 is connected to the cathode of the Zener diode D1 through the current-limiting resistor R3, the base of the NPN transistor Q2 is connected to the cathode of the diode D7 through the current-limiting resistor R5, the anode of the diode D7 is connected to the anode of the Zener diode D9, and the cathode of the Zener diode D9 is connected to the bus output terminal through the current-limiting resistor R12; the anode of the diode D8 is connected to the anode of the Zener diode D9; the emitter of the NPN transistor Q2 is connected to the anode of the diode D4, and the cathode of the diode D4 is connected to the return line; the cathode of the diode D7 is connected to the return line through the voltage-dividing resistor R11, and the decoupling capacitor C2 is connected in parallel with the voltage-dividing resistor R11; one end of the capacitor C3 is connected to the return line, and the other end is connected to the anode of the diode D8; After any one of the PNP transistor Q1 or the NPN transistor Q2 has its collector-emitter turned on, the current will flow through the connected current-limiting resistor into the base of the other transistor, keeping it turned on, achieving the purpose of interlocking.

2. The over- and under-voltage protection circuit for a high-voltage bus power supply and distribution system for aerospace use according to claim 1, characterized in that: The upper and lower limit detection unit further includes a current-limiting resistor R1, a current-limiting and voltage-dividing resistor R2, a voltage-dividing resistor R13, a Zener diode D3, and a switching diode D2; The cathode of the Zener diode D3 is connected to the bus input terminal through the current-limiting and voltage-dividing resistor R2 and to the return line through the voltage-dividing resistor R13; The anode of the switching diode D2 is connected to the anode of the Zener diode D1, and the cathode is connected to the cathode of the Zener diode D3; The cathode of the Zener diode D1 is connected to the bus input terminal through the current-limiting resistor R1.

3. The over- and under-voltage protection circuit for the high-voltage bus power supply and distribution system for aerospace use according to claim 2, wherein: The undervoltage protection limit value V of the over- and undervoltage protection circuit u is determined by the resistance values of the current-limiting voltage-dividing resistor R2 and the voltage-dividing resistor R13 and the breakdown voltage V of the Zener diode D3 ZD3 as follows:

4. The over- and under-voltage protection circuit for an aerospace high-voltage bus power supply and distribution system according to claim 3, wherein: The overvoltage protection limit value V of the over- and under-voltage protection circuit o is determined by the undervoltage protection limit value V u and the breakdown voltage V of the Zener diode D1 ZD1 : V o = V u + V ZD1 .

5. The over- and under-voltage protection circuit for an aerospace high-voltage bus power supply and distribution system according to claim 2, characterized in that: The power distribution MOS transistor switch unit includes a P-channel MOS transistor Q3, a diode D6, a voltage-dividing resistor R7, a voltage-dividing resistor R9, a driving resistor R8, a driving resistor R10, a delay capacitor C1, a protection diode D5, a PNP transistor Q1, and an NPN transistor Q4; The P-channel MOS transistor Q3 is a power supply and distribution switch tube; both the PNP transistor Q1 and the NPN transistor Q4 can control the on and off of the P-channel MOS transistor Q3; The emitter of the PNP transistor Q1 is connected to the source of the P-channel MOS transistor Q3 and the bus input terminal. The collector of the PNP transistor Q1 is connected to the anode of the diode D6, and the cathode of the diode D6 is connected to the drive resistor R8. One end of the voltage-dividing resistor R7 is connected to the bus input terminal, and the other end is connected to the cathode of the diode D6. The delay capacitor C1 is connected in parallel with the voltage-dividing resistor R7. The anode of the protection diode D5 is connected to the cathode of the diode D6, and the cathode of the protection diode D5 is connected to the bus input terminal. The gate of the P-channel MOS transistor Q3 is connected to the drive resistor R8, and the drain of the P-channel MOS transistor Q3 is connected to the bus output terminal. The emitter of the NPN transistor Q4 is connected to the power return line. The collector of the NPN transistor Q4 is connected to the common terminal of the voltage-dividing resistor R9 and the cathode of the diode D8. The voltage-dividing resistor R9 is connected to the cathode of the diode D6. The base of the NPN transistor Q4 is connected to the anode of the Zener diode D3 through the current-limiting resistor R10.

6. The over- and under-voltage protection circuit for an aerospace high-voltage bus power supply and distribution system according to claim 5, characterized in that: When the bus input is within the normal input range, that is, higher than the undervoltage protection limit value V u and lower than the overvoltage protection limit value V o At this time, the Zener diode D1 is cut off, there is no voltage drop across the resistor R1, the base and emitter voltages of the PNP transistor Q1 are equal, and the PNP transistor Q1 remains cut off; the Zener diode D3 is reversely broken down, and the current flows through the resistor R10 into the NPN transistor Q4, and the collector-emitter of the NPN transistor Q4 is turned on; the source-gate voltage of the P-channel MOS transistor Q3 exceeds the threshold voltage for turning on after being divided by the resistors R7 and R9 from the bus input voltage, and the P-channel MOS transistor Q3 is turned on; at this time, the output bus voltage rises, reversely breaking down the Zener diode D9, and the breakdown current flows through the diode D8 and the NPN transistor Q4 into the return line, and there is no current at the base of the NPN transistor Q2, and the NPN transistor Q2 remains cut off.

7. An over-voltage and under-voltage protection circuit for a high-voltage bus power supply and distribution system for aerospace use according to claim 5, characterized in that: When the bus input voltage is lower than the under-voltage protection limit V u , the Zener diode D3 is cut off, there is no current in the resistor R10, the collector-emitter of the NPN transistor Q4 is cut off, and the P-channel MOS transistor Q3 is turned off; the residual voltage output by the bus reversely breaks down the Zener diode D9 through the current-limiting resistor R12, and the current flows through the diode D7 and the current-limiting resistor R5 into the base of the NPN transistor Q2, making the collector-emitter of the NPN transistor Q2 conduct, and completing the interlock of the PNP transistor Q1 - NPN transistor Q2; when the bus recovers from under-voltage to the normal range, due to the interlock of the PNP transistor Q1 - NPN transistor Q2, the collector-emitter of the PNP transistor Q1 remains conducting, and the P-channel MOS transistor Q3 is still in the off state.

8. The over- and under-voltage protection circuit for a high-voltage bus power supply and distribution system for aerospace use according to claim 5, characterized in that: When the bus input voltage is higher than the overvoltage protection limit V o , the Zener diodes D1 and D3 are reversely broken down. At this time, the base voltage of the PNP transistor Q1 is lower than the emitter voltage, and the collector-emitter of the PNP transistor Q1 is turned on, clamping the gate-source voltage of the P-channel MOS transistor Q3 at 0.7V, and the P-channel MOS transistor Q3 is turned off; the conduction of the collector-emitter of the PNP transistor Q1 completes the interlock between the PNP transistor Q1 and the NPN transistor Q2; when the bus recovers from overvoltage to the normal range, due to the interlock between the PNP transistor Q1 and the NPN transistor Q2, the collector-emitter of the PNP transistor Q1 remains on, and the P-channel MOS transistor Q3 is still in the off state; when the bus is powered off, that is, the bus input voltage is 0, at this time, the potential difference between the emitter and the base of the PNP transistor Q1 returns to 0, and the PNP transistor Q1 and the NPN transistor Q2 return to the off state, and the mutual lock is released.

9. The over- and under-voltage protection circuit for a high-voltage bus power supply and distribution system for aerospace use according to claim 5, characterized in that: When the bus starts normally and the voltage rises from 0 to the normal range, when the input bus voltage is lower than the undervoltage protection value, the Zener diode D3 is turned off, the P-channel MOS transistor Q3 is turned off, and there is not enough voltage at the output terminal to reverse-breakdown the Zener diode D9, so that the NPN transistor Q2 cannot be turned on and locked, ensuring that the circuit will not be mislocked during the startup process.

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