Voltage-controlled oscillator and phase-locked loop circuit
Through the operational amplifier and NMOS tube substrate and source shorting technology, combined with P-type current mirror and symmetric ring oscillator, the linearity and voltage limitation of ring oscillator in low-voltage and high-frequency circuits are solved, achieving higher signal quality and stability.
Patent Information
- Application Number
- CN202510544932.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-28
- Publication Date
- 2025-08-01
AI Technical Summary
The existing ring oscillators have problems such as the linearity difference in control current and the limited operating voltage in low-voltage and high-frequency circuits, which affects the improvement of their output signal quality and performance.
The substrate and source shorting technology of operational amplifiers and NMOS tubes is used, and combined with P-type current mirrors and symmetrical ring oscillator structures, optimize current control and expand operating voltage range.
It improves the linearity of the voltage-controlled current, expands the operating voltage range of the voltage-controlled oscillator, enhances signal quality and stability, and reduces process complexity and cost.
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Figure CN120415426A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of integrated circuit technology, and more particularly, to a voltage-controlled oscillator and a phase-locked loop circuit. Background Art
[0002] As technology continues to develop in depth, various circuits are evolving towards lower operating voltages and higher operating frequencies, which undoubtedly poses extremely stringent challenges to the voltage-controlled oscillator (VCO), one of the core components of the phase-locked loop.
[0003] The ring oscillator, as a common type of voltage-controlled oscillator, is widely used in integrated circuits. However, during its actual operation, many problems have emerged. On the one hand, due to the body effect of MOS transistors, the drain current (ID) does not change linearly with the gate-source voltage (VGS). This non-linear relationship directly leads to the non-linear characteristic of the voltage-controlled current, and further results in poor linearity of the control current, which has a negative impact on the quality of the output signal of the ring oscillator. On the other hand, based on the structural characteristics of the source follower, the voltage across the resistor is lower than the gate voltage by one VGS, and this characteristic greatly limits the operating voltage range of the ring oscillator. Summary of the Invention
[0004] In view of the above deficiencies in the prior art, this application provides a voltage-controlled oscillator and a phase-locked loop circuit to solve the problems existing in the prior art.
[0005] The technical solutions adopted in the embodiments of this application are as follows: In a first aspect, an embodiment of this application provides a voltage-controlled oscillator, including: a voltage control circuit, a current replication circuit, and an oscillation circuit; the voltage control circuit includes: a comparison unit, a switching unit, and a voltage acquisition unit; The first input terminal of the comparison unit is used to receive an input control voltage, the second input terminal of the comparison unit is grounded through the voltage acquisition unit, the output terminal of the comparison unit is connected to the control terminal of the switching unit, one end of the switching unit is also grounded through the voltage acquisition unit, and the other end of the switching unit is connected to the input terminal of the current replication circuit; the output terminal of the current replication circuit is connected to the input terminal of the oscillation circuit, and the output terminal of the oscillation circuit is used to output a control signal with a target oscillation frequency.
[0006] In one embodiment, the comparison unit is an operational amplifier, and the non-inverting input terminal and the inverting input terminal of the operational amplifier are respectively the first input terminal and the second input terminal of the comparison unit.
[0007] In one embodiment, the switching unit is a first NMOS transistor; The gate of the first NMOS transistor is the control end of the switching unit, the source of the first NMOS transistor is one end of the switching unit, and the drain of the first NMOS transistor is the other end of the switching unit.
[0008] In one embodiment, the substrate and the source of the first NMOS transistor are shorted.
[0009] In one embodiment, the current replication circuit is a P-type current mirror.
[0010] In one embodiment, the P-type current mirror includes: a first PMOS transistor and a second PMOS transistor; The drain of the first PMOS transistor is the input end of the current replication circuit, the gate of the first PMOS transistor is connected to the gate of the second PMOS transistor, and the source of the first PMOS transistor is connected to the source of the second PMOS transistor; The drain of the second PMOS transistor is the output end of the current replication circuit.
[0011] In one embodiment, the oscillation circuit is a ring oscillator, and the ring oscillator includes: a first ring oscillation unit and a second ring oscillation unit that are symmetric to each other, and an oscillation capacitor; The power supply ends of the first ring oscillation unit and the second ring oscillation unit are both used as the input end of the oscillation circuit, and the first output end of the first ring oscillation unit and the first output end of the second ring oscillation unit are respectively connected to both ends of the oscillation capacitor; The first output end of the first ring oscillation unit and the second output end of the second ring oscillation unit are respectively connected to the first input end and the second input end of the first ring oscillation unit; the second output end of the first ring oscillation unit and the first output end of the second ring oscillation unit are respectively connected to the first input end and the second input end of the second ring oscillation unit.
[0012] In one embodiment, any one of the first ring oscillation unit and the second ring oscillation unit includes: an inverting unit, a latching unit, and a comparing unit; The power supply end of the inverting unit is the power supply end of the ring oscillation unit, the output end of the inverting unit is the first output end of the ring oscillation unit, the output end of the inverting unit is connected to the first input end of the comparing unit, the second input end of the comparing unit is used to receive a preset reference voltage, and the output end of the comparing unit is connected to the input end of the latching unit; The first output end and the second output end of the latching unit are respectively the first output end and the second output end of the ring oscillation unit.
[0013] In one embodiment, the latch unit includes: a first inverter, a NOR gate, and a second inverter; the input terminal of the first inverter is the input terminal of the latch unit, the output terminal of the first inverter is connected to the first input terminal of the NOR gate, the output terminal of the NOR gate is connected to the input terminal of the second inverter, and the output terminal of the second inverter is the output terminal of the latch unit.
[0014] In a second aspect, an embodiment of the present application further provides a phase-locked loop circuit, which at least includes the voltage-controlled oscillator described in any of the above embodiments.
[0015] The beneficial effects of the present application are as follows: The present application provides a voltage-controlled oscillator and a phase-locked loop circuit. The voltage-controlled oscillator includes a voltage control circuit, a current replication circuit, and an oscillation circuit; the voltage control circuit includes: a comparison unit, a switch unit, and a voltage acquisition unit; the first input terminal of the comparison unit is used to receive an input control voltage, the second input terminal of the comparison unit is grounded through the voltage acquisition unit, the output terminal of the comparison unit is connected to the control terminal of the switch unit, one end of the switch unit is also grounded through the voltage acquisition unit, and the other end of the switch unit is connected to the input terminal of the current replication circuit; the output terminal of the current replication circuit is connected to the input terminal of the oscillation circuit, and the output terminal of the oscillation circuit is used to output a control signal with a target oscillation frequency.
[0016] In the voltage-controlled oscillator of the present application, due to the setting of the operational amplifier, through mechanisms such as feedback, the operational amplifier will clamp the voltage across the voltage acquisition unit at a level equal to the input control voltage VCOIN. Therefore, the input control voltage VCOIN is equal to the voltage drop across the voltage acquisition unit, and the minimum voltage value of VCOIN is 0, which expands the operating voltage range of the voltage-controlled oscillator and also improves the linearity of VCOIN for current control. Description of the Drawings
[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings required in the embodiments. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as a limitation of the scope. For those of ordinary skill in the art, without creative efforts, other related drawings can also be obtained based on these drawings.
[0018] Figure 1 It is a schematic structural diagram of the voltage-controlled oscillator provided by the embodiment of the present application; Figure 2 It is a schematic circuit principle diagram of the voltage-controlled oscillator provided by the embodiment of the present application.
[0019] Description of the reference numerals: 1. Voltage control circuit; 2. Current replication circuit; 3. Oscillation circuit. Detailed Embodiments
[0020] To make the objectives, technical solutions and advantages of the embodiments of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of this application. Apparently, the described embodiments are some, but not all, of the embodiments of this application.
[0021] Therefore, the detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of this application which is claimed, but is merely representative of selected embodiments of this application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of this application without creative efforts shall fall within the scope of protection of this application.
[0022] In the description of this application, it should be noted that if terms such as "upper", "lower", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the products of this application are customarily placed during use, it is only for the convenience of describing this application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to this application.
[0023] In addition, terms such as "first", "second", etc. in the description and claims of this application and the above-mentioned accompanying drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of this application described here can be implemented in an order different from those illustrated or described here. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device that includes a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these process, method, product or device.
[0024] In the description of this application, it should also be noted that unless otherwise clearly defined and limited, the terms "set" and "connect" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection. It can be a direct connection or an indirect connection through an intermediate medium, and can be the communication inside two elements. For those skilled in the art, the specific meanings of the above terms in this application can be understood according to specific circumstances.
[0025] In the current context of the booming development of modern communication technologies, communication has been deeply integrated into all aspects of people's lives and work, being everywhere. The continuous improvement of communication speed has become a key factor driving the progress of the industry, and this largely depends on the operating frequency and its stability of the phase-locked loop (PLL). With the continuous in-depth development of technology, various circuits are evolving towards lower operating voltages and higher operating frequencies, which undoubtedly poses extremely stringent challenges to the voltage-controlled oscillator (VCO), one of the core components of the PLL.
[0026] As a common type of voltage-controlled oscillator, the ring oscillator has a wide range of applications in integrated circuits. However, during its actual operation, many problems have emerged. On the one hand, due to the body effect of MOS transistors, the drain current (ID) does not change linearly with the gate-source voltage (VGS). This non-linear relationship directly leads to the non-linear characteristic of the voltage-controlled current, and further results in poor linearity of the control current, which has a negative impact on the quality of the output signal of the ring oscillator. On the other hand, based on the structural characteristics of the source follower, the voltage across the resistor is lower than the gate voltage by a VGS. This characteristic greatly limits the operating voltage range of the ring oscillator. In the current trend of continuously decreasing circuit operating voltages, it has become an important bottleneck restricting the performance improvement of the ring oscillator.
[0027] In summary, when facing the circuit development requirements of low voltage and high frequency, the existing ring oscillators have prominent problems such as poor linearity of the control current and limited operating voltage, and urgently need to be solved through innovative technical solutions to meet the growing demand of communication technologies for high-performance voltage-controlled oscillators. Therefore, this application provides a voltage-controlled oscillator and a phase-locked loop circuit.
[0028] It should be noted that, without conflict, the features in the embodiments of this application can be combined with each other. The following provides specific examples of the voltage-controlled oscillator provided in this application through multiple examples in conjunction with the drawings.
[0029] Figure 1 The structural schematic diagram of the voltage-controlled oscillator provided in the embodiment of this application is as Figure 1 shown. The voltage-controlled oscillator includes a voltage control circuit 1, a current replication circuit 2, and an oscillation circuit 3.
[0030] Among them, the voltage-controlled circuit includes a comparison unit, a switching unit, and a voltage acquisition unit. The first input terminal of the comparison unit is used to receive the input control voltage VCOIN. The second input terminal of the comparison unit is grounded through the voltage acquisition unit. The output terminal of the comparison unit is connected to the control terminal of the switching unit. One end of the switching unit is also grounded through the voltage acquisition unit. The other end of the switching unit is connected to the input terminal of the current replication circuit. The output terminal of the current replication circuit is connected to the input terminal of the oscillation circuit. The output terminal of the oscillation circuit is used to output a control signal VCOOUT with a target oscillation frequency.
[0031] Specifically, Figure 2 is a schematic diagram of the circuit principle of the voltage-controlled oscillator provided by the embodiment of the present application. Refer to Figure 2 , the voltage acquisition unit is the resistor R1, and the comparison unit can be the operational amplifier A1. The non-inverting input terminal and the inverting input terminal of the operational amplifier A1 are respectively the first input terminal and the second input terminal of the comparison unit.
[0032] The switching unit is the first NMOS transistor M3. The gate of the first NMOS transistor M3 is the control terminal of the switching unit. The source of the first NMOS transistor M3 is one end of the switching unit, which is grounded through the resistor R1. The drain of the first NMOS transistor M3 is the other end of the switching unit, which is connected to the input terminal of the current replication circuit.
[0033] In the embodiment of the present application, due to the setting of the operational amplifier A1, through feedback and other mechanisms, the voltage across R1 will be clamped at a level equal to the input control voltage VCOIN. Therefore, the input control voltage VCOIN is equal to the voltage drop across R1. Then the minimum voltage value of VCOIN is 0, which expands the working voltage range of the voltage-controlled oscillator. And, IR1 = VCOIN(A / (A + 1)) / R1, where A is the amplification factor of the operational amplifier, usually about 100. So A / (A + 1) is approximately equal to 1, which also improves the linearity of VCOIN for current control.
[0034] In the present application, the CMOS process of the N-type substrate (N-Substrate, NSUB) is also used to short-circuit the substrate and the source of the first NMOS transistor M3, eliminating the body effect and greatly increasing the upper limit range of the input control voltage VCOIN.
[0035] The principle is as follows: In the CMOS process of NSUB, for the NMOS transistor M3, short-circuiting its substrate and source means making the substrate and the source at the same potential, eliminating the potential difference between the substrate and the source, thus avoiding the reverse bias of the PN junction, and there will be no change in the depletion layer and the threshold voltage VTH caused by the reverse bias, fundamentally eliminating the body effect.
[0036] When the body effect exists, as VCOIN increases, the threshold voltage of transistor M3 changes, which may cause transistor M3 to enter the non-linear region prematurely or exhibit other abnormalities, limiting the maximum value that VCOIN can reach. After eliminating the body effect by short-circuiting the substrate and source of transistor M3, the threshold voltage of transistor M3 remains stable, enabling transistor M3 to maintain good linearity and normal operating conditions at higher input voltages, thereby greatly increasing the upper limit range of VCOIN, expanding the input voltage dynamic range of VCOIN, and improving the performance and stability of the voltage-controlled oscillator.
[0037] In one embodiment, the current replication circuit is a P-type current mirror. The P-type current mirror is a circuit structure based on P-channel MOSFETs (PMOS), and its main function is to replicate the input current and generate an output current proportional to the input current at the output.
[0038] Specifically, the P-type current mirror includes a first PMOS transistor M1 and a second PMOS transistor M2. The drain of the first PMOS transistor M1 is the input terminal of the current replication circuit for receiving the current output by the voltage control circuit. The gate of the first PMOS transistor is connected to the gate of the second PMOS transistor, and the source of the first PMOS transistor is connected to the source of the second PMOS transistor. The drain of the second PMOS transistor is the output terminal of the current replication circuit, and the current output from the drain of the second PMOS transistor M2 is equal in value to the current received at the drain of the first PMOS transistor.
[0039] Continue to refer to Figure 2 , in one embodiment, the oscillation circuit is a ring oscillator. The ring oscillator includes a first ring oscillation unit and a second ring oscillation unit that are symmetric to each other, and an oscillation capacitor C1.
[0040] Wherein, any one of the first ring oscillation unit and the second ring oscillation unit includes: an inverting unit, a latching unit, and a comparison unit. For example Figure 2 in, the first ring oscillation unit includes a first inverting unit composed of a PMOS transistor M4 and an NMOS transistor M6, a first comparison unit composed of a comparator COMP1, and a first latching unit composed of an inverter INV3, a NOR gate NOR1, and an inverter INV1; the second ring oscillation unit includes a second inverting unit composed of a PMOS transistor M5 and an NMOS transistor M7, a second comparison unit composed of a comparator COMP2, and a second latching unit composed of an inverter INV4, a NOR gate NOR2, and an inverter INV2.
[0041] Among them, the input end of the inverter INV3 is the input end of the first latch unit. The output end of the inverter INV3 is connected to the first input end of the NOR gate NOR1. The second input end of the NOR gate NOR1 is used to receive the output signal of the NOR gate NOR2. The output end of the NOR gate NOR1 is connected to the input end of the inverter INV1. The output end of the inverter INV1 is the output end of the first latch unit.
[0042] The input end of the inverter INV4 is the input end of the second latch unit. The output end of the inverter INV4 is connected to the first input end of the NOR gate NOR2. The second input end of the NOR gate NOR2 is used to receive the output signal of the NOR gate NOR1. The output end of the NOR gate NOR2 is connected to the input end of the inverter INV2. The output end of the inverter INV2 is the output end of the second latch unit.
[0043] In the oscillation circuit, the power supply end of the first inverter unit (i.e., the source of the PMOS transistor M4) is the power supply end of the first ring oscillation unit, and the power supply end of the second inverter unit (i.e., the source of the PMOS transistor M5) is the power supply end of the second ring oscillation unit. Moreover, the power supply ends of the first ring oscillation unit and the second ring oscillation unit serve as the input end of the oscillation circuit for receiving the current output by the second PMOS transistor. The output end of the first inverter unit is the first output end of the first ring oscillation unit, and the output end of the second inverter unit is the first output end of the second ring oscillation unit. Moreover, the first output end of the first ring oscillation unit and the first output end of the second ring oscillation unit are respectively connected to both ends of the oscillation capacitor C1 to charge the oscillation capacitor C1.
[0044] The first output end of the first ring oscillation unit and the second output end of the second ring oscillation unit are respectively connected to the first input end and the second input end of the first ring oscillation unit, and the second output end of the first ring oscillation unit and the first output end of the second ring oscillation unit are respectively connected to the first input end and the second input end of the second ring oscillation unit.
[0045] Specifically, the first output end of the first latch unit (the output end of the inverter INV1) is the first output end of the first ring oscillation unit. The output end of INV1 is connected to the first input end of the first ring oscillation unit and thus connected to one end of the oscillation capacitor C1. The first output end of the second latch unit (the output end of the inverter INV2) is the first output end of the second ring oscillation unit. The output end of INV2 is connected to the first input end of the second ring oscillation unit and thus connected to the other end of the oscillation capacitor C1.
[0046] The second output terminal of the first latch unit (the output terminal of NOR gate NOR1) is the second output terminal of the first ring oscillator unit. The output terminal of NOR gate NOR1 is connected to the first input terminal of the second ring oscillator unit. That is, the output terminal of NOR gate NOR1 is connected to the second input terminal of NOR gate NOR2.
[0047] The second output terminal of the second latch unit (the output terminal of NOR gate NOR2) is the second output terminal of the second ring oscillator unit. The output terminal of NOR gate NOR2 is connected to the second input terminal of the first ring oscillator unit. That is, the output terminal of NOR gate NOR2 is connected to the second input terminal of NOR gate NOR1.
[0048] The output terminal of the inverter unit is connected to the first input terminal of the comparison unit. The second input terminals of the first comparator COMP1 and the second comparator COMP2 are both used to receive the preset reference voltage VREF. The output terminal of the first comparator is connected to the input terminal of the first latch unit, and the output terminal of the second comparator is connected to the input terminal of the first latch unit.
[0049] The working principle of the first ring oscillator unit is as follows: When M4 receives the current output by M2, M4 conducts, charging the oscillation capacitor C1. The first comparator COMP1 compares the voltage on C1 with the preset reference voltage VREF. If the voltage on C1 is greater than VREF, the first comparator COMP1 outputs a high level, which becomes a low level after passing through the inverter INV3, and then outputs a low level after passing through the NOR gate NOR1. Therefore, the inverter INV1 outputs a high level, causing M6 to conduct and M4 to turn off. At this time, C1 discharges through M6, forming a process of first charging C1 and then discharging it. In this process, the role of M2 is to control the magnitude of the charging current. Finally, through the output terminal of the NOR gate NOR1 (not shown in the figure), a control signal VCOOUT with the target oscillation frequency is output.
[0050] The working principle of the second ring oscillator unit is as follows: When M5 receives the current output by M2, M5 conducts, charging the oscillation capacitor C1. The second comparator COMP2 compares the voltage on C1 with the preset reference voltage VREF. If the voltage on C1 is greater than VREF, the second comparator COMP2 outputs a high level, which becomes a low level after passing through the inverter INV4, and then outputs a low level after passing through the NOR gate NOR2. Therefore, the inverter INV2 outputs a high level, causing M7 to conduct and M5 to turn off. At this time, C1 discharges through M7, forming a process of first charging C1 and then discharging it. In this process, the role of M2 is to control the magnitude of the charging current. Finally, through the output terminal of the NOR gate NOR2, a control signal VCOOUT with the target oscillation frequency is output.
[0051] Both ends of the oscillation capacitor C1 in this embodiment are symmetric structures, forming two symmetric loops, thus forming positive feedback to stabilize the oscillation. Moreover, the oscillation circuit uses two symmetric loops to form a ring oscillator, avoiding the use of inductors, reducing the process complexity and cost, and at the same time ensuring the stability of the loop and an oscillation frequency as high as 38 MHz.
[0052] In summary, the embodiment of the present application provides a voltage-controlled oscillator with the following advantages: 1. The operational amplifier A1 is provided, which expands the operating voltage range of the voltage-controlled oscillator and also improves the linearity of VCOIN for current control.
[0053] 2. The substrate of the first NMOS transistor M3 is shorted to the source, eliminating the body effect and greatly increasing the upper limit range of the input control voltage VCOIN.
[0054] 3. The oscillation circuit uses two symmetric loops to form a ring oscillator, avoiding the use of inductors, reducing the process complexity and cost, and at the same time ensuring the stability of the loop.
[0055] In one embodiment, a phase-locked loop (PLL) is an important circuit widely used in fields such as communication and electronics. Based on the voltage-controlled oscillator provided in the above embodiment, the present application also provides a phase-locked loop circuit, which at least includes the voltage-controlled oscillator provided in any of the above embodiments.
[0056] Optionally, the phase-locked loop circuit may further include a phase detector (PD), a loop filter (LF), and a frequency divider. Among them, the phase detector is used to compare the phase difference between the input signal and the feedback signal and output an error signal proportional to the phase difference. Common phase detectors include analog multiplier type phase detectors, exclusive OR gate phase detectors, etc.; the main function of the loop filter is to filter out the high-frequency components and noise in the error signal output by the phase detector, making the error signal smoother to control the output frequency and phase of the voltage-controlled oscillator. It is usually composed of a low-pass filter composed of elements such as resistors and capacitors; the frequency divider divides the high-frequency signal output by the voltage-controlled oscillator to obtain a feedback signal matching the frequency of the input signal for phase comparison with the input signal in the phase detector. The division ratio of the frequency divider is usually settable and determined according to specific application requirements.
[0057] The working principle of the phase-locked loop circuit is as follows: In the initial state, when the phase-locked loop circuit is powered on, the voltage-controlled oscillator will output a signal with an initial frequency. At this time, if the frequency of the input signal is different from the initial frequency of the voltage-controlled oscillator, the phase detector will detect the phase difference between the two and output a corresponding error signal.
[0058] Then, after the error signal is filtered by the loop filter, a relatively smooth control voltage is obtained. When this control voltage is input into the voltage-controlled oscillator, it will cause the output frequency of the voltage-controlled oscillator to change in the direction of reducing the phase difference. That is to say, the frequency of the voltage-controlled oscillator will gradually approach the frequency of the input signal. This process is called frequency pulling.
[0059] Finally, as time goes by, when the frequency difference between the output frequency of the voltage-controlled oscillator and the frequency of the input signal is small enough, the phase-locked loop circuit enters the locked state. In the locked state, the phase difference between the output signal of the voltage-controlled oscillator and the input signal remains constant, the error signal is a fixed value, and the output frequency of the voltage-controlled oscillator is stabilized at a value proportional to the frequency of the input signal.
[0060] For the phase-locked loop circuit of the present application, since the voltage-controlled oscillator optimizes the linearity of the voltage-controlled current and at the same time increases the operating voltage range of the voltage-controlled oscillator, the phase-locked loop circuit including such a voltage-controlled oscillator has the effects of improving the frequency stability of the phase-locked loop circuit, improving the phase noise performance, and increasing the locking range.
[0061] For example, after optimizing the linearity of the voltage-controlled current of the voltage-controlled oscillator, the relationship between the output frequency of the voltage-controlled oscillator and the control voltage is more stable and accurate. When the phase-locked loop circuit is in the locked state, it can track the input signal frequency more accurately, reduce the frequency drift caused by factors such as temperature and power supply voltage fluctuations, and make the output frequency of the entire phase-locked loop system more stable; the optimization of the linearity of the voltage-controlled current can enable the voltage-controlled oscillator to output a relatively pure frequency signal under different control voltages, reducing the phase noise caused by non-linear factors. This helps to reduce the phase jitter of the output signal of the phase-locked loop and improve the quality and stability of the signal; optimizing the linearity and increasing the operating voltage range enable the voltage-controlled oscillator to respond more quickly to the control signal of the phase-locked loop and achieve frequency and phase locking in a shorter time.
[0062] The above is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present application should be covered by the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.
Claims
1. A voltage-controlled oscillator, characterized in that, Comprising: a voltage-controlled circuit, a current replication circuit, and an oscillation circuit; The voltage-controlled circuit includes: a comparison unit, a switching unit, and a voltage acquisition unit; The first input terminal of the comparison unit is used to receive an input control voltage, the second input terminal of the comparison unit is grounded through the voltage acquisition unit, the output terminal of the comparison unit is connected to the control terminal of the switching unit, one end of the switching unit is also grounded through the voltage acquisition unit, and the other end of the switching unit is connected to the input terminal of the current replication circuit; the output terminal of the current replication circuit is connected to the input terminal of the oscillation circuit, and the output terminal of the oscillation circuit is used to output a control signal with a target oscillation frequency.
2. The voltage-controlled oscillator according to claim 1, wherein The comparison unit is an operational amplifier, and the non-inverting input terminal and the inverting input terminal of the operational amplifier are respectively the first input terminal and the second input terminal of the comparison unit.
3. The voltage-controlled oscillator according to claim 1, wherein The switching unit is a first NMOS transistor; The gate of the first NMOS transistor is the control terminal of the switching unit, the source of the first NMOS transistor is one end of the switching unit, and the drain of the first NMOS transistor is the other end of the switching unit.
4. The voltage-controlled oscillator according to claim 3, characterized in that, The substrate and the source of the first NMOS transistor are short-circuited.
5. The voltage-controlled oscillator according to claim 1, wherein The current replication circuit is a P-type current mirror.
6. The voltage-controlled oscillator according to claim 5, characterized in that, The P-type current mirror includes: a first PMOS transistor and a second PMOS transistor; The drain of the first PMOS transistor is the input terminal of the current replication circuit, the gate of the first PMOS transistor is connected to the gate of the second PMOS transistor, and the source of the first PMOS transistor is connected to the source of the second PMOS transistor; The drain of the second PMOS transistor is the output terminal of the current replication circuit.
7. The voltage-controlled oscillator according to claim 1, wherein The oscillation circuit is a ring oscillator, and the ring oscillator includes: a first ring oscillation unit and a second ring oscillation unit that are symmetrical to each other, and an oscillation capacitor; The power supply terminals of the first ring oscillation unit and the second ring oscillation unit are both used as the input terminals of the oscillation circuit, the first output terminal of the first ring oscillation unit and the first output terminal of the second ring oscillation unit are respectively connected to both ends of the oscillation capacitor; The first output terminal of the first ring oscillation unit and the second output terminal of the second ring oscillation unit are respectively connected to the first input terminal and the second input terminal of the first ring oscillation unit; the second output terminal of the first ring oscillation unit and the first output terminal of the second ring oscillation unit are respectively connected to the first input terminal and the second input terminal of the second ring oscillation unit.
8. The voltage-controlled oscillator according to claim 7, wherein Any one of the first ring oscillation unit and the second ring oscillation unit includes: an inverting unit, a latching unit, and a comparison unit; The power supply terminal of the inverting unit is the power supply terminal of the ring oscillation unit, the output terminal of the inverting unit is the first output terminal of the ring oscillation unit, the output terminal of the inverting unit is connected to the first input terminal of the comparison unit, the second input terminal of the comparison unit is used to receive a preset reference voltage, and the output terminal of the comparison unit is connected to the input terminal of the latching unit; The first output terminal and the second output terminal of the latching unit are respectively the first output terminal and the second output terminal of the ring oscillation unit.
9. The voltage-controlled oscillator according to claim 8, wherein The latch unit includes: a first inverter, a NOR gate, and a second inverter; an input terminal of the first inverter is an input terminal of the latch unit, an output terminal of the first inverter is connected to a first input terminal of the NOR gate, an output terminal of the NOR gate is connected to an input terminal of the second inverter, and an output terminal of the second inverter is an output terminal of the latch unit.
10. A phase-locked loop circuit, characterized in that, It includes at least the voltage-controlled oscillator according to any one of claims 1-9.
Citation Information
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