Control circuit and control method for isolating power converter

Abstract

The application provides a control circuit and a control method for an isolated power converter, and relates to the technical field of the isolated power converter. The control circuit comprises a first detection circuit, which detects a secondary side output voltage and generates a pulse width modulation (PWM) signal whose duty cycle is proportional to the value of the secondary side output voltage. The PWM is transmitted to the primary side through electrical isolation of the converter, and a primary side circuit receives the PWM signal and outputs a control signal. A controller determines the value of the secondary side output voltage according to the control signal, and uses the value to control a primary side power switching device of the isolated power converter, so as to adjust the secondary side output voltage to a selected value.

Description

[0001] Related applications

[0002] This patent application claims priority to U.S. Patent Application No. 63 / 188,752, filed May 14, 2021, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] This invention relates to the field of isolated power converter technology, and specifically to a control circuit and control method for accurately detecting the output voltage of an isolated power converter and transmitting the detected output voltage across the converter's isolation barrier, thereby achieving fast response time and accurate adjustment of the output voltage of the isolated power converter. Background Technology

[0004] Isolated power converters are widely used in applications such as battery chargers, data center power supplies, and chargers for devices such as mobile phones, tablets, and laptops. Figure 1 An example of an isolated DC-DC converter based on existing technology is shown. (Reference) Figure 1 In an isolated converter, the primary (input) side and the secondary (output) side are electrically isolated, which can be achieved using a transformer T. The output voltage Vo is regulated by a digital controller, such as a microcontroller unit (or single-chip microcomputer) MCU2. To achieve voltage regulation, a feedback signal, such as an error voltage, based on the output voltage Vo is used as the input to the controller MCU2. Because electrical isolation between the input and output sides needs to be maintained, an analog optocoupler OP1 is typically used to convert the secondary-side error voltage Verror1 to the primary-side error voltage Verror2, which is then used as the input to the controller MCU2. However, the limitation of the current method is that the error voltage Verror2 is not proportional to the output voltage Vo, thus making it impossible to obtain accurate output voltage information on the primary side. Summary of the Invention

[0005] In a first aspect, the present invention provides a control circuit for an isolated power converter, comprising:

[0006] The first detection circuit detects the secondary-side output voltage of the isolated power converter and generates a PWM signal with a duty cycle proportional to the value of the secondary-side output voltage.

[0007] The first isolator transmits the PWM signal to the primary side of the isolated power converter through electrical isolation;

[0008] The first primary-side circuit receives the PWM signal from the first isolator and outputs a control signal; and

[0009] The first microcontroller determines the value of the secondary-side output voltage based on the control signal and controls the primary-side power switching device of the isolated power converter to adjust the secondary-side output voltage to the selected value.

[0010] Preferably, the first primary-side circuit includes a filter that filters the PWM signal from the first isolator;

[0011] The control signal includes a filtered PWM signal, which has a voltage value proportional to the secondary side output voltage value.

[0012] Preferably, the first detection circuit includes a comparator that generates the PWM signal.

[0013] Preferably, the first detection circuit includes a second microcontroller that generates the PWM signal.

[0014] Preferably, it further includes a feedback circuit, the feedback circuit comprising:

[0015] The second detection circuit detects the secondary-side output voltage of the isolated power converter and uses the detected secondary-side output voltage and the reference voltage to generate an error voltage.

[0016] The second isolator transmits the error voltage to the primary side of the isolated power converter through electrical isolation;

[0017] in,

[0018] The steady-state output voltage is determined using the reference voltage.

[0019] The first microcontroller calculates the steady-state gain using the steady-state output voltage and the steady-state value of the control signal, and uses the steady-state gain to calibrate the actual gain of the first detection circuit to determine the actual secondary-side output voltage.

[0020] The first microcontroller controls the primary-side power switching device of the isolated power converter to adjust the secondary-side output voltage to a selected value.

[0021] Preferably, the second detection circuit includes an error amplifier that generates the error voltage.

[0022] Preferably, the first primary-side circuit includes a sampling circuit, the sampling circuit including a capacitor, the capacitor being charged and discharged according to the duty cycle of the PWM signal received from the first isolator;

[0023] The first microcontroller sets the sampling time according to the period of the PWM signal received from the first isolator, and samples the voltage across the capacitor.

[0024] The control signal includes the sampled voltage across the capacitor.

[0025] Preferably, the first isolator outputs the PWM signal to the first microcontroller;

[0026] The first microcontroller measures the logic high-level time interval of the PWM signal and uses the logic high-level time interval to control the primary-side power switching device of the isolated power converter to adjust the secondary-side output voltage to a selected value.

[0027] Preferably, the first primary-side circuit includes a switch that shapes the PWM signal by reducing the fall time and rise time of the PWM signal received from the first isolator.

[0028] Preferably, the first detection circuit includes a second microcontroller, which generates a PWM signal and a PWM error signal based on the output voltage;

[0029] in,

[0030] The first isolator transmits the PWM signal to the primary side of the isolated power converter through electrical isolation;

[0031] The second isolator electrically isolates the PWM error signal and transmits it to the primary side of the isolated power converter.

[0032] The first primary-side circuit filters the PWM signal and outputs the first control signal;

[0033] The second primary-side circuit, including the filter, filters the PWM error signal and outputs a second control signal;

[0034] The first microcontroller controls the primary-side power switching device of the isolated power converter according to the first control signal and the second control signal, and adjusts the secondary-side output voltage to a selected value.

[0035] In a second aspect, the present invention provides a control method for an isolated power converter, comprising:

[0036] The secondary output voltage of the isolated power converter is detected by a first detection circuit that generates a PWM signal with a duty cycle proportional to the secondary output voltage value.

[0037] The PWM signal is transmitted to the primary side of the isolated power converter via electrical isolation using a first isolator.

[0038] The control signal is generated using the PWM signal received from the primary-side first isolator; and

[0039] The first microcontroller determines the value of the secondary-side output voltage from the control signal and uses the value of the secondary-side output voltage to control the primary-side power switching device of the isolated power converter to adjust the secondary-side output voltage to the selected value.

[0040] Preferably, the control signal is generated using a first primary-side circuit, which includes a filter for filtering the PWM signal from the first isolator.

[0041] The control signal is a filtered PWM signal, which has a voltage value proportional to the secondary side output voltage value.

[0042] Preferably, the secondary-side output voltage is detected using a first detection circuit, which includes a comparator that generates the PWM signal.

[0043] Preferably, a first detection circuit including a second microcontroller that generates the PWM signal is used to detect the secondary-side output voltage.

[0044] Preferred, including:

[0045] The second detection circuit is used to detect the secondary-side output voltage of the isolated power converter, and the detected secondary-side output voltage and the reference voltage are used to generate an error voltage.

[0046] A second isolator is used to transmit the error voltage across electrical isolation to the primary side of the isolated power converter;

[0047] in,

[0048] Use a reference voltage to determine the steady-state output voltage;

[0049] The first microcontroller calculates the steady-state gain using the steady-state output voltage and the steady-state value of the control signal, and uses the steady-state gain to calibrate the actual gain of the first detection circuit in order to determine the actual secondary-side output voltage.

[0050] The first microcontroller controls the primary-side power switching device of the isolated power converter to regulate the secondary-side output voltage to a selected value.

[0051] Preferably, the second detection circuit includes an error amplifier that generates the error voltage.

[0052] Preferably, the first primary-side circuit includes a sampling circuit, the sampling circuit including a capacitor, the capacitor being charged and discharged according to the duty cycle of the PWM signal received from the first isolator;

[0053] The first microcontroller sets the sampling time according to the period of the PWM signal received from the first isolator, and samples the voltage across the capacitor.

[0054] The control signal includes the sampled voltage across the capacitor.

[0055] Preferably, the first isolator outputs the PWM signal to the first microcontroller;

[0056] The first microcontroller measures the logic high-level time interval of the PWM signal and uses the logic high-level time interval to control the primary-side power switching device of the isolated power converter to adjust the secondary-side output voltage to a selected value.

[0057] Preferably, the PWM signal received from the first isolator on the primary side is shaped by reducing the fall time and rise time of the PWM signal.

[0058] Preferably, the first detection circuit includes a second microcontroller, which generates a PWM signal and a PWM error signal based on the output voltage;

[0059] in,

[0060] The first isolator transmits the PWM signal to the primary side of the isolated power converter through electrical isolation;

[0061] The second isolator electrically isolates the PWM error signal and transmits it to the primary side of the isolated power converter.

[0062] The first primary-side circuit filters the PWM signal and outputs the first control signal;

[0063] The second primary-side circuit, including the filter, filters the PWM error signal and outputs a second control signal;

[0064] The first microcontroller controls the primary-side power switching device of the isolated power converter according to the first control signal and the second control signal, and adjusts the secondary-side output voltage to a selected value.

[0065] Thirdly, the present invention provides an isolated power converter, including the control circuit as described above.

[0066] Preferably, the output voltage of the isolated power converter is converted into a PWM signal, the duty cycle of the PWM signal is proportional to the output voltage, the PWM signal is transmitted from one side of electrical isolation to the other side of electrical isolation while the duty cycle remains unchanged, and the DC value of the PWM signal is obtained by a low-pass filter.

[0067] Preferably, the error amplifier feedback loop is used to regulate the converter output voltage to its stable state, and the output of the pulse width modulation-based output voltage detection circuit is calibrated by the error amplifier feedback loop to eliminate errors in the analog pulse width modulation-based output voltage detection circuit.

[0068] Preferably, the converter output voltage is converted into a digital signal whose time interval between logic high levels is proportional to the output voltage. The digital signal is transmitted from one side of electrical isolation to the other side of electrical isolation, and the time interval between logic high levels remains unchanged. The time interval of the logic high level signal is calculated (i.e. retrieved) by the digital controller. Attached Figure Description

[0069] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0070] Figure 1 This is a schematic diagram of an isolated inductor-inductor-capacitor (LLC) converter based on existing technology, which operates as a DC-DC converter and has a controller on the primary side;

[0071] Figure 2 This is a schematic diagram of an output voltage detection circuit according to one embodiment;

[0072] Figure 3 Showing Figure 2 The typical waveform diagram of the output voltage detection circuit shown is as follows;

[0073] Figure 4 This is a schematic diagram based on existing technologies that can be used to generate sawtooth waveforms;

[0074] Figure 5 This is a schematic diagram illustrating the use of an output voltage error amplifier to calibrate the accuracy of a pulse-width modulation-based output voltage detection circuit according to one embodiment;

[0075] Figure 6 This is a schematic diagram of calibrating the accuracy of a pulse-width modulation-based output voltage detection circuit using an output voltage error amplifier according to another embodiment;

[0076] Figure 7 This is a schematic diagram of an output voltage detection circuit that uses a digital controller on the primary side and another digital controller on the secondary side, according to one embodiment.

[0077] Figure 8This is a schematic diagram of an output voltage detection circuit that uses a digital controller on the primary side and another digital controller on the secondary side, according to another embodiment.

[0078] Figure 9A and 9B Is for display Figure 8 The embodiment shows typical waveforms of the T_high time interval for detecting high and low output voltages respectively, with asynchronous sampling period;

[0079] Figure 9C and 9D It is a graph showing the typical waveforms of the T_high time interval for detecting high and low output voltages according to another embodiment, with synchronous sampling period;

[0080] Figure 10 This is a schematic diagram of an output voltage detection circuit according to one embodiment;

[0081] Figure 11 This is a schematic diagram of an output voltage detection circuit according to one embodiment. Detailed Implementation

[0082] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention are described clearly and completely. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0083] Figure 1 This demonstrates an isolated DC-DC converter based on existing technology, featuring a full-bridge inductor-inductor-capacitor (LLC) resonant converter as the power stage. It should be noted that transformer T is used to achieve isolation between the primary side (left side of the dashed line) and the secondary side (right side of the dashed line). Np refers to the primary winding of the transformer, and Ns1 and Ns2 refer to the secondary windings.

[0084] Figure 1 In this context, MCU2 refers to the microcontroller unit. It is a digital controller used to provide switching signals (G signals) to the power switches Q1-Q4 on the primary side of the power converter. Q1 -G Q4 This circuit controls the operation of the LLC converter. In this circuit, output voltage Vo regulation is achieved by transmitting the value of error voltage Verror2 from the secondary side across electrical isolation to the primary side for use by the digital controller MCU2.

[0085] exist Figure 1In this configuration, MCU2 is positioned on the primary side of the power supply. The secondary-side output voltage Vo is divided by a resistor divider circuit (Rb1, Rb2) connected to a regulator TL431. The regulator TL431 contains a reference voltage Vref and includes OpAmp. Changes in the output (Verror1) of TL431 cause changes in the current through the diode of the analog optocoupler OP1. The output current of the analog optocoupler OP1 (i.e., the current through the bipolar junction transistor (BJT)) is proportional to its input current (i.e., the current through the diode), thus changing the primary-side error voltage Verror2. Verror2 is converted to a digital value by the analog-to-digital converter (ADC) in MCU2 via the ADC21 pin. MCU2 processes the error information and drives it through four gate drive signals G. Q1 -G Q4 It generates control signals, such as the switching frequency of an LLC converter. In some cases, MCU2 also detects and uses resonant current and input voltage.

[0086] Please note that Verror2 contains error information for the output voltage. Figure 1 In the case shown, Verror2 depends on the compensation network (R2, C2), the reference voltage Vref of TL431, the current transfer ratio (CTR) of the analog optocoupler OP1, and the values ​​of resistors R1, R3, Rb1, and Rb2, as shown in Equation (1):

[0087] Verror2=f(Vref,R2,C2,CTR,Rb1,Rb2) (1)

[0088] Here, f is usually a complex function.

[0089] However, according to Figure 1 In the previous method, Verror2 was not proportional to Vo, as shown below:

[0090] Verror2≠kVo (2)

[0091] In the above formula, ≠ means "not equal", and k is a constant.

[0092] The embodiments of the present invention provide solutions to overcome existing methods (e.g.) Figure 1The method shown describes a circuit and control method for detecting analog voltage across an isolated power converter via electrical isolation. The embodiments accurately detect and transmit voltage from one side of the electrical isolation to the other. For example, the embodiments can detect the output voltage of the isolated power supply and transmit the detected voltage from the secondary side across the electrical isolation to the primary side. While the embodiments can be used in any isolated converter application, they are particularly suitable for applications requiring precise output voltage information on the other side of the electrical isolation. According to the embodiments, this can be achieved by transmitting a signal proportional to the value of the output voltage from one side of the electrical isolation (secondary side) to the other side of the electrical isolation (primary side), as follows:

[0093] Vop=kVo (3)

[0094] In the above equation, Vop is the DC signal input to the primary-side controller, Vo is the output voltage, and the parameter "k" is a constant. Therefore, Vop is proportional to the output voltage.

[0095] In embodiments of the present invention, the term "isolated converter" refers to an isolated AC-to-DC, DC-to-DC, DC-to-AC, or AC-to-AC converter. Isolated converters can be based on designs selected from, but not limited to, full-bridge, flyback, inductor-inductor-capacitor (LLC), inductor-capacitor-capacitor (LCC), etc.

[0096] Figure 2 This is a circuit diagram of a detection and control circuit for an isolated converter with a primary-side controller, according to one embodiment. The primary-side controller can be, for example, a digital signal controller (DSC), a digital controller such as a microcontroller unit (MCU, or single-chip microcomputer), a field-programmable gate array (FPGA), etc. A suitable controller is the DSPIC33CK128MP205, available from Microchip Technology Inc., Chandler, Arizona, USA.

[0097] For example, Figure 2 The embodiments can be used with isolated DC-DC converters that have a full-bridge LLC converter as a power stage, such as Figure 5 As shown. Figure 2 The embodiment provides Vop as the ADC input of the primary input-side controller (e.g., MCU2), such as Figure 2 As shown. Vop can be used by the primary-side controller to regulate the output voltage Vo, for example, to implement output overvoltage protection (OVP) and output undervoltage protection (UVP), and / or, for example, to detect the rate of change of the output voltage, thereby accelerating the dynamic response of the power supply closed-loop system. Figure 2 The implementation example is based on the pulse width modulation (PWM) method.

[0098] Output voltage detection based on pulse width modulation (PWM Vo detection):

[0099] refer to Figure 2 The circuit includes a pulse-width modulation-based output voltage detection circuit (PWMVo detection circuit), comprising resistor dividers Rb3 and Rb4, a sawtooth wave, and a comparator for converting the output voltage into a PWM signal. An optocoupler or digital isolator OP2 is used to transmit the PWM signal to the electrically isolated primary side, and a primary-side filter is used to recover the PWM information. The output voltage Vo is divided by resistor dividers Rb3 and Rb4 to generate Vo1. The comparator compares Vo1 with a sawtooth voltage Vsw with a frequency of Fsaw and a period of Tsaw = 1 / Fsaw. An example circuit that can be used to generate Fsaw is shown below. Figure 4 As shown. The comparator output is a logic signal with a logic high-level time interval of T_high, defined as follows:

[0100] T_high=Vo1 / Vpk*Tsaw (4)

[0101] In the above formula, Vpk is the peak voltage of the sawtooth wave signal. The minimum value of the sawtooth wave signal is zero.

[0102] The duty cycle D of the comparator output signal can be defined as follows:

[0103] D = T_high / Tsaw, then D = Vo1 / Vpk (5)

[0104] Because Tsaw and Vpk are fixed values, the time interval T_high is proportional to Vo1, and Vo1 is proportional to Vo. Equivalently, the value D is proportional to Vo1. The output voltage Vo can be measured by detecting the value of D or T_high.

[0105] The comparator's output voltage (V) PWMS This signal, referred to as the logic signal, drives the optocoupler or digital isolator OP2. The optocoupler or digital isolator transmits the logic signal from the secondary side to the primary side of the electrically isolated isolation converter. PWMP (The output of the optocoupler or digital isolator, OP2) will have a connection with V. PWMS Same shape, such as Figure 3 As shown, it displays Figure 2 Key waveforms of the embodiment. It is worth noting that V PWMP The peak value is Vccp, which is the power supply voltage applied to the primary side of the optocoupler or digital isolator OP2.

[0106] In embodiments of the invention, unless otherwise stated, the terms "optical coupler" and "digital isolator" are used interchangeably and have the same meaning (i.e., they perform effectively equivalent functions). In the drawings, the symbol for optical coupler is used for both optical coupler and digital isolator implementations. For an optical coupler, the signal is transmitted from the diode side (i.e., the input) to the BJT side (i.e., the output). For example, in... Figure 2 In this case, the signal is transmitted from the right side to the left side of the optocoupler. Digital isolators can be provided as integrated circuits (ICs) and do not use optical components to transmit signals across electrical isolation, and typically have a faster response time than optocouplers.

[0107] exist Figure 2 In the embodiment, the low-pass RC filter implemented with RF1, CF1 and RF2, CF2 is used to filter out the frequency components of Fsaw and retrieve V. PWMP The average value. The average value, Vop, can be expressed as:

[0108] Vop=D*Vccp=Vo1*Vccp / Vpk=Vo*Rb4 / (Rb3+Rb4)*Vccp / Vpk (6)

[0109] Or Vop = Gain_Vo_PWM * Vo (6.1) and Gain_Vo_PWM = Rb4 / (Rb3+Rb4) * Vccp / Vpk (6.2)

[0110] Wherein, Gain_Vo_PWM is the equivalent gain of PWMVo detection. Therefore, Vop is proportional to the output voltage Vo. The primary-side digital controller MCU2 detects Vop via an analog-to-digital converter (ADC). In this embodiment of the invention, the value of the output voltage Vo is transmitted from the secondary side of the isolation converter to the primary side.

[0111] In practical implementation, component tolerances and non-ideal operation of electronic circuits will introduce errors into the above analysis. For example, due to component tolerances, the peak value (Vpk) of the sawtooth wave signal may differ from the design parameters. As can be seen from equation (6), if Vpk changes by 5%, Vop will also change by about 5%. Therefore, the tolerance of Vop may be relatively high, for example, 5% to 20% in actual implementation.

[0112] Assuming a given output voltage value, such as Vo = 30V, the accurately detected Vop is 3V (Vop = 3V) without considering component tolerances. The gain of the pulse-width modulation (PWM)-based output voltage detection circuit is 0.1, so Gain_Vo_PWM = Vop / Vo = 0.1. If a 5% tolerance is considered, Vop might change from 3V to 3V + / - 5% = 2.85V to 3.15V. If a 10% tolerance is considered, Vop might change from 3V to 3V + / - 10% = 2.7V to 3.3V. This means that when the actual Vo is 30V, the detected Vop could be between 2.7V and 3.3V.

[0113] It should be noted that in most applications, the Vo detection error should ideally be less than 3%, but must be less than 5%. Therefore, considering the tolerance of the conversion circuit, such as the Vpk value of the sawtooth wave signal, the primary-side voltage Vop obtained by the pulse width modulation-based output voltage detection circuit may not have high enough accuracy to accurately adjust the output voltage Vo.

[0114] Therefore, according to another embodiment, the accuracy of a pulse-width modulation-based output voltage detection circuit can be significantly improved by automatically calibrating its steady-state operating point using an error amplifier with an output voltage feedback loop. For example, the error amplifier can be implemented in conjunction with an analog optocoupler (OP1), such as... Figure 5 As shown. A suitable device is a three-terminal adjustable shunt regulator with a voltage reference and an internal error amplifier, such as the TL431, which is available from Texas Instruments Inc. (Dallas, TX, USA), although other similar devices may also be used.

[0115] like Figure 5 As shown, an error amplifier and feedback compensation network (R2 and C2) are used to regulate the output voltage Vo to its steady-state value. The error voltage Verror1 is transferred from the secondary side of the converter to the primary side as Verror2 using an analog optocoupler (OP1). Using the error amplifier circuit, the accuracy of the output voltage regulation is determined by the accuracy of the error amplifier's Vref and the accuracy of Rb1 and Rb2. For the TL431, the tolerance of Vref is less than 1%. The tolerances of Rb1 and Rb2 can be between 0.1% and 1%. Therefore, the accuracy of Vo regulation can be better than 3%, for example, 1% in most cases.

[0116] Under steady-state operation, the output voltage Vo is stable, and the error voltage Verror2 is also stable. Verror2 is sampled by the ADC, which in this embodiment is the input of ADC21 of MCU2. Simultaneously, the pulse-width modulation-based output voltage detection circuit also generates Vop, which is sampled by another ADC, the input of ADC22 of MCU2.

[0117] Importantly, since the output voltage Vo remains at its steady-state value (Vo_ss) during steady-state operation, the actual detected value of Vop (Vop_act) during steady-state operation is proportional to the steady-state value of Vo_ss, i.e., a known value. Therefore, the actual gain of the pulse-width modulation-based output voltage detection circuit can be calculated as follows:

[0118] Gain_Vo_PWM_act=Vop_act / Vo_ss (7)

[0119] Where Vop_act is the actual measured voltage at the input of the ADC22 when the circuit is operating in a steady state. The actual gain value of the pulse-width modulation-based output voltage detection circuit during steady-state operation can be calculated using the above formula. Therefore, by using, for example... Figure 5 The error amplifier in the embodiment can essentially eliminate the tolerance effects of the pulse width modulation-based output voltage detection circuit.

[0120] refer to Figure 5 The embodiment is further described by way of the following non-limiting examples.

[0121] Assume (A) the ideal gain of the output voltage detection circuit based on pulse width modulation is 0.09; (B) the measured Vop_act in steady state is 3V; (C) the steady-state output voltage is Vo_ss = 30V.

[0122] The actual gain of the pulse-width modulation (PWM)-based output voltage detection circuit in steady state is Gain_Vo_PWM_act = 3V / 30 = 0.1. MCU2 uses this steady-state gain value to calibrate the detected Vop to determine the actual output voltage. For example, if the measured VopA = 3.5V, the actual output voltage will be calculated using the steady-state gain value as VoA = 3.5V / 0.1 = 35V. Note that without calibration, the 3.5V VopA will be "interpreted" by MCU2 using an ideal gain value, such as VoA_interpreted = 3.5 / 0.09 = 38.89V, while the actual output voltage is 35V. Similarly, using the calibration method, if the measured Vop is VopB = 2.8V, the actual output voltage VoB will be calculated using the steady-state gain value as VoB = 2.8V / 0.1 = 28V. It can be observed that the above calibration method significantly improves the accuracy of Vo detection.

[0123] Therefore, the output voltage Vo on the secondary side can be accurately measured (or calculated) from the primary side in the following way:

[0124] Vo = Vop / Gain_Vo_PWM_act (8)

[0125] For example, in steady state, the output voltage Vo = 30V, and the voltage measured by MCU2's ADC22 is Vop_act = 3V. Therefore, the actual (steady-state) gain is 3V / 30V = 0.1. Thus, if the measured Vop is 2.5V, the primary-side MCU2 can accurately predict the actual output voltage Vo as 25V (=2.5V / 0.1). Similarly, if the measured Vop is 3.5V, the actual output voltage Vo can be predicted as 35V (=3.5V / 0.1). Through accurate output voltage measurement, the primary-side MCU2 can achieve accurate output overvoltage and undervoltage protection. MCU2 can also perform additional calculations based on the actual output voltage to achieve better closed-loop performance.

[0126] In one embodiment, the calibration process can be performed continuously during power-on operation. The actual gain of the pulse-width modulation (PWM)-based output voltage detection circuit may be continuously updated. For example, when the power supply is first turned on, the temperature may be around 25°C (room temperature). The peak value of the sawtooth wave signal is Vpk_25. If the power supply temperature rises to 100°C, the peak value of the sawtooth wave signal may become Vpk_100, which is different from Vpk_25. The actual gain of the PWMVo detection circuit changes from Gain_25 to Gain_100. Through a calibration loop including an error amplifier and an analog optocoupler, the actual gain of the PWM-based output voltage detection circuit is updated, and the actual output voltage Vo can be accurately measured by Vop: Vo = Vop / Gain_Vo_PWM_act.

[0127] If the LLC converter used is a single-stage AC-to-DC rectifier with power factor correction (PFC), the output voltage Vo will consist of a steady-state DC voltage plus a double-frequency AC ripple voltage (100Hz in Europe and Asia, and 120Hz in North America). For example, the DC value of Vo might be Vo_DC = 30V. The double-frequency AC ripple might be Vo_rip = 5V (peak-to-peak). Assuming a gain of 0.1, the measured Vop will also include a DC value of Vop_DC = 3V and a double-frequency AC ripple value of Vop_rip = 0.5V (peak-to-peak). In this case, the steady-state or DC value of Vop, Vop_DC, can be used to calibrate the actual gain of the PWM-based output voltage detection circuit. Vop_DC can be calculated by MCU2 by averaging the Vop voltage sampled over a double-frequency (100Hz or 120Hz) period. The actual gain of the PWMVo detection circuit operating under PFC conditions can be calculated as follows:

[0128] Gain_Vo_PWM_act_PFC=Vop_DC / Vo_DC (8.1)

[0129] use Figure 2The pulse width modulation-based output voltage detection circuit shown is... Figure 5 The calibration method shown can accurately detect the instantaneous output voltage using the following formula:

[0130] Vo=Vop / Gain_Vo_PWM_act_PFC (8.2)

[0131] The accurate output voltage detection provided by the embodiments of the present invention can accurately detect ripple voltage and can be used to improve the performance of a single-stage AC to DC rectifier.

[0132] It's also important to note that two signals related to the output voltage are detected at the primary-side digital controller MCU2. One is the output voltage error signal generated by the error amplifier, which is not proportional to the output voltage. The other is a voltage signal that is proportional to the output voltage.

[0133] like Figure 5 The pulse width modulation-based output voltage detection circuit shown uses a low-pass filter composed of RF1, CF1 and RF2, CF2 to detect V. PWMP The average value. Note that this low-pass filter will introduce a small time delay in Vo detection. If Vo changes very rapidly, Vop cannot change immediately. For example, if the sawtooth frequency is Fsaw = 100kHz, RF1 = 200kΩ, CF1 = 150pF, RF2 = 150kΩ, and CF2 = 100pF, the estimated delay time is approximately 200µs. This means that if Vo changes rapidly from 30V to 33V, it will take approximately 200µs for Vop to change from 3V to 3.3V. This delay should be considered in the design. In some applications, this delay is undesirable or even unacceptable.

[0134] This delay can basically be achieved through... Figure 6 The embodiments are used to eliminate (or greatly reduce) Figure 6 A fast pulse-width modulation (PWM)-based output voltage detection circuit with very low delay is shown. On the secondary side, the output voltage Vo is converted into a PWM signal V using a comparator and a sawtooth wave Vsw. PWMS T_high is the logic high-level time interval of the PWM signal, which is proportional to the output voltage Vo. The PWM signal is transmitted to the primary side through an optocoupler or digital isolator OP2, serving as the voltage V. PWMP On the primary side, V PWMP The input is fed into a fast T_high value detection circuit that has a constant current charging circuit and a timing sampling circuit, such as... Figure 6 As shown in the dashed box in the image.

[0135] V PWMPThe P-channel MOSFET switch (QP2) is used to control the on / off state of a fast pulse-width modulation-based output voltage detection circuit. When V PWMP When at logic high, QP2 is off, and capacitor C1 is charged by a constant current source generated by Qp, Dz (Zener diode), Re, and Rb. The voltage at C1 rises linearly. At the end of T_high, the voltage at C1 is Vpk1, calculated as shown in formula (9) below. PWMP The falling edge of the signal is sent to MCU2 to instruct MCU2 to sample the voltage of C1 at the falling edge. Therefore, Vpk1 is detected by MCU2. When V... PWMP After the voltage drops, QP2 turns on, and capacitor C1 discharges to zero. The peak value of C1 (Vpk1) is calculated using the following equation:

[0136] Vop=Vpk1=IC1*T_high=T_high*(Vz–0.7) / Re / C1 (9)

[0137] Where Vz is the Zener diode voltage of Dz. Therefore, the peak value Vpk1 (=Vop) of C1 is proportional to the duration of the logic high level of the PWM signal (T_high). As Vo increases, T_high increases, therefore, Vpk1 (=Vop) increases proportionally. Figure 6 The gain calculation for the fast T_high value detection circuit shown is as follows:

[0138] Gain_Vo_PWM_fast=Vpk1 / Vo=Rb4 / (Rb3+Rb4)*Tsaw / Vpk*(Vz–0.7) / Re / C1 (10)

[0139] A fast T_high value retrieval circuit is used, without a low-pass filter. The output voltage value is detected by Fsaw every Tsaw cycle or sawtooth frequency. Since Fsaw may be around 100kHz to 200kHz, the time delay for Vo detection is approximately 5µs or 10µs. This is much shorter than the approximately 200µs time delay required by a PWM Vo recovery circuit with a low-pass filter. Figure 5 As shown.

[0140] As mentioned above, regarding Figure 5 As discussed in the embodiments, due to component tolerances, Figure 6 The accuracy of some embodiments may be approximately 5% to 10%, which may not be accurate enough for some applications to regulate the DC value of the output voltage (e.g., <3% may be required). Therefore, it is possible to... Figure 6 In the embodiments, an error amplifier and a T_high detection circuit (such as...) are used. Figure 6 (as shown) to achieve something similar to the above Figure 5The PWM Vo detection circuit calibration method in this embodiment, where steady-state gain = Vpk1_ss / Vo_ss, and actual gain is Vpk1 / Vo_ss. The steady-state value of the output voltage Vo is adjusted by an error amplifier, and the pulse-width modulation-based output voltage detection circuit provides a voltage signal proportional to the output voltage. This provides additional information for the digital control loop. The calibration process can be performed continuously, and the actual gain of the pulse-width modulation-based output voltage detection circuit can be continuously updated.

[0141] Precise PWM Vo detection:

[0142] Figure 7 Another embodiment shown provides a precise pulse-width modulation (PWM)-based output voltage detection circuit that achieves an accuracy of 3% or better. In this circuit, another digital controller, MCU1, is used on the secondary side. The output voltage Vo is detected by the ADC input ADC11 of MCU1 and converted into a digital value. MCU1 generates a PWM signal (Vo) based on the detected output voltage Voo. PWMS Because the MCU1's ADC is very accurate (i.e., it may have high resolution, such as 12-bit or 16-bit), therefore V PWMS The duty cycle is exactly proportional to Vo. PWMS Drive optocouplers or digital isolators (OP2, such as...) Figure 7 As shown), the PWM signal transmitted to the primary side is V. PWMP Because the delay time of a digital isolator is very small, V PWMP The duty cycle will be related to V PWMS The duty cycles are basically the same. Therefore, Vop can be calculated as:

[0143] Vop=D*Vccp (11)

[0144] If Vccp is adjusted accurately (e.g., with an accuracy of approximately 1%), then the voltage value of Vop (after the low-pass filter) will be related to the PWM signal V. PWMS The duty cycle is directly proportional to the Vop accuracy. This results in very high accuracy, for example, better than 3% to 5%.

[0145] Because the ADC of MCU1 is very accurate, the Vop on the primary side will be precisely proportional to the output voltage Vo on the secondary side. An improvement to this implementation is that the conversion from Vo to a PWM signal is achieved through a digital controller that implements both the ADC and PWM modules, such as an MCU.

[0146] According to embodiments of the present invention, since the output voltage Vo on the secondary side is detected and accurately converted into a PWM signal on the secondary side, and accurately converted into Vop on the primary side, the calibration circuit as described in the above embodiments does not require an error amplifier and related circuitry, including a second optocoupler or digital isolator. In embodiments of the present invention, only one optocoupler or digital isolator (OP2) is required. Vop is used for both steady-state output voltage regulation and dynamic regulation, as well as output overvoltage protection, output undervoltage protection, etc.

[0147] Because of the low-pass filter after the optocoupler or digital isolator OP2, there will be a certain time delay in detecting changes in the secondary-side output voltage Vo. Figure 7 In the pulse-width modulation-based output voltage detection circuit shown, there is a certain delay between the response of Vop on the primary side and the change in Vo on the secondary side. For example, if V... PWMS If the frequency is approximately 100kHz, then the delay time is approximately 200µs.

[0148] solve Figure 7 One way of time delay in the embodiment is in Figure 8 As illustrated in the embodiment, the measurement speed can be improved by using the counter function of a digital controller (e.g., MCU2) to measure the logic high-level time of the V_high_P signal from the optocoupler or digital isolator OP2, and the time interval (T_high) of the V_high_P signal. Figure 8 As shown. In this embodiment of the invention, the output voltage detected by MCU1 on the secondary side is converted into a logic high-level time interval T_high, as shown. Figure 8 The V_high_S signal is shown in the diagram. This T_high time interval information is transmitted from OP2 to the primary side into V_high_P. The logic high-level time interval of V_high_P is the same as the logic high-level time interval (T_high) of V_high_S. The counter in MCU2 calculates the duration of the logic high-level time (the time interval between the rising and falling edges of V_high_P). Therefore, the T_high value measured by MCU2 is proportional to the output voltage Vo.

[0149] Figure 9A and 9B Typical waveforms are shown to illustrate. Figure 8 The operation of the embodiments. See reference. Figure 9AAssuming Vo is at a steady-state value, such as 30V, MCU1 will generate a 10µs logic high-level time, T_high1 = 10µs. This signal (V_high_S) is transmitted to the primary side via an optocoupler or digital isolator (OP2), and is designated V_high_P. The T_high values ​​of V_high_S and V_high_P are the same. The rising edge of V_high_P is used to start the counter in MCU2, and the falling edge is used to stop the counter in MCU2. Therefore, the time interval T_high can be accurately measured by MCU2. In a typical MCU, the counter clock period may be approximately 20ns. Therefore, the accuracy of T_high may be 20ns / 10µs = 20ns / 10000ns = 0.2%. This provides accurate Vo detection for all applications of the isolation converter. MCU1 adds a logic low time interval (T_low) between the two logic high signals (T_high). This logic low-level time interval is used to separate the samples of the two output voltages. Note that this logic low time interval T_low only needs to be long enough to distinguish between two logic high intervals. For general-purpose MCUs, 1µs of T_low is sufficient to distinguish between two high-level signals. For example, if T_high = 10µs and T_low = 2µs, then the update rate of Vo might be every 12µs. Therefore, a new Vo value will be obtained on the primary side every 12µs.

[0150] Figure 9B The typical waveform is shown when the output voltage Vo = 15V (approximately half the steady-state value). In the example above, T_high is 5µs, and T_low remains 2µs. This allows the Vo measurement to be updated on the primary side every 7µs. This asynchronous information transmission reduces the time delay between output voltage detection and transmission. Note that... Figure 9A and Figure 9B The frequencies of the waveforms are different.

[0151] In another embodiment, the waveforms of the T_high and T_low logic levels are generated at the same frequency, such as... Figure 9C and Figure 9D The image shows waveforms for two different output voltages. This may be preferred in some applications because, relative to... Figure 9A and 9B In this embodiment, the time interval between interrupts (counts) is longer, thus requiring fewer system resources.

[0152] In the above embodiments, it is assumed that a high-speed optocoupler or digital isolator (OP2) is used to transmit the signal from the secondary side to the primary side. However, due to cost reasons, linear optocouplers or low-speed optocouplers (such as...) can be used in practical circuits. Figure 1The OP1 shown is cheaper than high-speed optocouplers or digital isolators (OP2). Using low-speed optocouplers results in longer rise and fall times for the PWM signal, reducing the accuracy of Vop. To address this issue, as described in the embodiments of the present invention, the Vo detection circuit using conventional or low-speed optocouplers can add a small-signal MOSFET after the optocoupler for shaping. For example, as shown... Figure 10 As shown, the gate of MOSFET S1 can be connected to the output V of optocoupler OP2. PWMP The drain of MOSFET S1 is connected to the power supply voltage Vccp via R12. The drain voltage (Vds1) of MOSFET S1 will have a very fast rise and fall edge. Therefore, the average voltage of Vop will be approximately the same as V. PWMS The duty cycle is directly proportional to the duty cycle.

[0153] Figure 11 The embodiments of the present invention are Figure 5 The circuit shown is a digital implementation. It uses two MCUs: MCU1 on the secondary side and MCU2 on the primary side. MCU1 on the secondary side generates two PWM signals, ErrorPWM and VoPWM. The duty cycle of the first PWM signal (ErrorPWM) is proportional to the output of the error amplifier Verror1. Figure 5 In this context, it is an analog voltage signal. Figure 11 In this circuit, the error voltage Verror1 is represented by a digital value inside MCU1, and this digital signal is output in the form of PWM (Error PWM). Figure 11 In this embodiment, both isolators (OP2) can be implemented using optocouplers or digital isolators, since both signals are PWM signals.

[0154] The duty cycle of the second PWM signal (Vo PWM) is proportional to the actual value of Vo. Using the calibration method described above, the ErrorPWM signal can be used to calibrate the accuracy of the Vo PWM signal, eliminating potential errors introduced by the inherent delay time of digital isolators or optocouplers, and improving the accuracy of PWMVo detection.

[0155] Similarly, such as Figure 8 The T_high time detection method described in the embodiments can also be used to detect the pulse width of the Vo PWM signal, thereby detecting the actual output voltage Vo. Based on the above embodiments, these details will be obvious to those skilled in the art.

[0156] The contents of all cited documents are incorporated into this article in their entirety through reference.

[0157] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0158] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A control circuit for an isolated power converter, characterized in that, include: The first detection circuit detects the secondary-side output voltage of the isolated power converter and generates a PWM signal with a duty cycle proportional to the value of the secondary-side output voltage. The first isolator transmits the PWM signal to the primary side of the isolated power converter through electrical isolation; The first primary-side circuit receives the PWM signal from the first isolator and outputs a control signal. and The first microcontroller determines the value of the secondary-side output voltage according to the control signal and controls the primary-side power switching device of the isolated power converter to adjust the secondary-side output voltage to the selected value. It also includes a feedback circuit, which comprises: The second detection circuit detects the secondary-side output voltage of the isolated power converter and uses the detected secondary-side output voltage and the reference voltage to generate an error voltage. The second isolator transmits the error voltage to the primary side of the isolated power converter through electrical isolation; in, The steady-state output voltage is determined using the reference voltage. The first microcontroller calculates the steady-state gain using the steady-state output voltage and the steady-state value of the control signal, and uses the steady-state gain to calibrate the actual gain of the first detection circuit to determine the actual secondary-side output voltage. The first microcontroller controls the primary-side power switching device of the isolated power converter to adjust the secondary-side output voltage to a selected value.

2. The control circuit as described in claim 1, characterized in that, The first primary-side circuit includes a filter that filters the PWM signal from the first isolator; The control signal includes a filtered PWM signal, which has a voltage value proportional to the secondary side output voltage value.

3. The control circuit according to claim 1, characterized in that, The first detection circuit includes a comparator that generates the PWM signal.

4. The control circuit according to claim 1, characterized in that, The first detection circuit includes a second microcontroller that generates the PWM signal.

5. The control circuit according to claim 1, characterized in that, The second detection circuit includes an error amplifier that generates the error voltage.

6. The control circuit according to claim 1, characterized in that, The first primary-side circuit includes a sampling circuit, which includes a capacitor that charges and discharges according to the duty cycle of the PWM signal received from the first isolator. The first microcontroller sets the sampling time according to the period of the PWM signal received from the first isolator, and samples the voltage across the capacitor. The control signal includes the sampled voltage across the capacitor.

7. The control circuit as described in claim 4, characterized in that, The first isolator outputs the PWM signal to the first microcontroller; The first microcontroller measures the logic high-level time interval of the PWM signal and uses the logic high-level time interval to control the primary-side power switching device of the isolated power converter to adjust the secondary-side output voltage to a selected value.

8. The control circuit according to claim 2, characterized in that, The first primary-side circuit includes a switch that shapes the PWM signal by reducing the fall time and rise time of the PWM signal received from the first isolator.

9. The control circuit according to claim 1, characterized in that, The first detection circuit includes a second microcontroller, which generates a PWM signal and a PWM error signal based on the secondary side output voltage. in, The first isolator transmits the PWM signal to the primary side of the isolated power converter through electrical isolation; The second isolator electrically isolates the PWM error signal and transmits it to the primary side of the isolated power converter. The first primary-side circuit filters the PWM signal and outputs the first control signal; The second primary-side circuit, including the filter, filters the PWM error signal and outputs a second control signal; The first microcontroller controls the primary-side power switching device of the isolated power converter according to the first control signal and the second control signal, and adjusts the secondary-side output voltage to a selected value.

10. A control method for an isolated power converter, characterized in that, include: The secondary output voltage of the isolated power converter is detected by a first detection circuit that generates a PWM signal with a duty cycle proportional to the secondary output voltage value. The PWM signal is transmitted to the primary side of the isolated power converter via electrical isolation using a first isolator. The control signal is generated using the PWM signal received from the primary-side first isolator; and The first microcontroller determines the value of the secondary-side output voltage from the control signal and uses the value of the secondary-side output voltage to control the primary-side power switching device of the isolated power converter to adjust the secondary-side output voltage to the selected value. The second detection circuit is used to detect the secondary-side output voltage of the isolated power converter, and the detected secondary-side output voltage and the reference voltage are used to generate an error voltage. A second isolator is used to transmit the error voltage across electrical isolation to the primary side of the isolated power converter; in, Use a reference voltage to determine the steady-state output voltage; The first microcontroller calculates the steady-state gain using the steady-state output voltage and the steady-state value of the control signal, and uses the steady-state gain to calibrate the actual gain of the first detection circuit in order to determine the actual secondary-side output voltage. The first microcontroller controls the primary-side power switching device of the isolated power converter to regulate the secondary-side output voltage to a selected value.

11. The control method according to claim 10, characterized in that, The control signal is generated using a first primary-side circuit, which includes a filter for filtering the PWM signal from the first isolator. The control signal is a filtered PWM signal, which has a voltage value proportional to the secondary side output voltage value.

12. The method according to claim 10, characterized in that, The secondary-side output voltage is detected using a first detection circuit, which includes a comparator that generates the PWM signal.

13. The control method according to claim 10, characterized in that, The secondary-side output voltage is detected using a first detection circuit that includes a second microcontroller that generates the PWM signal.

14. The control method according to claim 10, characterized in that, The second detection circuit includes an error amplifier that generates the error voltage.

15. The control method according to claim 10, characterized in that, The control signal is generated using a first primary-side circuit, which includes a sampling circuit and a capacitor that charges and discharges according to the duty cycle of the PWM signal received from the first isolator. The first microcontroller sets the sampling time according to the period of the PWM signal received from the first isolator, and samples the voltage across the capacitor. The control signal includes the sampled voltage across the capacitor.

16. The control method according to claim 13, characterized in that, The first isolator outputs the PWM signal to the first microcontroller; The first microcontroller measures the logic high-level time interval of the PWM signal and uses the logic high-level time interval to control the primary-side power switching device of the isolated power converter to adjust the secondary-side output voltage to a selected value.

17. The control method according to claim 11, characterized in that, The PWM signal received from the first isolator on the primary side is shaped by reducing the fall time and rise time of the PWM signal.

18. The control method according to claim 10, characterized in that, The first detection circuit includes a second microcontroller, which generates a PWM signal and a PWM error signal based on the secondary side output voltage. in, The first isolator transmits the PWM signal to the primary side of the isolated power converter through electrical isolation; The second isolator electrically isolates the PWM error signal and transmits it to the primary side of the isolated power converter. The first primary-side circuit filters the PWM signal and outputs the first control signal; The second primary-side circuit, including the filter, filters the PWM error signal and outputs a second control signal; The first microcontroller controls the primary-side power switching device of the isolated power converter according to the first control signal and the second control signal, and adjusts the secondary-side output voltage to a selected value.

19. An isolated power converter, characterized in that, Includes the control circuit as described in claim 1.

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