Display substrate, preparation method thereof and display device

Abstract

A display substrate, a manufacturing method thereof, and a display device. The display substrate includes a substrate and a plurality of pixel units arranged in a matrix on the substrate. Each pixel unit includes a plurality of sub-pixels. Each sub-pixel includes a driving structure layer, a first electrode and a first pixel definition layer on the driving structure layer, and a light absorption layer on the first pixel definition layer. The first pixel definition layer includes a plurality of first blocking portions and a first pixel opening between the first blocking portions. The first pixel opening exposes at least part of the first electrode. The first pixel opening includes a first surface close to the first electrode, a second surface opposite to the first surface, and a first sidewall between the first surface and the second surface. The first pixel opening communicates the first surface and the second surface. The light absorption layer covers the first blocking portions and at least part of the first sidewall.

Description

Technical Field

[0001] This disclosure relates to, but is not limited to, the field of display technology, and particularly to a display substrate, a method for preparing the same, and a display device. Background Technology

[0002] Organic light-emitting diodes (OLEDs) are active-matrix display devices with advantages such as self-illumination, wide viewing angle, high contrast, low power consumption, and extremely fast response speed. With the continuous development of display technology, flexible display devices that use OLEDs as light-emitting devices and are controlled by thin-film transistors (TFTs) have become the mainstream products in the display field. Summary of the Invention

[0003] The following is an overview of the subject matter described in detail herein. This overview is not intended to limit the scope of the claims.

[0004] An exemplary embodiment of this disclosure provides a display substrate, including a substrate and a plurality of pixel units arranged in a matrix on the substrate. Each pixel unit includes a plurality of sub-pixels. Each sub-pixel includes a driving structure layer located on the substrate, a first electrode and a first pixel definition layer located on the driving structure layer, and a light-absorbing layer disposed on the first pixel definition layer. The driving structure layer includes a thin-film transistor, the drain of which is connected to the first electrode. The first pixel definition layer includes a plurality of first blocking portions and a first pixel opening disposed between the first blocking portions. The first pixel opening exposes at least a portion of the first electrode. The first pixel opening includes a first surface adjacent to the first electrode, a second surface opposite to the first surface, and a first sidewall located between the first surface and the second surface. The first pixel opening communicates the first surface and the second surface. The light-absorbing layer covers the first blocking portions and at least a portion of the first sidewall.

[0005] In an exemplary embodiment, the edge of the orthogonal projection of the light-absorbing layer on the substrate coincides with the edge of the orthogonal projection of the first surface on the substrate, or is located outside the orthogonal projection of the first surface on the substrate; and the edge of the orthogonal projection of the light-absorbing layer on the substrate is located within the orthogonal projection of the second surface on the substrate.

[0006] In an exemplary embodiment, the display substrate further includes a second pixel definition layer disposed on the light-absorbing layer, the second pixel definition layer covering the light-absorbing layer, the second pixel definition layer including a plurality of second blocking portions and a second pixel opening disposed between the second blocking portions, the second pixel opening exposing at least a portion of the first electrode.

[0007] In an exemplary embodiment, the second pixel opening includes a third surface near the first electrode, a fourth surface opposite to the third surface, and a second sidewall located between the third surface and the fourth surface. The second pixel opening connects the third surface and the fourth surface. The orthographic projection of the third surface on the substrate overlaps with the orthographic projection of the first surface on the substrate, or is within the range of the orthographic projection of the first surface on the substrate.

[0008] In an exemplary embodiment, the first sidewall forms a first slope angle with the plane where the substrate is located, and the second sidewall includes a first side surface close to the first electrode and a second side surface away from the first electrode. The first side surface forms a second slope angle with the plane where the substrate is located, and the second slope angle is greater than the first slope angle.

[0009] In an exemplary embodiment, the thickness of the first pixel definition layer is 0.5 micrometers to 1.5 micrometers, the thickness of the light-absorbing layer is 0.5 micrometers to 1 micrometer, and the thickness of the second pixel definition layer is 0.2 micrometers to 0.6 micrometers.

[0010] In an exemplary embodiment, the light-absorbing layer is made of a light-absorbing material or a pixel definition layer material doped with light-absorbing particles, wherein the light-absorbing particles are carbon black particles or black chromium particles, and the pixel definition layer material is polyimide, acrylic, or polyethylene terephthalate.

[0011] An exemplary embodiment of this disclosure also provides a display device including the display substrate described in any of the preceding embodiments.

[0012] An exemplary embodiment of this disclosure also provides a method for fabricating a display substrate, comprising: forming a driving structure layer and a first planarization layer on a substrate; forming a first electrode and a first pixel definition layer on the first planarization layer, the first pixel definition layer including a plurality of first barrier portions and a first pixel opening disposed between the first barrier portions, the first pixel opening exposing at least a portion of the first electrode, the first pixel opening including a first surface adjacent to the first electrode, a second surface opposite to the first surface, and a first sidewall located between the first surface and the second surface, the first pixel opening communicating with the first surface and the second surface; forming a light-absorbing layer on the first pixel definition layer, the light-absorbing layer covering the first barrier portions and at least a portion of the first sidewall; and sequentially forming an organic light-emitting layer, a second electrode, and an encapsulation layer.

[0013] In an exemplary embodiment, the first pixel definition layer is formed by a positive photolithography process, and the light-absorbing layer is formed by a negative photolithography process.

[0014] In an exemplary embodiment, the edge of the orthogonal projection of the light-absorbing layer on the substrate coincides with the edge of the orthogonal projection of the first surface on the substrate, or is located outside the orthogonal projection of the first surface on the substrate; and the edge of the orthogonal projection of the light-absorbing layer on the substrate is located within the orthogonal projection of the second surface on the substrate.

[0015] In an exemplary embodiment, prior to the sequential formation of the organic light-emitting layer, the second electrode, and the encapsulation layer, the method further includes:

[0016] A second pixel definition layer is formed on the light-absorbing layer, the second pixel definition layer covers the light-absorbing layer, the second pixel definition layer includes a plurality of second blocking portions and a second pixel opening disposed between the second blocking portions, the second pixel opening exposing at least a portion of the first electrode.

[0017] In an exemplary embodiment, the second pixel opening includes a third surface near the first electrode, a fourth surface opposite to the third surface, and a second sidewall located between the third surface and the fourth surface. The second pixel opening connects the third surface and the fourth surface. The orthographic projection of the third surface on the substrate overlaps with the orthographic projection of the first surface on the substrate, or is within the range of the orthographic projection of the first surface on the substrate.

[0018] After reading and understanding the accompanying diagrams and detailed descriptions, other aspects can be understood. Attached Figure Description

[0019] The accompanying drawings are provided to further illustrate the technical solutions of this disclosure and form part of the specification. They are used together with the embodiments of this disclosure to explain the technical solutions of this disclosure and do not constitute a limitation on the technical solutions of this disclosure. The shapes and sizes of the components in the drawings do not reflect actual proportions and are only intended to illustrate the content of this disclosure.

[0020] Figure 1 This is a schematic diagram of the waveguide light principle in a display substrate;

[0021] Figure 2a The waveguide output polarimetric view is a simulation of a light-emitting device with a purely planar structure.

[0022] Figure 2b A waveguide light output polarimetric view for a light-emitting device with a pixel-defined layer slope, simulated;

[0023] Figure 3 This is a schematic diagram of the waveguide light emission direction simulated for a light-emitting device with a pixel-defined layer slope.

[0024] Figure 4 This is a schematic diagram of the structure of a display substrate according to an exemplary embodiment of the present disclosure;

[0025] Figure 5 This is a schematic diagram of the structure of another display substrate as an exemplary embodiment of the present disclosure;

[0026] Figure 6 This is a schematic diagram of the structure of a display substrate after forming a flexible substrate according to an exemplary embodiment of the present disclosure;

[0027] Figure 7 This is a schematic diagram of the structure of a display substrate after the driving structure layer has been formed, as an exemplary embodiment of the present disclosure.

[0028] Figure 8 This is a schematic diagram of the structure of a display substrate after the first planarization layer has been formed, as an exemplary embodiment of the present disclosure.

[0029] Figure 9 This is a schematic diagram of the structure of the display substrate after the first electrode has been formed, as an exemplary embodiment of the present disclosure;

[0030] Figure 10 This is a schematic diagram of the structure of a display substrate after the first pixel definition layer has been formed, as an exemplary embodiment of the present disclosure.

[0031] Figure 11 This is a schematic diagram of the structure of a display substrate after the light-absorbing layer has been formed, as an exemplary embodiment of the present disclosure.

[0032] Figure 12 This is a schematic diagram illustrating the fabrication process of the light-absorbing layer, an exemplary embodiment of this disclosure.

[0033] Figure 13This is a schematic diagram of the structure of a display substrate after the encapsulation layer has been formed, as an exemplary embodiment of the present disclosure.

[0034] Figure 14 A schematic diagram of a light-absorbing layer residue as an exemplary embodiment of this disclosure;

[0035] Figure 15 This is a schematic diagram illustrating the preparation process of the second pixel definition layer in an exemplary embodiment of this disclosure;

[0036] Figure 16 This is a schematic flowchart illustrating a method for fabricating a display substrate, which is an exemplary embodiment of this disclosure. Detailed Implementation

[0037] To make the objectives, technical solutions, and advantages of this disclosure clearer, embodiments of this disclosure will be described in detail below with reference to the accompanying drawings. Note that the implementation methods can be carried out in many different forms. Those skilled in the art will readily understand that the methods and content can be varied in various forms without departing from the spirit and scope of this disclosure. Therefore, this disclosure should not be construed as limited to the content described in the following embodiments. Without conflict, the embodiments and features in the embodiments of this disclosure can be arbitrarily combined with each other.

[0038] In the accompanying drawings, the size of the constituent elements, the thickness of the layers, or the area are sometimes exaggerated for clarity. Therefore, one aspect of this disclosure is not necessarily limited to these dimensions, and the shapes and sizes of the components in the drawings do not reflect true proportions. Furthermore, the drawings schematically illustrate ideal examples, and one aspect of this disclosure is not limited to the shapes or values ​​shown in the drawings.

[0039] The ordinal numbers “first,” “second,” and “third” used in this specification are used to avoid confusion among the constituent elements, not to limit their quantity.

[0040] In this specification, for convenience, terms such as "middle," "upper," "lower," "front," "rear," "vertical," "horizontal," "top," "bottom," "inner," and "outer" are used to indicate orientation or positional relationships in conjunction with the accompanying drawings. This is solely for the purpose of facilitating the description and simplification, and does not imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this disclosure. The positional relationships of the constituent elements may be appropriately varied depending on the orientation of each constituent element being described. Therefore, the use of terms not limited to those described in the specification may be appropriately replaced as needed.

[0041] In this specification, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they may refer to a fixed connection, a detachable connection, or an integral connection; a mechanical connection or an electrical connection; a direct connection, an indirect connection via an intermediate component, or a connection within two components. Those skilled in the art will understand the specific meaning of these terms in this disclosure based on the specific circumstances.

[0042] In this specification, a transistor is a device that includes at least three terminals: a gate electrode, a drain electrode, and a source electrode. A transistor has a channel region between the drain electrode (drain electrode terminal, drain region, or drain electrode) and the source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode. Note that in this specification, the channel region refers to the region through which current primarily flows.

[0043] In this specification, the first electrode can be the drain electrode and the second electrode can be the source electrode, or vice versa. In cases where transistors with opposite polarities are used or the current direction changes during circuit operation, the functions of the "source electrode" and "drain electrode" may sometimes be interchanged. Therefore, in this specification, the "source electrode" and "drain electrode" can be interchanged.

[0044] In this specification, "electrical connection" includes the situation where components are connected together by elements that have a certain electrical function. There are no particular limitations on what constitutes an "electrical function," as long as it allows for the transmission and reception of electrical signals between the connected components. Examples of "electrical functions" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements with various functions.

[0045] In this specification, "parallel" refers to the state where the angle formed by two straight lines is greater than or equal to -10° and less than 10°, and therefore also includes the state where the angle is greater than or equal to -5° and less than 5°. Similarly, "perpendicular" refers to the state where the angle formed by two straight lines is greater than or equal to 80° and less than 100°, and therefore also includes the state where the angle is greater than or equal to 85° and less than 95°.

[0046] In this specification, the terms "film" and "layer" may be interchanged. For example, "conductive layer" may sometimes be replaced with "conductive film." Similarly, "insulating film" may sometimes be replaced with "insulating layer."

[0047] OLED displays are self-emissive display devices that offer significant advantages over traditional LCDs, including high brightness, high contrast, high color saturation, and high response speed. Most existing OLED displays employ a top-emitting device structure, which typically consists of a semi-reflective cathode, a total reflective anode, and an intermediate organic light-emitting layer. The cathode and anode form a reflective microcavity, creating a microcavity effect that causes strong interference of multiple light beams emitted from the organic light-emitting layer within the cavity. This narrows the emission spectrum and effectively modulates the peak wavelength of the emission spectrum.

[0048] An OLED display panel includes a substrate, a driving structure layer, a planarization layer, an anode, a pixel definition layer, an organic light-emitting layer, a cathode, and an encapsulation layer, all sequentially disposed on the substrate. The encapsulation layer may include a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer stacked on top of each other. Since the refractive index of the encapsulation layer and the layers below it is generally greater than 1.5, there is total internal reflection of waveguide light inside the encapsulation layer, and this waveguide light is less affected by the microcavity effect, i.e., it has a large spectral peak width.

[0049] like Figure 1 As shown, considering the last layer is air, the condition for total internal reflection of light entering the encapsulation layer is: n1·sinθ1=n2·sinθ2=n3·sinθ3=n 空 • sin90°, where n1, n2, and n3 are the refractive indices of the first inorganic encapsulation layer (CVD1), the organic encapsulation layer (IJP), and the second inorganic encapsulation layer (CVD2), respectively. From this, the critical angle for total reflection of light entering the first inorganic encapsulation layer (refractive index 1.75) can be calculated as:

[0050] θ1=arcsin(1 / n1)≈34.5°.

[0051] Therefore, when the angle of light entering the first inorganic encapsulation layer is greater than or equal to 34.5 degrees, the light will be confined within the encapsulation layer by total internal reflection. This part of the waveguide light has a larger spectral peak width compared to the light that can be emitted normally.

[0052] Figure 2a The waveguide output polarimetric view is simulated for a light-emitting device with a purely planar structure. Figure 2b This is a simulated waveguide light output polarimetric view for a light-emitting device with a pixel-defined layer slope. Figure 3 This is a schematic diagram illustrating the waveguide light emission position simulated for a light-emitting device with a pixel-defined layer slope (for example, the slope angle of the pixel-defined layer slope is 40°). Figure 2a As shown, for a purely planar light-emitting device, waveguide light cannot be emitted (complete black indicates that the detected energy of the emitted light is 0, i.e., there is no emitted light), such as Figure 2b and Figure 3As shown, with the pixel-defined layer slope, waveguide light that would otherwise be unable to escape will be emitted into the air within a certain range. For example... Figure 3 As shown, simulation results indicate that waveguide light can exit along the slope of the pixel definition layer or exit after passing through the upper surface of the pixel definition layer.

[0053] like Figure 4 or Figure 5 As shown, this disclosure provides a display substrate, including a substrate and a plurality of pixel units arranged in a matrix on the substrate. Each pixel unit includes a plurality of sub-pixels. Each sub-pixel includes a driving structure layer 30 located on the substrate, a first electrode 21 and a first pixel definition layer 22 located on the driving structure layer 30, and a light-absorbing layer 23 disposed on the first pixel definition layer 22. The driving structure layer 30 includes a thin film transistor 101, and the drain of the thin film transistor 101 is connected to the first electrode 21.

[0054] The first pixel definition layer 22 includes a plurality of first blocking portions 220 and a first pixel opening 221 disposed between the first blocking portions. The first pixel opening 221 exposes at least a portion of the first electrode 21. The first pixel opening 221 includes a first surface near the first electrode 21, a second surface opposite to the first surface, and a first sidewall 221c located between the first surface and the second surface. The first pixel opening 221 connects the first surface and the second surface.

[0055] The light-absorbing layer 23 covers the first barrier portion 220 and at least a portion of the first sidewall 221c.

[0056] The display substrate provided in this disclosure absorbs waveguide light emitted along the slope of the pixel definition layer 22 or after passing through the upper surface of the pixel definition layer 22 by forming a light-absorbing layer 23 on the first pixel definition layer 22. This eliminates the influence of the broadened waveguide light spectrum on the forward light emission spectrum, effectively avoids viewing angle distortion of the display substrate, and improves display quality.

[0057] In one exemplary embodiment, the substrate may be a flexible substrate 10, or it may be a rigid substrate, and this disclosure does not limit it.

[0058] In one exemplary embodiment, each sub-pixel includes a first electrode 21, a second electrode 25, and an organic light-emitting layer 24 disposed between the first electrode 21 and the second electrode 25. The organic light-emitting layer 24 at least covers the first electrode 21, is connected to the first electrode 21, and is connected to the second electrode 25.

[0059] In one exemplary embodiment, the organic light-emitting layer 24 is continuously formed on a plurality of sub-pixels; or, the organic light-emitting layer 24 on the plurality of sub-pixels is disconnected by a first barrier portion 220 of the first pixel definition layer 22.

[0060] In one exemplary embodiment, the edge of the orthogonal projection of the light-absorbing layer 23 on the substrate coincides with the edge of the orthogonal projection of the first surface on the substrate, or is located outside the orthogonal projection of the first surface on the substrate; and the edge of the orthogonal projection of the light-absorbing layer 23 on the substrate is located within the orthogonal projection of the second surface on the substrate.

[0061] In one exemplary embodiment, the distance between the edge of the orthographic projection of the light-absorbing layer 23 onto the substrate and the edge of the orthographic projection of the first surface onto the substrate can be from 0.5 micrometers to 1.5 micrometers. For example, the distance between the edge of the orthographic projection of the light-absorbing layer 23 onto the substrate and the edge of the orthographic projection of the first surface onto the substrate is approximately 1 micrometer, that is, the light-absorbing layer 23 is recessed by approximately 1 micrometer from the first surface, so that the light-absorbing layer 23 does not affect the aperture ratio of the display substrate.

[0062] like Figure 5 As shown, in one exemplary embodiment, the display substrate further includes a second pixel definition layer 27 disposed on the light-absorbing layer 23. The second pixel definition layer 27 covers the light-absorbing layer 23, and a cavity is formed between the second pixel definition layer 27 and the first pixel definition layer 22. The light-absorbing layer 23 is disposed in the cavity. The second pixel definition layer 27 includes a plurality of second blocking portions 270 and a second pixel opening 271 disposed between the second blocking portions 270. The second pixel opening 271 exposes at least a portion of the first electrode 21.

[0063] In one exemplary embodiment, the second pixel opening 271 includes a third surface near the first electrode 21, a fourth surface opposite to the third surface, and a second sidewall 271c located between the third surface and the fourth surface, and the second pixel opening 271 connects the third surface and the fourth surface.

[0064] The orthographic projection of the third surface onto the substrate overlaps with the orthographic projection of the first surface onto the substrate, or is within the range of the orthographic projection of the first surface onto the substrate.

[0065] In one exemplary embodiment, the first sidewall 221c forms a first slope angle α with the plane where the substrate is located, and the second sidewall 271c includes a first side surface close to the first electrode and a second side surface away from the first electrode. The first side surface forms a second slope angle β with the plane where the substrate is located, and the second slope angle β is greater than the first slope angle α.

[0066] In one exemplary embodiment, the first slope angle α is 0 to 35°, and the second slope angle β is greater than the first slope angle α and less than 63°.

[0067] In one exemplary embodiment, the thickness h1 of the first pixel definition layer 22 is 0.5 micrometers to 1.5 micrometers, the thickness h2 of the light-absorbing layer 23 is 0.5 micrometers to 1 micrometer, and the thickness h3 of the second pixel definition layer 27 is 0.2 micrometers to 0.6 micrometers.

[0068] In this embodiment, the thickness h1 of the first pixel definition layer 22 and the thickness h3 of the second pixel definition layer 27 need to simultaneously ensure the uniformity of the coating and make the first slope angle α and the second slope angle β as small as possible; the thickness h2 of the light-absorbing layer 23 needs to simultaneously ensure the uniformity of the coating and make the thickness as small as possible, so as to minimize or avoid the generation of light-absorbing layer residue on the first electrode 21.

[0069] In one exemplary embodiment, the material of the light-absorbing layer 23 can be a single light-absorbing material, or it can be a pixel definition layer material doped with light-absorbing particles. The light-absorbing particles can be carbon black particles or black chromium particles, and the pixel definition layer material can be polyimide, acrylic, or polyethylene terephthalate.

[0070] like Figure 4 or Figure 5 As shown, in a plane direction perpendicular to the display substrate, the display substrate of this disclosure includes a substrate, a driving structure layer 30 disposed on the substrate, a first planarization layer 20 disposed on the driving structure layer 30, and a light-emitting structure layer disposed on the first planarization layer 20.

[0071] The driving structure layer 30 includes: a first insulating layer 11 disposed on a substrate, an active layer disposed on the first insulating layer 11, a second insulating layer 13 covering the active layer, a first gate metal layer disposed on the second insulating layer 13, a third insulating layer 15 covering the first gate metal layer, a second gate metal layer disposed on the third insulating layer 15, a fourth insulating layer 17 covering the second gate metal layer, a source / drain metal layer disposed on the fourth insulating layer 17, and a fifth insulating layer 19 covering the source / drain metal layer. The active layer includes at least a first active layer, the first gate metal layer includes at least a first gate electrode and a first capacitor electrode, the second gate metal layer includes at least a second capacitor electrode, and the source / drain metal layer includes at least a first source electrode, a first drain electrode, and a low-voltage line. The first active layer, the first gate electrode, the first source electrode, and the first drain electrode constitute a first transistor 101, and the first capacitor electrode and the second capacitor electrode constitute a first storage capacitor C1.

[0072] The light-emitting structure layer includes: a first electrode 21 and a first pixel definition layer 22 disposed on the first planarization layer 20, a light-absorbing layer 23 disposed on the first pixel definition layer 22, an organic light-emitting layer 24 disposed at least on the first electrode 21, a second electrode 25 disposed on the organic light-emitting layer 24, and an encapsulation layer 26 disposed on the second electrode 25.

[0073] The structure of the display substrate disclosed herein is illustrated below through an example of the fabrication process of the display substrate. The "patterning process" mentioned in this disclosure includes processes such as depositing a film layer, coating photoresist, mask exposure, development, etching, and photoresist stripping. Deposition can be performed using any one or more methods selected from sputtering, evaporation, and chemical vapor deposition; coating can be performed using any one or more methods selected from spraying and spin coating; and etching can be performed using any one or more methods selected from dry etching and wet etching. A "thin film" refers to a thin film of a certain material fabricated on a substrate using a deposition or coating process. If the "thin film" does not require a patterning process during the entire fabrication process, it can also be called a "layer." When the "thin film" requires a patterning process during the entire fabrication process, it is called a "thin film" before the patterning process and a "layer" after the patterning process. The "layer" after the patterning process contains at least one "pattern." The phrase "A and B are set in the same layer" in this disclosure means that A and B are formed simultaneously through the same patterning process. "The orthographic projection of A includes the orthographic projection of B" means that the orthographic projection of B falls within the orthographic projection range of A, or the orthographic projection of A covers the orthographic projection of B.

[0074] In some exemplary embodiments, Figure 4 The fabrication process of the display substrate may include the following steps:

[0075] (1) A flexible substrate 10 is prepared on a glass carrier plate 1.

[0076] In one example of an embodiment of this disclosure, the flexible substrate 10 may employ a two-layer flexible structure. The flexible substrate 10 includes a first flexible material layer, a first inorganic material layer, a semiconductor layer, a second flexible material layer, and a second inorganic material layer stacked on a glass substrate 1. The materials of the first flexible material layer and the second flexible material layer may be polyimide (PI), polyethylene terephthalate (PET), or a surface-treated polymer film, etc. The materials of the first inorganic material layer and the second inorganic material layer may be silicon nitride (SiNx) or silicon oxide (SiOx), etc., to improve the substrate's resistance to water and oxygen. The first inorganic material layer and the second inorganic material layer are also referred to as barrier layers. The material of the semiconductor layer may be amorphous silicon (a-Si). In an exemplary embodiment, taking a multilayer structure PI1 / Barrier1 / a-si / PI2 / Barrier2 as an example, the fabrication process of the flexible substrate 10 may include: firstly, coating a layer of polyimide on a glass substrate 1, curing it to form a first flexible (PI1) layer 10A; then depositing a barrier film on the first flexible layer 10A to form a first barrier (Barrier1) layer 10B covering the first flexible layer 10A; then depositing an amorphous silicon film on the first barrier layer 10B to form an amorphous silicon (a-si) layer 10C covering the first barrier layer 10B; then coating another layer of polyimide on the amorphous silicon layer 10C, curing it to form a second flexible (PI2) layer 10D; then depositing a barrier film on the second flexible layer 10D to form a second barrier (Barrier2) layer 10E covering the second flexible layer 10D, thus completing the fabrication of the flexible substrate 10. Figure 6 As shown.

[0077] In other examples, the flexible substrate 10 may employ a single flexible layer structure. For instance, the flexible substrate 10 may include a stacked flexible (PI) layer and a barrier layer. In this example, the flexible substrate 10 may be composed of... Figure 6 After the first flexible (PI1) layer 10A, the first barrier (Barrier1) layer 10B, and the amorphous silicon (a-si) layer 10C are removed, only the stacked second flexible (PI2) layer 10D and the second barrier (Barrier2) layer 10E remain.

[0078] (2) A driving structure layer pattern is fabricated on the flexible substrate 10. In one exemplary embodiment, such as... Figure 7 As shown, the preparation process in this step may include:

[0079] A first insulating film and an active layer film are sequentially deposited on a flexible substrate 10. The active layer film is patterned using a patterning process to form a first insulating layer 11 covering the entire flexible substrate 10, and an active layer pattern disposed on the first insulating layer 11. The active layer pattern is formed in the display area and includes at least a first active layer 12.

[0080] Subsequently, a second insulating film and a first metal film are deposited sequentially. The first metal film is patterned using a patterning process to form a second insulating layer 13 covering the active layer pattern, and a first gate metal layer pattern disposed on the second insulating layer 13. The first gate metal layer pattern is formed in the display area and includes at least a gate electrode 14A and a first capacitor electrode 14B.

[0081] Subsequently, a third insulating film and a second metal film are deposited sequentially. The second metal film is patterned using a patterning process to form a third insulating layer 15 covering the first gate metal layer, and a second gate metal layer pattern disposed on the third insulating layer 15. The second gate metal layer pattern is formed in the display area and includes at least a second capacitor electrode 16A. The position of the second capacitor electrode 16A corresponds to the position of the first capacitor electrode 14B.

[0082] Subsequently, a fourth insulating film is deposited, and the fourth insulating film is patterned using a patterning process to form a pattern of the fourth insulating layer 17 covering the second gate metal layer. Multiple first vias are formed on the fourth insulating layer 17, with the positions of the multiple first vias corresponding to the two ends of the first active layer 12. The fourth insulating layer 17, the third insulating layer 15, and the second insulating layer 13 within the multiple first vias are etched away, exposing the surfaces of the two ends of the first active layer 12.

[0083] Subsequently, a third metal thin film is deposited, and the third metal thin film is patterned using a patterning process to form a source / drain metal layer pattern on the fourth insulating layer 17. The source / drain metal layer includes at least a first source electrode 18A, a first drain electrode 18B, a low-voltage (VSS) line (not shown), multiple data lines (not shown), and multiple data leads (not shown) patterns. The first source electrode 18A and the first drain electrode 18B are respectively connected to the first active layer 12 through first vias. In an exemplary embodiment, depending on actual needs, the source / drain metal layer may also include any one or more of a power line (VDD), a compensation line, and an auxiliary cathode. The source / drain metal layer is also referred to as the first source / drain metal layer (SD1).

[0084] Subsequently, a fifth insulating film is deposited to form a fifth insulating layer 19 pattern covering the source and drain metal layers.

[0085] Thus, the driving structure layer pattern has been fabricated on the flexible substrate 10, as follows: Figure 7As shown. The first active layer 12, the first gate electrode 14A, the first source electrode 18A and the first drain electrode 18B form a transistor 101, which can be a driving transistor in a pixel driving circuit. The first capacitor electrode 14B and the second capacitor electrode 16A form a storage capacitor C1. Multiple gate leads and data leads form the driving leads of the array substrate gate driver on array (GOA).

[0086] In an exemplary embodiment, the first, second, third, fourth, and fifth insulating films can be any one or more of silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiON), and can be single-layer, multi-layer, or composite layers. The first insulating layer 11 is called a buffer layer, used to improve the water and oxygen resistance of the flexible substrate 10; the second and third insulating layers 13 and 15 are called gate insulation (GI) layers; the fourth insulating layer 17 is called an interlayer insulation (ILD) layer; and the fifth insulating layer 19 is called a passivation (PVX) layer. The first, second, and third metal films can be made of metallic materials, such as any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo), or alloys of the above metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoNb), and can be single-layer or multi-layer composite structures, such as Ti / Al / Ti. The active layer thin film can be made of various materials such as amorphous indium gallium zinc oxide (a-IGZO), zinc oxynitride (ZnON), indium zinc tin oxide (IZTO), amorphous silicon (a-Si), polycrystalline silicon (p-Si), hexathiophene, and polythiophene. In other words, this disclosure is applicable to transistors manufactured based on oxide technology, silicon technology, and organic technology.

[0087] (3) A first planarization film is coated on the flexible substrate on which the aforementioned pattern is formed, forming a first planarization (PLN) layer 20 covering the entire flexible substrate 10. A second via is formed on the first planarization layer 20 by a patterning process. The first planarization layer 20 and the fifth insulating layer 19 within the second via are etched away, exposing the surface of the drain electrode of the thin-film transistor 101, such as... Figure 8 As shown.

[0088] (4) Forming a first electrode 21 pattern on the flexible substrate on which the aforementioned pattern is formed. Forming the first electrode 21 pattern may include: depositing a first metal thin film on the flexible substrate on which the aforementioned pattern is formed; coating a layer of photoresist on the first metal thin film; exposing the photoresist using a monochrome mask; forming an unexposed area at the location of the first electrode; forming fully exposed areas at other locations; developing to remove the photoresist from the fully exposed areas; subsequently etching away the first metal thin film in the fully exposed areas; and stripping the photoresist to form the first electrode 21 pattern. The first electrode 21 of each sub-pixel is connected to the drain electrode of the thin-film transistor 101 in that sub-pixel, such as... Figure 9 As shown. Since the OLED panel in this embodiment has a top-emitting structure, the first electrode 21 is a reflective electrode, which can be a metal with high reflectivity, such as silver (Ag), gold (Au), palladium (Pd), platinum (Pt), or an alloy of these metals, or a composite layer of these metals. In actual implementation, a composite layer structure of indium tin oxide (ITO) layer and metal reflective layer can also be used, which has good conductivity, high reflectivity, and good morphological stability.

[0089] (5) Forming a first pixel definition layer 22 pattern on the flexible substrate on which the aforementioned pattern is formed. Forming the first pixel definition layer 22 pattern may include: coating a first pixel defining film on the flexible substrate on which the aforementioned pattern is formed, and then exposing and developing the first pixel defining film using a monochrome mask to form the first pixel definition layer 22 pattern, such as... Figure 10 As shown. The first pixel definition layer 22 is used to define a first pixel opening region in each sub-pixel, and the first pixel opening region exposes the first electrode 21. In this embodiment, the first pixel definition layer (PDL) can be made of polyimide, acrylic or polyethylene terephthalate.

[0090] (6) A light-absorbing layer 23 pattern is formed on the flexible substrate on which the aforementioned pattern is formed, such as Figure 11 As shown. Figure 12 As shown, forming the light-absorbing layer 23 pattern may include: coating a negative black matrix film on a flexible substrate on which the aforementioned pattern is formed, and then exposing and developing the negative black matrix film using a monochromatic photomask to form the light-absorbing layer 23 pattern. In other examples, the light-absorbing layer 23 may also be formed using a pixel definition layer material doped with light-absorbing particles. The light-absorbing particles may be carbon black particles or black chromium particles, etc.

[0091] In one exemplary embodiment, the first pixel definition layer 22 includes a plurality of first blocking portions 220 and a first pixel opening 221 disposed between the first blocking portions. The first pixel opening 221 exposes at least a portion of the first electrode 21. The first pixel opening 221 includes a first surface near the first electrode 21, a second surface opposite to the first surface, and a first sidewall 221c located between the first surface and the second surface. The first pixel opening 221 connects the first surface and the second surface. The light-absorbing layer 23 covers the first blocking portions 220 and at least a portion of the first sidewall 221c.

[0092] In one exemplary embodiment, the edge of the orthogonal projection of the light-absorbing layer 23 on the flexible substrate 10 coincides with the edge of the orthogonal projection of the first surface on the flexible substrate 10, or is located outside the orthogonal projection of the first surface on the flexible substrate 10; and the edge of the orthogonal projection of the light-absorbing layer 23 on the flexible substrate 10 is located within the orthogonal projection of the second surface on the flexible substrate 10.

[0093] In one exemplary embodiment, the distance between the edge of the orthographic projection of the light-absorbing layer 23 onto the flexible substrate 10 and the edge of the orthographic projection of the first surface onto the flexible substrate 10 is 0.5 micrometers to 1.5 micrometers.

[0094] (7) An organic light-emitting layer 24, a second electrode 25, and an encapsulation layer 26 are sequentially formed on the substrate on which the aforementioned pattern is formed, such as... Figure 13 As shown. The organic light-emitting layer 24 is connected to the first electrode 21 in each pixel opening region. Since the first electrode 21 is connected to the drain electrode of the first transistor 101, the light emission control of the organic light-emitting layer 24 is realized. The organic light-emitting layer 24 may include a stacked hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer. A second electrode 25 is formed on the organic light-emitting layer 24 and connected to the organic light-emitting layer 24. In an exemplary embodiment, the material of the second electrode 25 may be any one or more of magnesium (Mg), silver (Ag), aluminum (Al), copper (Cu), and lithium (Li), or an alloy made of any one or more of the above metals.

[0095] An encapsulation layer 26 is formed on the flexible substrate 10 on which the aforementioned pattern is formed. The encapsulation layer 26 may include a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer stacked together.

[0096] (8) The flexible substrate 10 on which the aforementioned film layer is formed is peeled off from the glass carrier plate 1, and an auxiliary film layer such as a back film is attached to the surface of the flexible substrate 10 opposite to the display side to obtain the display substrate of this embodiment, such as Figure 4 As shown.

[0097] In one exemplary embodiment, the display substrate may further include a touch layer or touch panel disposed on the encapsulation layer and a protective layer (OC) covering the touch layer or touch panel. In another exemplary embodiment, the display substrate area may further include a temporary protective film (TPF), which is attached to the encapsulation layer and is used to protect the film layer structure of the display substrate. The back film attachment operation is performed after the protective film is attached.

[0098] like Figures 6 to 13 As shown, the display substrate provided in this disclosure includes:

[0099] The flexible substrate 10 includes a first flexible layer 10A, a first barrier layer 10B, an amorphous silicon (a-Si) layer 10C, a second flexible layer 10D, and a second barrier layer 10E stacked sequentially.

[0100] A first insulating layer 11 is disposed on the flexible substrate 10;

[0101] An active layer disposed on the first insulating layer 11, the active layer including at least the first active layer 12;

[0102] A second insulating layer 13 covering the active layer;

[0103] A first gate metal layer is disposed on the second insulating layer 13, the first gate metal layer including at least a first gate electrode 14A and a first capacitor electrode 14B;

[0104] A third insulating layer 15 covering the first gate metal layer;

[0105] A second gate metal layer is disposed on the third insulating layer 15, the second gate metal layer including at least a second capacitor electrode 16A;

[0106] A fourth insulating layer 17 covers the second gate metal layer. A plurality of first vias are formed on the fourth insulating layer 17, and the plurality of first vias expose the two ends of the first active layer 12 respectively.

[0107] A source / drain metal layer is disposed on the fourth insulating layer 17. The source / drain metal layer includes at least a first source electrode 18A and a first drain electrode 18B. The first source electrode 18A and the first drain electrode 18B are respectively connected to the two ends of the first active layer 12 through a first via.

[0108] The fifth insulating layer 19 covering the source and drain metal layers;

[0109] A first planarization layer 20 covering the aforementioned structure; a second via is provided on the first planarization layer 20, the second via exposing the first drain electrode 18B;

[0110] A first electrode 21 is disposed on the first planarization layer 20, and the first electrode 21 is connected to the first drain electrode 18B through a second via.

[0111] A first pixel definition layer 22 is disposed on a first planarization layer 20. The first pixel definition layer 22 includes a plurality of first blocking portions 220 and a first pixel opening 221 disposed between the first blocking portions. The first pixel opening 221 exposes at least a portion of the first electrode 21. The first pixel opening 221 includes a first surface near the first electrode 21, a second surface opposite to the first surface, and a first sidewall 221c located between the first surface and the second surface. The first pixel opening 221 connects the first surface and the second surface.

[0112] A light-absorbing layer 23 is disposed on the pixel definition layer 22, and the light-absorbing layer 23 covers the first barrier portion 220 and at least part of the first sidewall 221c;

[0113] An organic light-emitting layer 24 at least covers the first electrode 21, and the organic light-emitting layer 24 is connected to the first electrode 21;

[0114] A second electrode 25 is disposed on the organic light-emitting layer 24 and is connected to the organic light-emitting layer 24.

[0115] Encapsulation layer 26 is disposed on the second electrode 25.

[0116] As can be seen from the structure and fabrication process of the display substrate disclosed herein, the display substrate provided herein absorbs waveguide light emitted along the slope of the pixel definition layer or after passing through the upper surface of the pixel definition layer by fabricating a light-absorbing layer on the pixel definition layer. This eliminates the influence of the broadened waveguide light spectrum on the forward light emission spectrum, effectively avoids viewing angle distortion of the display substrate, and improves display quality.

[0117] The structure of the display substrate and its fabrication process disclosed herein are merely illustrative examples. In the exemplary embodiments, the corresponding structure and patterning processes can be modified and added or reduced according to actual needs. For example, the OLED can be a top-emitting structure or a bottom-emitting structure. Similarly, the driving transistor can be a top-gate structure or a bottom-gate structure, a single-gate structure, or a dual-gate structure. Furthermore, other electrodes, leads, and structural film layers can also be disposed in the driving structure layer; this disclosure does not impose specific limitations herein.

[0118] like Figure 12 As shown, when the light-absorbing layer 23 is fabricated on the first pixel definition layer 22, the light-absorbing layer 23 has poor light transmittance, and the underlying light-absorbing layer material (i.e., the light-absorbing layer material located at position A in the figure) receives weak light. During etching, light-absorbing layer residue is easily formed at position A. An exemplary light-absorbing layer residue is shown below. Figure 14As shown. Residual adhesive in the light-absorbing layer on the first electrode 21 can affect the illumination of the OLED material, ultimately impacting device performance.

[0119] Therefore, during the preparation process, a second pixel definition layer pattern can be formed after step (6) and before step (7) of the aforementioned preparation process, ultimately resulting in the image shown below. Figure 5 The structure of the display substrate is shown. Figure 15 As shown, forming the second pixel definition layer pattern may include: coating a second pixel defining film on the flexible substrate 10 on which the aforementioned pattern is formed, and then exposing and developing the second pixel defining film using a monochrome mask to form the second pixel definition layer 27 pattern. The second pixel definition layer 27 covers the light-absorbing layer 23, and a cavity is formed between the second pixel definition layer 27 and the first pixel definition layer 22. The light-absorbing layer 23 is disposed within the cavity. The second pixel definition layer 27 includes a plurality of second blocking portions 270 and second pixel openings 271 disposed between the second blocking portions 270. The second pixel openings 271 expose at least a portion of the first electrode 21. In this embodiment, the material of the second pixel definition layer (PDL) may be polyimide, acrylic, or polyethylene terephthalate.

[0120] The display substrate provided in this embodiment achieves the same technical effects as the aforementioned embodiments by fabricating two pixel definition layers (a first pixel definition layer 22 and a second pixel definition layer 27) and sandwiching a light-absorbing layer 23 between the two pixel definition layers. This includes absorbing waveguide light emitted along the slope of the pixel definition layer or after passing through the upper surface of the pixel definition layer, eliminating the influence of the broadened waveguide light spectrum on the forward emission spectrum, effectively preventing viewing angle distortion of the display substrate, and improving display quality. Simultaneously, during the fabrication of the second pixel definition layer 27, the residual light-absorbing layer on the first electrode 21 is removed, preventing the light-absorbing layer from ashing and contaminating the cavity.

[0121] This disclosure also provides a method for fabricating a display substrate. For example... Figure 16 As shown, the method for fabricating the display substrate disclosed herein includes:

[0122] S1. Form a driving structure layer and a first planarization layer on the substrate;

[0123] S2. A first electrode and a first pixel definition layer are formed on a first planarization layer. The first pixel definition layer includes a plurality of first blocking portions and a first pixel opening disposed between the first blocking portions. The first pixel opening exposes at least a portion of the first electrode. The first pixel opening includes a first surface near the first electrode, a second surface opposite to the first surface, and a first sidewall located between the first surface and the second surface. The first pixel opening communicates the first surface and the second surface.

[0124] S3. A light-absorbing layer is formed on the first pixel definition layer, the light-absorbing layer covering the first barrier portion and at least part of the first sidewall;

[0125] S4. The organic light-emitting layer, the second electrode, and the encapsulation layer are formed sequentially.

[0126] In an exemplary embodiment, the first pixel definition layer is formed by a positive photolithography process, and the light-absorbing layer is formed by a negative photolithography process.

[0127] For example, the first pixel definition layer can be formed by a positive dry etching process, and the light-absorbing layer can be formed by a negative dry etching process.

[0128] In an exemplary embodiment, the edge of the orthogonal projection of the light-absorbing layer on the substrate coincides with the edge of the orthogonal projection of the first surface on the substrate, or is located outside the orthogonal projection of the first surface on the substrate; and the edge of the orthogonal projection of the light-absorbing layer on the substrate is located within the orthogonal projection of the second surface on the substrate.

[0129] In an exemplary embodiment, before sequentially forming the organic light-emitting layer, the second electrode, and the encapsulation layer, the fabrication method further includes:

[0130] A second pixel definition layer is formed on the light-absorbing layer, the second pixel definition layer covers the light-absorbing layer, the second pixel definition layer includes a plurality of second blocking portions and a second pixel opening disposed between the second blocking portions, the second pixel opening exposing at least a portion of the first electrode.

[0131] In an exemplary embodiment, the thickness of the first pixel definition layer is 0.5 micrometers to 1.5 micrometers, the thickness of the light-absorbing layer is 0.5 micrometers to 1 micrometer, and the thickness of the second pixel definition layer is 0.2 micrometers to 0.6 micrometers.

[0132] In an exemplary embodiment, the second pixel opening includes a third surface near the first electrode, a fourth surface opposite to the third surface, and a second sidewall located between the third surface and the fourth surface. The second pixel opening connects the third surface and the fourth surface. The orthographic projection of the third surface on the substrate overlaps with the orthographic projection of the first surface on the substrate, or is within the range of the orthographic projection of the first surface on the substrate.

[0133] This disclosure provides a method for fabricating a display substrate. By fabricating a light-absorbing layer on a pixel definition layer, the method absorbs waveguide light emitted along the slope of the pixel definition layer or after passing through the pixel definition layer, eliminating the influence of the broadened waveguide light spectrum on the forward emission spectrum. This effectively avoids viewing angle color shift in the display substrate and improves display quality. The fabrication process disclosed herein can be implemented using existing mature fabrication equipment with minimal modifications to existing processes. It is highly compatible with existing fabrication processes, simple to implement, easy to carry out, has high production efficiency, low production cost, and high yield.

[0134] This disclosure also provides a display device, including the display substrate of the foregoing embodiments. The display device can be any product or component with display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator.

[0135] The accompanying drawings in this application only illustrate the structures involved in this disclosure; other structures can be referred to in common design. Unless otherwise specified, embodiments of this disclosure, i.e., features in the embodiments, can be combined with each other to obtain new embodiments.

[0136] Those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions disclosed herein without departing from the spirit and scope of the technical solutions disclosed herein, and all such modifications and substitutions should be covered within the scope of the claims of this application.

Claims

1. A display substrate, comprising a substrate and a plurality of pixel units arranged in a matrix on the substrate, each pixel unit comprising a plurality of sub-pixels, each sub-pixel comprising a driving structure layer on the substrate, a first electrode and a first pixel definition layer on the driving structure layer, a light-absorbing layer disposed on the first pixel definition layer and a second pixel definition layer disposed on the light-absorbing layer, the driving structure layer comprising a thin-film transistor, the drain of the thin-film transistor being connected to the first electrode; The first pixel definition layer includes a plurality of first blocking portions and a first pixel opening disposed between the first blocking portions. The first pixel opening exposes at least a portion of the first electrode. The first pixel opening includes a first surface near the first electrode, a second surface opposite to the first surface, and a first sidewall located between the first surface and the second surface. The first pixel opening communicates the first surface and the second surface. The light-absorbing layer covers the first barrier portion and at least part of the first sidewall; the light-absorbing layer is made of a light-absorbing material or a pixel definition layer material doped with light-absorbing particles, so as to absorb waveguide light emitted along the slope of the pixel definition layer or emitted after passing through the upper surface of the pixel definition layer. The second pixel definition layer covers the light-absorbing layer, and a cavity is formed between the second pixel definition layer and the first pixel definition layer, with the light-absorbing layer disposed within the cavity.

2. The display substrate according to claim 1, wherein, The edge of the orthogonal projection of the light-absorbing layer onto the substrate coincides with the edge of the orthogonal projection of the first surface onto the substrate, or is located outside the orthogonal projection of the first surface onto the substrate; Furthermore, the edge of the orthogonal projection of the light-absorbing layer onto the substrate lies within the orthogonal projection of the second surface onto the substrate.

3. The display substrate according to claim 1 or 2, wherein, The second pixel definition layer includes a plurality of second blocking portions and a second pixel opening disposed between the second blocking portions, the second pixel opening exposing at least a portion of the first electrode.

4. The display substrate according to claim 3, wherein, The second pixel opening includes a third surface near the first electrode, a fourth surface opposite to the third surface, and a second sidewall located between the third surface and the fourth surface, and the second pixel opening connects the third surface and the fourth surface; The orthographic projection of the third surface onto the substrate overlaps with the orthographic projection of the first surface onto the substrate, or is within the range of the orthographic projection of the first surface onto the substrate.

5. The display substrate according to claim 4, wherein, The first sidewall forms a first slope angle with the plane where the substrate is located. The second sidewall includes a first side surface close to the first electrode and a second side surface away from the first electrode. The first side surface forms a second slope angle with the plane where the substrate is located. The second slope angle is greater than the first slope angle.

6. The display substrate according to claim 3, wherein, The thickness of the first pixel definition layer is 0.5 micrometers to 1.5 micrometers, the thickness of the light-absorbing layer is 0.5 micrometers to 1 micrometer, and the thickness of the second pixel definition layer is 0.2 micrometers to 0.6 micrometers.

7. The display substrate according to claim 3, wherein, The light-absorbing particles are carbon black particles or black chromium particles, and the pixel definition layer material is polyimide, acrylic, or polyethylene terephthalate.

8. A display device comprising a display substrate as described in any one of claims 1 to 7.

9. A method for preparing a display substrate, comprising: A driving structure layer and a first planarization layer are formed on the substrate; A first electrode and a first pixel definition layer are formed on the first planarization layer. The first pixel definition layer includes a plurality of first blocking portions and a first pixel opening disposed between the first blocking portions. The first pixel opening exposes at least a portion of the first electrode. The first pixel opening includes a first surface near the first electrode, a second surface opposite to the first surface, and a first sidewall located between the first surface and the second surface. The first pixel opening communicates the first surface and the second surface. A light-absorbing layer is formed on the first pixel definition layer, the light-absorbing layer covering the first barrier portion and at least part of the first sidewall; the light-absorbing layer is made of a light-absorbing material or a pixel definition layer material doped with light-absorbing particles, so as to absorb waveguide light emitted along the slope of the pixel definition layer or emitted after passing through the upper surface of the pixel definition layer. A second pixel definition layer is formed on the light-absorbing layer, the second pixel definition layer covers the light-absorbing layer, a cavity is formed between the second pixel definition layer and the first pixel definition layer, and the light-absorbing layer is disposed in the cavity; the second pixel definition layer includes a plurality of second blocking portions and a second pixel opening disposed between the second blocking portions, and the second pixel opening exposes at least a portion of the first electrode; An organic light-emitting layer, a second electrode, and an encapsulation layer are formed sequentially.

10. The preparation method according to claim 9, wherein, The first pixel definition layer is formed by a positive photolithography process, and the light-absorbing layer is formed by a negative photolithography process.

11. The preparation method according to claim 9, wherein, The edge of the orthogonal projection of the light-absorbing layer onto the substrate coincides with the edge of the orthogonal projection of the first surface onto the substrate, or is located outside the orthogonal projection of the first surface onto the substrate; Furthermore, the edge of the orthogonal projection of the light-absorbing layer onto the substrate lies within the orthogonal projection of the second surface onto the substrate.

12. The preparation method according to any one of claims 9-11, wherein, The second pixel opening includes a third surface near the first electrode, a fourth surface opposite to the third surface, and a second sidewall located between the third surface and the fourth surface, and the second pixel opening connects the third surface and the fourth surface; The orthographic projection of the third surface onto the substrate overlaps with the orthographic projection of the first surface onto the substrate, or is within the range of the orthographic projection of the first surface onto the substrate.

Images