A SOC chip startup method, device and readable storage medium
By introducing MPU encryption and decryption components and multiple encryption algorithm self-tests in the SOC chip, the data protection problem during the SOC chip startup phase is solved, the confidentiality, integrity and availability of the data are achieved, and startup security is ensured.
Patent Information
- Application Number
- CN202210741179.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-06-28
- Publication Date
- 2025-09-09
- Estimated Expiration
- 2042-06-28
AI Technical Summary
Existing SOC chips rely on the application software's own security mechanism to protect data during the startup phase, which cannot effectively prevent data theft, making them vulnerable to attacks during startup.
The MPU key field in the one-time programmable storage unit is used to import the MPU encryption and decryption component. Combined with the self-test of the asymmetric encryption algorithm, HASH algorithm and symmetric encryption algorithm built into the SOC chip, the confidentiality, integrity and availability of the data are ensured through signature verification and address verification.
During the startup phase, we firmly control program processes and data security, provide reliable and confidential basic support, and ensure the security and reliability of SOC applications.
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Figure CN114996773B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of information security, and in particular to a SOC chip startup method, device, and readable storage medium. Background Art
[0002] In recent years, with the development of information technology, electronic technology has been widely used in data processing, storage, and transmission. The massive increase in the number of users and business volume of various applications has created an urgent need for data security. Data security has three main characteristics: confidentiality, integrity, and availability. Confidentiality requires that data be hidden to prevent unauthorized access; integrity requires that data be protected to prevent unauthorized modification; and availability requires that data be readily available to authorized entities. Therefore, how to apply cryptographic methods in system-on-chip (SOC) chips to comprehensively ensure data security while not affecting the execution of authorized user applications has become a critical issue.
[0003] In the existing technology, some SOC chips rely solely on the security mechanism of the application software itself to protect data. Some SOC chips also provide limited protection for data during the startup phase, such as calculating the hash value of the user program and comparing it with the hash value stored in the programmable non-volatile storage unit to determine the integrity of the user program, or performing keyword comparison in a specific area to verify the availability of the application code. These chips are unable to provide corresponding protection for the data in the SOC chip during startup, making it easy to be attacked and data stolen during startup.
[0004] In view of the above technology, finding a SOC chip startup method that can protect the data in the SOC chip during the startup phase is an urgent problem to be solved by those skilled in the art. Summary of the Invention
[0005] The purpose of this application is to provide a SOC chip startup method to solve the problem that some SOC chips rely solely on the security mechanism of the application software itself to protect data. Some SOC chips also provide limited protection for data during the startup phase and are unable to provide corresponding protection for the data in the SOC chip at startup, which makes it easy to be attacked and data stolen at startup.
[0006] To solve the above technical problems, the present application provides a SOC chip startup method, comprising:
[0007] Import the MPU key field in the one-time programmable storage unit into the MPU encryption and decryption component;
[0008] Execute the BOOT program from the preset storage location of the read-only storage unit;
[0009] Perform self-test of the asymmetric encryption algorithm, HASH algorithm, and symmetric encryption algorithm built into the SOC chip;
[0010] If the self-test passes, reading the category field of the HASH algorithm and the category field of the asymmetric encryption algorithm in the one-time programmable storage unit;
[0011] Calculate the HASH result according to the type of the HASH algorithm and determine whether the HASH result can complete the signature verification;
[0012] If the signature verification can be completed, the user program of the SOC chip is executed starting from the program execution address.
[0013] Preferably, after the self-test of the asymmetric encryption algorithm, HASH algorithm and symmetric encryption algorithm built into the SOC chip passes, before reading the category field of the HASH algorithm and the category field of the asymmetric encryption algorithm in the one-time programmable storage unit, the method further includes:
[0014] Reading a command status area in a programmable non-volatile storage unit and verifying the correctness of a valid flag field in the command status area;
[0015] If so, the step of reading the category field of the HASH algorithm and the category field of the asymmetric encryption algorithm in the one-time programmable storage unit is entered.
[0016] Preferably, after determining that the HASH result can complete the signature verification, the method further includes:
[0017] Determine whether the user program storage address is consistent with the program execution address;
[0018] If yes, then enter the step of executing the user program of the SOC chip from the program execution address;
[0019] If not, the user program is sent from the storage address to the program execution address, and then the step of executing the user program of the SOC chip from the program execution address is entered.
[0020] Preferably, verifying the signature of the HASH result includes the following steps:
[0021] Reading a first signature value from the programmable non-volatile storage unit, calculating a HASH value from the command status area, performing a signature verification operation using the HASH value, the public key value, and the first signature value, and determining that the signature verification has failed if the signature verification fails;
[0022] Reading the coprocessor program and the second signature value from the programmable non-volatile storage unit, calculating a HASH value of the coprocessor program, and performing a signature verification operation using the HASH value, the public key value, and the second signature value; if the signature verification fails, determining that the signature verification has failed;
[0023] Writing the coprocessor program into the coprocessor RAM and starting the coprocessor, and reading the user program and the third signature value from the programmable non-volatile storage unit, calculating a hash value of the user program, and performing a signature verification operation using the hash value, the public key value, and the third signature value, and determining that the signature verification fails if the signature is verified;
[0024] If the three signature verification operations mentioned above all determine that the signature verification is successful, then the signature verification is considered successful.
[0025] Preferably, the determining whether the user program storage address is consistent with the program execution address includes:
[0026] Determine whether the user program storage offset field and the user program execution offset field in the command status area are consistent;
[0027] If so, the result is characterized as whether the user program storage address is consistent with the program execution address.
[0028] Preferably, it also includes:
[0029] If the self-test or signature verification fails, it is confirmed that the SOC chip security startup has failed.
[0030] Preferably, after confirming that the SOC chip fails to start securely, the method further includes:
[0031] Control BOOT to exchange information with peripherals through the communication interface and update the data in the programmable non-volatile storage unit.
[0032] To solve the above problems, the present application further provides a SOC chip startup device, comprising:
[0033] Import module, used to import the MPU key field in the one-time programmable storage unit into the MPU encryption and decryption component;
[0034] An execution module, configured to execute a BOOT program from a preset storage location of the read-only storage unit;
[0035] A self-test module is used to perform a self-test of the asymmetric encryption algorithm, HASH algorithm, and symmetric encryption algorithm built into the SOC chip. If the self-test passes, the reading module is enabled;
[0036] A reading module, configured to read the category field of the HASH algorithm and the category field of the asymmetric encryption algorithm in the one-time programmable storage unit;
[0037] The signature verification module is used to calculate the HASH result according to the type of the HASH algorithm and determine whether the HASH result can complete the signature verification. If the signature verification can be completed, the startup module is started;
[0038] The startup module is used to execute the user program of the SOC chip starting from the program execution address.
[0039] To solve the above problems, the present application also provides a SOC chip startup device, comprising a memory for storing a computer program;
[0040] The processor is used to implement the steps of the SOC chip starting device as described above when executing the computer program.
[0041] To solve the above problems, the present application also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the SOC chip startup method as described above are implemented.
[0042] The SOC chip startup method provided in this application imports the MPU key field in the one-time programmable storage unit into the MPU encryption and decryption component, executes the BOOT program from the preset storage location of the read-only storage unit, and performs a self-test of the asymmetric encryption algorithm, HASH algorithm, and symmetric encryption algorithm built into the SOC chip. If the self-test passes, the category field of the HASH algorithm and the category field of the asymmetric encryption algorithm in the one-time programmable storage unit are read, the HASH result is calculated based on the category of the HASH algorithm, and it is determined whether the HASH result can complete the signature verification. If the signature verification can be completed, the user program of the SOC chip is executed starting from the program execution address. This SOC chip startup method uses a read-only storage unit to store the BOOT program and a one-time programmable storage unit to store security-related underlying core data to ensure source security; uses the MPU encryption and decryption programmable non-volatile storage unit method to ensure data confidentiality; uses a coprocessor agent to erase the programmable non-volatile storage unit to ensure user data availability; uses the HASH and asymmetric encryption algorithm signature verification method to ensure the integrity and high reliability of user data; firmly controls the program flow and data security during the startup phase, providing basic support for the trust and confidentiality of SOC applications.
[0043] The SOC chip startup device and computer-readable storage medium provided in this application correspond to the above-mentioned SOC chip startup method, and have the same beneficial effects as above. BRIEF DESCRIPTION OF THE DRAWINGS
[0044] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.
[0045] Figure 1 A flow chart of a SOC chip startup method provided in an embodiment of the present application;
[0046] Figure 2 A schematic diagram of a signature verification operation provided in an embodiment of the present application;
[0047] Figure 3 A schematic diagram of a SOC chip startup device provided in an embodiment of the present application;
[0048] Figure 4 A schematic diagram of a SOC chip startup device provided in another embodiment of the present application. DETAILED DESCRIPTION
[0049] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.
[0050] The core of this application is to provide a SOC chip startup method to solve the problem that some SOC chips rely solely on the security mechanism of the application software itself to protect data. Some SOC chips also provide limited data protection during the startup phase and are unable to provide corresponding protection for the data in the SOC chip at startup, which makes it easy to be attacked and data stolen at startup.
[0051] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.
[0052] Figure 1 A flow chart of a SOC chip startup method provided in an embodiment of the present application is shown as follows: Figure 1 As shown, the method includes:
[0053] S10: Import the MPU key field in the one-time programmable storage unit into the MPU encryption and decryption component;
[0054] The MPU, or memory protection unit, acts as a bridge between the main CPU and coprocessor to access the programmable non-volatile memory. When the main CPU and coprocessor access the address space of the programmable non-volatile memory, the data they read is decrypted by the MPU. The data in the programmable non-volatile memory is actually encrypted and protected by the MPU.
[0055] A storage unit refers to a collection of multiple storage elements, which generally have the function of storing data and reading and writing data, with 8 bits of binary as a storage unit, that is, a byte. Each unit has an address, which is an integer code and can be expressed as a binary integer. The variables in the program correspond to the storage units of the main memory. The name of the variable corresponds to the address of the storage unit, and the content of the variable corresponds to the data stored in the unit. The storage address is generally represented by a hexadecimal number, and each memory address stores a set of binary (or hexadecimal) numbers, usually referred to as the content of the address. In this embodiment, the storage of the MPU key field and the encryption and decryption components is limited to a one-time programmable storage unit, thereby ensuring the basic security of the stored key content. It can be understood that one-time programmable is a feature of the storage unit, that is, the storage unit can only be programmed once, for example, the MPU key is burned once and cannot be changed later.
[0056] In this embodiment, the specific content of the MPU key field and its corresponding specific encryption and decryption components are not limited.
[0057] S11: Execute the BOOT program from the preset storage location of the read-only storage unit;
[0058] A read-only memory cell is a type of memory that stores fixed information. Under normal operating conditions, data can only be read and cannot be modified or rewritten immediately. This makes the data non-volatile.
[0059] The BOOT program is a small program that runs after a computer starts up. It initializes hardware devices and creates a memory map, thereby bringing the system's hardware and software environment to a suitable state for ultimately calling user programs, which include but are not limited to the operating system kernel. In this embodiment, the specific content of the BOOT program, its preset storage location, and related stored content are not limited.
[0060] S12: Perform self-test of the asymmetric encryption algorithm, HASH algorithm, and symmetric encryption algorithm built into the SOC chip. If the self-test passes, proceed to S13.
[0061] It's important to note that asymmetric encryption algorithms require two keys: a public key (public key) and a private key (private key). The public and private keys form a pair. If data is encrypted with the public key, it can only be decrypted with the corresponding private key. Because encryption and decryption use two different keys, this algorithm is called an asymmetric encryption algorithm. Symmetric encryption algorithms are older and more mature. In a symmetric encryption algorithm, the sender of the data sends the plaintext (raw data) and the encryption key through a special encryption algorithm, transforming it into a complex encrypted ciphertext and sending it to the recipient. Upon receiving the ciphertext, if the recipient wishes to decrypt the original text, they must use the encryption key and the inverse algorithm of the same algorithm to decrypt the ciphertext and restore it to readable plaintext.
[0062] HASH, often translated as "hash" or sometimes transliterated as "hash," transforms an input of arbitrary length (also called a pre-image) into a fixed-length output through a hashing algorithm. This output is the hash value. This conversion is a compression mapping; that is, the space of hash values is typically much smaller than the space of inputs. Different inputs may hash to the same output, making it impossible to uniquely identify the input value from the hash value. Simply put, it's a function that compresses a message of arbitrary length into a fixed-length message digest.
[0063] It should be noted that this embodiment does not limit the self-check process and specific steps of the above algorithm.
[0064] S13: Read the category field of the HASH algorithm and the category field of the asymmetric encryption algorithm in the one-time programmable storage unit;
[0065] It should be noted that the category field is the classification field in the data, and the specific content of the category field is not limited in this embodiment.
[0066] S14: Calculate the HASH result according to the type of HASH algorithm and determine whether the HASH result can complete the signature verification. If so, proceed to S15;
[0067] It should be noted that, in this embodiment, the specific method for determining whether the signature verification can be completed is not limited.
[0068] S15: Execute the user program of the SOC chip starting from the program execution address.
[0069] It should be noted that, in this embodiment, there is no limitation on the user program and its execution address, and there is no specific limitation on the specific execution method of the user program.
[0070] After the SOC chip is powered on, the main CPU runs the BOOT program from the read-only storage unit space; when the main CPU and the coprocessor read the specific system address space, the MPU unit is responsible for processing the encrypted data stored in the programmable non-volatile storage unit into plain text data; the MPU unit uses a symmetric algorithm, and the key used for the operation is stored in the one-time programming storage unit, and only the MPU unit can read the correct value, and neither the main CPU nor the coprocessor can read the correct value; the coprocessor program programs the data encrypted by the MPU unit into the programmable non-volatile storage unit, providing flexible processing methods for programmable non-volatile storage units with various erase and write commands; the main CPU can only erase and write the programmable non-volatile storage unit through the coprocessor's agent; the coprocessor RAM1 has a write protection mechanism, and after the user triggers the mechanism, the coprocessor RAM1 cannot be used during the entire operation cycle The programmable non-volatile memory unit stores boot-related data, including the command status area, coprocessor program, user program, and their HASH signature values. The one-time programmable memory unit stores the public key HASH value required for signature verification, which the main CPU can read as the correct value. The BOOT program uses a HASH algorithm to calculate the HASH value of the public key information in the command status area, and compares it with the public key HASH value directly read from the one-time programmable memory unit to verify the integrity of the public key information. The BOOT program uses an asymmetric algorithm to verify the HASH values of the command status area, coprocessor program, and user program with the above public key. Only users with the correct private key can provide the correct signature values for the command status area, coprocessor program, and user program to generate data that can be booted normally. According to the trust concept, the BOOT program in the read-only memory unit is the first trust level, ensuring chip startup security from the source. The user program booted by the BOOT is the second trust level and is protected by the BOOT. The user program protects other programs booted by the user program, forming a complete trust chain layer by layer.
[0071] The SOC chip startup method provided in this embodiment imports the MPU key field in the one-time programmable memory unit into the MPU encryption and decryption component, executes the BOOT program from a preset storage location in the read-only memory unit, and performs a self-test of the asymmetric encryption algorithm, HASH algorithm, and symmetric encryption algorithm built into the SOC chip. If the self-test passes, the method reads the HASH algorithm category field and the asymmetric encryption algorithm category field in the one-time programmable memory unit, calculates the HASH result based on the HASH algorithm category, and determines whether the HASH result can pass the signature verification. If the signature verification can pass, the user program of the SOC chip is executed starting from the program execution address. This SOC chip startup method uses a read-only memory unit to store the BOOT program and a one-time programmable memory unit to store security-related underlying core data to ensure source security; uses the MPU encryption and decryption programmable non-volatile memory unit to ensure data confidentiality; uses a coprocessor to proxy the erasing of the programmable non-volatile memory unit to ensure user data availability; and uses HASH and asymmetric encryption algorithm signature verification methods to ensure user data integrity and high reliability. During the startup phase, the program flow and data security are firmly controlled, providing basic support for the trust and confidentiality of SOC applications.
[0072] Considering that the command status area needs to verify the valid flag field, a preferred solution is provided here. After the self-test of the asymmetric encryption algorithm, HASH algorithm, and symmetric encryption algorithm built into the SOC chip passes, and before reading the category field of the HASH algorithm and the category field of the asymmetric encryption algorithm in the one-time programmable memory unit, the solution also includes:
[0073] Reading the command status area in the programmable non-volatile storage unit and verifying the correctness of the valid flag field in the command status area;
[0074] If so, the step of reading the category field of the HASH algorithm and the category field of the asymmetric encryption algorithm in the one-time programmable storage unit is entered.
[0075] The flag can indicate whether to mark a task, resource, or work assignment for further operation or identification. The field is used to represent the corresponding program character, and the corresponding command status area is, thereby ensuring the security of startup by verifying the specific flag field of the command area.
[0076] Considering that after the signature verification is completed, the program address needs to be verified before the user program is started, a preferred solution is provided here. After determining that the HASH result can complete the signature verification, it also includes:
[0077] Determine whether the user program storage address is consistent with the program execution address;
[0078] If so, the process proceeds to the step of executing the user program of the SOC chip starting from the program execution address;
[0079] If not, the user program is sent from the storage address to the program execution address, and then the step of executing the user program of the SOC chip starts from the program execution address.
[0080] That is, in this embodiment, the situation where the storage address of the user program is inconsistent with its corresponding execution address is taken into consideration, so that in the case of inconsistency, the user program is moved and copied online, and then the subsequent startup steps are performed, thereby preventing the startup failure of the user program.
[0081] The above embodiment does not limit the specific steps for signature verification. Here, a preferred solution is provided. Verifying the signature of the HASH result includes the following steps:
[0082] Figure 2 A schematic diagram of a signature verification operation provided in an embodiment of the present application is shown as follows: Figure 2 As shown, the first signature value of the programmable non-volatile storage unit is read, the HASH value of the command status area is calculated, and the HASH value, the public key value and the first signature value are used to perform a signature verification operation. If the signature verification fails, it is determined that the signature verification has failed;
[0083] Read the coprocessor program and the second signature value in the programmable non-volatile storage unit, calculate the HASH value of the coprocessor program, and use the HASH value, public key value and the second signature value to perform signature verification. If the signature verification fails, it is determined that the signature verification has failed.
[0084] Write the coprocessor program into the coprocessor RAM and start the coprocessor, read the user program and the third signature value from the programmable non-volatile storage unit, calculate the hash value of the user program, and use the hash value, public key value and the third signature value to perform signature verification. If the signature is not verified, it is determined that the signature verification has failed;
[0085] If the three signature verification operations mentioned above all determine that the signature verification is successful, then the signature verification is considered successful.
[0086] It should be noted that there is no particular order in which the three signature verification operations are performed. These three signature verification operations ensure that all functions in the SOC chip involved in the user program startup are signed, thereby ensuring the security of the user program startup.
[0087] The above embodiments do not limit the determination and acquisition methods of the user program storage address and execution address. Here, a preferred solution is provided. Determining whether the user program storage address is consistent with the program execution address includes:
[0088] Determine whether the user program storage offset field and the user program execution offset field in the command status area are consistent;
[0089] If so, the characterization result is whether the user program storage address is consistent with the program execution address.
[0090] It should be noted that, in this embodiment, the determination of the user program storage address is limited to being implemented through the offset field, thereby ensuring the simplicity of the determination method.
[0091] The above embodiment does not describe the subsequent steps for the case where the self-check and signature verification fail. Here, a preferred solution is provided, in which the method further includes:
[0092] If the self-test or signature verification fails, it is confirmed that the SOC chip security startup has failed.
[0093] It should be noted that the integrity of the solution is ensured by adding self-checking and signature verification failure situations.
[0094] Considering the possibility of startup failure caused by SOC chip insecurity, a preferred solution is provided here. After confirming that the SOC chip fails to start securely, the following steps are also included:
[0095] Control BOOT to exchange information with peripherals through the communication interface and update the data in the programmable non-volatile storage unit.
[0096] The BOOT program is used to interact with external information and update corresponding data to facilitate subsequent startup.
[0097] In the above embodiments, the SOC chip startup method is described in detail. This application also provides corresponding embodiments of the SOC chip startup device. It should be noted that this application describes the embodiments of the device from two perspectives: one is based on the functional module perspective, and the other is based on the hardware perspective.
[0098] Figure 3 A schematic diagram of a SOC chip startup device provided in an embodiment of the present application is shown as follows: Figure 3 As shown, the device includes:
[0099] Import module 10, used to import the MPU key field in the one-time programmable storage unit into the MPU encryption and decryption component;
[0100] An execution module 11 is configured to execute a BOOT program from a preset storage location in the read-only storage unit;
[0101] The self-test module 12 is used to perform self-tests on the asymmetric encryption algorithm, HASH algorithm, and symmetric encryption algorithm built into the SOC chip. If the self-test passes, the reading module is enabled;
[0102] A reading module 13 is used to read the category field of the HASH algorithm and the category field of the asymmetric encryption algorithm in the one-time programmable storage unit;
[0103] The signature verification module 14 is used to calculate the HASH result according to the type of HASH algorithm and determine whether the HASH result can complete the signature verification. If the signature verification can be completed, the startup module is started;
[0104] The startup module 15 is used to execute the user program of the SOC chip from the program execution address.
[0105] Since the embodiments of the apparatus part correspond to the embodiments of the method part, the embodiments of the apparatus part and their corresponding beneficial effects can be found in the description of the embodiments of the method part, which will not be repeated here.
[0106] Figure 4 This is a structural diagram of a SOC chip startup device provided in another embodiment of the present application, such as Figure 4 As shown, the SOC chip startup device includes: a memory 20 for storing computer programs;
[0107] The processor 21 is configured to implement the steps of the SOC chip startup method mentioned in the above embodiment when executing a computer program.
[0108] The SOC chip starting device provided in this embodiment may include but is not limited to a smart phone, a tablet computer, a laptop computer, or a desktop computer.
[0109] Among them, the processor 21 may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 21 can be implemented in at least one hardware form of a digital signal processor (DSP), a field programmable gate array (FPGA), and a programmable logic array (PLA). The processor 21 may also include a main processor and a coprocessor. The main processor is a processor for processing data in the awake state, also known as a central processing unit (CPU); the coprocessor is a low-power processor for processing data in the standby state. In some embodiments, the processor 21 may be integrated with a graphics processing unit (GPU), which is responsible for rendering and drawing the content to be displayed on the display screen. In some embodiments, the processor 21 may also include an artificial intelligence (AI) processor, which is used to process computing operations related to machine learning.
[0110] The memory 20 may include one or more computer-readable storage media, which may be non-transitory. The memory 20 may also include high-speed random access memory, and non-volatile memory, such as one or more disk storage devices, flash memory storage devices. In this embodiment, the memory 20 is at least used to store the following computer program 201, wherein, after the computer program is loaded and executed by the processor 21, it can implement the relevant steps of the SOC chip startup method disclosed in any of the aforementioned embodiments. In addition, the resources stored in the memory 20 may also include an operating system 202 and data 203, etc., and the storage method may be temporary storage or permanent storage. Among them, the operating system 202 may include Windows, Unix, Linux, etc. The data 203 may include but is not limited to the data involved in the above-mentioned SOC chip startup method, etc.
[0111] In some embodiments, the SOC chip startup device may further include a display screen 22 , an input / output interface 23 , a communication interface 24 , a power supply 25 , and a communication bus 26 .
[0112] Those skilled in the art will understand that Figure 4 The structure shown in the figure does not constitute a limitation on the SOC chip startup device, and may include more or fewer components than shown in the figure.
[0113] The SOC chip startup device provided in the embodiment of the present application includes a memory and a processor. When the processor executes the program stored in the memory, it can implement the following method: the SOC chip startup method involved in the above embodiment.
[0114] Since the embodiments of the apparatus part correspond to the embodiments of the method part, the embodiments of the apparatus part and their corresponding beneficial effects can be found in the description of the embodiments of the method part, which will not be repeated here.
[0115] Finally, the present application also provides an embodiment corresponding to a computer-readable storage medium. The computer-readable storage medium stores a computer program, which, when executed by a processor, implements the steps described in the above method embodiment.
[0116] It is understandable that if the method in the above embodiment is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium and executes all or part of the steps of the methods of each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.
[0117] Since the embodiments of the readable storage medium part correspond to the embodiments of the method part, the embodiments of the device part and their corresponding beneficial effects can be found in the description of the embodiments of the method part, which will not be repeated here.
[0118] The above is a detailed introduction to a SOC chip startup method, device and computer-readable storage medium provided by the present application. The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the various embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part description. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of this application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the claims of this application.
[0119] It should also be noted that, in this specification, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus comprising the element.
Claims
1. A SOC chip startup method, characterized in that: include: Import the MPU key field in the one-time programmable storage unit into the MPU encryption and decryption component; Execute the BOOT program from the preset storage location of the read-only storage unit; Perform self-test of the asymmetric encryption algorithm, HASH algorithm, and symmetric encryption algorithm built into the SOC chip; If the self-test passes, reading the category field of the HASH algorithm and the category field of the asymmetric encryption algorithm in the one-time programmable storage unit; Calculate the HASH result according to the type of the HASH algorithm and determine whether the HASH result can complete the signature verification; If the signature verification is completed, the user program of the SOC chip is executed from the program execution address; After determining that the HASH result can complete the signature verification, the following steps are further included: Determine whether the user program storage address is consistent with the program execution address; If yes, then enter the step of executing the user program of the SOC chip from the program execution address; If not, the user program is sent from the storage address to the program execution address, and then the step of executing the user program of the SOC chip from the program execution address is entered.
2. The SOC chip startup method according to claim 1, characterized in that: After the self-test of the asymmetric encryption algorithm, the HASH algorithm, and the symmetric encryption algorithm built into the SOC chip passes, and before reading the category field of the HASH algorithm and the category field of the asymmetric encryption algorithm in the one-time programmable storage unit, the method further includes: Reading a command status area in a programmable non-volatile storage unit and verifying the correctness of a valid flag field in the command status area; If so, the step of reading the category field of the HASH algorithm and the category field of the asymmetric encryption algorithm in the one-time programmable storage unit is entered.
3. The SOC chip startup method according to claim 1, characterized in that: Verifying the signature of the HASH result includes the following steps: Reading a first signature value from the programmable non-volatile storage unit, calculating a hash value of the command status area, and performing a signature verification operation using the hash value of the calculated command status area, the public key value, and the first signature value; if the signature verification fails, determining that the signature verification has failed; Reading the coprocessor program and the second signature value from the programmable non-volatile storage unit, calculating a HASH value of the coprocessor program, and performing a signature verification operation using the HASH value of the coprocessor program, the public key value, and the second signature value; if the signature verification fails, determining that the signature verification has failed; Writing the coprocessor program into the coprocessor RAM and starting the coprocessor, reading the user program and the third signature value from the programmable non-volatile storage unit, calculating a hash value of the user program, and performing a signature verification operation using the hash value, the public key value, and the third signature value. If the signature verification fails, determining that the signature verification has failed; If the three signature verification operations mentioned above all determine that the signature verification is successful, then the signature verification is considered successful.
4. The SOC chip startup method according to claim 1, characterized in that: Determining whether the user program storage address is consistent with the program execution address includes: Determine whether the user program storage offset field and the user program execution offset field in the command status area are consistent; If so, the result is characterized as whether the user program storage address is consistent with the program execution address.
5. The SOC chip startup method according to any one of claims 1 to 4, characterized in that: Also includes: If the self-test or signature verification fails, it is confirmed that the SOC chip security startup has failed.
6. The SOC chip startup method according to claim 5, characterized in that: After confirming that the SOC chip fails to start securely, the method further includes: Control BOOT to exchange information with peripherals through the communication interface and update the data in the programmable non-volatile storage unit.
7. A SOC chip starting device, characterized in that: include: Import module, used to import the MPU key field in the one-time programmable storage unit into the MPU encryption and decryption component; An execution module, configured to execute a BOOT program from a preset storage location of the read-only storage unit; A self-test module is used to perform a self-test of the asymmetric encryption algorithm, HASH algorithm, and symmetric encryption algorithm built into the SOC chip. If the self-test passes, the reading module is enabled; A reading module, configured to read the category field of the HASH algorithm and the category field of the asymmetric encryption algorithm in the one-time programmable storage unit; The signature verification module is used to calculate the HASH result according to the type of the HASH algorithm and determine whether the HASH result can complete the signature verification. If the signature verification can be completed, the startup module is started; A startup module, configured to execute a user program of the SOC chip starting from a program execution address; After determining that the HASH result can complete the signature verification, the device is further used to determine whether the user program storage address is consistent with the program execution address; if so, entering the step of executing the user program of the SOC chip from the program execution address; If not, the user program is sent from the storage address to the program execution address, and then the step of executing the user program of the SOC chip from the program execution address is entered.
8. A SOC chip starting device, characterized in that: including a memory for storing a computer program; A processor, configured to implement the steps of the SOC chip startup device according to any one of claims 1 to 6 when executing the computer program.
9. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the SOC chip startup method according to any one of claims 1 to 6 are implemented.
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