A dynamic slew rate enhancement circuit for high-speed operational amplifiers
By using a dynamic slew rate enhancement circuit, which combines PNP and NPN transistors or PMOS and NMOS transistors, the tail current and capacitive coupling are increased, and the layout area ratio is optimized. This solves the problem of limited signal bandwidth of high-speed operational amplifiers and achieves slew rate improvement and faster signal response under large signal input.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- XIAN AEROSPACE MINXIN TECH CO LTD
- Filing Date
- 2022-05-17
- Publication Date
- 2026-05-26
AI Technical Summary
The signal bandwidth of existing high-speed operational amplifiers is limited by the slew rate, making it impossible to increase the slew rate under large signal input conditions.
A dynamic slew rate enhancement circuit is adopted, which uses a combination of PNP and NPN transistors or PMOS and NMOS transistors to increase the tail current as the difference between the input differential signals increases. Combined with capacitive coupling of large signals, the layout area ratio is optimized, and the quiescent current is designed to improve the slew rate.
It significantly improves the slew rate of the op-amp under large signal input, increases the signal response speed, ensures reasonable quiescent current design, and prevents the occurrence of no-operating-point state.
Smart Images
Figure CN115001405B_ABST