Level recognition method based on IGBT drive

Abstract

The present invention relates to the field of IGBT driving, and in particular to a level recognition method based on IGBT driving, which realizes accurate recognition of the effective logic level of a driving chip. The present invention is based on the level recognition method of IGBT driving, which is used to identify the effective level of a driving chip in a driving circuit, and the driving circuit includes a control module, the output end of the control module is connected to the input end of the driving chip, the output end of the driving chip is connected to the gate of the IGBT, the emitter of the IGBT is grounded through a resistor, and the collector is connected to an external first power supply. The control module outputs a PWM control signal to the driving chip, and the driving chip processes the control signal and outputs it to the gate of the IGBT, and when the PWM control signal is high or low, the signal on the resistor is sampled respectively to obtain a first signal value and a second signal value, and a judgment is made. If the first signal value is greater than the second signal value, it is judged that the high level of the driving chip is effective; if the second signal value is greater than the first signal value, it is judged that the low level of the driving chip is effective.

Description

Technical Field

[0001] The invention relates to the field of IGBT driving, and in particular to a level recognition method based on IGBT driving. Background Art

[0002] At present, frequency conversion control generally uses IPM (Intelligent Power Module) or multiple IGBTs (Insulated Gate Bipolar Transistor) and driver chips as drive circuits. The logic levels of the IPM input signal and the driver chip input signal have both high-level valid (that is, when the input end is high-level, the output valid signal drives the IGBT to turn on, and the low level turns the IGBT off) and low-level valid (that is, when the input end is low-level, the output valid signal drives the IGBT to turn on, and the high level turns the IGBT off). In the frequency conversion control process, the logic drive must be strictly in accordance with the requirements of the IPM or driver chip, otherwise it will cause driving confusion or burn the device.

[0003] Although the effective logic level for a given IPM or driver chip remains unchanged, when the control end (such as MCU) implements the switching of the effective logic level through corresponding software and hardware settings, it involves the inconsistency of software and hardware. It is unclear whether the driver chip is effective at a high level or a low level, which leads to many problems in production control and material matching. Summary of the invention

[0004] The purpose of the present invention is to provide a level recognition method based on IGBT drive, which realizes accurate recognition of the effective logic level of the driver chip, can effectively improve the degree of material commonality, and reduce the risk of device damage and malfunction due to material mismatch.

[0005] The present invention adopts the following technical scheme to achieve the above-mentioned purpose, a level recognition method based on IGBT drive, which is used to recognize the effective level of a driving chip in a driving circuit, wherein the driving circuit includes a control module, the output end of the control module is connected to the input end of the driving chip, the output end of the driving chip is connected to the gate of the IGBT, the emitter of the IGBT is grounded through a resistor, and the collector is connected to an external first power supply, and the level recognition method includes:

[0006] The control module outputs a PWM control signal to the driver chip. The driver chip processes the control signal and outputs it to the IGBT gate. When the PWM control signal is at a high level or a low level, the signal on the resistor is sampled to obtain a first signal value and a second signal value, and a judgment is made. If the first signal value is greater than the second signal value, the high level of the driver chip is judged to be valid; if the second signal value is greater than the first signal value, the low level of the driver chip is judged to be valid.

[0007] Furthermore, there are multiple IGBTs, at least one IGBT is used as an upper bridge arm, at least one IGBT is used as a lower bridge arm, the gates of the IGBTs of the upper bridge arm and the lower bridge arm are respectively connected to the output pins of the driving chip, the emitter of the upper bridge arm IGBT is respectively connected to the collector of the lower bridge arm IGBT and the external second power supply, the collector of the upper bridge arm IGBT is connected to the external first power supply, and the emitter of the lower bridge arm IGBT is grounded through a resistor; the level recognition method includes:

[0008] After the drive circuit is powered on, the IO pin of the control module is set to a high impedance state, and then the control module outputs a PWM control signal to the corresponding pin of the drive chip. The drive chip processes the control signal and outputs it to the gate of the corresponding lower bridge arm IGBT. When the PWM control signal is high or low, the resistor is sampled to obtain the first signal value and the second signal value, and a judgment is made. If the first signal value is greater than the second signal value, the high level of the drive chip is effective; if the second signal value is greater than the first signal value, the low level of the drive chip is effective. In this way, the level recognition of the drive chip can be realized for a more complex IGBT drive circuit, which improves adaptability.

[0009] Furthermore, the first signal value and the second signal value are current values ​​or voltage values.

[0010] The level recognition method further comprises:

[0011] If the first current value is greater than the second current value, and the first current value is greater than the set current threshold, the high level of the driver chip is effective; if the second current value is greater than the first current value, and the second current value is greater than the set current threshold, the low level of the driver chip is effective. Comparing the first current value with the set current threshold can further improve the accuracy of effective level recognition.

[0012] Furthermore, the level recognition method further includes:

[0013] If the first voltage value is greater than the second voltage value, and the first voltage value is greater than the set voltage threshold, the high level of the driver chip is effective; if the second voltage value is greater than the first voltage value, and the second voltage value is greater than the set voltage threshold, the low level of the driver chip is effective. Comparing the first voltage value with the set voltage threshold can further improve the accuracy of effective level recognition.

[0014] Furthermore, the level recognition method further includes:

[0015] When the output PWM control signal is high or low, the current or voltage of the resistor is sampled according to the set sampling interval to obtain the first waveform and the second waveform, and the average value, effective value or maximum value of the first waveform and the second waveform are calculated. The calculation results are I1 and I2, and the size of I1 and I2 is judged. If I1>I2+△I1, the driver chip is judged to be high level effective; if I2>I1+△I2, the driver chip is judged to be low level effective; △I1 and △I2 are the compensation values ​​corresponding to the first waveform and the second waveform respectively. The recognition of the effective level is achieved by comparing the average value, effective value or maximum value of the waveform diagram, which can increase the diversity of the recognition method, and includes the calculation of the compensation value, which can improve the accuracy of the recognition.

[0016] The present invention outputs a PWM control signal to a driver chip through a control module, and the driver chip processes the control signal and outputs it to the IGBT gate. When the PWM control signal is at a high level or a low level, the signal on the resistor is processed to obtain a first signal value and a second signal value. If the first signal value is greater than the second signal value, it indicates that the IGBT is turned on when the PWM control signal is at a high level, and further indicates that the high level of the driver chip is effective; if the second signal value is greater than the first signal value, it indicates that the IGBT is turned on when the PWM control signal is at a low level, and further indicates that the low level of the driver chip is effective. The accurate identification of the effective logic level of the driver chip is achieved, which can effectively improve the universality of materials and reduce the risk of device damage and inability to work due to material mismatch. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 This is a driving circuit diagram based on multiple IGBTs provided in an embodiment of the present invention.

[0018] In the accompanying drawings, R1 is a resistor, RW is a first resistor, RV is a second resistor, RU is a third resistor, DW, DV, DU are diodes, CU, CV, CW are capacitors, Q1, Q2, Q3, Q4, Q5, Q6 are IGBTs, UP, VP, WP, UN, VN, WN are MCU chips, and output pins corresponding to driver chips, Vdc is a first power supply, and VCC is a second power supply. DETAILED DESCRIPTION

[0019] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0020] The specific implementation modes of the present invention are described in detail below with reference to the accompanying drawings.

[0021] There are two common methods for variable frequency drive: 1. Use an integrated IPM module for driving; 2. Use a driving circuit / chip to drive 6 IGBTs. The IPM module can also be regarded as a device that encapsulates the driving circuit / chip and 6 IGBTs. The driving chip referred to in the present invention includes both the driving circuit / chip inside the IPM module and a separate driving circuit / chip. The IGBT referred to includes both the IGBT integrated inside the IPM and the external independent IGBT.

[0022] The present invention is based on an IGBT-driven level recognition method, which is used to recognize the effective level of a driving chip in a driving circuit. The driving circuit includes a control module, an output end of the control module is connected to an input end of the driving chip, an output end of the driving chip is connected to a gate of the IGBT, an emitter of the IGBT is grounded through a resistor, and a collector is connected to an external first power supply. The level recognition method includes:

[0023] The control module outputs a PWM (Pulse Width Modulation) control signal to the driver chip. The driver chip processes the control signal and outputs it to the IGBT gate. When the PWM control signal is at a high level or a low level, the signal on the resistor is sampled to obtain a first signal value and a second signal value, and a judgment is made. If the first signal value is greater than the second signal value, the driver chip is judged to be valid at a high level; if the second signal value is greater than the first signal value, the driver chip is judged to be valid at a low level.

[0024] In one embodiment of the present invention, the number of IGBTs may be multiple, at least one IGBT is used as an upper bridge arm, at least one IGBT is used as a lower bridge arm, the gates of the IGBTs of the upper bridge arm and the lower bridge arm are respectively connected to the output pins of the driving chip, the emitter of the upper bridge arm IGBT is respectively connected to the collector of the lower bridge arm IGBT and the external second power supply, the collector of the upper bridge arm IGBT is connected to the external first power supply, and the emitter of the lower bridge arm IGBT is grounded through a resistor; the level recognition method comprises:

[0025] After the drive circuit is powered on, the IO pin of the control module is set to a high impedance state, and then the control module outputs a PWM control signal to the corresponding pin of the drive chip. The drive chip processes the control signal and outputs it to the gate of the corresponding lower bridge arm IGBT. When the PWM control signal is high or low, the resistor is sampled to obtain the first signal value and the second signal value, and a judgment is made. If the first signal value is greater than the second signal value, the high level of the drive chip is effective; if the second signal value is greater than the first signal value, the low level of the drive chip is effective. In this way, the level recognition of the drive chip can be realized for a more complex IGBT drive circuit, which improves adaptability.

[0026] The first signal value and the second signal value may be current values ​​or voltage values.

[0027] The above-mentioned level recognition method further includes:

[0028] If the first current value is greater than the second current value, and the first current value is greater than the set current threshold, the high level of the driver chip is effective; if the second current value is greater than the first current value, and the second current value is greater than the set current threshold, the low level of the driver chip is effective. Comparing the first current value with the set current threshold can further improve the accuracy of effective level recognition.

[0029] The above-mentioned level recognition method further includes:

[0030] If the first voltage value is greater than the second voltage value, and the first voltage value is greater than the set voltage threshold, the high level of the driver chip is effective; if the second voltage value is greater than the first voltage value, and the second voltage value is greater than the set voltage threshold, the low level of the driver chip is effective. Comparing the first voltage value with the set voltage threshold can further improve the accuracy of effective level recognition.

[0031] The above-mentioned level recognition method further includes:

[0032] When the output PWM control signal is high or low, the current or voltage of the resistor is sampled according to the set sampling interval to obtain the first waveform and the second waveform, and the average value, effective value or maximum value of the first waveform and the second waveform are calculated. The calculation results are I1 and I2, and the size of I1 and I2 is judged. If I1>I2+△I1, the driver chip is judged to be high level effective; if I2>I1+△I2, the driver chip is judged to be low level effective; △I1 and △I2 are the compensation values ​​corresponding to the first waveform and the second waveform respectively. The recognition of the effective level is achieved by comparing the average value, effective value or maximum value of the waveform diagram, which can increase the diversity of the recognition method, and includes the calculation of the compensation value, which can improve the accuracy of the recognition.

[0033] Example

[0034] The driving circuit diagram corresponding to the embodiment of the present invention is shown in FIG. Figure 1 As shown, three IGBTs, Q1, Q3, and Q5, are used as upper bridge arms, and three IGBTs, Q2, Q4, and Q6, are used as lower bridge arms. The gates of Q1, Q3, Q5 and Q2, Q4, and Q6 are connected to the pins UP, VP, WP, UN, VN, and WN of the driver chip, respectively. The collector of the IGBT of the upper bridge arm is connected to the first power supply Vdc, the emitter of Q1 is connected to the collector of Q2, and is connected to the second power supply VCC through a capacitor CU, a diode DU, and a third resistor RU; the emitter of Q3 is connected to the collector of Q4, and is connected to the second power supply VCC through a capacitor CV, a diode DV, and a second resistor RV; the emitter of Q5 is connected to the collector of Q6, and is connected to the second power supply VCC through a capacitor CW, a diode DW, and a first resistor RW; the emitter of the IGBT of the lower bridge arm is grounded through a resistor R1; MCU (Microcontroller The output control pins UP, VP, WP, WN, VN, and UN of the micro control unit (micro control unit) are connected to the pins a1, a2, a3, a4, a5, and a6 of the control chip respectively.

[0035] In one implementation, the method for identifying the level of the driving chip of the driving circuit specifically includes:

[0036] S100. After power-on, the UP, VP, WP, UN, VN, and WN pins of the MCU are set to input state or high-impedance state. At this time, the internal pull-up / pull-down resistors of the driver chip make the corresponding output terminals UP, VP, WP, UN, VN, and WN of the driver chip all low level, and all 6 IGBTs are turned off. At this time, the phase current flowing through R1 is 0.

[0037] S101. MCU checks whether the internal Flash stores valid logic level information of the driver chip. If not, execute step S102; otherwise, execute S103.

[0038] S102.MCU outputs at least one cycle of PWM control signal to pin a6 of the control chip through pin UN. After being processed by the driver chip, the control signal is output to Q2 through the corresponding UN pin, and detects the current or voltage on resistor R1 when the PWM control signal is high or low. If the current or voltage detected when the PWM control signal is high is much larger than the current or voltage when the PWM control signal is low, it indicates that the driver chip is valid at a high level, otherwise it is valid at a low level.

[0039] S103. Perform normal drive control.

[0040] In this embodiment, the MCU can output a PWM control signal for at least one cycle through pins UN and VN, and finally control Q2 and Q4; or the MCU can output a PWM control signal for at least one cycle through pins UN, VN, and WN, and finally control all the IGBTs in the lower bridge arm.

[0041] In another embodiment, the method for identifying the level of the above drive circuit specifically includes:

[0042] S100. After power-on is completed, the UP, VP, WP, UN, VN, and WN pins of the MCU are set to the input state or high impedance state. At this time, due to the internal pull-up / pull-down resistors of the drive chip, the corresponding output terminals UP, VP, WP, UN, VN, and WN of the drive chip are all at low level, and all 6 IGBTs are turned off, and the phase current flowing through R1 is 0.

[0043] S101. The MCU checks whether the effective logic level information of the drive chip is stored in the internal Flash. If not, step S102 is executed; otherwise, S111 is executed.

[0044] S102. The MCU starts sampling the phase current, that is, by detecting the current flowing through R1. Specifically, by testing the voltage across R1 as VR1, then the phase current = VR1 / R1.

[0045] S103. Set the UN pin of the MCU to the output state and output a low level.

[0046] S104. Continuously detect the phase current and record the phase current value detected each time, denoted as waveform 1.

[0047] S105. After waiting for time Ti1, set the UN pin of the MCU to high level.

[0048] S106. Continuously detect the phase current value and record the phase current value detected each time, denoted as waveform 2.

[0049] S107. After waiting for time Ti2, set the UN pin of the MCU to the input state or high impedance state.

[0050] S108. Calculate the average values Iavg1 and Iavg2 corresponding to waveform 1 and waveform 2 and make a judgment.

[0051] S109. If Iavg1 > Iavg2 + △I1, it is determined that the drive chip is low-level effective. If Iavg1 < Iavg2 - △I2, it is determined that the drive chip is high-level effective. Otherwise, the effective level of the drive chip cannot be determined and a fault is reported. △I1 and △I2 are the compensation values corresponding to the first waveform and the second waveform respectively.

[0052] S110. Save the detected logic level information into Flash.

[0053] S111. Perform normal drive control.

[0054] In summary, the present invention can automatically identify the effective logic level of the IPM or driver chip through the above software method, which can effectively improve the degree of material commonality and reduce the risk of device damage and malfunction due to material mismatch.

Claims

1. A level recognition method based on IGBT driving, used for identifying the effective level of a driving chip in a driving circuit, wherein the driving circuit comprises a control module, an output end of the control module is connected to an input end of the driving chip, an output end of the driving chip is connected to a gate of the IGBT, an emitter of the IGBT is grounded through a resistor, and a collector is connected to an external first power supply, characterized in that: The level recognition method comprises: The control module outputs a PWM control signal to the driver chip. The driver chip processes the control signal and outputs it to the IGBT gate. When the PWM control signal is at a high level or a low level, the signal on the resistor is sampled to obtain a first signal value and a second signal value, and a judgment is made. If the first signal value is greater than the second signal value, the driver chip is judged to be effective at a high level; if the second signal value is greater than the first signal value, the driver chip is judged to be effective at a low level. There are multiple IGBTs, at least one IGBT is used as an upper bridge arm, at least one IGBT is used as a lower bridge arm, the gates of the IGBTs of the upper bridge arm and the lower bridge arm are respectively connected to the output pins of the driving chip, the emitter of the upper bridge arm IGBT is respectively connected to the collector of the lower bridge arm IGBT and an external second power supply, the collector of the upper bridge arm IGBT is connected to the external first power supply, and the emitter of the lower bridge arm IGBT is grounded through a resistor; the level recognition method includes: After the drive circuit is powered on, the IO pin of the control module is set to a high-impedance state, and then the control module outputs a PWM control signal to the corresponding pin of the drive chip. The drive chip processes the control signal and outputs it to the gate of the corresponding lower bridge arm IGBT. When the PWM control signal is high or low, the resistor is sampled to obtain the first signal value and the second signal value, and a judgment is made. If the first signal value is greater than the second signal value, the high level of the drive chip is valid; if the second signal value is greater than the first signal value, the low level of the drive chip is valid.

2. The level recognition method based on IGBT driving according to claim 1, characterized in that: The first signal value and the second signal value are current values ​​or voltage values.

3. The level recognition method based on IGBT driving according to claim 2 is characterized in that: The level recognition method further comprises: If the first current value is greater than the second current value and the first current value is greater than the set current threshold, the driver chip is effective at a high level; if the second current value is greater than the first current value and the second current value is greater than the set current threshold, the driver chip is effective at a low level.

4. The level recognition method based on IGBT driving according to claim 2 is characterized in that: The level recognition method further comprises: If the first voltage value is greater than the second voltage value and the first voltage value is greater than the set voltage threshold, the driver chip is effective at a high level; if the second voltage value is greater than the first voltage value and the second voltage value is greater than the set voltage threshold, the driver chip is effective at a low level.

5. The level recognition method based on IGBT driving according to claim 2, characterized in that: The level recognition method further comprises: When the output PWM control signal is high or low, the current or voltage of the resistor is sampled according to the set sampling interval to obtain the first waveform and the second waveform, and the average value, effective value or maximum value of the first waveform and the second waveform are calculated. The calculation results are I1 and I2, and the size of I1 and I2 is judged. If I1>I2+△I1, the drive chip is judged to be high-level valid; if I2>I1+△I2, the drive chip is judged to be low-level valid; △I1 and △I2 are the compensation values ​​corresponding to the first waveform and the second waveform respectively.

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