Starting adjustment circuit and flyback power supply starting system
By introducing a step-down module and a counting module into the flyback power startup system, the input voltage is adjusted and the restart is controlled by timing, which solves the problems of narrow input voltage range and uncontrollable startup interval, and achieves safer power startup.
Patent Information
- Application Number
- CN202110237693.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-03-03
- Publication Date
- 2025-09-12
- Estimated Expiration
- 2041-03-03
AI Technical Summary
Existing flyback power supply startup systems have a narrow input voltage range, which can easily damage the PWM driver IC. Furthermore, the restart interval cannot be controlled, potentially causing damage to the load system or heat accumulation.
Adopt step-down module, optical coupling isolation module, reverse logic IC module and counting module, protect PWM driver IC by adjusting input voltage and timing control restart.
A wider input voltage range and controllable restart interval are achieved to prevent load system damage and heat accumulation effects.
Smart Images

Figure CN115021546B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a power supply starting system, in particular to a starting adjustment circuit and a flyback power supply starting system using the starting adjustment circuit. Background Art
[0002] Typically, existing flyback power startup systems use a PWM driver IC to generate a PWM signal, which controls the startup and output of the entire system. However, the input voltage of existing flyback power startup systems is supplied directly to the PWM driver IC after passing through a supply resistor. Therefore, if the input voltage is too high, the PWM driver IC will be damaged, while if the input voltage is too low, the PWM driver IC will not start. Consequently, the input voltage is limited to a narrow voltage range by the specifications of the PWM driver IC.
[0003] On the other hand, when a flyback power starting system is temporarily shut down due to overcurrent, overvoltage, or other issues, restarting it immediately may damage the load system or generate heat accumulation that could harm downstream devices. However, existing flyback power starting systems cannot control the restart interval and can only passively restart immediately upon the return of input voltage.
[0004] Therefore, how to provide a startup adjustment circuit and a flyback power supply startup system with a wider input voltage range and the ability to control the restart interval time has become an urgent issue to be solved in the industry. Summary of the Invention
[0005] To solve the aforementioned problems in the prior art, one object of the present invention is to provide a startup adjustment circuit and a flyback power supply startup system having a wider input voltage range and capable of controlling the restart interval.
[0006] To achieve the aforementioned objectives, a startup adjustment circuit of the present invention includes a step-down module, an optical coupling isolation module, a reverse logic IC module, a counting module, and a step-up module.
[0007] The step-down module is used to convert an input power signal into a step-down signal; the optical coupling isolation module is used to receive a system control signal and a step-down signal, and generate a start signal based on the system control signal and the step-down signal; the reverse logic IC module is used to convert the start signal into a logic signal; the counting module is used to count to a preset time and send an on / off signal after receiving the logic signal; and the boost module is used to convert the step-down signal into a boost signal, and output or stop outputting the boost signal based on the on / off signal.
[0008] In one embodiment of the present invention, a step-down module includes a first chip, a first capacitor, a first resistor, a second resistor, and a second capacitor. The first chip includes an input terminal, an adjustment terminal, and an output terminal. An input power signal is inputted via the input terminal of the first chip, and a step-down signal is outputted via the output terminal of the first chip. The first capacitor is connected to the input terminal of the first chip. The first resistor is connected to the output terminal of the first chip. The second resistor is connected to the adjustment terminal of the first chip. The second capacitor is connected to the output terminal of the first chip.
[0009] In one embodiment of the present invention, an optical coupling isolation module includes a third resistor, an optical coupling element, a fourth resistor, and a third capacitor. The optical coupling element has a primary side and a secondary side. The primary side of the optical coupling element is connected to the third resistor and receives a system control signal. The input end of the secondary side of the optical coupling element receives a step-down signal, and the output end of the secondary side of the optical coupling element outputs an activation signal. The fourth resistor is connected to the output end of the secondary side of the optical coupling element. The third capacitor is connected to the output end of the secondary side of the optical coupling element.
[0010] In one embodiment of the present invention, the reverse logic IC module includes a second chip. The second chip includes an input terminal and an output terminal. The second chip receives an activation signal from the input terminal and outputs a logic signal from the output terminal.
[0011] In one embodiment of the present invention, the counting module includes a third chip and an RC circuit. The RC circuit includes a fifth resistor, a sixth resistor, a seventh resistor, a fourth capacitor, a fifth capacitor, and a sixth capacitor connected to the third chip. The third chip receives a logic signal and cooperates with the RC circuit to count to a preset time, and the third chip then sends an on / off signal.
[0012] In one embodiment of the present invention, the boost module includes a fourth chip, a first inductor, a first diode, a second diode, an eighth resistor, a ninth resistor, a seventh capacitor, and an eighth capacitor. The first inductor is connected to the fourth chip, the first diode is connected to the fourth chip, the second diode is connected to the first diode, the eighth resistor is connected to the fourth chip, the ninth resistor is connected to the fourth chip, the seventh capacitor is connected to the first inductor, and the eighth capacitor is connected to the first diode. The fourth chip receives a step-down signal and an on / off signal, and outputs or stops outputting according to the on / off signal. It also cooperates with the first inductor, the first diode, the second diode, the eighth resistor, the ninth resistor, the seventh capacitor, and the eighth capacitor to convert the output of the fourth chip into a boost signal.
[0013] The present invention further provides a flyback power startup system, comprising a power input circuit, a startup adjustment circuit as described in any embodiment of the present invention, a power control circuit, a power output circuit, and a power voltage stabilization circuit.
[0014] The power input circuit is used to receive an unregulated DC power signal and output the input power signal after interference suppression and filtering. The startup adjustment circuit is used to receive the input power signal and output a boost signal. The power control circuit is used to receive the input power signal and the boost signal and convert them into a power control signal. The power control circuit is also used to generate a PWM signal to control whether to output the power control signal. The power output circuit is used to receive the power control signal and output the system control signal after rectification, filtering and surge suppression. The power stabilization circuit is used to receive the system control signal and provide feedback to stabilize the voltage of the PWM signal.
[0015] Compared to the prior art, the flyback power startup system of the present invention utilizes the startup adjustment circuit of the present invention. The input power signal of the startup adjustment circuit of the present invention is first adjusted in voltage by a step-down module and a step-up module. The final output boost signal can be adjusted to comply with the specifications of the PWM driver IC, thereby allowing for input power signals with a wider voltage range. The startup adjustment circuit of the present invention also includes an optical coupling isolation module, a reverse logic IC module, and a counting module. In addition to receiving system control signals and providing overcurrent, overvoltage, and other protection functions, the counting module also provides a timing function. A boost signal is output to start the PWM driver IC only after a default time has been reached. This protects the flyback power startup system of the present invention from damage to the load system or heat accumulation due to an immediate restart. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 FIG. 1 is a schematic diagram of the structure of the startup adjustment circuit according to the first embodiment of the present invention.
[0017] Figure 2 FIG. 4 is a circuit diagram of a step-down module according to a second embodiment of the present invention.
[0018] Figure 3 FIG. 4 is a circuit diagram of an optical coupling isolation module according to a third embodiment of the present invention.
[0019] Figure 4 FIG. 4 is a circuit diagram of an inverting logic IC module according to a fourth embodiment of the present invention.
[0020] Figure 5 FIG. 4 is a circuit diagram of a counting module according to a fifth embodiment of the present invention.
[0021] Figure 6 FIG. 4 is a circuit diagram of a boost module according to a sixth embodiment of the present invention.
[0022] Figure 7 FIG. 1 is a schematic diagram of the structure of a flyback power startup system according to a seventh embodiment of the present invention.
[0023] Explanation of symbols:
[0024] 10 Buck Module
[0025] 11 Optical coupling isolation module
[0026] 12 Reverse Logic IC Module
[0027] 13 Counting module
[0028] 14 Boost module
[0029] 70 Power input circuit
[0030] 700 Interference Suppression Module
[0031] 701 filter module
[0032] 71 Startup adjustment circuit
[0033] 72 Power supply control circuit
[0034] 720 Transformer
[0035] 721 switch module
[0036] 722 Switching Surge Suppression Module
[0037] 723 Current Detection Module
[0038] 724 auxiliary winding rectifier filter module
[0039] 725 PWM driver IC module
[0040] 73 Power output circuit
[0041] 730 output rectifier filter module
[0042] 731 Output Surge Suppression Module
[0043] 74 Power supply voltage regulator circuit
[0044] 740 Photoelectric Feedback Module
[0045] 741 output voltage regulator module
[0046] C1 first capacitor
[0047] C2 Second capacitor
[0048] C3 third capacitor
[0049] C4 fourth capacitor
[0050] C5 fifth capacitor
[0051] C6 Sixth capacitor
[0052] C7 seventh capacitor
[0053] C8 eighth capacitor
[0054] D1 first diode
[0055] D2 second diode
[0056] L1 first inductor
[0057] P1 Optical Coupler Component
[0058] R1 first resistor
[0059] R2 Second resistor
[0060] R3 third resistor
[0061] R4 fourth resistor
[0062] R5 fifth resistor
[0063] R6 Sixth resistor
[0064] R7 seventh resistor
[0065] R8 eighth resistor
[0066] R9 ninth resistor
[0067] ST_UP endpoint
[0068] ST_PWM endpoint
[0069] U1 First Chip
[0070] U2 second chip
[0071] U3 third chip
[0072] U4 fourth chip
[0073] Vboost endpoint
[0074] Vcount endpoint
[0075] Vdown endpoint
[0076] Vin endpoint
[0077] Vsys endpoint DETAILED DESCRIPTION
[0078] The following describes the implementation of the present invention through specific embodiments. People skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different embodiments.
[0079] See also Figure 1 , Figure 1 This is a schematic diagram of the architecture of a startup adjustment circuit according to a first embodiment of the present invention. The startup adjustment circuit includes a step-down module 10, an optically coupled isolation module 11, an inverting logic IC module 12, a counting module 13, and a boost module 14. The startup adjustment circuit can be applied to a flyback power supply startup system.
[0080] The step-down module 10 is used to convert an input power signal into a stepped-down signal. The voltage of the stepped-down signal is designed in conjunction with other components and can be less than or equal to the voltage of the input power signal.
[0081] The optical coupling isolation module 11 is used to receive a system control signal and a voltage reduction signal and generate a start signal according to the system control signal and the voltage reduction signal. The system control signal comes from the flyback power supply start system, and whether the optical coupling isolation module 11 outputs the start signal is controlled by the system control signal.
[0082] The reverse logic IC module 12 converts the activation signal into a logic signal. Upon receiving the logic signal, the counting module 13 counts to a preset time and sends an on / off signal. The counting module 13 uses a counting IC in conjunction with an RC circuit to achieve timing. The preset time can be adjusted by adjusting the values of components such as resistors and capacitors.
[0083] The boost module 14 is used to convert the buck signal into a boost signal and output or stop outputting the boost signal according to the on / off signal. The boost signal can be further used to control the PWM driver IC in the flyback power startup system.
[0084] Because the input power signal is first regulated by the buck and boost modules, the resulting boosted signal is then used to control the PWM driver IC. Therefore, the voltage range of the input power signal is no longer limited by the PWM driver IC's specifications, allowing for a wider range of input power signals. Furthermore, the output or cessation of the boosted signal by the boost module 14 is controlled by an on / off signal, and the counting module 13 can count to a preset time before sending the on / off signal. Therefore, simply setting an appropriate default time can prevent damage to the load system or heat buildup caused by an immediate restart.
[0085] See also Figure 2 , Figure 2This is a circuit diagram of a step-down module according to a second embodiment of the present invention. In one embodiment, the step-down module 10 may include a first chip U1, a first capacitor C1, a first resistor R1, a second resistor R2, and a second capacitor C2. The first chip U1 includes an input terminal, an adjustment terminal, and an output terminal. The input power signal of the terminal Vin is input by the input terminal of the first chip U1, and the output terminal of the first chip U1 outputs a step-down signal to the terminal Vdown. The first capacitor C1 is connected to the input terminal of the first chip U1. The first resistor R1 is connected to the output terminal of the first chip U1. The second resistor R2 is connected to the adjustment terminal of the first chip U1. The second capacitor C2 is connected to the output terminal of the first chip U1.
[0086] See also Figure 3 , Figure 3 This is a circuit diagram of an optical coupling isolation module according to a third embodiment of the present invention. In one embodiment, the optical coupling isolation module 11 may include a third resistor R3, an optical coupling element P1, a fourth resistor R4, and a third capacitor C3. The optical coupling element P1 has a primary side and a secondary side. The primary side of the optical coupling element P1 is connected to the third resistor R3 and receives a system control signal at the terminal Vsys. The input terminal of the secondary side of the optical coupling element P1 receives a voltage drop signal at the terminal Vdown, and the output terminal of the secondary side of the optical coupling element P1 outputs a startup signal to the terminal ST_UP. The fourth resistor R4 is connected to the output terminal of the secondary side of the optical coupling element P1. The third capacitor C3 is connected to the output terminal of the secondary side of the optical coupling element P1.
[0087] See also Figure 4 , Figure 4 FIG2 is a circuit diagram of a reverse logic IC module according to a fourth embodiment of the present invention. In one embodiment, the reverse logic IC module 12 may include a second chip U2. The second chip U2 includes an input terminal and an output terminal. The input terminal of the second chip U2 receives an activation signal from the terminal ST_UP and outputs a logic signal to the terminal Vcount. The second chip U2 may also receive a voltage supply from a step-down signal from the terminal Vdown.
[0088] See also Figure 5 , Figure 5 This is a circuit diagram of a counting module according to a fifth embodiment of the present invention. In one embodiment, the counting module 13 may include a third chip U3 and an RC circuit. The RC circuit includes a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, a fourth capacitor C4, a fifth capacitor C5, and a sixth capacitor C6 connected to the third chip U3. The third chip U3 receives a logic signal from the terminal Vcount and, in conjunction with the RC circuit, counts to a default time. The third chip U3 then sends an on / off signal to the terminal ST_PWM.
[0089] See also Figure 6 , Figure 6 This is a circuit diagram of a boost module according to a sixth embodiment of the present invention. In one embodiment, the boost module 14 includes a fourth chip U4, a first inductor L1, a first diode D1, a second diode D2, an eighth resistor R8, a ninth resistor R9, a seventh capacitor C7, and an eighth capacitor C8. The first inductor L1 is connected to the fourth chip U4, the first diode D1 is connected to the fourth chip U4, the second diode D2 is connected to the first diode D1, the eighth resistor R8 is connected to the fourth chip U4, the ninth resistor R9 is connected to the fourth chip U4, the seventh capacitor C7 is connected to the first inductor L1, and the eighth capacitor C8 is connected to the first diode D1. The fourth chip U4 receives a step-down signal at the terminal Vdown and an on / off signal at the terminal ST_PWM, and outputs or stops outputting according to the on / off signal. Furthermore, the fourth chip U4 cooperates with the first inductor L1, the first diode D1, the second diode D2, the eighth resistor R8, the ninth resistor R9, the seventh capacitor C7, and the eighth capacitor C8 to convert the output of the fourth chip U4 into a boost signal to the terminal Vboost.
[0090] See also Figure 7 , Figure 7 FIG1 is a schematic diagram of the architecture of a flyback power startup system according to a seventh embodiment of the present invention. As shown in the figure, the flyback power startup system of the present invention includes a power input circuit 70, a startup adjustment circuit 71 as described in any embodiment of the present invention, a power control circuit 72, a power output circuit 73, and a power voltage stabilization circuit 74.
[0091] The power input circuit 70 is used to receive an unregulated DC power signal and output the input power signal after interference suppression and filtering. For example, the power input circuit 70 may include an interference suppression module 700 and a filtering module 701 .
[0092] The startup adjustment circuit 71 is configured to receive an input power signal and output a boost signal to a terminal Vboost.
[0093] The power control circuit 72 receives an input power signal and a boost signal and converts them into a power control signal. The power control circuit 72 also generates a PWM signal to control whether the power control signal is output. For example, the power control circuit 72 may include a transformer 720, a switch module 721, a switch surge suppression module 722, a current detection module 723, an auxiliary winding rectifier and filter module 724, and a PWM driver IC module 725. The PWM signal is generated by the PWM driver IC module 725.
[0094] The power output circuit 73 is used to receive the power control signal and output the system control signal after rectification, filtering and surge suppression. For example, the power output circuit 73 may include an output rectification and filtering module 730 and an output surge suppression module 731 .
[0095] The power supply voltage regulator circuit 74 is configured to receive the system control signal from the terminal Vsys and provide feedback to stabilize the voltage of the PWM signal. For example, the power supply voltage regulator circuit 74 may include a photoelectric feedback module 740 and an output voltage regulator module 741 .
[0096] Specifically, after the startup adjustment circuit 71 outputs a boost signal to the terminal Vboost, the startup transformer 720 outputs a system control signal to the terminal Vsys. At the same time, the auxiliary winding (AUX Winding) of the transformer 720 takes over the self-power supply to the fourth chip U4 of the startup adjustment circuit 71, and the second diode D2 is used to isolate the power supply at both ends. The transformer 720 outputs a system control signal to the terminal Vsys to activate the optical coupling component P1 of the startup adjustment circuit 71. The startup signal of the terminal ST_UP is high, and the third chip U3 stops and outputs a low-voltage on / off signal to the terminal ST_PWM. The boost signal output by the boost module 14 to the terminal Vboost is turned off, and no power is output. At this point, the power startup is completed.
[0097] When the PWM driver IC module 725 senses a system overcurrent (OCP) from the current detection module 723, it shuts down its output, turns off the system control signal at terminal Vsys, and simultaneously shuts down the auxiliary winding, which takes over the self-power supply. The startup adjustment circuit 71 then attempts to restart the power supply again, achieving a restart function with a configurable default time after an overcurrent or overvoltage event.
[0098] In summary, the flyback power supply startup system of the present invention adopts the startup adjustment circuit of the present invention, and the input power supply signal of the startup adjustment circuit of the present invention will first be adjusted in voltage by the buck module and the boost module, and the boost signal finally output can be adjusted to meet the specifications of the PWM driver IC, thereby allowing an input power supply signal with a wider voltage range. The startup adjustment circuit of the present invention also includes an optical coupling isolation module, a reverse logic IC module, and a counting module. In addition to being able to receive system control signals and have overcurrent, overvoltage and other protection functions, the counting module also provides a timing function. Only after the default time is reached will the boost signal be output to start the PWM driver IC, which can protect the flyback power supply startup system of the present invention from damage to the load system or heat accumulation effects caused by immediate restart.
[0099] The above description of the preferred embodiments will provide those skilled in the art with a clearer understanding of the features and spirit of the present invention. However, the above embodiments are intended only to illustrate the principles and effects of the present invention and are not intended to limit the present invention. Therefore, any modifications or variations to the above embodiments do not depart from the spirit of the present invention, and the scope of the present invention shall be as set forth in the appended claims.
Claims
1. A startup adjustment circuit, characterized in that: The startup adjustment circuit includes: The step-down module is used to convert an input power signal into a step-down signal. The step-down module includes: The first chip includes an input terminal, an adjustment terminal, and an output terminal, wherein the input power signal is inputted through the input terminal of the first chip, and the output terminal of the first chip outputs the step-down signal; a first capacitor connected to an input terminal of the first chip; a first resistor connected to the output terminal of the first chip; a second resistor connected to the adjustment terminal of the first chip; and a second capacitor connected to the output terminal of the first chip; The optical coupling isolation module is used to receive a system control signal and the voltage reduction signal and generate a start signal according to the system control signal and the voltage reduction signal. The optical coupling isolation module includes: The third resistor; an optical coupling component having a primary side and a secondary side, wherein the primary side of the optical coupling component is connected to the third resistor and receives the system control signal, an input end of the secondary side of the optical coupling component receives the step-down signal, and an output end of the secondary side of the optical coupling component outputs the start signal; a fourth resistor connected to the output terminal of the secondary side of the optical coupling component; and a third capacitor connected to the output terminal of the secondary side of the optical coupling component; A reverse logic IC module is used to convert the start signal into a logic signal, and the reverse logic IC module includes: The second chip includes an input terminal and an output terminal, wherein the start signal is inputted through the input terminal of the second chip and the logic signal is outputted through the output terminal; A counting module is used to count to a default time and send an on / off signal after receiving the logic signal. The counting module includes: a third chip; and an RC circuit including a fifth resistor, a sixth resistor, a seventh resistor, a fourth capacitor, a fifth capacitor, and a sixth capacitor connected to the third chip; The third chip receives the logic signal and cooperates with the RC circuit to count to the default time, and then sends the on / off signal; and A boost module is used to convert the buck signal into a boost signal and output or stop outputting the boost signal according to the on / off signal. The boost module includes: Fourth chip; a first inductor connected to the fourth chip; a first diode connected to the fourth chip; a second diode connected to the first diode; an eighth resistor connected to the fourth chip; a ninth resistor connected to the fourth chip; a seventh capacitor connected to the first inductor; and an eighth capacitor connected to the first diode, Among them, the fourth chip receives the step-down signal and the on / off signal, and outputs or stops outputting according to the on / off signal, and cooperates with the first inductor, the first diode, the second diode, the eighth resistor, the ninth resistor, the seventh capacitor and the eighth capacitor to convert the output of the fourth chip into the boost signal.
2. A flyback power supply starting system, characterized in that: The flyback power supply starting system includes: A power input circuit is used to receive an unregulated DC power signal and output the input power signal after interference suppression and filtering; The startup adjustment circuit as claimed in claim 1, configured to receive the input power signal and output the boost signal; a power control circuit for receiving the input power signal and the boost signal and converting them into a power control signal, the power control circuit further for generating a PWM signal to control whether to output the power control signal; The power output circuit receives the power control signal and outputs the system control signal after rectification, filtering and surge suppression; as well as The power supply voltage stabilizing circuit is used to receive the system control signal and provide feedback to stabilize the voltage of the PWM signal.
Citation Information
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